drivers/net/vmxnet3/vmxnet3_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2010-2015 Intel Corporation
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdio.h>
   7 #include <errno.h>
   8 #include <stdint.h>
   9 #include <string.h>
  10 #include <unistd.h>
  11 #include <stdarg.h>
  12 #include <fcntl.h>
  13 #include <inttypes.h>
  14 #include <rte_byteorder.h>
  15 #include <rte_common.h>
  16 #include <rte_cycles.h>
  17
  18 #include <rte_interrupts.h>
  19 #include <rte_log.h>
  20 #include <rte_debug.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_branch_prediction.h>
  24 #include <rte_memory.h>
  25 #include <rte_memzone.h>
  26 #include <rte_eal.h>
  27 #include <rte_alarm.h>
  28 #include <rte_ether.h>
  29 #include <rte_ethdev_driver.h>
  30 #include <rte_ethdev_pci.h>
  31 #include <rte_string_fns.h>
  32 #include <rte_malloc.h>
  33 #include <rte_dev.h>
  34
  35 #include "base/vmxnet3_defs.h"
  36
  37 #include "vmxnet3_ring.h"
  38 #include "vmxnet3_logs.h"
  39 #include "vmxnet3_ethdev.h"
  40
  41 #define PROCESS_SYS_EVENTS 0
  42
  43 #define VMXNET3_TX_MAX_SEG      UINT8_MAX
  44
  45 #define VMXNET3_TX_OFFLOAD_CAP          \
  46         (DEV_TX_OFFLOAD_VLAN_INSERT |   \
  47          DEV_TX_OFFLOAD_IPV4_CKSUM |    \
  48          DEV_TX_OFFLOAD_TCP_CKSUM |     \
  49          DEV_TX_OFFLOAD_UDP_CKSUM |     \
  50          DEV_TX_OFFLOAD_TCP_TSO |       \
  51          DEV_TX_OFFLOAD_MULTI_SEGS)
  52
  53 #define VMXNET3_RX_OFFLOAD_CAP          \
  54         (DEV_RX_OFFLOAD_VLAN_STRIP |    \
  55          DEV_RX_OFFLOAD_SCATTER |       \
  56          DEV_RX_OFFLOAD_IPV4_CKSUM |    \
  57          DEV_RX_OFFLOAD_UDP_CKSUM |     \
  58          DEV_RX_OFFLOAD_TCP_CKSUM |     \
  59          DEV_RX_OFFLOAD_TCP_LRO |       \
  60          DEV_RX_OFFLOAD_JUMBO_FRAME)
  61
  62 static int eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev);
  63 static int eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev);
  64 static int vmxnet3_dev_configure(struct rte_eth_dev *dev);
  65 static int vmxnet3_dev_start(struct rte_eth_dev *dev);
  66 static void vmxnet3_dev_stop(struct rte_eth_dev *dev);
  67 static void vmxnet3_dev_close(struct rte_eth_dev *dev);
  68 static void vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set);
  69 static void vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev);
  70 static void vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev);
  71 static void vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev);
  72 static void vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev);
  73 static int __vmxnet3_dev_link_update(struct rte_eth_dev *dev,
  74                                      int wait_to_complete);
  75 static int vmxnet3_dev_link_update(struct rte_eth_dev *dev,
  76                                    int wait_to_complete);
  77 static void vmxnet3_hw_stats_save(struct vmxnet3_hw *hw);
  78 static int vmxnet3_dev_stats_get(struct rte_eth_dev *dev,
  79                                   struct rte_eth_stats *stats);
  80 static int vmxnet3_dev_xstats_get_names(struct rte_eth_dev *dev,
  81                                         struct rte_eth_xstat_name *xstats,
  82                                         unsigned int n);
  83 static int vmxnet3_dev_xstats_get(struct rte_eth_dev *dev,
  84                                   struct rte_eth_xstat *xstats, unsigned int n);
  85 static void vmxnet3_dev_info_get(struct rte_eth_dev *dev,
  86                                  struct rte_eth_dev_info *dev_info);
  87 static const uint32_t *
  88 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev);
  89 static int vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev,
  90                                        uint16_t vid, int on);
  91 static int vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  92 static int vmxnet3_mac_addr_set(struct rte_eth_dev *dev,
  93                                  struct ether_addr *mac_addr);
  94 static void vmxnet3_interrupt_handler(void *param);
  95
  96 int vmxnet3_logtype_init;
  97 int vmxnet3_logtype_driver;
  98
  99 /*
 100  * The set of PCI devices this driver supports
 101  */
 102 #define VMWARE_PCI_VENDOR_ID 0x15AD
 103 #define VMWARE_DEV_ID_VMXNET3 0x07B0
 104 static const struct rte_pci_id pci_id_vmxnet3_map[] = {
 105         { RTE_PCI_DEVICE(VMWARE_PCI_VENDOR_ID, VMWARE_DEV_ID_VMXNET3) },
 106         { .vendor_id = 0, /* sentinel */ },
 107 };
 108
 109 static const struct eth_dev_ops vmxnet3_eth_dev_ops = {
 110         .dev_configure        = vmxnet3_dev_configure,
 111         .dev_start            = vmxnet3_dev_start,
 112         .dev_stop             = vmxnet3_dev_stop,
 113         .dev_close            = vmxnet3_dev_close,
 114         .promiscuous_enable   = vmxnet3_dev_promiscuous_enable,
 115         .promiscuous_disable  = vmxnet3_dev_promiscuous_disable,
 116         .allmulticast_enable  = vmxnet3_dev_allmulticast_enable,
 117         .allmulticast_disable = vmxnet3_dev_allmulticast_disable,
 118         .link_update          = vmxnet3_dev_link_update,
 119         .stats_get            = vmxnet3_dev_stats_get,
 120         .xstats_get_names     = vmxnet3_dev_xstats_get_names,
 121         .xstats_get           = vmxnet3_dev_xstats_get,
 122         .mac_addr_set         = vmxnet3_mac_addr_set,
 123         .dev_infos_get        = vmxnet3_dev_info_get,
 124         .dev_supported_ptypes_get = vmxnet3_dev_supported_ptypes_get,
 125         .vlan_filter_set      = vmxnet3_dev_vlan_filter_set,
 126         .vlan_offload_set     = vmxnet3_dev_vlan_offload_set,
 127         .rx_queue_setup       = vmxnet3_dev_rx_queue_setup,
 128         .rx_queue_release     = vmxnet3_dev_rx_queue_release,
 129         .tx_queue_setup       = vmxnet3_dev_tx_queue_setup,
 130         .tx_queue_release     = vmxnet3_dev_tx_queue_release,
 131 };
 132
 133 struct vmxnet3_xstats_name_off {
 134         char name[RTE_ETH_XSTATS_NAME_SIZE];
 135         unsigned int offset;
 136 };
 137
 138 /* tx_qX_ is prepended to the name string here */
 139 static const struct vmxnet3_xstats_name_off vmxnet3_txq_stat_strings[] = {
 140         {"drop_total",         offsetof(struct vmxnet3_txq_stats, drop_total)},
 141         {"drop_too_many_segs", offsetof(struct vmxnet3_txq_stats, drop_too_many_segs)},
 142         {"drop_tso",           offsetof(struct vmxnet3_txq_stats, drop_tso)},
 143         {"tx_ring_full",       offsetof(struct vmxnet3_txq_stats, tx_ring_full)},
 144 };
 145
 146 /* rx_qX_ is prepended to the name string here */
 147 static const struct vmxnet3_xstats_name_off vmxnet3_rxq_stat_strings[] = {
 148         {"drop_total",           offsetof(struct vmxnet3_rxq_stats, drop_total)},
 149         {"drop_err",             offsetof(struct vmxnet3_rxq_stats, drop_err)},
 150         {"drop_fcs",             offsetof(struct vmxnet3_rxq_stats, drop_fcs)},
 151         {"rx_buf_alloc_failure", offsetof(struct vmxnet3_rxq_stats, rx_buf_alloc_failure)},
 152 };
 153
 154 static const struct rte_memzone *
 155 gpa_zone_reserve(struct rte_eth_dev *dev, uint32_t size,
 156                  const char *post_string, int socket_id,
 157                  uint16_t align, bool reuse)
 158 {
 159         char z_name[RTE_MEMZONE_NAMESIZE];
 160         const struct rte_memzone *mz;
 161
 162         snprintf(z_name, sizeof(z_name), "%s_%d_%s",
 163                  dev->device->driver->name, dev->data->port_id, post_string);
 164
 165         mz = rte_memzone_lookup(z_name);
 166         if (!reuse) {
 167                 if (mz)
 168                         rte_memzone_free(mz);
 169                 return rte_memzone_reserve_aligned(z_name, size, socket_id,
 170                                 RTE_MEMZONE_IOVA_CONTIG, align);
 171         }
 172
 173         if (mz)
 174                 return mz;
 175
 176         return rte_memzone_reserve_aligned(z_name, size, socket_id,
 177                         RTE_MEMZONE_IOVA_CONTIG, align);
 178 }
 179
 180 /*
 181  * This function is based on vmxnet3_disable_intr()
 182  */
 183 static void
 184 vmxnet3_disable_intr(struct vmxnet3_hw *hw)
 185 {
 186         int i;
 187
 188         PMD_INIT_FUNC_TRACE();
 189
 190         hw->shared->devRead.intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
 191         for (i = 0; i < hw->num_intrs; i++)
 192                 VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 1);
 193 }
 194
 195 static void
 196 vmxnet3_enable_intr(struct vmxnet3_hw *hw)
 197 {
 198         int i;
 199
 200         PMD_INIT_FUNC_TRACE();
 201
 202         hw->shared->devRead.intrConf.intrCtrl &= ~VMXNET3_IC_DISABLE_ALL;
 203         for (i = 0; i < hw->num_intrs; i++)
 204                 VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 0);
 205 }
 206
 207 /*
 208  * Gets tx data ring descriptor size.
 209  */
 210 static uint16_t
 211 eth_vmxnet3_txdata_get(struct vmxnet3_hw *hw)
 212 {
 213         uint16 txdata_desc_size;
 214
 215         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 216                                VMXNET3_CMD_GET_TXDATA_DESC_SIZE);
 217         txdata_desc_size = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 218
 219         return (txdata_desc_size < VMXNET3_TXDATA_DESC_MIN_SIZE ||
 220                 txdata_desc_size > VMXNET3_TXDATA_DESC_MAX_SIZE ||
 221                 txdata_desc_size & VMXNET3_TXDATA_DESC_SIZE_MASK) ?
 222                 sizeof(struct Vmxnet3_TxDataDesc) : txdata_desc_size;
 223 }
 224
 225 /*
 226  * It returns 0 on success.
 227  */
 228 static int
 229 eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev)
 230 {
 231         struct rte_pci_device *pci_dev;
 232         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
 233         uint32_t mac_hi, mac_lo, ver;
 234         struct rte_eth_link link;
 235
 236         PMD_INIT_FUNC_TRACE();
 237
 238         eth_dev->dev_ops = &vmxnet3_eth_dev_ops;
 239         eth_dev->rx_pkt_burst = &vmxnet3_recv_pkts;
 240         eth_dev->tx_pkt_burst = &vmxnet3_xmit_pkts;
 241         eth_dev->tx_pkt_prepare = vmxnet3_prep_pkts;
 242         pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
 243
 244         /*
 245          * for secondary processes, we don't initialize any further as primary
 246          * has already done this work.
 247          */
 248         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 249                 return 0;
 250
 251         rte_eth_copy_pci_info(eth_dev, pci_dev);
 252
 253         /* Vendor and Device ID need to be set before init of shared code */
 254         hw->device_id = pci_dev->id.device_id;
 255         hw->vendor_id = pci_dev->id.vendor_id;
 256         hw->hw_addr0 = (void *)pci_dev->mem_resource[0].addr;
 257         hw->hw_addr1 = (void *)pci_dev->mem_resource[1].addr;
 258
 259         hw->num_rx_queues = 1;
 260         hw->num_tx_queues = 1;
 261         hw->bufs_per_pkt = 1;
 262
 263         /* Check h/w version compatibility with driver. */
 264         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_VRRS);
 265         PMD_INIT_LOG(DEBUG, "Hardware version : %d", ver);
 266
 267         if (ver & (1 << VMXNET3_REV_3)) {
 268                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
 269                                        1 << VMXNET3_REV_3);
 270                 hw->version = VMXNET3_REV_3 + 1;
 271         } else if (ver & (1 << VMXNET3_REV_2)) {
 272                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
 273                                        1 << VMXNET3_REV_2);
 274                 hw->version = VMXNET3_REV_2 + 1;
 275         } else if (ver & (1 << VMXNET3_REV_1)) {
 276                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
 277                                        1 << VMXNET3_REV_1);
 278                 hw->version = VMXNET3_REV_1 + 1;
 279         } else {
 280                 PMD_INIT_LOG(ERR, "Incompatible hardware version: %d", ver);
 281                 return -EIO;
 282         }
 283
 284         PMD_INIT_LOG(DEBUG, "Using device version %d\n", hw->version);
 285
 286         /* Check UPT version compatibility with driver. */
 287         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_UVRS);
 288         PMD_INIT_LOG(DEBUG, "UPT hardware version : %d", ver);
 289         if (ver & 0x1)
 290                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_UVRS, 1);
 291         else {
 292                 PMD_INIT_LOG(ERR, "Incompatible UPT version.");
 293                 return -EIO;
 294         }
 295
 296         /* Getting MAC Address */
 297         mac_lo = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACL);
 298         mac_hi = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACH);
 299         memcpy(hw->perm_addr, &mac_lo, 4);
 300         memcpy(hw->perm_addr + 4, &mac_hi, 2);
 301
 302         /* Allocate memory for storing MAC addresses */
 303         eth_dev->data->mac_addrs = rte_zmalloc("vmxnet3", ETHER_ADDR_LEN *
 304                                                VMXNET3_MAX_MAC_ADDRS, 0);
 305         if (eth_dev->data->mac_addrs == NULL) {
 306                 PMD_INIT_LOG(ERR,
 307                              "Failed to allocate %d bytes needed to store MAC addresses",
 308                              ETHER_ADDR_LEN * VMXNET3_MAX_MAC_ADDRS);
 309                 return -ENOMEM;
 310         }
 311         /* Copy the permanent MAC address */
 312         ether_addr_copy((struct ether_addr *) hw->perm_addr,
 313                         &eth_dev->data->mac_addrs[0]);
 314
 315         PMD_INIT_LOG(DEBUG, "MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
 316                      hw->perm_addr[0], hw->perm_addr[1], hw->perm_addr[2],
 317                      hw->perm_addr[3], hw->perm_addr[4], hw->perm_addr[5]);
 318
 319         /* Put device in Quiesce Mode */
 320         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
 321
 322         /* allow untagged pkts */
 323         VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, 0);
 324
 325         hw->txdata_desc_size = VMXNET3_VERSION_GE_3(hw) ?
 326                 eth_vmxnet3_txdata_get(hw) : sizeof(struct Vmxnet3_TxDataDesc);
 327
 328         hw->rxdata_desc_size = VMXNET3_VERSION_GE_3(hw) ?
 329                 VMXNET3_DEF_RXDATA_DESC_SIZE : 0;
 330         RTE_ASSERT((hw->rxdata_desc_size & ~VMXNET3_RXDATA_DESC_SIZE_MASK) ==
 331                    hw->rxdata_desc_size);
 332
 333         /* clear shadow stats */
 334         memset(hw->saved_tx_stats, 0, sizeof(hw->saved_tx_stats));
 335         memset(hw->saved_rx_stats, 0, sizeof(hw->saved_rx_stats));
 336
 337         /* set the initial link status */
 338         memset(&link, 0, sizeof(link));
 339         link.link_duplex = ETH_LINK_FULL_DUPLEX;
 340         link.link_speed = ETH_SPEED_NUM_10G;
 341         link.link_autoneg = ETH_LINK_FIXED;
 342         rte_eth_linkstatus_set(eth_dev, &link);
 343
 344         return 0;
 345 }
 346
 347 static int
 348 eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev)
 349 {
 350         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
 351
 352         PMD_INIT_FUNC_TRACE();
 353
 354         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 355                 return 0;
 356
 357         if (hw->adapter_stopped == 0)
 358                 vmxnet3_dev_close(eth_dev);
 359
 360         eth_dev->dev_ops = NULL;
 361         eth_dev->rx_pkt_burst = NULL;
 362         eth_dev->tx_pkt_burst = NULL;
 363         eth_dev->tx_pkt_prepare = NULL;
 364
 365         rte_free(eth_dev->data->mac_addrs);
 366         eth_dev->data->mac_addrs = NULL;
 367
 368         return 0;
 369 }
 370
 371 static int eth_vmxnet3_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 372         struct rte_pci_device *pci_dev)
 373 {
 374         return rte_eth_dev_pci_generic_probe(pci_dev,
 375                 sizeof(struct vmxnet3_hw), eth_vmxnet3_dev_init);
 376 }
 377
 378 static int eth_vmxnet3_pci_remove(struct rte_pci_device *pci_dev)
 379 {
 380         return rte_eth_dev_pci_generic_remove(pci_dev, eth_vmxnet3_dev_uninit);
 381 }
 382
 383 static struct rte_pci_driver rte_vmxnet3_pmd = {
 384         .id_table = pci_id_vmxnet3_map,
 385         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
 386         .probe = eth_vmxnet3_pci_probe,
 387         .remove = eth_vmxnet3_pci_remove,
 388 };
 389
 390 static int
 391 vmxnet3_dev_configure(struct rte_eth_dev *dev)
 392 {
 393         const struct rte_memzone *mz;
 394         struct vmxnet3_hw *hw = dev->data->dev_private;
 395         size_t size;
 396
 397         PMD_INIT_FUNC_TRACE();
 398
 399         if (dev->data->nb_tx_queues > VMXNET3_MAX_TX_QUEUES ||
 400             dev->data->nb_rx_queues > VMXNET3_MAX_RX_QUEUES) {
 401                 PMD_INIT_LOG(ERR, "ERROR: Number of queues not supported");
 402                 return -EINVAL;
 403         }
 404
 405         if (!rte_is_power_of_2(dev->data->nb_rx_queues)) {
 406                 PMD_INIT_LOG(ERR, "ERROR: Number of rx queues not power of 2");
 407                 return -EINVAL;
 408         }
 409
 410         size = dev->data->nb_rx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
 411                 dev->data->nb_tx_queues * sizeof(struct Vmxnet3_RxQueueDesc);
 412
 413         if (size > UINT16_MAX)
 414                 return -EINVAL;
 415
 416         hw->num_rx_queues = (uint8_t)dev->data->nb_rx_queues;
 417         hw->num_tx_queues = (uint8_t)dev->data->nb_tx_queues;
 418
 419         /*
 420          * Allocate a memzone for Vmxnet3_DriverShared - Vmxnet3_DSDevRead
 421          * on current socket
 422          */
 423         mz = gpa_zone_reserve(dev, sizeof(struct Vmxnet3_DriverShared),
 424                               "shared", rte_socket_id(), 8, 1);
 425
 426         if (mz == NULL) {
 427                 PMD_INIT_LOG(ERR, "ERROR: Creating shared zone");
 428                 return -ENOMEM;
 429         }
 430         memset(mz->addr, 0, mz->len);
 431
 432         hw->shared = mz->addr;
 433         hw->sharedPA = mz->iova;
 434
 435         /*
 436          * Allocate a memzone for Vmxnet3_RxQueueDesc - Vmxnet3_TxQueueDesc
 437          * on current socket.
 438          *
 439          * We cannot reuse this memzone from previous allocation as its size
 440          * depends on the number of tx and rx queues, which could be different
 441          * from one config to another.
 442          */
 443         mz = gpa_zone_reserve(dev, size, "queuedesc", rte_socket_id(),
 444                               VMXNET3_QUEUE_DESC_ALIGN, 0);
 445         if (mz == NULL) {
 446                 PMD_INIT_LOG(ERR, "ERROR: Creating queue descriptors zone");
 447                 return -ENOMEM;
 448         }
 449         memset(mz->addr, 0, mz->len);
 450
 451         hw->tqd_start = (Vmxnet3_TxQueueDesc *)mz->addr;
 452         hw->rqd_start = (Vmxnet3_RxQueueDesc *)(hw->tqd_start + hw->num_tx_queues);
 453
 454         hw->queueDescPA = mz->iova;
 455         hw->queue_desc_len = (uint16_t)size;
 456
 457         if (dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 458                 /* Allocate memory structure for UPT1_RSSConf and configure */
 459                 mz = gpa_zone_reserve(dev, sizeof(struct VMXNET3_RSSConf),
 460                                       "rss_conf", rte_socket_id(),
 461                                       RTE_CACHE_LINE_SIZE, 1);
 462                 if (mz == NULL) {
 463                         PMD_INIT_LOG(ERR,
 464                                      "ERROR: Creating rss_conf structure zone");
 465                         return -ENOMEM;
 466                 }
 467                 memset(mz->addr, 0, mz->len);
 468
 469                 hw->rss_conf = mz->addr;
 470                 hw->rss_confPA = mz->iova;
 471         }
 472
 473         return 0;
 474 }
 475
 476 static void
 477 vmxnet3_write_mac(struct vmxnet3_hw *hw, const uint8_t *addr)
 478 {
 479         uint32_t val;
 480
 481         PMD_INIT_LOG(DEBUG,
 482                      "Writing MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
 483                      addr[0], addr[1], addr[2],
 484                      addr[3], addr[4], addr[5]);
 485
 486         memcpy(&val, addr, 4);
 487         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACL, val);
 488
 489         memcpy(&val, addr + 4, 2);
 490         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACH, val);
 491 }
 492
 493 static int
 494 vmxnet3_dev_setup_memreg(struct rte_eth_dev *dev)
 495 {
 496         struct vmxnet3_hw *hw = dev->data->dev_private;
 497         Vmxnet3_DriverShared *shared = hw->shared;
 498         Vmxnet3_CmdInfo *cmdInfo;
 499         struct rte_mempool *mp[VMXNET3_MAX_RX_QUEUES];
 500         uint8_t index[VMXNET3_MAX_RX_QUEUES + VMXNET3_MAX_TX_QUEUES];
 501         uint32_t num, i, j, size;
 502
 503         if (hw->memRegsPA == 0) {
 504                 const struct rte_memzone *mz;
 505
 506                 size = sizeof(Vmxnet3_MemRegs) +
 507                         (VMXNET3_MAX_RX_QUEUES + VMXNET3_MAX_TX_QUEUES) *
 508                         sizeof(Vmxnet3_MemoryRegion);
 509
 510                 mz = gpa_zone_reserve(dev, size, "memRegs", rte_socket_id(), 8,
 511                                       1);
 512                 if (mz == NULL) {
 513                         PMD_INIT_LOG(ERR, "ERROR: Creating memRegs zone");
 514                         return -ENOMEM;
 515                 }
 516                 memset(mz->addr, 0, mz->len);
 517                 hw->memRegs = mz->addr;
 518                 hw->memRegsPA = mz->iova;
 519         }
 520
 521         num = hw->num_rx_queues;
 522
 523         for (i = 0; i < num; i++) {
 524                 vmxnet3_rx_queue_t *rxq = dev->data->rx_queues[i];
 525
 526                 mp[i] = rxq->mp;
 527                 index[i] = 1 << i;
 528         }
 529
 530         /*
 531          * The same mempool could be used by multiple queues. In such a case,
 532          * remove duplicate mempool entries. Only one entry is kept with
 533          * bitmask indicating queues that are using this mempool.
 534          */
 535         for (i = 1; i < num; i++) {
 536                 for (j = 0; j < i; j++) {
 537                         if (mp[i] == mp[j]) {
 538                                 mp[i] = NULL;
 539                                 index[j] |= 1 << i;
 540                                 break;
 541                         }
 542                 }
 543         }
 544
 545         j = 0;
 546         for (i = 0; i < num; i++) {
 547                 if (mp[i] == NULL)
 548                         continue;
 549
 550                 Vmxnet3_MemoryRegion *mr = &hw->memRegs->memRegs[j];
 551
 552                 mr->startPA =
 553                         (uintptr_t)STAILQ_FIRST(&mp[i]->mem_list)->iova;
 554                 mr->length = STAILQ_FIRST(&mp[i]->mem_list)->len <= INT32_MAX ?
 555                         STAILQ_FIRST(&mp[i]->mem_list)->len : INT32_MAX;
 556                 mr->txQueueBits = index[i];
 557                 mr->rxQueueBits = index[i];
 558
 559                 PMD_INIT_LOG(INFO,
 560                              "index: %u startPA: %" PRIu64 " length: %u, "
 561                              "rxBits: %x",
 562                              j, mr->startPA, mr->length, mr->rxQueueBits);
 563                 j++;
 564         }
 565         hw->memRegs->numRegs = j;
 566         PMD_INIT_LOG(INFO, "numRegs: %u", j);
 567
 568         size = sizeof(Vmxnet3_MemRegs) +
 569                 (j - 1) * sizeof(Vmxnet3_MemoryRegion);
 570
 571         cmdInfo = &shared->cu.cmdInfo;
 572         cmdInfo->varConf.confVer = 1;
 573         cmdInfo->varConf.confLen = size;
 574         cmdInfo->varConf.confPA = hw->memRegsPA;
 575
 576         return 0;
 577 }
 578
 579 static int
 580 vmxnet3_setup_driver_shared(struct rte_eth_dev *dev)
 581 {
 582         struct rte_eth_conf port_conf = dev->data->dev_conf;
 583         struct vmxnet3_hw *hw = dev->data->dev_private;
 584         uint32_t mtu = dev->data->mtu;
 585         Vmxnet3_DriverShared *shared = hw->shared;
 586         Vmxnet3_DSDevRead *devRead = &shared->devRead;
 587         uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads;
 588         uint32_t i;
 589         int ret;
 590
 591         hw->mtu = mtu;
 592
 593         shared->magic = VMXNET3_REV1_MAGIC;
 594         devRead->misc.driverInfo.version = VMXNET3_DRIVER_VERSION_NUM;
 595
 596         /* Setting up Guest OS information */
 597         devRead->misc.driverInfo.gos.gosBits   = sizeof(void *) == 4 ?
 598                 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64;
 599         devRead->misc.driverInfo.gos.gosType   = VMXNET3_GOS_TYPE_LINUX;
 600         devRead->misc.driverInfo.vmxnet3RevSpt = 1;
 601         devRead->misc.driverInfo.uptVerSpt     = 1;
 602
 603         devRead->misc.mtu = rte_le_to_cpu_32(mtu);
 604         devRead->misc.queueDescPA  = hw->queueDescPA;
 605         devRead->misc.queueDescLen = hw->queue_desc_len;
 606         devRead->misc.numTxQueues  = hw->num_tx_queues;
 607         devRead->misc.numRxQueues  = hw->num_rx_queues;
 608
 609         /*
 610          * Set number of interrupts to 1
 611          * PMD by default disables all the interrupts but this is MUST
 612          * to activate device. It needs at least one interrupt for
 613          * link events to handle
 614          */
 615         hw->num_intrs = devRead->intrConf.numIntrs = 1;
 616         devRead->intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
 617
 618         for (i = 0; i < hw->num_tx_queues; i++) {
 619                 Vmxnet3_TxQueueDesc *tqd = &hw->tqd_start[i];
 620                 vmxnet3_tx_queue_t *txq  = dev->data->tx_queues[i];
 621
 622                 txq->shared = &hw->tqd_start[i];
 623
 624                 tqd->ctrl.txNumDeferred  = 0;
 625                 tqd->ctrl.txThreshold    = 1;
 626                 tqd->conf.txRingBasePA   = txq->cmd_ring.basePA;
 627                 tqd->conf.compRingBasePA = txq->comp_ring.basePA;
 628                 tqd->conf.dataRingBasePA = txq->data_ring.basePA;
 629
 630                 tqd->conf.txRingSize   = txq->cmd_ring.size;
 631                 tqd->conf.compRingSize = txq->comp_ring.size;
 632                 tqd->conf.dataRingSize = txq->data_ring.size;
 633                 tqd->conf.txDataRingDescSize = txq->txdata_desc_size;
 634                 tqd->conf.intrIdx      = txq->comp_ring.intr_idx;
 635                 tqd->status.stopped    = TRUE;
 636                 tqd->status.error      = 0;
 637                 memset(&tqd->stats, 0, sizeof(tqd->stats));
 638         }
 639
 640         for (i = 0; i < hw->num_rx_queues; i++) {
 641                 Vmxnet3_RxQueueDesc *rqd  = &hw->rqd_start[i];
 642                 vmxnet3_rx_queue_t *rxq   = dev->data->rx_queues[i];
 643
 644                 rxq->shared = &hw->rqd_start[i];
 645
 646                 rqd->conf.rxRingBasePA[0] = rxq->cmd_ring[0].basePA;
 647                 rqd->conf.rxRingBasePA[1] = rxq->cmd_ring[1].basePA;
 648                 rqd->conf.compRingBasePA  = rxq->comp_ring.basePA;
 649
 650                 rqd->conf.rxRingSize[0]   = rxq->cmd_ring[0].size;
 651                 rqd->conf.rxRingSize[1]   = rxq->cmd_ring[1].size;
 652                 rqd->conf.compRingSize    = rxq->comp_ring.size;
 653                 rqd->conf.intrIdx         = rxq->comp_ring.intr_idx;
 654                 if (VMXNET3_VERSION_GE_3(hw)) {
 655                         rqd->conf.rxDataRingBasePA = rxq->data_ring.basePA;
 656                         rqd->conf.rxDataRingDescSize = rxq->data_desc_size;
 657                 }
 658                 rqd->status.stopped       = TRUE;
 659                 rqd->status.error         = 0;
 660                 memset(&rqd->stats, 0, sizeof(rqd->stats));
 661         }
 662
 663         /* RxMode set to 0 of VMXNET3_RXM_xxx */
 664         devRead->rxFilterConf.rxMode = 0;
 665
 666         /* Setting up feature flags */
 667         if (rx_offloads & DEV_RX_OFFLOAD_CHECKSUM)
 668                 devRead->misc.uptFeatures |= VMXNET3_F_RXCSUM;
 669
 670         if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO) {
 671                 devRead->misc.uptFeatures |= VMXNET3_F_LRO;
 672                 devRead->misc.maxNumRxSG = 0;
 673         }
 674
 675         if (port_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 676                 ret = vmxnet3_rss_configure(dev);
 677                 if (ret != VMXNET3_SUCCESS)
 678                         return ret;
 679
 680                 devRead->misc.uptFeatures |= VMXNET3_F_RSS;
 681                 devRead->rssConfDesc.confVer = 1;
 682                 devRead->rssConfDesc.confLen = sizeof(struct VMXNET3_RSSConf);
 683                 devRead->rssConfDesc.confPA  = hw->rss_confPA;
 684         }
 685
 686         ret = vmxnet3_dev_vlan_offload_set(dev,
 687                         ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
 688         if (ret)
 689                 return ret;
 690
 691         vmxnet3_write_mac(hw, dev->data->mac_addrs->addr_bytes);
 692
 693         return VMXNET3_SUCCESS;
 694 }
 695
 696 /*
 697  * Configure device link speed and setup link.
 698  * Must be called after eth_vmxnet3_dev_init. Other wise it might fail
 699  * It returns 0 on success.
 700  */
 701 static int
 702 vmxnet3_dev_start(struct rte_eth_dev *dev)
 703 {
 704         int ret;
 705         struct vmxnet3_hw *hw = dev->data->dev_private;
 706
 707         PMD_INIT_FUNC_TRACE();
 708
 709         /* Save stats before it is reset by CMD_ACTIVATE */
 710         vmxnet3_hw_stats_save(hw);
 711
 712         ret = vmxnet3_setup_driver_shared(dev);
 713         if (ret != VMXNET3_SUCCESS)
 714                 return ret;
 715
 716         /* check if lsc interrupt feature is enabled */
 717         if (dev->data->dev_conf.intr_conf.lsc) {
 718                 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
 719
 720                 /* Setup interrupt callback  */
 721                 rte_intr_callback_register(&pci_dev->intr_handle,
 722                                            vmxnet3_interrupt_handler, dev);
 723
 724                 if (rte_intr_enable(&pci_dev->intr_handle) < 0) {
 725                         PMD_INIT_LOG(ERR, "interrupt enable failed");
 726                         return -EIO;
 727                 }
 728         }
 729
 730         /* Exchange shared data with device */
 731         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL,
 732                                VMXNET3_GET_ADDR_LO(hw->sharedPA));
 733         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH,
 734                                VMXNET3_GET_ADDR_HI(hw->sharedPA));
 735
 736         /* Activate device by register write */
 737         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_ACTIVATE_DEV);
 738         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 739
 740         if (ret != 0) {
 741                 PMD_INIT_LOG(ERR, "Device activation: UNSUCCESSFUL");
 742                 return -EINVAL;
 743         }
 744
 745         /* Setup memory region for rx buffers */
 746         ret = vmxnet3_dev_setup_memreg(dev);
 747         if (ret == 0) {
 748                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 749                                        VMXNET3_CMD_REGISTER_MEMREGS);
 750                 ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 751                 if (ret != 0)
 752                         PMD_INIT_LOG(DEBUG,
 753                                      "Failed in setup memory region cmd\n");
 754                 ret = 0;
 755         } else {
 756                 PMD_INIT_LOG(DEBUG, "Failed to setup memory region\n");
 757         }
 758
 759         /* Disable interrupts */
 760         vmxnet3_disable_intr(hw);
 761
 762         /*
 763          * Load RX queues with blank mbufs and update next2fill index for device
 764          * Update RxMode of the device
 765          */
 766         ret = vmxnet3_dev_rxtx_init(dev);
 767         if (ret != VMXNET3_SUCCESS) {
 768                 PMD_INIT_LOG(ERR, "Device queue init: UNSUCCESSFUL");
 769                 return ret;
 770         }
 771
 772         hw->adapter_stopped = FALSE;
 773
 774         /* Setting proper Rx Mode and issue Rx Mode Update command */
 775         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_UCAST | VMXNET3_RXM_BCAST, 1);
 776
 777         if (dev->data->dev_conf.intr_conf.lsc) {
 778                 vmxnet3_enable_intr(hw);
 779
 780                 /*
 781                  * Update link state from device since this won't be
 782                  * done upon starting with lsc in use. This is done
 783                  * only after enabling interrupts to avoid any race
 784                  * where the link state could change without an
 785                  * interrupt being fired.
 786                  */
 787                 __vmxnet3_dev_link_update(dev, 0);
 788         }
 789
 790         return VMXNET3_SUCCESS;
 791 }
 792
 793 /*
 794  * Stop device: disable rx and tx functions to allow for reconfiguring.
 795  */
 796 static void
 797 vmxnet3_dev_stop(struct rte_eth_dev *dev)
 798 {
 799         struct rte_eth_link link;
 800         struct vmxnet3_hw *hw = dev->data->dev_private;
 801
 802         PMD_INIT_FUNC_TRACE();
 803
 804         if (hw->adapter_stopped == 1) {
 805                 PMD_INIT_LOG(DEBUG, "Device already closed.");
 806                 return;
 807         }
 808
 809         /* disable interrupts */
 810         vmxnet3_disable_intr(hw);
 811
 812         if (dev->data->dev_conf.intr_conf.lsc) {
 813                 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
 814
 815                 rte_intr_disable(&pci_dev->intr_handle);
 816
 817                 rte_intr_callback_unregister(&pci_dev->intr_handle,
 818                                              vmxnet3_interrupt_handler, dev);
 819         }
 820
 821         /* quiesce the device first */
 822         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
 823         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL, 0);
 824         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH, 0);
 825
 826         /* reset the device */
 827         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
 828         PMD_INIT_LOG(DEBUG, "Device reset.");
 829         hw->adapter_stopped = 0;
 830
 831         vmxnet3_dev_clear_queues(dev);
 832
 833         /* Clear recorded link status */
 834         memset(&link, 0, sizeof(link));
 835         link.link_duplex = ETH_LINK_FULL_DUPLEX;
 836         link.link_speed = ETH_SPEED_NUM_10G;
 837         link.link_autoneg = ETH_LINK_FIXED;
 838         rte_eth_linkstatus_set(dev, &link);
 839 }
 840
 841 /*
 842  * Reset and stop device.
 843  */
 844 static void
 845 vmxnet3_dev_close(struct rte_eth_dev *dev)
 846 {
 847         struct vmxnet3_hw *hw = dev->data->dev_private;
 848
 849         PMD_INIT_FUNC_TRACE();
 850
 851         vmxnet3_dev_stop(dev);
 852         hw->adapter_stopped = 1;
 853 }
 854
 855 static void
 856 vmxnet3_hw_tx_stats_get(struct vmxnet3_hw *hw, unsigned int q,
 857                         struct UPT1_TxStats *res)
 858 {
 859 #define VMXNET3_UPDATE_TX_STAT(h, i, f, r)              \
 860                 ((r)->f = (h)->tqd_start[(i)].stats.f + \
 861                         (h)->saved_tx_stats[(i)].f)
 862
 863         VMXNET3_UPDATE_TX_STAT(hw, q, ucastPktsTxOK, res);
 864         VMXNET3_UPDATE_TX_STAT(hw, q, mcastPktsTxOK, res);
 865         VMXNET3_UPDATE_TX_STAT(hw, q, bcastPktsTxOK, res);
 866         VMXNET3_UPDATE_TX_STAT(hw, q, ucastBytesTxOK, res);
 867         VMXNET3_UPDATE_TX_STAT(hw, q, mcastBytesTxOK, res);
 868         VMXNET3_UPDATE_TX_STAT(hw, q, bcastBytesTxOK, res);
 869         VMXNET3_UPDATE_TX_STAT(hw, q, pktsTxError, res);
 870         VMXNET3_UPDATE_TX_STAT(hw, q, pktsTxDiscard, res);
 871
 872 #undef VMXNET3_UPDATE_TX_STAT
 873 }
 874
 875 static void
 876 vmxnet3_hw_rx_stats_get(struct vmxnet3_hw *hw, unsigned int q,
 877                         struct UPT1_RxStats *res)
 878 {
 879 #define VMXNET3_UPDATE_RX_STAT(h, i, f, r)              \
 880                 ((r)->f = (h)->rqd_start[(i)].stats.f + \
 881                         (h)->saved_rx_stats[(i)].f)
 882
 883         VMXNET3_UPDATE_RX_STAT(hw, q, ucastPktsRxOK, res);
 884         VMXNET3_UPDATE_RX_STAT(hw, q, mcastPktsRxOK, res);
 885         VMXNET3_UPDATE_RX_STAT(hw, q, bcastPktsRxOK, res);
 886         VMXNET3_UPDATE_RX_STAT(hw, q, ucastBytesRxOK, res);
 887         VMXNET3_UPDATE_RX_STAT(hw, q, mcastBytesRxOK, res);
 888         VMXNET3_UPDATE_RX_STAT(hw, q, bcastBytesRxOK, res);
 889         VMXNET3_UPDATE_RX_STAT(hw, q, pktsRxError, res);
 890         VMXNET3_UPDATE_RX_STAT(hw, q, pktsRxOutOfBuf, res);
 891
 892 #undef VMXNET3_UPDATE_RX_STATS
 893 }
 894
 895 static void
 896 vmxnet3_hw_stats_save(struct vmxnet3_hw *hw)
 897 {
 898         unsigned int i;
 899
 900         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
 901
 902         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
 903
 904         for (i = 0; i < hw->num_tx_queues; i++)
 905                 vmxnet3_hw_tx_stats_get(hw, i, &hw->saved_tx_stats[i]);
 906         for (i = 0; i < hw->num_rx_queues; i++)
 907                 vmxnet3_hw_rx_stats_get(hw, i, &hw->saved_rx_stats[i]);
 908 }
 909
 910 static int
 911 vmxnet3_dev_xstats_get_names(struct rte_eth_dev *dev,
 912                              struct rte_eth_xstat_name *xstats_names,
 913                              unsigned int n)
 914 {
 915         unsigned int i, t, count = 0;
 916         unsigned int nstats =
 917                 dev->data->nb_tx_queues * RTE_DIM(vmxnet3_txq_stat_strings) +
 918                 dev->data->nb_rx_queues * RTE_DIM(vmxnet3_rxq_stat_strings);
 919
 920         if (!xstats_names || n < nstats)
 921                 return nstats;
 922
 923         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 924                 if (!dev->data->rx_queues[i])
 925                         continue;
 926
 927                 for (t = 0; t < RTE_DIM(vmxnet3_rxq_stat_strings); t++) {
 928                         snprintf(xstats_names[count].name,
 929                                  sizeof(xstats_names[count].name),
 930                                  "rx_q%u_%s", i,
 931                                  vmxnet3_rxq_stat_strings[t].name);
 932                         count++;
 933                 }
 934         }
 935
 936         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 937                 if (!dev->data->tx_queues[i])
 938                         continue;
 939
 940                 for (t = 0; t < RTE_DIM(vmxnet3_txq_stat_strings); t++) {
 941                         snprintf(xstats_names[count].name,
 942                                  sizeof(xstats_names[count].name),
 943                                  "tx_q%u_%s", i,
 944                                  vmxnet3_txq_stat_strings[t].name);
 945                         count++;
 946                 }
 947         }
 948
 949         return count;
 950 }
 951
 952 static int
 953 vmxnet3_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
 954                        unsigned int n)
 955 {
 956         unsigned int i, t, count = 0;
 957         unsigned int nstats =
 958                 dev->data->nb_tx_queues * RTE_DIM(vmxnet3_txq_stat_strings) +
 959                 dev->data->nb_rx_queues * RTE_DIM(vmxnet3_rxq_stat_strings);
 960
 961         if (n < nstats)
 962                 return nstats;
 963
 964         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 965                 struct vmxnet3_rx_queue *rxq = dev->data->rx_queues[i];
 966
 967                 if (rxq == NULL)
 968                         continue;
 969
 970                 for (t = 0; t < RTE_DIM(vmxnet3_rxq_stat_strings); t++) {
 971                         xstats[count].value = *(uint64_t *)(((char *)&rxq->stats) +
 972                                 vmxnet3_rxq_stat_strings[t].offset);
 973                         xstats[count].id = count;
 974                         count++;
 975                 }
 976         }
 977
 978         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 979                 struct vmxnet3_tx_queue *txq = dev->data->tx_queues[i];
 980
 981                 if (txq == NULL)
 982                         continue;
 983
 984                 for (t = 0; t < RTE_DIM(vmxnet3_txq_stat_strings); t++) {
 985                         xstats[count].value = *(uint64_t *)(((char *)&txq->stats) +
 986                                 vmxnet3_txq_stat_strings[t].offset);
 987                         xstats[count].id = count;
 988                         count++;
 989                 }
 990         }
 991
 992         return count;
 993 }
 994
 995 static int
 996 vmxnet3_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
 997 {
 998         unsigned int i;
 999         struct vmxnet3_hw *hw = dev->data->dev_private;
1000         struct UPT1_TxStats txStats;
1001         struct UPT1_RxStats rxStats;
1002
1003         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
1004
1005         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
1006         for (i = 0; i < hw->num_tx_queues; i++) {
1007                 vmxnet3_hw_tx_stats_get(hw, i, &txStats);
1008
1009                 stats->q_opackets[i] = txStats.ucastPktsTxOK +
1010                         txStats.mcastPktsTxOK +
1011                         txStats.bcastPktsTxOK;
1012
1013                 stats->q_obytes[i] = txStats.ucastBytesTxOK +
1014                         txStats.mcastBytesTxOK +
1015                         txStats.bcastBytesTxOK;
1016
1017                 stats->opackets += stats->q_opackets[i];
1018                 stats->obytes += stats->q_obytes[i];
1019                 stats->oerrors += txStats.pktsTxError + txStats.pktsTxDiscard;
1020         }
1021
1022         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_RX_QUEUES);
1023         for (i = 0; i < hw->num_rx_queues; i++) {
1024                 vmxnet3_hw_rx_stats_get(hw, i, &rxStats);
1025
1026                 stats->q_ipackets[i] = rxStats.ucastPktsRxOK +
1027                         rxStats.mcastPktsRxOK +
1028                         rxStats.bcastPktsRxOK;
1029
1030                 stats->q_ibytes[i] = rxStats.ucastBytesRxOK +
1031                         rxStats.mcastBytesRxOK +
1032                         rxStats.bcastBytesRxOK;
1033
1034                 stats->ipackets += stats->q_ipackets[i];
1035                 stats->ibytes += stats->q_ibytes[i];
1036
1037                 stats->q_errors[i] = rxStats.pktsRxError;
1038                 stats->ierrors += rxStats.pktsRxError;
1039                 stats->imissed += rxStats.pktsRxOutOfBuf;
1040         }
1041
1042         return 0;
1043 }
1044
1045 static void
1046 vmxnet3_dev_info_get(struct rte_eth_dev *dev __rte_unused,
1047                      struct rte_eth_dev_info *dev_info)
1048 {
1049         dev_info->max_rx_queues = VMXNET3_MAX_RX_QUEUES;
1050         dev_info->max_tx_queues = VMXNET3_MAX_TX_QUEUES;
1051         dev_info->min_rx_bufsize = 1518 + RTE_PKTMBUF_HEADROOM;
1052         dev_info->max_rx_pktlen = 16384; /* includes CRC, cf MAXFRS register */
1053         dev_info->speed_capa = ETH_LINK_SPEED_10G;
1054         dev_info->max_mac_addrs = VMXNET3_MAX_MAC_ADDRS;
1055
1056         dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP;
1057         dev_info->flow_type_rss_offloads = VMXNET3_RSS_OFFLOAD_ALL;
1058
1059         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
1060                 .nb_max = VMXNET3_RX_RING_MAX_SIZE,
1061                 .nb_min = VMXNET3_DEF_RX_RING_SIZE,
1062                 .nb_align = 1,
1063         };
1064
1065         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
1066                 .nb_max = VMXNET3_TX_RING_MAX_SIZE,
1067                 .nb_min = VMXNET3_DEF_TX_RING_SIZE,
1068                 .nb_align = 1,
1069                 .nb_seg_max = VMXNET3_TX_MAX_SEG,
1070                 .nb_mtu_seg_max = VMXNET3_MAX_TXD_PER_PKT,
1071         };
1072
1073         dev_info->rx_offload_capa = VMXNET3_RX_OFFLOAD_CAP;
1074         dev_info->rx_queue_offload_capa = 0;
1075         dev_info->tx_offload_capa = VMXNET3_TX_OFFLOAD_CAP;
1076         dev_info->tx_queue_offload_capa = 0;
1077 }
1078
1079 static const uint32_t *
1080 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev)
1081 {
1082         static const uint32_t ptypes[] = {
1083                 RTE_PTYPE_L3_IPV4_EXT,
1084                 RTE_PTYPE_L3_IPV4,
1085                 RTE_PTYPE_UNKNOWN
1086         };
1087
1088         if (dev->rx_pkt_burst == vmxnet3_recv_pkts)
1089                 return ptypes;
1090         return NULL;
1091 }
1092
1093 static int
1094 vmxnet3_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
1095 {
1096         struct vmxnet3_hw *hw = dev->data->dev_private;
1097
1098         ether_addr_copy(mac_addr, (struct ether_addr *)(hw->perm_addr));
1099         vmxnet3_write_mac(hw, mac_addr->addr_bytes);
1100         return 0;
1101 }
1102
1103 /* return 0 means link status changed, -1 means not changed */
1104 static int
1105 __vmxnet3_dev_link_update(struct rte_eth_dev *dev,
1106                           __rte_unused int wait_to_complete)
1107 {
1108         struct vmxnet3_hw *hw = dev->data->dev_private;
1109         struct rte_eth_link link;
1110         uint32_t ret;
1111
1112         memset(&link, 0, sizeof(link));
1113
1114         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
1115         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
1116
1117         if (ret & 0x1)
1118                 link.link_status = ETH_LINK_UP;
1119         link.link_duplex = ETH_LINK_FULL_DUPLEX;
1120         link.link_speed = ETH_SPEED_NUM_10G;
1121         link.link_autoneg = ETH_LINK_FIXED;
1122
1123         return rte_eth_linkstatus_set(dev, &link);
1124 }
1125
1126 static int
1127 vmxnet3_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete)
1128 {
1129         /* Link status doesn't change for stopped dev */
1130         if (dev->data->dev_started == 0)
1131                 return -1;
1132
1133         return __vmxnet3_dev_link_update(dev, wait_to_complete);
1134 }
1135
1136 /* Updating rxmode through Vmxnet3_DriverShared structure in adapter */
1137 static void
1138 vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set)
1139 {
1140         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
1141
1142         if (set)
1143                 rxConf->rxMode = rxConf->rxMode | feature;
1144         else
1145                 rxConf->rxMode = rxConf->rxMode & (~feature);
1146
1147         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_UPDATE_RX_MODE);
1148 }
1149
1150 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
1151 static void
1152 vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev)
1153 {
1154         struct vmxnet3_hw *hw = dev->data->dev_private;
1155         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
1156
1157         memset(vf_table, 0, VMXNET3_VFT_TABLE_SIZE);
1158         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 1);
1159
1160         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1161                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1162 }
1163
1164 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
1165 static void
1166 vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev)
1167 {
1168         struct vmxnet3_hw *hw = dev->data->dev_private;
1169         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
1170         uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads;
1171
1172         if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
1173                 memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
1174         else
1175                 memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
1176         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 0);
1177         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1178                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1179 }
1180
1181 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
1182 static void
1183 vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev)
1184 {
1185         struct vmxnet3_hw *hw = dev->data->dev_private;
1186
1187         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 1);
1188 }
1189
1190 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
1191 static void
1192 vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev)
1193 {
1194         struct vmxnet3_hw *hw = dev->data->dev_private;
1195
1196         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 0);
1197 }
1198
1199 /* Enable/disable filter on vlan */
1200 static int
1201 vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vid, int on)
1202 {
1203         struct vmxnet3_hw *hw = dev->data->dev_private;
1204         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
1205         uint32_t *vf_table = rxConf->vfTable;
1206
1207         /* save state for restore */
1208         if (on)
1209                 VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, vid);
1210         else
1211                 VMXNET3_CLEAR_VFTABLE_ENTRY(hw->shadow_vfta, vid);
1212
1213         /* don't change active filter if in promiscuous mode */
1214         if (rxConf->rxMode & VMXNET3_RXM_PROMISC)
1215                 return 0;
1216
1217         /* set in hardware */
1218         if (on)
1219                 VMXNET3_SET_VFTABLE_ENTRY(vf_table, vid);
1220         else
1221                 VMXNET3_CLEAR_VFTABLE_ENTRY(vf_table, vid);
1222
1223         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1224                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1225         return 0;
1226 }
1227
1228 static int
1229 vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1230 {
1231         struct vmxnet3_hw *hw = dev->data->dev_private;
1232         Vmxnet3_DSDevRead *devRead = &hw->shared->devRead;
1233         uint32_t *vf_table = devRead->rxFilterConf.vfTable;
1234         uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads;
1235
1236         if (mask & ETH_VLAN_STRIP_MASK) {
1237                 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
1238                         devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
1239                 else
1240                         devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN;
1241
1242                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1243                                        VMXNET3_CMD_UPDATE_FEATURE);
1244         }
1245
1246         if (mask & ETH_VLAN_FILTER_MASK) {
1247                 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
1248                         memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
1249                 else
1250                         memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
1251
1252                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1253                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1254         }
1255
1256         return 0;
1257 }
1258
1259 static void
1260 vmxnet3_process_events(struct rte_eth_dev *dev)
1261 {
1262         struct vmxnet3_hw *hw = dev->data->dev_private;
1263         uint32_t events = hw->shared->ecr;
1264
1265         if (!events)
1266                 return;
1267
1268         /*
1269          * ECR bits when written with 1b are cleared. Hence write
1270          * events back to ECR so that the bits which were set will be reset.
1271          */
1272         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_ECR, events);
1273
1274         /* Check if link state has changed */
1275         if (events & VMXNET3_ECR_LINK) {
1276                 PMD_DRV_LOG(DEBUG, "Process events: VMXNET3_ECR_LINK event");
1277                 if (vmxnet3_dev_link_update(dev, 0) == 0)
1278                         _rte_eth_dev_callback_process(dev,
1279                                                       RTE_ETH_EVENT_INTR_LSC,
1280                                                       NULL);
1281         }
1282
1283         /* Check if there is an error on xmit/recv queues */
1284         if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
1285                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1286                                        VMXNET3_CMD_GET_QUEUE_STATUS);
1287
1288                 if (hw->tqd_start->status.stopped)
1289                         PMD_DRV_LOG(ERR, "tq error 0x%x",
1290                                     hw->tqd_start->status.error);
1291
1292                 if (hw->rqd_start->status.stopped)
1293                         PMD_DRV_LOG(ERR, "rq error 0x%x",
1294                                      hw->rqd_start->status.error);
1295
1296                 /* Reset the device */
1297                 /* Have to reset the device */
1298         }
1299
1300         if (events & VMXNET3_ECR_DIC)
1301                 PMD_DRV_LOG(DEBUG, "Device implementation change event.");
1302
1303         if (events & VMXNET3_ECR_DEBUG)
1304                 PMD_DRV_LOG(DEBUG, "Debug event generated by device.");
1305 }
1306
1307 static void
1308 vmxnet3_interrupt_handler(void *param)
1309 {
1310         struct rte_eth_dev *dev = param;
1311         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
1312
1313         vmxnet3_process_events(dev);
1314
1315         if (rte_intr_enable(&pci_dev->intr_handle) < 0)
1316                 PMD_DRV_LOG(ERR, "interrupt enable failed");
1317 }
1318
1319 RTE_PMD_REGISTER_PCI(net_vmxnet3, rte_vmxnet3_pmd);
1320 RTE_PMD_REGISTER_PCI_TABLE(net_vmxnet3, pci_id_vmxnet3_map);
1321 RTE_PMD_REGISTER_KMOD_DEP(net_vmxnet3, "* igb_uio | uio_pci_generic | vfio-pci");
1322
1323 RTE_INIT(vmxnet3_init_log);
1324 static void
1325 vmxnet3_init_log(void)
1326 {
1327         vmxnet3_logtype_init = rte_log_register("pmd.net.vmxnet3.init");
1328         if (vmxnet3_logtype_init >= 0)
1329                 rte_log_set_level(vmxnet3_logtype_init, RTE_LOG_NOTICE);
1330         vmxnet3_logtype_driver = rte_log_register("pmd.net.vmxnet3.driver");
1331         if (vmxnet3_logtype_driver >= 0)
1332                 rte_log_set_level(vmxnet3_logtype_driver, RTE_LOG_NOTICE);
1333 }