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34 #include <sys/queue.h>
43 #include <rte_byteorder.h>
44 #include <rte_common.h>
45 #include <rte_cycles.h>
47 #include <rte_interrupts.h>
49 #include <rte_debug.h>
51 #include <rte_atomic.h>
52 #include <rte_branch_prediction.h>
53 #include <rte_memory.h>
54 #include <rte_memzone.h>
56 #include <rte_alarm.h>
57 #include <rte_ether.h>
58 #include <rte_ethdev.h>
59 #include <rte_atomic.h>
60 #include <rte_string_fns.h>
61 #include <rte_malloc.h>
64 #include "base/vmxnet3_defs.h"
66 #include "vmxnet3_ring.h"
67 #include "vmxnet3_logs.h"
68 #include "vmxnet3_ethdev.h"
70 #define PROCESS_SYS_EVENTS 0
72 static int eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev);
73 static int vmxnet3_dev_configure(struct rte_eth_dev *dev);
74 static int vmxnet3_dev_start(struct rte_eth_dev *dev);
75 static void vmxnet3_dev_stop(struct rte_eth_dev *dev);
76 static void vmxnet3_dev_close(struct rte_eth_dev *dev);
77 static void vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set);
78 static void vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev);
79 static void vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev);
80 static void vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev);
81 static void vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev);
82 static int vmxnet3_dev_link_update(struct rte_eth_dev *dev,
83 int wait_to_complete);
84 static void vmxnet3_dev_stats_get(struct rte_eth_dev *dev,
85 struct rte_eth_stats *stats);
86 static void vmxnet3_dev_info_get(struct rte_eth_dev *dev,
87 struct rte_eth_dev_info *dev_info);
88 static int vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev,
89 uint16_t vid, int on);
90 static void vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask);
91 static void vmxnet3_dev_vlan_offload_set_clear(struct rte_eth_dev *dev,
94 #if PROCESS_SYS_EVENTS == 1
95 static void vmxnet3_process_events(struct vmxnet3_hw *);
98 * The set of PCI devices this driver supports
100 static const struct rte_pci_id pci_id_vmxnet3_map[] = {
102 #define RTE_PCI_DEV_ID_DECL_VMXNET3(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
103 #include "rte_pci_dev_ids.h"
105 { .vendor_id = 0, /* sentinel */ },
108 static const struct eth_dev_ops vmxnet3_eth_dev_ops = {
109 .dev_configure = vmxnet3_dev_configure,
110 .dev_start = vmxnet3_dev_start,
111 .dev_stop = vmxnet3_dev_stop,
112 .dev_close = vmxnet3_dev_close,
113 .promiscuous_enable = vmxnet3_dev_promiscuous_enable,
114 .promiscuous_disable = vmxnet3_dev_promiscuous_disable,
115 .allmulticast_enable = vmxnet3_dev_allmulticast_enable,
116 .allmulticast_disable = vmxnet3_dev_allmulticast_disable,
117 .link_update = vmxnet3_dev_link_update,
118 .stats_get = vmxnet3_dev_stats_get,
119 .dev_infos_get = vmxnet3_dev_info_get,
120 .vlan_filter_set = vmxnet3_dev_vlan_filter_set,
121 .vlan_offload_set = vmxnet3_dev_vlan_offload_set,
122 .rx_queue_setup = vmxnet3_dev_rx_queue_setup,
123 .rx_queue_release = vmxnet3_dev_rx_queue_release,
124 .tx_queue_setup = vmxnet3_dev_tx_queue_setup,
125 .tx_queue_release = vmxnet3_dev_tx_queue_release,
128 static const struct rte_memzone *
129 gpa_zone_reserve(struct rte_eth_dev *dev, uint32_t size,
130 const char *post_string, int socket_id, uint16_t align)
132 char z_name[RTE_MEMZONE_NAMESIZE];
133 const struct rte_memzone *mz;
135 snprintf(z_name, sizeof(z_name), "%s_%d_%s",
136 dev->driver->pci_drv.name, dev->data->port_id, post_string);
138 mz = rte_memzone_lookup(z_name);
142 return rte_memzone_reserve_aligned(z_name, size,
143 socket_id, 0, align);
147 * Atomically reads the link status information from global
148 * structure rte_eth_dev.
151 * - Pointer to the structure rte_eth_dev to read from.
152 * - Pointer to the buffer to be saved with the link status.
155 * - On success, zero.
156 * - On failure, negative value.
159 rte_vmxnet3_dev_atomic_write_link_status(struct rte_eth_dev *dev,
160 struct rte_eth_link *link)
162 struct rte_eth_link *dst = &(dev->data->dev_link);
163 struct rte_eth_link *src = link;
165 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
166 *(uint64_t *)src) == 0)
173 * This function is based on vmxnet3_disable_intr()
176 vmxnet3_disable_intr(struct vmxnet3_hw *hw)
180 PMD_INIT_FUNC_TRACE();
182 hw->shared->devRead.intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
183 for (i = 0; i < VMXNET3_MAX_INTRS; i++)
184 VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 1);
188 * It returns 0 on success.
191 eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev)
193 struct rte_pci_device *pci_dev;
194 struct vmxnet3_hw *hw = eth_dev->data->dev_private;
195 uint32_t mac_hi, mac_lo, ver;
197 PMD_INIT_FUNC_TRACE();
199 eth_dev->dev_ops = &vmxnet3_eth_dev_ops;
200 eth_dev->rx_pkt_burst = &vmxnet3_recv_pkts;
201 eth_dev->tx_pkt_burst = &vmxnet3_xmit_pkts;
202 pci_dev = eth_dev->pci_dev;
205 * for secondary processes, we don't initialize any further as primary
206 * has already done this work.
208 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
211 /* Vendor and Device ID need to be set before init of shared code */
212 hw->device_id = pci_dev->id.device_id;
213 hw->vendor_id = pci_dev->id.vendor_id;
214 hw->hw_addr0 = (void *)pci_dev->mem_resource[0].addr;
215 hw->hw_addr1 = (void *)pci_dev->mem_resource[1].addr;
217 hw->num_rx_queues = 1;
218 hw->num_tx_queues = 1;
219 hw->bufs_per_pkt = 1;
221 /* Check h/w version compatibility with driver. */
222 ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_VRRS);
223 PMD_INIT_LOG(DEBUG, "Hardware version : %d", ver);
225 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS, 1);
227 PMD_INIT_LOG(ERR, "Incompatible h/w version, should be 0x1");
231 /* Check UPT version compatibility with driver. */
232 ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_UVRS);
233 PMD_INIT_LOG(DEBUG, "UPT hardware version : %d", ver);
235 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_UVRS, 1);
237 PMD_INIT_LOG(ERR, "Incompatible UPT version.");
241 /* Getting MAC Address */
242 mac_lo = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACL);
243 mac_hi = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACH);
244 memcpy(hw->perm_addr , &mac_lo, 4);
245 memcpy(hw->perm_addr+4, &mac_hi, 2);
247 /* Allocate memory for storing MAC addresses */
248 eth_dev->data->mac_addrs = rte_zmalloc("vmxnet3", ETHER_ADDR_LEN *
249 VMXNET3_MAX_MAC_ADDRS, 0);
250 if (eth_dev->data->mac_addrs == NULL) {
252 "Failed to allocate %d bytes needed to store MAC addresses",
253 ETHER_ADDR_LEN * VMXNET3_MAX_MAC_ADDRS);
256 /* Copy the permanent MAC address */
257 ether_addr_copy((struct ether_addr *) hw->perm_addr,
258 ð_dev->data->mac_addrs[0]);
260 PMD_INIT_LOG(DEBUG, "MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
261 hw->perm_addr[0], hw->perm_addr[1], hw->perm_addr[2],
262 hw->perm_addr[3], hw->perm_addr[4], hw->perm_addr[5]);
264 /* Put device in Quiesce Mode */
265 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
270 static struct eth_driver rte_vmxnet3_pmd = {
272 .name = "rte_vmxnet3_pmd",
273 .id_table = pci_id_vmxnet3_map,
274 .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
276 .eth_dev_init = eth_vmxnet3_dev_init,
277 .dev_private_size = sizeof(struct vmxnet3_hw),
281 * Driver initialization routine.
282 * Invoked once at EAL init time.
283 * Register itself as the [Poll Mode] Driver of Virtual PCI VMXNET3 devices.
286 rte_vmxnet3_pmd_init(const char *name __rte_unused, const char *param __rte_unused)
288 PMD_INIT_FUNC_TRACE();
290 rte_eth_driver_register(&rte_vmxnet3_pmd);
295 vmxnet3_dev_configure(struct rte_eth_dev *dev)
297 const struct rte_memzone *mz;
298 struct vmxnet3_hw *hw = dev->data->dev_private;
301 PMD_INIT_FUNC_TRACE();
303 if (dev->data->nb_rx_queues > UINT8_MAX ||
304 dev->data->nb_tx_queues > UINT8_MAX)
307 size = dev->data->nb_rx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
308 dev->data->nb_tx_queues * sizeof(struct Vmxnet3_RxQueueDesc);
310 if (size > UINT16_MAX)
313 hw->num_rx_queues = (uint8_t)dev->data->nb_rx_queues;
314 hw->num_tx_queues = (uint8_t)dev->data->nb_tx_queues;
317 * Allocate a memzone for Vmxnet3_DriverShared - Vmxnet3_DSDevRead
320 mz = gpa_zone_reserve(dev, sizeof(struct Vmxnet3_DriverShared),
321 "shared", rte_socket_id(), 8);
324 PMD_INIT_LOG(ERR, "ERROR: Creating shared zone");
327 memset(mz->addr, 0, mz->len);
329 hw->shared = mz->addr;
330 hw->sharedPA = mz->phys_addr;
333 * Allocate a memzone for Vmxnet3_RxQueueDesc - Vmxnet3_TxQueueDesc
336 mz = gpa_zone_reserve(dev, size, "queuedesc",
337 rte_socket_id(), VMXNET3_QUEUE_DESC_ALIGN);
339 PMD_INIT_LOG(ERR, "ERROR: Creating queue descriptors zone");
342 memset(mz->addr, 0, mz->len);
344 hw->tqd_start = (Vmxnet3_TxQueueDesc *)mz->addr;
345 hw->rqd_start = (Vmxnet3_RxQueueDesc *)(hw->tqd_start + hw->num_tx_queues);
347 hw->queueDescPA = mz->phys_addr;
348 hw->queue_desc_len = (uint16_t)size;
350 if (dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
352 /* Allocate memory structure for UPT1_RSSConf and configure */
353 mz = gpa_zone_reserve(dev, sizeof(struct VMXNET3_RSSConf), "rss_conf",
354 rte_socket_id(), RTE_CACHE_LINE_SIZE);
357 "ERROR: Creating rss_conf structure zone");
360 memset(mz->addr, 0, mz->len);
362 hw->rss_conf = mz->addr;
363 hw->rss_confPA = mz->phys_addr;
370 vmxnet3_setup_driver_shared(struct rte_eth_dev *dev)
372 struct rte_eth_conf port_conf = dev->data->dev_conf;
373 struct vmxnet3_hw *hw = dev->data->dev_private;
374 Vmxnet3_DriverShared *shared = hw->shared;
375 Vmxnet3_DSDevRead *devRead = &shared->devRead;
380 shared->magic = VMXNET3_REV1_MAGIC;
381 devRead->misc.driverInfo.version = VMXNET3_DRIVER_VERSION_NUM;
383 /* Setting up Guest OS information */
384 devRead->misc.driverInfo.gos.gosBits = sizeof(void *) == 4 ?
385 VMXNET3_GOS_BITS_32 :
387 devRead->misc.driverInfo.gos.gosType = VMXNET3_GOS_TYPE_LINUX;
388 devRead->misc.driverInfo.vmxnet3RevSpt = 1;
389 devRead->misc.driverInfo.uptVerSpt = 1;
391 devRead->misc.queueDescPA = hw->queueDescPA;
392 devRead->misc.queueDescLen = hw->queue_desc_len;
393 devRead->misc.numTxQueues = hw->num_tx_queues;
394 devRead->misc.numRxQueues = hw->num_rx_queues;
397 * Set number of interrupts to 1
398 * PMD disables all the interrupts but this is MUST to activate device
399 * It needs at least one interrupt for link events to handle
400 * So we'll disable it later after device activation if needed
402 devRead->intrConf.numIntrs = 1;
403 devRead->intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
405 for (i = 0; i < hw->num_tx_queues; i++) {
406 Vmxnet3_TxQueueDesc *tqd = &hw->tqd_start[i];
407 vmxnet3_tx_queue_t *txq = dev->data->tx_queues[i];
409 tqd->ctrl.txNumDeferred = 0;
410 tqd->ctrl.txThreshold = 1;
411 tqd->conf.txRingBasePA = txq->cmd_ring.basePA;
412 tqd->conf.compRingBasePA = txq->comp_ring.basePA;
413 tqd->conf.dataRingBasePA = txq->data_ring.basePA;
415 tqd->conf.txRingSize = txq->cmd_ring.size;
416 tqd->conf.compRingSize = txq->comp_ring.size;
417 tqd->conf.dataRingSize = txq->data_ring.size;
418 tqd->conf.intrIdx = txq->comp_ring.intr_idx;
419 tqd->status.stopped = TRUE;
420 tqd->status.error = 0;
421 memset(&tqd->stats, 0, sizeof(tqd->stats));
424 for (i = 0; i < hw->num_rx_queues; i++) {
425 Vmxnet3_RxQueueDesc *rqd = &hw->rqd_start[i];
426 vmxnet3_rx_queue_t *rxq = dev->data->rx_queues[i];
428 rqd->conf.rxRingBasePA[0] = rxq->cmd_ring[0].basePA;
429 rqd->conf.rxRingBasePA[1] = rxq->cmd_ring[1].basePA;
430 rqd->conf.compRingBasePA = rxq->comp_ring.basePA;
432 rqd->conf.rxRingSize[0] = rxq->cmd_ring[0].size;
433 rqd->conf.rxRingSize[1] = rxq->cmd_ring[1].size;
434 rqd->conf.compRingSize = rxq->comp_ring.size;
435 rqd->conf.intrIdx = rxq->comp_ring.intr_idx;
436 rqd->status.stopped = TRUE;
437 rqd->status.error = 0;
438 memset(&rqd->stats, 0, sizeof(rqd->stats));
441 /* RxMode set to 0 of VMXNET3_RXM_xxx */
442 devRead->rxFilterConf.rxMode = 0;
444 /* Setting up feature flags */
445 if (dev->data->dev_conf.rxmode.hw_ip_checksum)
446 devRead->misc.uptFeatures |= VMXNET3_F_RXCSUM;
448 if (port_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
449 ret = vmxnet3_rss_configure(dev);
450 if (ret != VMXNET3_SUCCESS)
453 devRead->misc.uptFeatures |= VMXNET3_F_RSS;
454 devRead->rssConfDesc.confVer = 1;
455 devRead->rssConfDesc.confLen = sizeof(struct VMXNET3_RSSConf);
456 devRead->rssConfDesc.confPA = hw->rss_confPA;
460 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
461 mask |= ETH_VLAN_STRIP_MASK;
463 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
464 mask |= ETH_VLAN_FILTER_MASK;
466 vmxnet3_dev_vlan_offload_set_clear(dev, mask, 1);
469 "Writing MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
470 hw->perm_addr[0], hw->perm_addr[1], hw->perm_addr[2],
471 hw->perm_addr[3], hw->perm_addr[4], hw->perm_addr[5]);
473 /* Write MAC Address back to device */
474 mac_ptr = (uint32_t *)hw->perm_addr;
476 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACL, val);
478 val = (hw->perm_addr[5] << 8) | hw->perm_addr[4];
479 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACH, val);
481 return VMXNET3_SUCCESS;
485 * Configure device link speed and setup link.
486 * Must be called after eth_vmxnet3_dev_init. Other wise it might fail
487 * It returns 0 on success.
490 vmxnet3_dev_start(struct rte_eth_dev *dev)
493 struct vmxnet3_hw *hw = dev->data->dev_private;
495 PMD_INIT_FUNC_TRACE();
497 ret = vmxnet3_setup_driver_shared(dev);
498 if (ret != VMXNET3_SUCCESS)
501 /* Exchange shared data with device */
502 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL,
503 VMXNET3_GET_ADDR_LO(hw->sharedPA));
504 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH,
505 VMXNET3_GET_ADDR_HI(hw->sharedPA));
507 /* Activate device by register write */
508 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_ACTIVATE_DEV);
509 status = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
512 PMD_INIT_LOG(ERR, "Device activation in %s(): UNSUCCESSFUL", __func__);
516 /* Disable interrupts */
517 vmxnet3_disable_intr(hw);
520 * Load RX queues with blank mbufs and update next2fill index for device
521 * Update RxMode of the device
523 ret = vmxnet3_dev_rxtx_init(dev);
524 if (ret != VMXNET3_SUCCESS) {
525 PMD_INIT_LOG(ERR, "Device receive init in %s: UNSUCCESSFUL", __func__);
529 /* Setting proper Rx Mode and issue Rx Mode Update command */
530 vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_UCAST | VMXNET3_RXM_BCAST, 1);
533 * Don't need to handle events for now
535 #if PROCESS_SYS_EVENTS == 1
536 events = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_ECR);
537 PMD_INIT_LOG(DEBUG, "Reading events: 0x%X", events);
538 vmxnet3_process_events(hw);
544 * Stop device: disable rx and tx functions to allow for reconfiguring.
547 vmxnet3_dev_stop(struct rte_eth_dev *dev)
549 struct rte_eth_link link;
550 struct vmxnet3_hw *hw = dev->data->dev_private;
552 PMD_INIT_FUNC_TRACE();
554 if (hw->adapter_stopped == TRUE) {
555 PMD_INIT_LOG(DEBUG, "Device already closed.");
559 /* disable interrupts */
560 vmxnet3_disable_intr(hw);
562 /* quiesce the device first */
563 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
564 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL, 0);
565 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH, 0);
567 /* reset the device */
568 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
569 PMD_INIT_LOG(DEBUG, "Device reset.");
570 hw->adapter_stopped = FALSE;
572 vmxnet3_dev_clear_queues(dev);
574 /* Clear recorded link status */
575 memset(&link, 0, sizeof(link));
576 rte_vmxnet3_dev_atomic_write_link_status(dev, &link);
580 * Reset and stop device.
583 vmxnet3_dev_close(struct rte_eth_dev *dev)
585 struct vmxnet3_hw *hw = dev->data->dev_private;
587 PMD_INIT_FUNC_TRACE();
589 vmxnet3_dev_stop(dev);
590 hw->adapter_stopped = TRUE;
594 vmxnet3_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
597 struct vmxnet3_hw *hw = dev->data->dev_private;
599 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
601 RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
602 for (i = 0; i < hw->num_tx_queues; i++) {
603 struct UPT1_TxStats *txStats = &hw->tqd_start[i].stats;
605 stats->q_opackets[i] = txStats->ucastPktsTxOK +
606 txStats->mcastPktsTxOK +
607 txStats->bcastPktsTxOK;
608 stats->q_obytes[i] = txStats->ucastBytesTxOK +
609 txStats->mcastBytesTxOK +
610 txStats->bcastBytesTxOK;
612 stats->opackets += stats->q_opackets[i];
613 stats->obytes += stats->q_obytes[i];
614 stats->oerrors += txStats->pktsTxError +
615 txStats->pktsTxDiscard;
618 RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_RX_QUEUES);
619 for (i = 0; i < hw->num_rx_queues; i++) {
620 struct UPT1_RxStats *rxStats = &hw->rqd_start[i].stats;
622 stats->q_ipackets[i] = rxStats->ucastPktsRxOK +
623 rxStats->mcastPktsRxOK +
624 rxStats->bcastPktsRxOK;
626 stats->q_ibytes[i] = rxStats->ucastBytesRxOK +
627 rxStats->mcastBytesRxOK +
628 rxStats->bcastBytesRxOK;
630 stats->ipackets += stats->q_ipackets[i];
631 stats->ibytes += stats->q_ibytes[i];
633 stats->q_errors[i] = rxStats->pktsRxError;
634 stats->ierrors += rxStats->pktsRxError;
635 stats->imcasts += rxStats->mcastPktsRxOK;
636 stats->rx_nombuf += rxStats->pktsRxOutOfBuf;
641 vmxnet3_dev_info_get(__attribute__((unused))struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
643 dev_info->max_rx_queues = VMXNET3_MAX_RX_QUEUES;
644 dev_info->max_tx_queues = VMXNET3_MAX_TX_QUEUES;
645 dev_info->min_rx_bufsize = 1518 + RTE_PKTMBUF_HEADROOM;
646 dev_info->max_rx_pktlen = 16384; /* includes CRC, cf MAXFRS register */
647 dev_info->max_mac_addrs = VMXNET3_MAX_MAC_ADDRS;
649 dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
650 ETH_TXQ_FLAGS_NOOFFLOADS;
651 dev_info->flow_type_rss_offloads = VMXNET3_RSS_OFFLOAD_ALL;
654 /* return 0 means link status changed, -1 means not changed */
656 vmxnet3_dev_link_update(struct rte_eth_dev *dev, __attribute__((unused)) int wait_to_complete)
658 struct vmxnet3_hw *hw = dev->data->dev_private;
659 struct rte_eth_link link;
662 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
663 ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
666 PMD_INIT_LOG(ERR, "Link Status Negative : %s()", __func__);
671 link.link_status = 1;
672 link.link_duplex = ETH_LINK_FULL_DUPLEX;
673 link.link_speed = ETH_LINK_SPEED_10000;
675 rte_vmxnet3_dev_atomic_write_link_status(dev, &link);
683 /* Updating rxmode through Vmxnet3_DriverShared structure in adapter */
685 vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set) {
687 struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
690 rxConf->rxMode = rxConf->rxMode | feature;
692 rxConf->rxMode = rxConf->rxMode & (~feature);
694 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_UPDATE_RX_MODE);
697 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
699 vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev)
701 struct vmxnet3_hw *hw = dev->data->dev_private;
702 uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
704 memset(vf_table, 0, VMXNET3_VFT_TABLE_SIZE);
705 vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 1);
707 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
708 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
711 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
713 vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev)
715 struct vmxnet3_hw *hw = dev->data->dev_private;
716 uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
718 memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
719 vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 0);
720 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
721 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
724 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
726 vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev)
728 struct vmxnet3_hw *hw = dev->data->dev_private;
730 vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 1);
733 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
735 vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev)
737 struct vmxnet3_hw *hw = dev->data->dev_private;
739 vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 0);
742 /* Enable/disable filter on vlan */
744 vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vid, int on)
746 struct vmxnet3_hw *hw = dev->data->dev_private;
747 struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
748 uint32_t *vf_table = rxConf->vfTable;
750 /* save state for restore */
752 VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, vid);
754 VMXNET3_CLEAR_VFTABLE_ENTRY(hw->shadow_vfta, vid);
756 /* don't change active filter if in promiscious mode */
757 if (rxConf->rxMode & VMXNET3_RXM_PROMISC)
760 /* set in hardware */
762 VMXNET3_SET_VFTABLE_ENTRY(vf_table, vid);
764 VMXNET3_CLEAR_VFTABLE_ENTRY(vf_table, vid);
766 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
767 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
772 vmxnet3_dev_vlan_offload_set_clear(struct rte_eth_dev *dev,
775 struct vmxnet3_hw *hw = dev->data->dev_private;
776 Vmxnet3_DSDevRead *devRead = &hw->shared->devRead;
777 uint32_t *vf_table = devRead->rxFilterConf.vfTable;
779 if (mask & ETH_VLAN_STRIP_MASK)
780 devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
782 devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN;
784 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
785 VMXNET3_CMD_UPDATE_FEATURE);
787 if (mask & ETH_VLAN_FILTER_MASK) {
789 memset(hw->shadow_vfta, 0,
790 VMXNET3_VFT_TABLE_SIZE);
791 /* allow untagged pkts */
792 VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, 0);
794 memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
796 /* allow any pkts -- no filtering */
798 memset(hw->shadow_vfta, 0xff, VMXNET3_VFT_TABLE_SIZE);
799 memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
802 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
803 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
807 vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask)
809 vmxnet3_dev_vlan_offload_set_clear(dev, mask, 0);
812 #if PROCESS_SYS_EVENTS == 1
814 vmxnet3_process_events(struct vmxnet3_hw *hw)
816 uint32_t events = hw->shared->ecr;
819 PMD_INIT_LOG(ERR, "No events to process in %s()", __func__);
824 * ECR bits when written with 1b are cleared. Hence write
825 * events back to ECR so that the bits which were set will be reset.
827 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_ECR, events);
829 /* Check if link state has changed */
830 if (events & VMXNET3_ECR_LINK)
832 "Process events in %s(): VMXNET3_ECR_LINK event", __func__);
834 /* Check if there is an error on xmit/recv queues */
835 if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
836 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_QUEUE_STATUS);
838 if (hw->tqd_start->status.stopped)
839 PMD_INIT_LOG(ERR, "tq error 0x%x",
840 hw->tqd_start->status.error);
842 if (hw->rqd_start->status.stopped)
843 PMD_INIT_LOG(ERR, "rq error 0x%x",
844 hw->rqd_start->status.error);
846 /* Reset the device */
847 /* Have to reset the device */
850 if (events & VMXNET3_ECR_DIC)
851 PMD_INIT_LOG(ERR, "Device implementation change event.");
853 if (events & VMXNET3_ECR_DEBUG)
854 PMD_INIT_LOG(ERR, "Debug event generated by device.");
859 static struct rte_driver rte_vmxnet3_driver = {
861 .init = rte_vmxnet3_pmd_init,
864 PMD_REGISTER_DRIVER(rte_vmxnet3_driver);