drivers/net/vmxnet3/vmxnet3_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <sys/queue.h>
  35 #include <stdio.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <unistd.h>
  40 #include <stdarg.h>
  41 #include <fcntl.h>
  42 #include <inttypes.h>
  43 #include <rte_byteorder.h>
  44 #include <rte_common.h>
  45 #include <rte_cycles.h>
  46
  47 #include <rte_interrupts.h>
  48 #include <rte_log.h>
  49 #include <rte_debug.h>
  50 #include <rte_pci.h>
  51 #include <rte_atomic.h>
  52 #include <rte_branch_prediction.h>
  53 #include <rte_memory.h>
  54 #include <rte_memzone.h>
  55 #include <rte_eal.h>
  56 #include <rte_alarm.h>
  57 #include <rte_ether.h>
  58 #include <rte_ethdev.h>
  59 #include <rte_atomic.h>
  60 #include <rte_string_fns.h>
  61 #include <rte_malloc.h>
  62 #include <rte_dev.h>
  63
  64 #include "base/vmxnet3_defs.h"
  65
  66 #include "vmxnet3_ring.h"
  67 #include "vmxnet3_logs.h"
  68 #include "vmxnet3_ethdev.h"
  69
  70 #define PROCESS_SYS_EVENTS 0
  71
  72 static int eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev);
  73 static int eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev);
  74 static int vmxnet3_dev_configure(struct rte_eth_dev *dev);
  75 static int vmxnet3_dev_start(struct rte_eth_dev *dev);
  76 static void vmxnet3_dev_stop(struct rte_eth_dev *dev);
  77 static void vmxnet3_dev_close(struct rte_eth_dev *dev);
  78 static void vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set);
  79 static void vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev);
  80 static void vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev);
  81 static void vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev);
  82 static void vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev);
  83 static int vmxnet3_dev_link_update(struct rte_eth_dev *dev,
  84                                 int wait_to_complete);
  85 static void vmxnet3_dev_stats_get(struct rte_eth_dev *dev,
  86                                 struct rte_eth_stats *stats);
  87 static void vmxnet3_dev_info_get(struct rte_eth_dev *dev,
  88                                 struct rte_eth_dev_info *dev_info);
  89 static const uint32_t *
  90 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev);
  91 static int vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev,
  92                                        uint16_t vid, int on);
  93 static void vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  94 static void vmxnet3_mac_addr_set(struct rte_eth_dev *dev,
  95                                  struct ether_addr *mac_addr);
  96
  97 #if PROCESS_SYS_EVENTS == 1
  98 static void vmxnet3_process_events(struct vmxnet3_hw *);
  99 #endif
 100 /*
 101  * The set of PCI devices this driver supports
 102  */
 103 #define VMWARE_PCI_VENDOR_ID 0x15AD
 104 #define VMWARE_DEV_ID_VMXNET3 0x07B0
 105 static const struct rte_pci_id pci_id_vmxnet3_map[] = {
 106         { RTE_PCI_DEVICE(VMWARE_PCI_VENDOR_ID, VMWARE_DEV_ID_VMXNET3) },
 107         { .vendor_id = 0, /* sentinel */ },
 108 };
 109
 110 static const struct eth_dev_ops vmxnet3_eth_dev_ops = {
 111         .dev_configure        = vmxnet3_dev_configure,
 112         .dev_start            = vmxnet3_dev_start,
 113         .dev_stop             = vmxnet3_dev_stop,
 114         .dev_close            = vmxnet3_dev_close,
 115         .promiscuous_enable   = vmxnet3_dev_promiscuous_enable,
 116         .promiscuous_disable  = vmxnet3_dev_promiscuous_disable,
 117         .allmulticast_enable  = vmxnet3_dev_allmulticast_enable,
 118         .allmulticast_disable = vmxnet3_dev_allmulticast_disable,
 119         .link_update          = vmxnet3_dev_link_update,
 120         .stats_get            = vmxnet3_dev_stats_get,
 121         .mac_addr_set         = vmxnet3_mac_addr_set,
 122         .dev_infos_get        = vmxnet3_dev_info_get,
 123         .dev_supported_ptypes_get = vmxnet3_dev_supported_ptypes_get,
 124         .vlan_filter_set      = vmxnet3_dev_vlan_filter_set,
 125         .vlan_offload_set     = vmxnet3_dev_vlan_offload_set,
 126         .rx_queue_setup       = vmxnet3_dev_rx_queue_setup,
 127         .rx_queue_release     = vmxnet3_dev_rx_queue_release,
 128         .tx_queue_setup       = vmxnet3_dev_tx_queue_setup,
 129         .tx_queue_release     = vmxnet3_dev_tx_queue_release,
 130 };
 131
 132 static const struct rte_memzone *
 133 gpa_zone_reserve(struct rte_eth_dev *dev, uint32_t size,
 134                 const char *post_string, int socket_id, uint16_t align)
 135 {
 136         char z_name[RTE_MEMZONE_NAMESIZE];
 137         const struct rte_memzone *mz;
 138
 139         snprintf(z_name, sizeof(z_name), "%s_%d_%s",
 140                                         dev->driver->pci_drv.driver.name,
 141                                         dev->data->port_id, post_string);
 142
 143         mz = rte_memzone_lookup(z_name);
 144         if (mz)
 145                 return mz;
 146
 147         return rte_memzone_reserve_aligned(z_name, size,
 148                         socket_id, 0, align);
 149 }
 150
 151 /**
 152  * Atomically reads the link status information from global
 153  * structure rte_eth_dev.
 154  *
 155  * @param dev
 156  *   - Pointer to the structure rte_eth_dev to read from.
 157  *   - Pointer to the buffer to be saved with the link status.
 158  *
 159  * @return
 160  *   - On success, zero.
 161  *   - On failure, negative value.
 162  */
 163
 164 static int
 165 vmxnet3_dev_atomic_read_link_status(struct rte_eth_dev *dev,
 166                                     struct rte_eth_link *link)
 167 {
 168         struct rte_eth_link *dst = link;
 169         struct rte_eth_link *src = &(dev->data->dev_link);
 170
 171         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 172                                 *(uint64_t *)src) == 0)
 173                 return -1;
 174
 175         return 0;
 176 }
 177
 178 /**
 179  * Atomically writes the link status information into global
 180  * structure rte_eth_dev.
 181  *
 182  * @param dev
 183  *   - Pointer to the structure rte_eth_dev to write to.
 184  *   - Pointer to the buffer to be saved with the link status.
 185  *
 186  * @return
 187  *   - On success, zero.
 188  *   - On failure, negative value.
 189  */
 190 static int
 191 vmxnet3_dev_atomic_write_link_status(struct rte_eth_dev *dev,
 192                                      struct rte_eth_link *link)
 193 {
 194         struct rte_eth_link *dst = &(dev->data->dev_link);
 195         struct rte_eth_link *src = link;
 196
 197         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 198                                         *(uint64_t *)src) == 0)
 199                 return -1;
 200
 201         return 0;
 202 }
 203
 204 /*
 205  * This function is based on vmxnet3_disable_intr()
 206  */
 207 static void
 208 vmxnet3_disable_intr(struct vmxnet3_hw *hw)
 209 {
 210         int i;
 211
 212         PMD_INIT_FUNC_TRACE();
 213
 214         hw->shared->devRead.intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
 215         for (i = 0; i < VMXNET3_MAX_INTRS; i++)
 216                         VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 1);
 217 }
 218
 219 /*
 220  * It returns 0 on success.
 221  */
 222 static int
 223 eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev)
 224 {
 225         struct rte_pci_device *pci_dev;
 226         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
 227         uint32_t mac_hi, mac_lo, ver;
 228
 229         PMD_INIT_FUNC_TRACE();
 230
 231         eth_dev->dev_ops = &vmxnet3_eth_dev_ops;
 232         eth_dev->rx_pkt_burst = &vmxnet3_recv_pkts;
 233         eth_dev->tx_pkt_burst = &vmxnet3_xmit_pkts;
 234         pci_dev = eth_dev->pci_dev;
 235
 236         /*
 237          * for secondary processes, we don't initialize any further as primary
 238          * has already done this work.
 239          */
 240         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 241                 return 0;
 242
 243         rte_eth_copy_pci_info(eth_dev, pci_dev);
 244
 245         /* Vendor and Device ID need to be set before init of shared code */
 246         hw->device_id = pci_dev->id.device_id;
 247         hw->vendor_id = pci_dev->id.vendor_id;
 248         hw->hw_addr0 = (void *)pci_dev->mem_resource[0].addr;
 249         hw->hw_addr1 = (void *)pci_dev->mem_resource[1].addr;
 250
 251         hw->num_rx_queues = 1;
 252         hw->num_tx_queues = 1;
 253         hw->bufs_per_pkt = 1;
 254
 255         /* Check h/w version compatibility with driver. */
 256         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_VRRS);
 257         PMD_INIT_LOG(DEBUG, "Hardware version : %d", ver);
 258         if (ver & 0x1)
 259                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS, 1);
 260         else {
 261                 PMD_INIT_LOG(ERR, "Incompatible h/w version, should be 0x1");
 262                 return -EIO;
 263         }
 264
 265         /* Check UPT version compatibility with driver. */
 266         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_UVRS);
 267         PMD_INIT_LOG(DEBUG, "UPT hardware version : %d", ver);
 268         if (ver & 0x1)
 269                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_UVRS, 1);
 270         else {
 271                 PMD_INIT_LOG(ERR, "Incompatible UPT version.");
 272                 return -EIO;
 273         }
 274
 275         /* Getting MAC Address */
 276         mac_lo = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACL);
 277         mac_hi = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACH);
 278         memcpy(hw->perm_addr  , &mac_lo, 4);
 279         memcpy(hw->perm_addr+4, &mac_hi, 2);
 280
 281         /* Allocate memory for storing MAC addresses */
 282         eth_dev->data->mac_addrs = rte_zmalloc("vmxnet3", ETHER_ADDR_LEN *
 283                                                VMXNET3_MAX_MAC_ADDRS, 0);
 284         if (eth_dev->data->mac_addrs == NULL) {
 285                 PMD_INIT_LOG(ERR,
 286                              "Failed to allocate %d bytes needed to store MAC addresses",
 287                              ETHER_ADDR_LEN * VMXNET3_MAX_MAC_ADDRS);
 288                 return -ENOMEM;
 289         }
 290         /* Copy the permanent MAC address */
 291         ether_addr_copy((struct ether_addr *) hw->perm_addr,
 292                         &eth_dev->data->mac_addrs[0]);
 293
 294         PMD_INIT_LOG(DEBUG, "MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
 295                      hw->perm_addr[0], hw->perm_addr[1], hw->perm_addr[2],
 296                      hw->perm_addr[3], hw->perm_addr[4], hw->perm_addr[5]);
 297
 298         /* Put device in Quiesce Mode */
 299         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
 300
 301         /* allow untagged pkts */
 302         VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, 0);
 303
 304         return 0;
 305 }
 306
 307 static int
 308 eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev)
 309 {
 310         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
 311
 312         PMD_INIT_FUNC_TRACE();
 313
 314         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 315                 return 0;
 316
 317         if (hw->adapter_stopped == 0)
 318                 vmxnet3_dev_close(eth_dev);
 319
 320         eth_dev->dev_ops = NULL;
 321         eth_dev->rx_pkt_burst = NULL;
 322         eth_dev->tx_pkt_burst = NULL;
 323
 324         rte_free(eth_dev->data->mac_addrs);
 325         eth_dev->data->mac_addrs = NULL;
 326
 327         return 0;
 328 }
 329
 330 static struct eth_driver rte_vmxnet3_pmd = {
 331         .pci_drv = {
 332                 .id_table = pci_id_vmxnet3_map,
 333                 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_DETACHABLE,
 334                 .probe = rte_eth_dev_pci_probe,
 335                 .remove = rte_eth_dev_pci_remove,
 336         },
 337         .eth_dev_init = eth_vmxnet3_dev_init,
 338         .eth_dev_uninit = eth_vmxnet3_dev_uninit,
 339         .dev_private_size = sizeof(struct vmxnet3_hw),
 340 };
 341
 342 static int
 343 vmxnet3_dev_configure(struct rte_eth_dev *dev)
 344 {
 345         const struct rte_memzone *mz;
 346         struct vmxnet3_hw *hw = dev->data->dev_private;
 347         size_t size;
 348
 349         PMD_INIT_FUNC_TRACE();
 350
 351         if (dev->data->nb_tx_queues > VMXNET3_MAX_TX_QUEUES ||
 352             dev->data->nb_rx_queues > VMXNET3_MAX_RX_QUEUES) {
 353                 PMD_INIT_LOG(ERR, "ERROR: Number of queues not supported");
 354                 return -EINVAL;
 355         }
 356
 357         if (!rte_is_power_of_2(dev->data->nb_rx_queues)) {
 358                 PMD_INIT_LOG(ERR, "ERROR: Number of rx queues not power of 2");
 359                 return -EINVAL;
 360         }
 361
 362         size = dev->data->nb_rx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
 363                 dev->data->nb_tx_queues * sizeof(struct Vmxnet3_RxQueueDesc);
 364
 365         if (size > UINT16_MAX)
 366                 return -EINVAL;
 367
 368         hw->num_rx_queues = (uint8_t)dev->data->nb_rx_queues;
 369         hw->num_tx_queues = (uint8_t)dev->data->nb_tx_queues;
 370
 371         /*
 372          * Allocate a memzone for Vmxnet3_DriverShared - Vmxnet3_DSDevRead
 373          * on current socket
 374          */
 375         mz = gpa_zone_reserve(dev, sizeof(struct Vmxnet3_DriverShared),
 376                               "shared", rte_socket_id(), 8);
 377
 378         if (mz == NULL) {
 379                 PMD_INIT_LOG(ERR, "ERROR: Creating shared zone");
 380                 return -ENOMEM;
 381         }
 382         memset(mz->addr, 0, mz->len);
 383
 384         hw->shared = mz->addr;
 385         hw->sharedPA = mz->phys_addr;
 386
 387         /*
 388          * Allocate a memzone for Vmxnet3_RxQueueDesc - Vmxnet3_TxQueueDesc
 389          * on current socket
 390          */
 391         mz = gpa_zone_reserve(dev, size, "queuedesc",
 392                               rte_socket_id(), VMXNET3_QUEUE_DESC_ALIGN);
 393         if (mz == NULL) {
 394                 PMD_INIT_LOG(ERR, "ERROR: Creating queue descriptors zone");
 395                 return -ENOMEM;
 396         }
 397         memset(mz->addr, 0, mz->len);
 398
 399         hw->tqd_start = (Vmxnet3_TxQueueDesc *)mz->addr;
 400         hw->rqd_start = (Vmxnet3_RxQueueDesc *)(hw->tqd_start + hw->num_tx_queues);
 401
 402         hw->queueDescPA = mz->phys_addr;
 403         hw->queue_desc_len = (uint16_t)size;
 404
 405         if (dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 406
 407                 /* Allocate memory structure for UPT1_RSSConf and configure */
 408                 mz = gpa_zone_reserve(dev, sizeof(struct VMXNET3_RSSConf), "rss_conf",
 409                                       rte_socket_id(), RTE_CACHE_LINE_SIZE);
 410                 if (mz == NULL) {
 411                         PMD_INIT_LOG(ERR,
 412                                      "ERROR: Creating rss_conf structure zone");
 413                         return -ENOMEM;
 414                 }
 415                 memset(mz->addr, 0, mz->len);
 416
 417                 hw->rss_conf = mz->addr;
 418                 hw->rss_confPA = mz->phys_addr;
 419         }
 420
 421         return 0;
 422 }
 423
 424 static void
 425 vmxnet3_write_mac(struct vmxnet3_hw *hw, const uint8_t *addr)
 426 {
 427         uint32_t val;
 428
 429         PMD_INIT_LOG(DEBUG,
 430                      "Writing MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
 431                      addr[0], addr[1], addr[2],
 432                      addr[3], addr[4], addr[5]);
 433
 434         val = *(const uint32_t *)addr;
 435         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACL, val);
 436
 437         val = (addr[5] << 8) | addr[4];
 438         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACH, val);
 439 }
 440
 441 static int
 442 vmxnet3_setup_driver_shared(struct rte_eth_dev *dev)
 443 {
 444         struct rte_eth_conf port_conf = dev->data->dev_conf;
 445         struct vmxnet3_hw *hw = dev->data->dev_private;
 446         uint32_t mtu = dev->data->mtu;
 447         Vmxnet3_DriverShared *shared = hw->shared;
 448         Vmxnet3_DSDevRead *devRead = &shared->devRead;
 449         uint32_t i;
 450         int ret;
 451
 452         shared->magic = VMXNET3_REV1_MAGIC;
 453         devRead->misc.driverInfo.version = VMXNET3_DRIVER_VERSION_NUM;
 454
 455         /* Setting up Guest OS information */
 456         devRead->misc.driverInfo.gos.gosBits   = sizeof(void *) == 4 ?
 457                 VMXNET3_GOS_BITS_32 :
 458                 VMXNET3_GOS_BITS_64;
 459         devRead->misc.driverInfo.gos.gosType   = VMXNET3_GOS_TYPE_LINUX;
 460         devRead->misc.driverInfo.vmxnet3RevSpt = 1;
 461         devRead->misc.driverInfo.uptVerSpt     = 1;
 462
 463         devRead->misc.mtu = rte_le_to_cpu_32(mtu);
 464         devRead->misc.queueDescPA  = hw->queueDescPA;
 465         devRead->misc.queueDescLen = hw->queue_desc_len;
 466         devRead->misc.numTxQueues  = hw->num_tx_queues;
 467         devRead->misc.numRxQueues  = hw->num_rx_queues;
 468
 469         /*
 470          * Set number of interrupts to 1
 471          * PMD disables all the interrupts but this is MUST to activate device
 472          * It needs at least one interrupt for link events to handle
 473          * So we'll disable it later after device activation if needed
 474          */
 475         devRead->intrConf.numIntrs = 1;
 476         devRead->intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
 477
 478         for (i = 0; i < hw->num_tx_queues; i++) {
 479                 Vmxnet3_TxQueueDesc *tqd = &hw->tqd_start[i];
 480                 vmxnet3_tx_queue_t *txq  = dev->data->tx_queues[i];
 481
 482                 tqd->ctrl.txNumDeferred  = 0;
 483                 tqd->ctrl.txThreshold    = 1;
 484                 tqd->conf.txRingBasePA   = txq->cmd_ring.basePA;
 485                 tqd->conf.compRingBasePA = txq->comp_ring.basePA;
 486                 tqd->conf.dataRingBasePA = txq->data_ring.basePA;
 487
 488                 tqd->conf.txRingSize   = txq->cmd_ring.size;
 489                 tqd->conf.compRingSize = txq->comp_ring.size;
 490                 tqd->conf.dataRingSize = txq->data_ring.size;
 491                 tqd->conf.intrIdx      = txq->comp_ring.intr_idx;
 492                 tqd->status.stopped    = TRUE;
 493                 tqd->status.error      = 0;
 494                 memset(&tqd->stats, 0, sizeof(tqd->stats));
 495         }
 496
 497         for (i = 0; i < hw->num_rx_queues; i++) {
 498                 Vmxnet3_RxQueueDesc *rqd  = &hw->rqd_start[i];
 499                 vmxnet3_rx_queue_t *rxq   = dev->data->rx_queues[i];
 500
 501                 rqd->conf.rxRingBasePA[0] = rxq->cmd_ring[0].basePA;
 502                 rqd->conf.rxRingBasePA[1] = rxq->cmd_ring[1].basePA;
 503                 rqd->conf.compRingBasePA  = rxq->comp_ring.basePA;
 504
 505                 rqd->conf.rxRingSize[0]   = rxq->cmd_ring[0].size;
 506                 rqd->conf.rxRingSize[1]   = rxq->cmd_ring[1].size;
 507                 rqd->conf.compRingSize    = rxq->comp_ring.size;
 508                 rqd->conf.intrIdx         = rxq->comp_ring.intr_idx;
 509                 rqd->status.stopped       = TRUE;
 510                 rqd->status.error         = 0;
 511                 memset(&rqd->stats, 0, sizeof(rqd->stats));
 512         }
 513
 514         /* RxMode set to 0 of VMXNET3_RXM_xxx */
 515         devRead->rxFilterConf.rxMode = 0;
 516
 517         /* Setting up feature flags */
 518         if (dev->data->dev_conf.rxmode.hw_ip_checksum)
 519                 devRead->misc.uptFeatures |= VMXNET3_F_RXCSUM;
 520
 521         if (port_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 522                 ret = vmxnet3_rss_configure(dev);
 523                 if (ret != VMXNET3_SUCCESS)
 524                         return ret;
 525
 526                 devRead->misc.uptFeatures |= VMXNET3_F_RSS;
 527                 devRead->rssConfDesc.confVer = 1;
 528                 devRead->rssConfDesc.confLen = sizeof(struct VMXNET3_RSSConf);
 529                 devRead->rssConfDesc.confPA  = hw->rss_confPA;
 530         }
 531
 532         vmxnet3_dev_vlan_offload_set(dev,
 533                              ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
 534
 535         vmxnet3_write_mac(hw, hw->perm_addr);
 536
 537         return VMXNET3_SUCCESS;
 538 }
 539
 540 /*
 541  * Configure device link speed and setup link.
 542  * Must be called after eth_vmxnet3_dev_init. Other wise it might fail
 543  * It returns 0 on success.
 544  */
 545 static int
 546 vmxnet3_dev_start(struct rte_eth_dev *dev)
 547 {
 548         int ret;
 549         struct vmxnet3_hw *hw = dev->data->dev_private;
 550
 551         PMD_INIT_FUNC_TRACE();
 552
 553         ret = vmxnet3_setup_driver_shared(dev);
 554         if (ret != VMXNET3_SUCCESS)
 555                 return ret;
 556
 557         /* Exchange shared data with device */
 558         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL,
 559                                VMXNET3_GET_ADDR_LO(hw->sharedPA));
 560         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH,
 561                                VMXNET3_GET_ADDR_HI(hw->sharedPA));
 562
 563         /* Activate device by register write */
 564         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_ACTIVATE_DEV);
 565         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 566
 567         if (ret != 0) {
 568                 PMD_INIT_LOG(ERR, "Device activation: UNSUCCESSFUL");
 569                 return -EINVAL;
 570         }
 571
 572         /* Disable interrupts */
 573         vmxnet3_disable_intr(hw);
 574
 575         /*
 576          * Load RX queues with blank mbufs and update next2fill index for device
 577          * Update RxMode of the device
 578          */
 579         ret = vmxnet3_dev_rxtx_init(dev);
 580         if (ret != VMXNET3_SUCCESS) {
 581                 PMD_INIT_LOG(ERR, "Device queue init: UNSUCCESSFUL");
 582                 return ret;
 583         }
 584
 585         /* Setting proper Rx Mode and issue Rx Mode Update command */
 586         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_UCAST | VMXNET3_RXM_BCAST, 1);
 587
 588         /*
 589          * Don't need to handle events for now
 590          */
 591 #if PROCESS_SYS_EVENTS == 1
 592         events = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_ECR);
 593         PMD_INIT_LOG(DEBUG, "Reading events: 0x%X", events);
 594         vmxnet3_process_events(hw);
 595 #endif
 596         return VMXNET3_SUCCESS;
 597 }
 598
 599 /*
 600  * Stop device: disable rx and tx functions to allow for reconfiguring.
 601  */
 602 static void
 603 vmxnet3_dev_stop(struct rte_eth_dev *dev)
 604 {
 605         struct rte_eth_link link;
 606         struct vmxnet3_hw *hw = dev->data->dev_private;
 607
 608         PMD_INIT_FUNC_TRACE();
 609
 610         if (hw->adapter_stopped == 1) {
 611                 PMD_INIT_LOG(DEBUG, "Device already closed.");
 612                 return;
 613         }
 614
 615         /* disable interrupts */
 616         vmxnet3_disable_intr(hw);
 617
 618         /* quiesce the device first */
 619         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
 620         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL, 0);
 621         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH, 0);
 622
 623         /* reset the device */
 624         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
 625         PMD_INIT_LOG(DEBUG, "Device reset.");
 626         hw->adapter_stopped = 0;
 627
 628         vmxnet3_dev_clear_queues(dev);
 629
 630         /* Clear recorded link status */
 631         memset(&link, 0, sizeof(link));
 632         vmxnet3_dev_atomic_write_link_status(dev, &link);
 633 }
 634
 635 /*
 636  * Reset and stop device.
 637  */
 638 static void
 639 vmxnet3_dev_close(struct rte_eth_dev *dev)
 640 {
 641         struct vmxnet3_hw *hw = dev->data->dev_private;
 642
 643         PMD_INIT_FUNC_TRACE();
 644
 645         vmxnet3_dev_stop(dev);
 646         hw->adapter_stopped = 1;
 647 }
 648
 649 static void
 650 vmxnet3_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
 651 {
 652         unsigned int i;
 653         struct vmxnet3_hw *hw = dev->data->dev_private;
 654
 655         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
 656
 657         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
 658         for (i = 0; i < hw->num_tx_queues; i++) {
 659                 struct UPT1_TxStats *txStats = &hw->tqd_start[i].stats;
 660
 661                 stats->q_opackets[i] = txStats->ucastPktsTxOK +
 662                         txStats->mcastPktsTxOK +
 663                         txStats->bcastPktsTxOK;
 664                 stats->q_obytes[i] = txStats->ucastBytesTxOK +
 665                         txStats->mcastBytesTxOK +
 666                         txStats->bcastBytesTxOK;
 667
 668                 stats->opackets += stats->q_opackets[i];
 669                 stats->obytes += stats->q_obytes[i];
 670                 stats->oerrors += txStats->pktsTxError +
 671                         txStats->pktsTxDiscard;
 672         }
 673
 674         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_RX_QUEUES);
 675         for (i = 0; i < hw->num_rx_queues; i++) {
 676                 struct UPT1_RxStats *rxStats = &hw->rqd_start[i].stats;
 677
 678                 stats->q_ipackets[i] = rxStats->ucastPktsRxOK +
 679                         rxStats->mcastPktsRxOK +
 680                         rxStats->bcastPktsRxOK;
 681
 682                 stats->q_ibytes[i] = rxStats->ucastBytesRxOK +
 683                         rxStats->mcastBytesRxOK +
 684                         rxStats->bcastBytesRxOK;
 685
 686                 stats->ipackets += stats->q_ipackets[i];
 687                 stats->ibytes += stats->q_ibytes[i];
 688
 689                 stats->q_errors[i] = rxStats->pktsRxError;
 690                 stats->ierrors += rxStats->pktsRxError;
 691                 stats->rx_nombuf += rxStats->pktsRxOutOfBuf;
 692         }
 693 }
 694
 695 static void
 696 vmxnet3_dev_info_get(__attribute__((unused))struct rte_eth_dev *dev,
 697                      struct rte_eth_dev_info *dev_info)
 698 {
 699         dev_info->max_rx_queues = VMXNET3_MAX_RX_QUEUES;
 700         dev_info->max_tx_queues = VMXNET3_MAX_TX_QUEUES;
 701         dev_info->min_rx_bufsize = 1518 + RTE_PKTMBUF_HEADROOM;
 702         dev_info->max_rx_pktlen = 16384; /* includes CRC, cf MAXFRS register */
 703         dev_info->max_mac_addrs = VMXNET3_MAX_MAC_ADDRS;
 704
 705         dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP;
 706         dev_info->flow_type_rss_offloads = VMXNET3_RSS_OFFLOAD_ALL;
 707
 708         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
 709                 .nb_max = VMXNET3_RX_RING_MAX_SIZE,
 710                 .nb_min = VMXNET3_DEF_RX_RING_SIZE,
 711                 .nb_align = 1,
 712         };
 713
 714         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
 715                 .nb_max = VMXNET3_TX_RING_MAX_SIZE,
 716                 .nb_min = VMXNET3_DEF_TX_RING_SIZE,
 717                 .nb_align = 1,
 718         };
 719
 720         dev_info->rx_offload_capa =
 721                 DEV_RX_OFFLOAD_VLAN_STRIP |
 722                 DEV_RX_OFFLOAD_UDP_CKSUM |
 723                 DEV_RX_OFFLOAD_TCP_CKSUM;
 724
 725         dev_info->tx_offload_capa =
 726                 DEV_TX_OFFLOAD_VLAN_INSERT |
 727                 DEV_TX_OFFLOAD_TCP_CKSUM |
 728                 DEV_TX_OFFLOAD_UDP_CKSUM |
 729                 DEV_TX_OFFLOAD_TCP_TSO;
 730 }
 731
 732 static const uint32_t *
 733 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev)
 734 {
 735         static const uint32_t ptypes[] = {
 736                 RTE_PTYPE_L3_IPV4_EXT,
 737                 RTE_PTYPE_L3_IPV4,
 738                 RTE_PTYPE_UNKNOWN
 739         };
 740
 741         if (dev->rx_pkt_burst == vmxnet3_recv_pkts)
 742                 return ptypes;
 743         return NULL;
 744 }
 745
 746 static void
 747 vmxnet3_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
 748 {
 749         struct vmxnet3_hw *hw = dev->data->dev_private;
 750
 751         vmxnet3_write_mac(hw, mac_addr->addr_bytes);
 752 }
 753
 754 /* return 0 means link status changed, -1 means not changed */
 755 static int
 756 vmxnet3_dev_link_update(struct rte_eth_dev *dev, __attribute__((unused)) int wait_to_complete)
 757 {
 758         struct vmxnet3_hw *hw = dev->data->dev_private;
 759         struct rte_eth_link old, link;
 760         uint32_t ret;
 761
 762         if (dev->data->dev_started == 0)
 763                 return -1; /* Link status doesn't change for stopped dev */
 764
 765         memset(&link, 0, sizeof(link));
 766         vmxnet3_dev_atomic_read_link_status(dev, &old);
 767
 768         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
 769         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 770
 771         if (ret & 0x1) {
 772                 link.link_status = ETH_LINK_UP;
 773                 link.link_duplex = ETH_LINK_FULL_DUPLEX;
 774                 link.link_speed = ETH_SPEED_NUM_10G;
 775                 link.link_autoneg = ETH_LINK_SPEED_FIXED;
 776         }
 777
 778         vmxnet3_dev_atomic_write_link_status(dev, &link);
 779
 780         return (old.link_status == link.link_status) ? -1 : 0;
 781 }
 782
 783 /* Updating rxmode through Vmxnet3_DriverShared structure in adapter */
 784 static void
 785 vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set) {
 786
 787         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
 788
 789         if (set)
 790                 rxConf->rxMode = rxConf->rxMode | feature;
 791         else
 792                 rxConf->rxMode = rxConf->rxMode & (~feature);
 793
 794         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_UPDATE_RX_MODE);
 795 }
 796
 797 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
 798 static void
 799 vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev)
 800 {
 801         struct vmxnet3_hw *hw = dev->data->dev_private;
 802         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
 803
 804         memset(vf_table, 0, VMXNET3_VFT_TABLE_SIZE);
 805         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 1);
 806
 807         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 808                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
 809 }
 810
 811 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
 812 static void
 813 vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev)
 814 {
 815         struct vmxnet3_hw *hw = dev->data->dev_private;
 816         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
 817
 818         memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
 819         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 0);
 820         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 821                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
 822 }
 823
 824 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
 825 static void
 826 vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev)
 827 {
 828         struct vmxnet3_hw *hw = dev->data->dev_private;
 829
 830         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 1);
 831 }
 832
 833 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
 834 static void
 835 vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev)
 836 {
 837         struct vmxnet3_hw *hw = dev->data->dev_private;
 838
 839         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 0);
 840 }
 841
 842 /* Enable/disable filter on vlan */
 843 static int
 844 vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vid, int on)
 845 {
 846         struct vmxnet3_hw *hw = dev->data->dev_private;
 847         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
 848         uint32_t *vf_table = rxConf->vfTable;
 849
 850         /* save state for restore */
 851         if (on)
 852                 VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, vid);
 853         else
 854                 VMXNET3_CLEAR_VFTABLE_ENTRY(hw->shadow_vfta, vid);
 855
 856         /* don't change active filter if in promiscuous mode */
 857         if (rxConf->rxMode & VMXNET3_RXM_PROMISC)
 858                 return 0;
 859
 860         /* set in hardware */
 861         if (on)
 862                 VMXNET3_SET_VFTABLE_ENTRY(vf_table, vid);
 863         else
 864                 VMXNET3_CLEAR_VFTABLE_ENTRY(vf_table, vid);
 865
 866         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 867                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
 868         return 0;
 869 }
 870
 871 static void
 872 vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask)
 873 {
 874         struct vmxnet3_hw *hw = dev->data->dev_private;
 875         Vmxnet3_DSDevRead *devRead = &hw->shared->devRead;
 876         uint32_t *vf_table = devRead->rxFilterConf.vfTable;
 877
 878         if (mask & ETH_VLAN_STRIP_MASK) {
 879                 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
 880                         devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
 881                 else
 882                         devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN;
 883
 884                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 885                                        VMXNET3_CMD_UPDATE_FEATURE);
 886         }
 887
 888         if (mask & ETH_VLAN_FILTER_MASK) {
 889                 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
 890                         memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
 891                 else
 892                         memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
 893
 894                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 895                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
 896         }
 897 }
 898
 899 #if PROCESS_SYS_EVENTS == 1
 900 static void
 901 vmxnet3_process_events(struct vmxnet3_hw *hw)
 902 {
 903         uint32_t events = hw->shared->ecr;
 904
 905         if (!events) {
 906                 PMD_INIT_LOG(ERR, "No events to process");
 907                 return;
 908         }
 909
 910         /*
 911          * ECR bits when written with 1b are cleared. Hence write
 912          * events back to ECR so that the bits which were set will be reset.
 913          */
 914         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_ECR, events);
 915
 916         /* Check if link state has changed */
 917         if (events & VMXNET3_ECR_LINK)
 918                 PMD_INIT_LOG(ERR,
 919                              "Process events in %s(): VMXNET3_ECR_LINK event", __func__);
 920
 921         /* Check if there is an error on xmit/recv queues */
 922         if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
 923                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_QUEUE_STATUS);
 924
 925                 if (hw->tqd_start->status.stopped)
 926                         PMD_INIT_LOG(ERR, "tq error 0x%x",
 927                                      hw->tqd_start->status.error);
 928
 929                 if (hw->rqd_start->status.stopped)
 930                         PMD_INIT_LOG(ERR, "rq error 0x%x",
 931                                      hw->rqd_start->status.error);
 932
 933                 /* Reset the device */
 934                 /* Have to reset the device */
 935         }
 936
 937         if (events & VMXNET3_ECR_DIC)
 938                 PMD_INIT_LOG(ERR, "Device implementation change event.");
 939
 940         if (events & VMXNET3_ECR_DEBUG)
 941                 PMD_INIT_LOG(ERR, "Debug event generated by device.");
 942
 943 }
 944 #endif
 945
 946 DRIVER_REGISTER_PCI(net_vmxnet3, rte_vmxnet3_pmd.pci_drv);
 947 DRIVER_REGISTER_PCI_TABLE(net_vmxnet3, pci_id_vmxnet3_map);