1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2020 Mellanox Technologies, Ltd
9 #include <rte_malloc.h>
10 #include <rte_regexdev.h>
11 #include <rte_regexdev_core.h>
12 #include <rte_regexdev_driver.h>
14 #include <mlx5_common.h>
15 #include <mlx5_glue.h>
16 #include <mlx5_devx_cmds.h>
18 #include <mlx5_common_os.h>
20 #include "mlx5_regex.h"
21 #include "mlx5_regex_utils.h"
22 #include "mlx5_rxp_csrs.h"
25 #define MLX5_REGEX_NUM_WQE_PER_PAGE (4096/64)
28 * Returns the number of qp obj to be created.
31 * The number of descriptors for the queue.
34 * The number of obj to be created.
37 regex_ctrl_get_nb_obj(uint16_t nb_desc)
39 return ((nb_desc / MLX5_REGEX_NUM_WQE_PER_PAGE) +
40 !!(nb_desc % MLX5_REGEX_NUM_WQE_PER_PAGE));
47 * Pointer to the priv object.
49 * Pointer to the CQ to be destroyed.
52 * 0 on success, a negative errno value otherwise and rte_errno is set.
55 regex_ctrl_destroy_cq(struct mlx5_regex_priv *priv, struct mlx5_regex_cq *cq)
58 mlx5_glue->devx_umem_dereg(cq->cqe_umem);
62 rte_free((void *)(uintptr_t)cq->cqe);
66 mlx5_release_dbr(&priv->dbrpgs, cq->dbr_umem, cq->dbr_offset);
70 mlx5_devx_cmd_destroy(cq->obj);
77 * create the CQ object.
80 * Pointer to the priv object.
82 * Pointer to the CQ to be created.
85 * 0 on success, a negative errno value otherwise and rte_errno is set.
88 regex_ctrl_create_cq(struct mlx5_regex_priv *priv, struct mlx5_regex_cq *cq)
90 struct mlx5_devx_cq_attr attr = {
95 struct mlx5_devx_dbr_page *dbr_page = NULL;
97 size_t pgsize = sysconf(_SC_PAGESIZE);
98 uint32_t cq_size = 1 << cq->log_nb_desc;
101 cq->dbr_offset = mlx5_get_dbr(priv->ctx, &priv->dbrpgs, &dbr_page);
102 if (cq->dbr_offset < 0) {
103 DRV_LOG(ERR, "Can't allocate cq door bell record.");
107 cq->dbr_umem = mlx5_os_get_umem_id(dbr_page->umem);
108 cq->dbr = (uint32_t *)((uintptr_t)dbr_page->dbrs +
109 (uintptr_t)cq->dbr_offset);
111 buf = rte_calloc(NULL, 1, sizeof(struct mlx5_cqe) * cq_size, 4096);
113 DRV_LOG(ERR, "Can't allocate cqe buffer.");
118 for (i = 0; i < cq_size; i++)
119 cq->cqe[i].op_own = 0xff;
120 cq->cqe_umem = mlx5_glue->devx_umem_reg(priv->ctx, buf,
121 sizeof(struct mlx5_cqe) *
124 DRV_LOG(ERR, "Can't register cqe mem.");
128 attr.db_umem_offset = cq->dbr_offset;
129 attr.db_umem_id = cq->dbr_umem;
130 attr.q_umem_id = mlx5_os_get_umem_id(cq->cqe_umem);
131 attr.log_cq_size = cq->log_nb_desc;
132 attr.uar_page_id = priv->uar->page_id;
133 attr.log_page_size = rte_log2_u32(pgsize);
134 cq->obj = mlx5_devx_cmd_create_cq(priv->ctx, &attr);
136 DRV_LOG(ERR, "Can't create cq object.");
143 mlx5_glue->devx_umem_dereg(cq->cqe_umem);
147 mlx5_release_dbr(&priv->dbrpgs, cq->dbr_umem, cq->dbr_offset);
151 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
153 regex_get_pdn(void *pd, uint32_t *pdn)
155 struct mlx5dv_obj obj;
156 struct mlx5dv_pd pd_info;
160 obj.pd.out = &pd_info;
161 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
163 DRV_LOG(DEBUG, "Fail to get PD object info");
172 * create the SQ object.
175 * Pointer to the priv object.
177 * Pointer to the QP element
179 * The index of the queue.
181 * Log 2 of the number of descriptors to be used.
184 * 0 on success, a negative errno value otherwise and rte_errno is set.
187 regex_ctrl_create_sq(struct mlx5_regex_priv *priv, struct mlx5_regex_qp *qp,
188 uint16_t q_ind, uint16_t log_nb_desc)
190 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
191 struct mlx5_devx_create_sq_attr attr = { 0 };
192 struct mlx5_devx_modify_sq_attr modify_attr = { 0 };
193 struct mlx5_devx_wq_attr *wq_attr = &attr.wq_attr;
194 struct mlx5_devx_dbr_page *dbr_page = NULL;
195 struct mlx5_regex_sq *sq = &qp->sqs[q_ind];
201 sq->log_nb_desc = log_nb_desc;
202 sq_size = 1 << sq->log_nb_desc;
203 sq->dbr_offset = mlx5_get_dbr(priv->ctx, &priv->dbrpgs, &dbr_page);
204 if (sq->dbr_offset < 0) {
205 DRV_LOG(ERR, "Can't allocate sq door bell record.");
209 sq->dbr_umem = mlx5_os_get_umem_id(dbr_page->umem);
210 sq->dbr = (uint32_t *)((uintptr_t)dbr_page->dbrs +
211 (uintptr_t)sq->dbr_offset);
213 buf = rte_calloc(NULL, 1, 64 * sq_size, 4096);
215 DRV_LOG(ERR, "Can't allocate wqe buffer.");
220 sq->wqe_umem = mlx5_glue->devx_umem_reg(priv->ctx, buf, 64 * sq_size,
223 DRV_LOG(ERR, "Can't register wqe mem.");
227 attr.state = MLX5_SQC_STATE_RST;
230 attr.user_index = q_ind;
231 attr.cqn = qp->cq.obj->id;
232 wq_attr->uar_page = priv->uar->page_id;
233 regex_get_pdn(priv->pd, &pd_num);
234 wq_attr->pd = pd_num;
235 wq_attr->wq_type = MLX5_WQ_TYPE_CYCLIC;
236 wq_attr->dbr_umem_id = sq->dbr_umem;
237 wq_attr->dbr_addr = sq->dbr_offset;
238 wq_attr->dbr_umem_valid = 1;
239 wq_attr->wq_umem_id = mlx5_os_get_umem_id(sq->wqe_umem);
240 wq_attr->wq_umem_offset = 0;
241 wq_attr->wq_umem_valid = 1;
242 wq_attr->log_wq_stride = 6;
243 wq_attr->log_wq_sz = sq->log_nb_desc;
244 sq->obj = mlx5_devx_cmd_create_sq(priv->ctx, &attr);
246 DRV_LOG(ERR, "Can't create sq object.");
250 modify_attr.state = MLX5_SQC_STATE_RDY;
251 ret = mlx5_devx_cmd_modify_sq(sq->obj, &modify_attr);
253 DRV_LOG(ERR, "Can't change sq state to ready.");
261 mlx5_glue->devx_umem_dereg(sq->wqe_umem);
265 mlx5_release_dbr(&priv->dbrpgs, sq->dbr_umem, sq->dbr_offset);
272 DRV_LOG(ERR, "Cannot get pdn - no DV support.");
278 * Destroy the SQ object.
281 * Pointer to the priv object.
283 * Pointer to the QP element
285 * The index of the queue.
288 * 0 on success, a negative errno value otherwise and rte_errno is set.
291 regex_ctrl_destroy_sq(struct mlx5_regex_priv *priv, struct mlx5_regex_qp *qp,
294 struct mlx5_regex_sq *sq = &qp->sqs[q_ind];
297 mlx5_glue->devx_umem_dereg(sq->wqe_umem);
301 rte_free((void *)(uintptr_t)sq->wqe);
304 if (sq->dbr_offset) {
305 mlx5_release_dbr(&priv->dbrpgs, sq->dbr_umem, sq->dbr_offset);
309 mlx5_devx_cmd_destroy(sq->obj);
319 * Pointer to RegEx dev structure.
321 * The queue index to setup.
323 * The queue requested configuration.
326 * 0 on success, a negative errno value otherwise and rte_errno is set.
329 mlx5_regex_qp_setup(struct rte_regexdev *dev, uint16_t qp_ind,
330 const struct rte_regexdev_qp_conf *cfg)
332 struct mlx5_regex_priv *priv = dev->data->dev_private;
333 struct mlx5_regex_qp *qp;
338 qp = &priv->qps[qp_ind];
339 qp->flags = cfg->qp_conf_flags;
340 qp->cq.log_nb_desc = rte_log2_u32(cfg->nb_desc);
341 qp->nb_desc = 1 << qp->cq.log_nb_desc;
342 if (qp->flags & RTE_REGEX_QUEUE_PAIR_CFG_OOS_F)
343 qp->nb_obj = regex_ctrl_get_nb_obj(qp->nb_desc);
346 qp->sqs = rte_malloc(NULL,
347 qp->nb_obj * sizeof(struct mlx5_regex_sq), 64);
349 DRV_LOG(ERR, "Can't allocate sq array memory.");
353 log_desc = rte_log2_u32(qp->nb_desc / qp->nb_obj);
354 ret = regex_ctrl_create_cq(priv, &qp->cq);
356 DRV_LOG(ERR, "Can't create cq.");
359 for (i = 0; i < qp->nb_obj; i++) {
360 ret = regex_ctrl_create_sq(priv, qp, i, log_desc);
362 DRV_LOG(ERR, "Can't create sq.");
367 mlx5_regexdev_setup_fastpath(priv, qp_ind);
371 regex_ctrl_destroy_cq(priv, &qp->cq);
372 for (i = 0; i < qp->nb_obj; i++)
373 ret = regex_ctrl_destroy_sq(priv, qp, i);