drivers/vdpa/mlx5/mlx5_vdpa_virtq.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2019 Mellanox Technologies, Ltd
   3  */
   4 #include <string.h>
   5 #include <unistd.h>
   6 #include <sys/mman.h>
   7
   8 #include <rte_malloc.h>
   9 #include <rte_errno.h>
  10 #include <rte_io.h>
  11
  12 #include <mlx5_common.h>
  13
  14 #include "mlx5_vdpa_utils.h"
  15 #include "mlx5_vdpa.h"
  16
  17
  18 static void
  19 mlx5_vdpa_virtq_handler(void *cb_arg)
  20 {
  21         struct mlx5_vdpa_virtq *virtq = cb_arg;
  22         struct mlx5_vdpa_priv *priv = virtq->priv;
  23         uint64_t buf;
  24         int nbytes;
  25
  26         do {
  27                 nbytes = read(virtq->intr_handle.fd, &buf, 8);
  28                 if (nbytes < 0) {
  29                         if (errno == EINTR ||
  30                             errno == EWOULDBLOCK ||
  31                             errno == EAGAIN)
  32                                 continue;
  33                         DRV_LOG(ERR,  "Failed to read kickfd of virtq %d: %s",
  34                                 virtq->index, strerror(errno));
  35                 }
  36                 break;
  37         } while (1);
  38         rte_write32(virtq->index, priv->virtq_db_addr);
  39         DRV_LOG(DEBUG, "Ring virtq %u doorbell.", virtq->index);
  40 }
  41
  42 static int
  43 mlx5_vdpa_virtq_unset(struct mlx5_vdpa_virtq *virtq)
  44 {
  45         unsigned int i;
  46         int retries = MLX5_VDPA_INTR_RETRIES;
  47         int ret = -EAGAIN;
  48
  49         if (virtq->intr_handle.fd) {
  50                 while (retries-- && ret == -EAGAIN) {
  51                         ret = rte_intr_callback_unregister(&virtq->intr_handle,
  52                                                         mlx5_vdpa_virtq_handler,
  53                                                         virtq);
  54                         if (ret == -EAGAIN) {
  55                                 DRV_LOG(DEBUG, "Try again to unregister fd %d "
  56                                         "of virtq %d interrupt, retries = %d.",
  57                                         virtq->intr_handle.fd,
  58                                         (int)virtq->index, retries);
  59                                 usleep(MLX5_VDPA_INTR_RETRIES_USEC);
  60                         }
  61                 }
  62                 memset(&virtq->intr_handle, 0, sizeof(virtq->intr_handle));
  63         }
  64         if (virtq->virtq) {
  65                 claim_zero(mlx5_devx_cmd_destroy(virtq->virtq));
  66                 virtq->virtq = NULL;
  67         }
  68         for (i = 0; i < RTE_DIM(virtq->umems); ++i) {
  69                 if (virtq->umems[i].obj)
  70                         claim_zero(mlx5_glue->devx_umem_dereg
  71                                                          (virtq->umems[i].obj));
  72                 if (virtq->umems[i].buf)
  73                         rte_free(virtq->umems[i].buf);
  74         }
  75         memset(&virtq->umems, 0, sizeof(virtq->umems));
  76         if (virtq->eqp.fw_qp)
  77                 mlx5_vdpa_event_qp_destroy(&virtq->eqp);
  78         return 0;
  79 }
  80
  81 void
  82 mlx5_vdpa_virtqs_release(struct mlx5_vdpa_priv *priv)
  83 {
  84         struct mlx5_vdpa_virtq *entry;
  85         struct mlx5_vdpa_virtq *next;
  86
  87         entry = SLIST_FIRST(&priv->virtq_list);
  88         while (entry) {
  89                 next = SLIST_NEXT(entry, next);
  90                 mlx5_vdpa_virtq_unset(entry);
  91                 SLIST_REMOVE(&priv->virtq_list, entry, mlx5_vdpa_virtq, next);
  92                 rte_free(entry);
  93                 entry = next;
  94         }
  95         SLIST_INIT(&priv->virtq_list);
  96         if (priv->tis) {
  97                 claim_zero(mlx5_devx_cmd_destroy(priv->tis));
  98                 priv->tis = NULL;
  99         }
 100         if (priv->td) {
 101                 claim_zero(mlx5_devx_cmd_destroy(priv->td));
 102                 priv->td = NULL;
 103         }
 104         if (priv->virtq_db_addr) {
 105                 claim_zero(munmap(priv->virtq_db_addr, priv->var->length));
 106                 priv->virtq_db_addr = NULL;
 107         }
 108         if (priv->var) {
 109                 mlx5_glue->dv_free_var(priv->var);
 110                 priv->var = NULL;
 111         }
 112         priv->features = 0;
 113 }
 114
 115 static int
 116 mlx5_vdpa_virtq_modify(struct mlx5_vdpa_virtq *virtq, int state)
 117 {
 118         struct mlx5_devx_virtq_attr attr = {
 119                         .type = MLX5_VIRTQ_MODIFY_TYPE_STATE,
 120                         .state = state ? MLX5_VIRTQ_STATE_RDY :
 121                                          MLX5_VIRTQ_STATE_SUSPEND,
 122                         .queue_index = virtq->index,
 123         };
 124
 125         return mlx5_devx_cmd_modify_virtq(virtq->virtq, &attr);
 126 }
 127
 128 static uint64_t
 129 mlx5_vdpa_hva_to_gpa(struct rte_vhost_memory *mem, uint64_t hva)
 130 {
 131         struct rte_vhost_mem_region *reg;
 132         uint32_t i;
 133         uint64_t gpa = 0;
 134
 135         for (i = 0; i < mem->nregions; i++) {
 136                 reg = &mem->regions[i];
 137                 if (hva >= reg->host_user_addr &&
 138                     hva < reg->host_user_addr + reg->size) {
 139                         gpa = hva - reg->host_user_addr + reg->guest_phys_addr;
 140                         break;
 141                 }
 142         }
 143         return gpa;
 144 }
 145
 146 static int
 147 mlx5_vdpa_virtq_setup(struct mlx5_vdpa_priv *priv,
 148                       struct mlx5_vdpa_virtq *virtq, int index)
 149 {
 150         struct rte_vhost_vring vq;
 151         struct mlx5_devx_virtq_attr attr = {0};
 152         uint64_t gpa;
 153         int ret;
 154         unsigned int i;
 155         uint16_t last_avail_idx;
 156         uint16_t last_used_idx;
 157
 158         ret = rte_vhost_get_vhost_vring(priv->vid, index, &vq);
 159         if (ret)
 160                 return -1;
 161         virtq->index = index;
 162         virtq->vq_size = vq.size;
 163         attr.tso_ipv4 = !!(priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO4));
 164         attr.tso_ipv6 = !!(priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO6));
 165         attr.tx_csum = !!(priv->features & (1ULL << VIRTIO_NET_F_CSUM));
 166         attr.rx_csum = !!(priv->features & (1ULL << VIRTIO_NET_F_GUEST_CSUM));
 167         attr.virtio_version_1_0 = !!(priv->features & (1ULL <<
 168                                                         VIRTIO_F_VERSION_1));
 169         attr.type = (priv->features & (1ULL << VIRTIO_F_RING_PACKED)) ?
 170                         MLX5_VIRTQ_TYPE_PACKED : MLX5_VIRTQ_TYPE_SPLIT;
 171         /*
 172          * No need event QPs creation when the guest in poll mode or when the
 173          * capability allows it.
 174          */
 175         attr.event_mode = vq.callfd != -1 || !(priv->caps.event_mode & (1 <<
 176                                                MLX5_VIRTQ_EVENT_MODE_NO_MSIX)) ?
 177                                                       MLX5_VIRTQ_EVENT_MODE_QP :
 178                                                   MLX5_VIRTQ_EVENT_MODE_NO_MSIX;
 179         if (attr.event_mode == MLX5_VIRTQ_EVENT_MODE_QP) {
 180                 ret = mlx5_vdpa_event_qp_create(priv, vq.size, vq.callfd,
 181                                                 &virtq->eqp);
 182                 if (ret) {
 183                         DRV_LOG(ERR, "Failed to create event QPs for virtq %d.",
 184                                 index);
 185                         return -1;
 186                 }
 187                 attr.qp_id = virtq->eqp.fw_qp->id;
 188         } else {
 189                 DRV_LOG(INFO, "Virtq %d is, for sure, working by poll mode, no"
 190                         " need event QPs and event mechanism.", index);
 191         }
 192         /* Setup 3 UMEMs for each virtq. */
 193         for (i = 0; i < RTE_DIM(virtq->umems); ++i) {
 194                 virtq->umems[i].size = priv->caps.umems[i].a * vq.size +
 195                                                           priv->caps.umems[i].b;
 196                 virtq->umems[i].buf = rte_zmalloc(__func__,
 197                                                   virtq->umems[i].size, 4096);
 198                 if (!virtq->umems[i].buf) {
 199                         DRV_LOG(ERR, "Cannot allocate umem %d memory for virtq"
 200                                 " %u.", i, index);
 201                         goto error;
 202                 }
 203                 virtq->umems[i].obj = mlx5_glue->devx_umem_reg(priv->ctx,
 204                                                         virtq->umems[i].buf,
 205                                                         virtq->umems[i].size,
 206                                                         IBV_ACCESS_LOCAL_WRITE);
 207                 if (!virtq->umems[i].obj) {
 208                         DRV_LOG(ERR, "Failed to register umem %d for virtq %u.",
 209                                 i, index);
 210                         goto error;
 211                 }
 212                 attr.umems[i].id = virtq->umems[i].obj->umem_id;
 213                 attr.umems[i].offset = 0;
 214                 attr.umems[i].size = virtq->umems[i].size;
 215         }
 216         if (attr.type == MLX5_VIRTQ_TYPE_SPLIT) {
 217                 gpa = mlx5_vdpa_hva_to_gpa(priv->vmem,
 218                                            (uint64_t)(uintptr_t)vq.desc);
 219                 if (!gpa) {
 220                         DRV_LOG(ERR, "Failed to get descriptor ring GPA.");
 221                         goto error;
 222                 }
 223                 attr.desc_addr = gpa;
 224                 gpa = mlx5_vdpa_hva_to_gpa(priv->vmem,
 225                                            (uint64_t)(uintptr_t)vq.used);
 226                 if (!gpa) {
 227                         DRV_LOG(ERR, "Failed to get GPA for used ring.");
 228                         goto error;
 229                 }
 230                 attr.used_addr = gpa;
 231                 gpa = mlx5_vdpa_hva_to_gpa(priv->vmem,
 232                                            (uint64_t)(uintptr_t)vq.avail);
 233                 if (!gpa) {
 234                         DRV_LOG(ERR, "Failed to get GPA for available ring.");
 235                         goto error;
 236                 }
 237                 attr.available_addr = gpa;
 238         }
 239         rte_vhost_get_vring_base(priv->vid, index, &last_avail_idx,
 240                                  &last_used_idx);
 241         DRV_LOG(INFO, "vid %d: Init last_avail_idx=%d, last_used_idx=%d for "
 242                 "virtq %d.", priv->vid, last_avail_idx, last_used_idx, index);
 243         attr.hw_available_index = last_avail_idx;
 244         attr.hw_used_index = last_used_idx;
 245         attr.q_size = vq.size;
 246         attr.mkey = priv->gpa_mkey_index;
 247         attr.tis_id = priv->tis->id;
 248         attr.queue_index = index;
 249         virtq->virtq = mlx5_devx_cmd_create_virtq(priv->ctx, &attr);
 250         virtq->priv = priv;
 251         if (!virtq->virtq)
 252                 goto error;
 253         if (mlx5_vdpa_virtq_modify(virtq, 1))
 254                 goto error;
 255         virtq->enable = 1;
 256         virtq->intr_handle.fd = vq.kickfd;
 257         virtq->intr_handle.type = RTE_INTR_HANDLE_EXT;
 258         if (rte_intr_callback_register(&virtq->intr_handle,
 259                                        mlx5_vdpa_virtq_handler, virtq)) {
 260                 virtq->intr_handle.fd = 0;
 261                 DRV_LOG(ERR, "Failed to register virtq %d interrupt.", index);
 262                 goto error;
 263         } else {
 264                 DRV_LOG(DEBUG, "Register fd %d interrupt for virtq %d.",
 265                         virtq->intr_handle.fd, index);
 266         }
 267         return 0;
 268 error:
 269         mlx5_vdpa_virtq_unset(virtq);
 270         return -1;
 271 }
 272
 273 static int
 274 mlx5_vdpa_features_validate(struct mlx5_vdpa_priv *priv)
 275 {
 276         if (priv->features & (1ULL << VIRTIO_F_RING_PACKED)) {
 277                 if (!(priv->caps.virtio_queue_type & (1 <<
 278                                                      MLX5_VIRTQ_TYPE_PACKED))) {
 279                         DRV_LOG(ERR, "Failed to configur PACKED mode for vdev "
 280                                 "%d - it was not reported by HW/driver"
 281                                 " capability.", priv->vid);
 282                         return -ENOTSUP;
 283                 }
 284         }
 285         if (priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO4)) {
 286                 if (!priv->caps.tso_ipv4) {
 287                         DRV_LOG(ERR, "Failed to enable TSO4 for vdev %d - TSO4"
 288                                 " was not reported by HW/driver capability.",
 289                                 priv->vid);
 290                         return -ENOTSUP;
 291                 }
 292         }
 293         if (priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO6)) {
 294                 if (!priv->caps.tso_ipv6) {
 295                         DRV_LOG(ERR, "Failed to enable TSO6 for vdev %d - TSO6"
 296                                 " was not reported by HW/driver capability.",
 297                                 priv->vid);
 298                         return -ENOTSUP;
 299                 }
 300         }
 301         if (priv->features & (1ULL << VIRTIO_NET_F_CSUM)) {
 302                 if (!priv->caps.tx_csum) {
 303                         DRV_LOG(ERR, "Failed to enable CSUM for vdev %d - CSUM"
 304                                 " was not reported by HW/driver capability.",
 305                                 priv->vid);
 306                         return -ENOTSUP;
 307                 }
 308         }
 309         if (priv->features & (1ULL << VIRTIO_NET_F_GUEST_CSUM)) {
 310                 if (!priv->caps.rx_csum) {
 311                         DRV_LOG(ERR, "Failed to enable GUEST CSUM for vdev %d"
 312                                 " GUEST CSUM was not reported by HW/driver "
 313                                 "capability.", priv->vid);
 314                         return -ENOTSUP;
 315                 }
 316         }
 317         if (priv->features & (1ULL << VIRTIO_F_VERSION_1)) {
 318                 if (!priv->caps.virtio_version_1_0) {
 319                         DRV_LOG(ERR, "Failed to enable version 1 for vdev %d "
 320                                 "version 1 was not reported by HW/driver"
 321                                 " capability.", priv->vid);
 322                         return -ENOTSUP;
 323                 }
 324         }
 325         return 0;
 326 }
 327
 328 int
 329 mlx5_vdpa_virtqs_prepare(struct mlx5_vdpa_priv *priv)
 330 {
 331         struct mlx5_devx_tis_attr tis_attr = {0};
 332         struct mlx5_vdpa_virtq *virtq;
 333         uint32_t i;
 334         uint16_t nr_vring = rte_vhost_get_vring_num(priv->vid);
 335         int ret = rte_vhost_get_negotiated_features(priv->vid, &priv->features);
 336
 337         if (ret || mlx5_vdpa_features_validate(priv)) {
 338                 DRV_LOG(ERR, "Failed to configure negotiated features.");
 339                 return -1;
 340         }
 341         priv->var = mlx5_glue->dv_alloc_var(priv->ctx, 0);
 342         if (!priv->var) {
 343                 DRV_LOG(ERR, "Failed to allocate VAR %u.\n", errno);
 344                 return -1;
 345         }
 346         /* Always map the entire page. */
 347         priv->virtq_db_addr = mmap(NULL, priv->var->length, PROT_READ |
 348                                    PROT_WRITE, MAP_SHARED, priv->ctx->cmd_fd,
 349                                    priv->var->mmap_off);
 350         if (priv->virtq_db_addr == MAP_FAILED) {
 351                 DRV_LOG(ERR, "Failed to map doorbell page %u.", errno);
 352                 priv->virtq_db_addr = NULL;
 353                 goto error;
 354         } else {
 355                 DRV_LOG(DEBUG, "VAR address of doorbell mapping is %p.",
 356                         priv->virtq_db_addr);
 357         }
 358         priv->td = mlx5_devx_cmd_create_td(priv->ctx);
 359         if (!priv->td) {
 360                 DRV_LOG(ERR, "Failed to create transport domain.");
 361                 return -rte_errno;
 362         }
 363         tis_attr.transport_domain = priv->td->id;
 364         priv->tis = mlx5_devx_cmd_create_tis(priv->ctx, &tis_attr);
 365         if (!priv->tis) {
 366                 DRV_LOG(ERR, "Failed to create TIS.");
 367                 goto error;
 368         }
 369         for (i = 0; i < nr_vring; i++) {
 370                 virtq = rte_zmalloc(__func__, sizeof(*virtq), 0);
 371                 if (!virtq || mlx5_vdpa_virtq_setup(priv, virtq, i)) {
 372                         if (virtq)
 373                                 rte_free(virtq);
 374                         goto error;
 375                 }
 376                 SLIST_INSERT_HEAD(&priv->virtq_list, virtq, next);
 377         }
 378         priv->nr_virtqs = nr_vring;
 379         return 0;
 380 error:
 381         mlx5_vdpa_virtqs_release(priv);
 382         return -1;
 383 }