examples/ip_pipeline/pipeline_passthrough.c

   1 /*-
   2  *   BSD LICENSE
   3  *
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  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
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  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
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  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <stdio.h>
  35 #include <stdlib.h>
  36 #include <stdint.h>
  37
  38 #include <rte_malloc.h>
  39 #include <rte_log.h>
  40
  41 #include <rte_port_ring.h>
  42 #include <rte_table_stub.h>
  43 #include <rte_pipeline.h>
  44
  45 #include "main.h"
  46
  47 void
  48 app_main_loop_pipeline_passthrough(void) {
  49         struct rte_pipeline_params pipeline_params = {
  50                 .name = "pipeline",
  51                 .socket_id = rte_socket_id(),
  52         };
  53
  54         struct rte_pipeline *p;
  55         uint32_t port_in_id[APP_MAX_PORTS];
  56         uint32_t port_out_id[APP_MAX_PORTS];
  57         uint32_t table_id[APP_MAX_PORTS];
  58         uint32_t i;
  59
  60         uint32_t core_id = rte_lcore_id();
  61         struct app_core_params *core_params = app_get_core_params(core_id);
  62
  63         if ((core_params == NULL) || (core_params->core_type != APP_CORE_PT))
  64                 rte_panic("Core %u misconfiguration\n", core_id);
  65
  66         RTE_LOG(INFO, USER1, "Core %u is doing pass-through\n", core_id);
  67
  68         /* Pipeline configuration */
  69         p = rte_pipeline_create(&pipeline_params);
  70         if (p == NULL)
  71                 rte_panic("%s: Unable to configure the pipeline\n", __func__);
  72
  73         /* Input port configuration */
  74         for (i = 0; i < app.n_ports; i++) {
  75                 struct rte_port_ring_reader_params port_ring_params = {
  76                         .ring = app.rings[core_params->swq_in[i]],
  77                 };
  78
  79                 struct rte_pipeline_port_in_params port_params = {
  80                         .ops = &rte_port_ring_reader_ops,
  81                         .arg_create = (void *) &port_ring_params,
  82                         .f_action = NULL,
  83                         .arg_ah = NULL,
  84                         .burst_size = app.bsz_swq_rd,
  85                 };
  86
  87                 if (rte_pipeline_port_in_create(p, &port_params,
  88                         &port_in_id[i])) {
  89                         rte_panic("%s: Unable to configure input port for "
  90                                 "ring %d\n", __func__, i);
  91                 }
  92         }
  93
  94         /* Output port configuration */
  95         for (i = 0; i < app.n_ports; i++) {
  96                 struct rte_port_ring_writer_params port_ring_params = {
  97                         .ring = app.rings[core_params->swq_out[i]],
  98                         .tx_burst_sz = app.bsz_swq_wr,
  99                 };
 100
 101                 struct rte_pipeline_port_out_params port_params = {
 102                         .ops = &rte_port_ring_writer_ops,
 103                         .arg_create = (void *) &port_ring_params,
 104                         .f_action = NULL,
 105                         .f_action_bulk = NULL,
 106                         .arg_ah = NULL,
 107                 };
 108
 109                 if (rte_pipeline_port_out_create(p, &port_params,
 110                         &port_out_id[i])) {
 111                         rte_panic("%s: Unable to configure output port for "
 112                                 "ring %d\n", __func__, i);
 113                 }
 114         }
 115
 116         /* Table configuration */
 117         for (i = 0; i < app.n_ports; i++) {
 118                 struct rte_pipeline_table_params table_params = {
 119                         .ops = &rte_table_stub_ops,
 120                         .arg_create = NULL,
 121                         .f_action_hit = NULL,
 122                         .f_action_miss = NULL,
 123                         .arg_ah = NULL,
 124                         .action_data_size = 0,
 125                 };
 126
 127                 if (rte_pipeline_table_create(p, &table_params, &table_id[i]))
 128                         rte_panic("%s: Unable to configure table %u\n",
 129                                 __func__, i);
 130         }
 131
 132         /* Interconnecting ports and tables */
 133         for (i = 0; i < app.n_ports; i++) {
 134                 if (rte_pipeline_port_in_connect_to_table(p, port_in_id[i],
 135                         table_id[i])) {
 136                         rte_panic("%s: Unable to connect input port %u to "
 137                                 "table %u\n", __func__, port_in_id[i],
 138                                 table_id[i]);
 139                 }
 140         }
 141
 142         /* Add entries to tables */
 143         for (i = 0; i < app.n_ports; i++) {
 144                 struct rte_pipeline_table_entry default_entry = {
 145                         .action = RTE_PIPELINE_ACTION_PORT,
 146                         {.port_id = port_out_id[i]},
 147                 };
 148
 149                 struct rte_pipeline_table_entry *default_entry_ptr;
 150
 151                 if (rte_pipeline_table_default_entry_add(p, table_id[i],
 152                         &default_entry, &default_entry_ptr))
 153                         rte_panic("%s: Unable to add default entry to "
 154                                 "table %u\n", __func__, table_id[i]);
 155         }
 156
 157         /* Enable input ports */
 158         for (i = 0; i < app.n_ports; i++)
 159                 if (rte_pipeline_port_in_enable(p, port_in_id[i]))
 160                         rte_panic("Unable to enable input port %u\n",
 161                                 port_in_id[i]);
 162
 163         /* Check pipeline consistency */
 164         if (rte_pipeline_check(p) < 0)
 165                 rte_panic("%s: Pipeline consistency check failed\n", __func__);
 166
 167         /* Run-time */
 168         for (i = 0; ; i++) {
 169                 rte_pipeline_run(p);
 170
 171                 if ((i & APP_FLUSH) == 0)
 172                         rte_pipeline_flush(p);
 173         }
 174 }
 175
 176 void
 177 app_main_loop_passthrough(void) {
 178         struct app_mbuf_array *m;
 179         uint32_t i;
 180
 181         uint32_t core_id = rte_lcore_id();
 182         struct app_core_params *core_params = app_get_core_params(core_id);
 183
 184         if ((core_params == NULL) || (core_params->core_type != APP_CORE_PT))
 185                 rte_panic("Core %u misconfiguration\n", core_id);
 186
 187         RTE_LOG(INFO, USER1, "Core %u is doing pass-through (no pipeline)\n",
 188                 core_id);
 189
 190         m = rte_malloc_socket(NULL, sizeof(struct app_mbuf_array),
 191                 RTE_CACHE_LINE_SIZE, rte_socket_id());
 192         if (m == NULL)
 193                 rte_panic("%s: cannot allocate buffer space\n", __func__);
 194
 195         for (i = 0; ; i = ((i + 1) & (app.n_ports - 1))) {
 196                 int ret;
 197
 198                 ret = rte_ring_sc_dequeue_bulk(
 199                         app.rings[core_params->swq_in[i]],
 200                         (void **) m->array,
 201                         app.bsz_swq_rd);
 202
 203                 if (ret == -ENOENT)
 204                         continue;
 205
 206                 do {
 207                         ret = rte_ring_sp_enqueue_bulk(
 208                                 app.rings[core_params->swq_out[i]],
 209                                 (void **) m->array,
 210                                 app.bsz_swq_wr);
 211                 } while (ret < 0);
 212         }
 213 }