lib/acl/acl_vect.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2010-2014 Intel Corporation
   3  */
   4
   5 #ifndef _RTE_ACL_VECT_H_
   6 #define _RTE_ACL_VECT_H_
   7
   8 /**
   9  * @file
  10  *
  11  * RTE ACL SSE/AVX related header.
  12  */
  13
  14
  15 /*
  16  * Takes 2 SIMD registers containing N transitions each (tr0, tr1).
  17  * Shuffles it into different representation:
  18  * lo - contains low 32 bits of given N transitions.
  19  * hi - contains high 32 bits of given N transitions.
  20  */
  21 #define ACL_TR_HILO(P, TC, tr0, tr1, lo, hi)                        do { \
  22         lo = (typeof(lo))_##P##_shuffle_ps((TC)(tr0), (TC)(tr1), 0x88);  \
  23         hi = (typeof(hi))_##P##_shuffle_ps((TC)(tr0), (TC)(tr1), 0xdd);  \
  24 } while (0)
  25
  26
  27 /*
  28  * Calculate the address of the next transition for
  29  * all types of nodes. Note that only DFA nodes and range
  30  * nodes actually transition to another node. Match
  31  * nodes not supposed to be encountered here.
  32  * For quad range nodes:
  33  * Calculate number of range boundaries that are less than the
  34  * input value. Range boundaries for each node are in signed 8 bit,
  35  * ordered from -128 to 127.
  36  * This is effectively a popcnt of bytes that are greater than the
  37  * input byte.
  38  * Single nodes are processed in the same ways as quad range nodes.
  39 */
  40 #define ACL_TR_CALC_ADDR(P, S,                                  \
  41         addr, index_mask, next_input, shuffle_input,            \
  42         ones_16, range_base, tr_lo, tr_hi)               do {   \
  43                                                                 \
  44         typeof(addr) in, node_type, r, t;                       \
  45         typeof(addr) dfa_msk, dfa_ofs, quad_ofs;                \
  46                                                                 \
  47         t = _##P##_xor_si##S(index_mask, index_mask);           \
  48         in = _##P##_shuffle_epi8(next_input, shuffle_input);    \
  49                                                                 \
  50         /* Calc node type and node addr */                      \
  51         node_type = _##P##_andnot_si##S(index_mask, tr_lo);     \
  52         addr = _##P##_and_si##S(index_mask, tr_lo);             \
  53                                                                 \
  54         /* mask for DFA type(0) nodes */                        \
  55         dfa_msk = _##P##_cmpeq_epi32(node_type, t);             \
  56                                                                 \
  57         /* DFA calculations. */                                 \
  58         r = _##P##_srli_epi32(in, 30);                          \
  59         r = _##P##_add_epi8(r, range_base);                     \
  60         t = _##P##_srli_epi32(in, 24);                          \
  61         r = _##P##_shuffle_epi8(tr_hi, r);                      \
  62                                                                 \
  63         dfa_ofs = _##P##_sub_epi32(t, r);                       \
  64                                                                 \
  65         /* QUAD/SINGLE calculations. */                         \
  66         t = _##P##_cmpgt_epi8(in, tr_hi);                       \
  67         t = _##P##_sign_epi8(t, t);                             \
  68         t = _##P##_maddubs_epi16(t, t);                         \
  69         quad_ofs = _##P##_madd_epi16(t, ones_16);               \
  70                                                                 \
  71         /* blend DFA and QUAD/SINGLE. */                        \
  72         t = _##P##_blendv_epi8(quad_ofs, dfa_ofs, dfa_msk);     \
  73                                                                 \
  74         /* calculate address for next transitions. */           \
  75         addr = _##P##_add_epi32(addr, t);                       \
  76 } while (0)
  77
  78
  79 #endif /* _RTE_ACL_VECT_H_ */