1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
12 #include <sys/queue.h>
14 #include <rte_byteorder.h>
16 #include <rte_debug.h>
17 #include <rte_interrupts.h>
18 #include <rte_memory.h>
19 #include <rte_memcpy.h>
20 #include <rte_memzone.h>
21 #include <rte_launch.h>
23 #include <rte_per_lcore.h>
24 #include <rte_lcore.h>
25 #include <rte_branch_prediction.h>
26 #include <rte_common.h>
27 #include <rte_mempool.h>
28 #include <rte_malloc.h>
30 #include <rte_errno.h>
31 #include <rte_spinlock.h>
32 #include <rte_string_fns.h>
33 #include <rte_kvargs.h>
34 #include <rte_class.h>
35 #include <rte_ether.h>
36 #include <rte_telemetry.h>
38 #include "rte_ethdev_trace.h"
39 #include "rte_ethdev.h"
40 #include "ethdev_driver.h"
41 #include "ethdev_profile.h"
42 #include "ethdev_private.h"
44 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
45 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
47 /* spinlock for eth device callbacks */
48 static rte_spinlock_t eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
50 /* spinlock for add/remove rx callbacks */
51 static rte_spinlock_t eth_dev_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
53 /* spinlock for add/remove tx callbacks */
54 static rte_spinlock_t eth_dev_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
56 /* spinlock for shared data allocation */
57 static rte_spinlock_t eth_dev_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
59 /* store statistics names and its offset in stats structure */
60 struct rte_eth_xstats_name_off {
61 char name[RTE_ETH_XSTATS_NAME_SIZE];
65 /* Shared memory between primary and secondary processes. */
67 uint64_t next_owner_id;
68 rte_spinlock_t ownership_lock;
69 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
70 } *eth_dev_shared_data;
72 static const struct rte_eth_xstats_name_off eth_dev_stats_strings[] = {
73 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
74 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
75 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
76 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
77 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
78 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
79 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
80 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
84 #define RTE_NB_STATS RTE_DIM(eth_dev_stats_strings)
86 static const struct rte_eth_xstats_name_off eth_dev_rxq_stats_strings[] = {
87 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
88 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
89 {"errors", offsetof(struct rte_eth_stats, q_errors)},
92 #define RTE_NB_RXQ_STATS RTE_DIM(eth_dev_rxq_stats_strings)
94 static const struct rte_eth_xstats_name_off eth_dev_txq_stats_strings[] = {
95 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
96 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
98 #define RTE_NB_TXQ_STATS RTE_DIM(eth_dev_txq_stats_strings)
100 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
101 { DEV_RX_OFFLOAD_##_name, #_name }
103 #define RTE_ETH_RX_OFFLOAD_BIT2STR(_name) \
104 { RTE_ETH_RX_OFFLOAD_##_name, #_name }
106 static const struct {
109 } eth_dev_rx_offload_names[] = {
110 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
111 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
112 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
113 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
114 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
115 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
116 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
118 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
119 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
120 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
121 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
122 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
123 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
124 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
125 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
126 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
127 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
128 RTE_RX_OFFLOAD_BIT2STR(RSS_HASH),
129 RTE_ETH_RX_OFFLOAD_BIT2STR(BUFFER_SPLIT),
132 #undef RTE_RX_OFFLOAD_BIT2STR
133 #undef RTE_ETH_RX_OFFLOAD_BIT2STR
135 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
136 { DEV_TX_OFFLOAD_##_name, #_name }
138 static const struct {
141 } eth_dev_tx_offload_names[] = {
142 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
143 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
150 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
151 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
156 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
157 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
158 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
159 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
160 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
161 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
163 RTE_TX_OFFLOAD_BIT2STR(SEND_ON_TIMESTAMP),
166 #undef RTE_TX_OFFLOAD_BIT2STR
169 * The user application callback description.
171 * It contains callback address to be registered by user application,
172 * the pointer to the parameters for callback, and the event type.
174 struct rte_eth_dev_callback {
175 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
176 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
177 void *cb_arg; /**< Parameter for callback */
178 void *ret_param; /**< Return parameter */
179 enum rte_eth_event_type event; /**< Interrupt event type */
180 uint32_t active; /**< Callback is executing */
189 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
192 struct rte_devargs devargs;
193 const char *bus_param_key;
194 char *bus_str = NULL;
195 char *cls_str = NULL;
199 RTE_ETHDEV_LOG(ERR, "Cannot initialize NULL iterator\n");
203 if (devargs_str == NULL) {
205 "Cannot initialize iterator from NULL device description string\n");
209 memset(iter, 0, sizeof(*iter));
210 memset(&devargs, 0, sizeof(devargs));
213 * The devargs string may use various syntaxes:
214 * - 0000:08:00.0,representor=[1-3]
215 * - pci:0000:06:00.0,representor=[0,5]
216 * - class=eth,mac=00:11:22:33:44:55
217 * A new syntax is in development (not yet supported):
218 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
222 * Handle pure class filter (i.e. without any bus-level argument),
223 * from future new syntax.
224 * rte_devargs_parse() is not yet supporting the new syntax,
225 * that's why this simple case is temporarily parsed here.
227 #define iter_anybus_str "class=eth,"
228 if (strncmp(devargs_str, iter_anybus_str,
229 strlen(iter_anybus_str)) == 0) {
230 iter->cls_str = devargs_str + strlen(iter_anybus_str);
234 /* Split bus, device and parameters. */
235 ret = rte_devargs_parse(&devargs, devargs_str);
240 * Assume parameters of old syntax can match only at ethdev level.
241 * Extra parameters will be ignored, thanks to "+" prefix.
243 str_size = strlen(devargs.args) + 2;
244 cls_str = malloc(str_size);
245 if (cls_str == NULL) {
249 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
250 if (ret != str_size - 1) {
254 iter->cls_str = cls_str;
256 iter->bus = devargs.bus;
257 if (iter->bus->dev_iterate == NULL) {
262 /* Convert bus args to new syntax for use with new API dev_iterate. */
263 if (strcmp(iter->bus->name, "vdev") == 0) {
264 bus_param_key = "name";
265 } else if (strcmp(iter->bus->name, "pci") == 0) {
266 bus_param_key = "addr";
271 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
272 bus_str = malloc(str_size);
273 if (bus_str == NULL) {
277 ret = snprintf(bus_str, str_size, "%s=%s",
278 bus_param_key, devargs.name);
279 if (ret != str_size - 1) {
283 iter->bus_str = bus_str;
286 iter->cls = rte_class_find_by_name("eth");
287 rte_devargs_reset(&devargs);
292 RTE_ETHDEV_LOG(ERR, "Bus %s does not support iterating.\n",
294 rte_devargs_reset(&devargs);
301 rte_eth_iterator_next(struct rte_dev_iterator *iter)
305 "Cannot get next device from NULL iterator\n");
306 return RTE_MAX_ETHPORTS;
309 if (iter->cls == NULL) /* invalid ethdev iterator */
310 return RTE_MAX_ETHPORTS;
312 do { /* loop to try all matching rte_device */
313 /* If not pure ethdev filter and */
314 if (iter->bus != NULL &&
315 /* not in middle of rte_eth_dev iteration, */
316 iter->class_device == NULL) {
317 /* get next rte_device to try. */
318 iter->device = iter->bus->dev_iterate(
319 iter->device, iter->bus_str, iter);
320 if (iter->device == NULL)
321 break; /* no more rte_device candidate */
323 /* A device is matching bus part, need to check ethdev part. */
324 iter->class_device = iter->cls->dev_iterate(
325 iter->class_device, iter->cls_str, iter);
326 if (iter->class_device != NULL)
327 return eth_dev_to_id(iter->class_device); /* match */
328 } while (iter->bus != NULL); /* need to try next rte_device */
330 /* No more ethdev port to iterate. */
331 rte_eth_iterator_cleanup(iter);
332 return RTE_MAX_ETHPORTS;
336 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
339 RTE_ETHDEV_LOG(ERR, "Cannot do clean up from NULL iterator\n");
343 if (iter->bus_str == NULL)
344 return; /* nothing to free in pure class filter */
345 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
346 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
347 memset(iter, 0, sizeof(*iter));
351 rte_eth_find_next(uint16_t port_id)
353 while (port_id < RTE_MAX_ETHPORTS &&
354 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
357 if (port_id >= RTE_MAX_ETHPORTS)
358 return RTE_MAX_ETHPORTS;
364 * Macro to iterate over all valid ports for internal usage.
365 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
367 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
368 for (port_id = rte_eth_find_next(0); \
369 port_id < RTE_MAX_ETHPORTS; \
370 port_id = rte_eth_find_next(port_id + 1))
373 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
375 port_id = rte_eth_find_next(port_id);
376 while (port_id < RTE_MAX_ETHPORTS &&
377 rte_eth_devices[port_id].device != parent)
378 port_id = rte_eth_find_next(port_id + 1);
384 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
386 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
387 return rte_eth_find_next_of(port_id,
388 rte_eth_devices[ref_port_id].device);
392 eth_dev_shared_data_prepare(void)
394 const unsigned flags = 0;
395 const struct rte_memzone *mz;
397 rte_spinlock_lock(ð_dev_shared_data_lock);
399 if (eth_dev_shared_data == NULL) {
400 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
401 /* Allocate port data and ownership shared memory. */
402 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
403 sizeof(*eth_dev_shared_data),
404 rte_socket_id(), flags);
406 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
408 rte_panic("Cannot allocate ethdev shared data\n");
410 eth_dev_shared_data = mz->addr;
411 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
412 eth_dev_shared_data->next_owner_id =
413 RTE_ETH_DEV_NO_OWNER + 1;
414 rte_spinlock_init(ð_dev_shared_data->ownership_lock);
415 memset(eth_dev_shared_data->data, 0,
416 sizeof(eth_dev_shared_data->data));
420 rte_spinlock_unlock(ð_dev_shared_data_lock);
424 eth_dev_is_allocated(const struct rte_eth_dev *ethdev)
426 return ethdev->data->name[0] != '\0';
429 static struct rte_eth_dev *
430 eth_dev_allocated(const char *name)
434 RTE_BUILD_BUG_ON(RTE_MAX_ETHPORTS >= UINT16_MAX);
436 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
437 if (rte_eth_devices[i].data != NULL &&
438 strcmp(rte_eth_devices[i].data->name, name) == 0)
439 return &rte_eth_devices[i];
445 rte_eth_dev_allocated(const char *name)
447 struct rte_eth_dev *ethdev;
449 eth_dev_shared_data_prepare();
451 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
453 ethdev = eth_dev_allocated(name);
455 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
461 eth_dev_find_free_port(void)
465 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
466 /* Using shared name field to find a free port. */
467 if (eth_dev_shared_data->data[i].name[0] == '\0') {
468 RTE_ASSERT(rte_eth_devices[i].state ==
473 return RTE_MAX_ETHPORTS;
476 static struct rte_eth_dev *
477 eth_dev_get(uint16_t port_id)
479 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
481 eth_dev->data = ð_dev_shared_data->data[port_id];
487 rte_eth_dev_allocate(const char *name)
490 struct rte_eth_dev *eth_dev = NULL;
493 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
495 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
499 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
500 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
504 eth_dev_shared_data_prepare();
506 /* Synchronize port creation between primary and secondary threads. */
507 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
509 if (eth_dev_allocated(name) != NULL) {
511 "Ethernet device with name %s already allocated\n",
516 port_id = eth_dev_find_free_port();
517 if (port_id == RTE_MAX_ETHPORTS) {
519 "Reached maximum number of Ethernet ports\n");
523 eth_dev = eth_dev_get(port_id);
524 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
525 eth_dev->data->port_id = port_id;
526 eth_dev->data->mtu = RTE_ETHER_MTU;
527 pthread_mutex_init(ð_dev->data->flow_ops_mutex, NULL);
530 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
536 * Attach to a port already registered by the primary process, which
537 * makes sure that the same device would have the same port id both
538 * in the primary and secondary process.
541 rte_eth_dev_attach_secondary(const char *name)
544 struct rte_eth_dev *eth_dev = NULL;
546 eth_dev_shared_data_prepare();
548 /* Synchronize port attachment to primary port creation and release. */
549 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
551 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
552 if (strcmp(eth_dev_shared_data->data[i].name, name) == 0)
555 if (i == RTE_MAX_ETHPORTS) {
557 "Device %s is not driven by the primary process\n",
560 eth_dev = eth_dev_get(i);
561 RTE_ASSERT(eth_dev->data->port_id == i);
564 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
569 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
574 eth_dev_shared_data_prepare();
576 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
577 rte_eth_dev_callback_process(eth_dev,
578 RTE_ETH_EVENT_DESTROY, NULL);
580 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
582 eth_dev->state = RTE_ETH_DEV_UNUSED;
583 eth_dev->device = NULL;
584 eth_dev->process_private = NULL;
585 eth_dev->intr_handle = NULL;
586 eth_dev->rx_pkt_burst = NULL;
587 eth_dev->tx_pkt_burst = NULL;
588 eth_dev->tx_pkt_prepare = NULL;
589 eth_dev->rx_queue_count = NULL;
590 eth_dev->rx_descriptor_done = NULL;
591 eth_dev->rx_descriptor_status = NULL;
592 eth_dev->tx_descriptor_status = NULL;
593 eth_dev->dev_ops = NULL;
595 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
596 rte_free(eth_dev->data->rx_queues);
597 rte_free(eth_dev->data->tx_queues);
598 rte_free(eth_dev->data->mac_addrs);
599 rte_free(eth_dev->data->hash_mac_addrs);
600 rte_free(eth_dev->data->dev_private);
601 pthread_mutex_destroy(ð_dev->data->flow_ops_mutex);
602 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
605 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
611 rte_eth_dev_is_valid_port(uint16_t port_id)
613 if (port_id >= RTE_MAX_ETHPORTS ||
614 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
621 eth_is_valid_owner_id(uint64_t owner_id)
623 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
624 eth_dev_shared_data->next_owner_id <= owner_id)
630 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
632 port_id = rte_eth_find_next(port_id);
633 while (port_id < RTE_MAX_ETHPORTS &&
634 rte_eth_devices[port_id].data->owner.id != owner_id)
635 port_id = rte_eth_find_next(port_id + 1);
641 rte_eth_dev_owner_new(uint64_t *owner_id)
643 if (owner_id == NULL) {
644 RTE_ETHDEV_LOG(ERR, "Cannot get new owner ID to NULL\n");
648 eth_dev_shared_data_prepare();
650 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
652 *owner_id = eth_dev_shared_data->next_owner_id++;
654 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
659 eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
660 const struct rte_eth_dev_owner *new_owner)
662 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
663 struct rte_eth_dev_owner *port_owner;
665 if (port_id >= RTE_MAX_ETHPORTS || !eth_dev_is_allocated(ethdev)) {
666 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
671 if (new_owner == NULL) {
673 "Cannot set ethdev port %u owner from NULL owner\n",
678 if (!eth_is_valid_owner_id(new_owner->id) &&
679 !eth_is_valid_owner_id(old_owner_id)) {
681 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
682 old_owner_id, new_owner->id);
686 port_owner = &rte_eth_devices[port_id].data->owner;
687 if (port_owner->id != old_owner_id) {
689 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
690 port_id, port_owner->name, port_owner->id);
694 /* can not truncate (same structure) */
695 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
697 port_owner->id = new_owner->id;
699 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
700 port_id, new_owner->name, new_owner->id);
706 rte_eth_dev_owner_set(const uint16_t port_id,
707 const struct rte_eth_dev_owner *owner)
711 eth_dev_shared_data_prepare();
713 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
715 ret = eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
717 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
722 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
724 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
725 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
728 eth_dev_shared_data_prepare();
730 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
732 ret = eth_dev_owner_set(port_id, owner_id, &new_owner);
734 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
739 rte_eth_dev_owner_delete(const uint64_t owner_id)
744 eth_dev_shared_data_prepare();
746 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
748 if (eth_is_valid_owner_id(owner_id)) {
749 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
750 if (rte_eth_devices[port_id].data->owner.id == owner_id)
751 memset(&rte_eth_devices[port_id].data->owner, 0,
752 sizeof(struct rte_eth_dev_owner));
753 RTE_ETHDEV_LOG(NOTICE,
754 "All port owners owned by %016"PRIx64" identifier have removed\n",
758 "Invalid owner id=%016"PRIx64"\n",
763 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
769 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
771 struct rte_eth_dev *ethdev;
773 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
774 ethdev = &rte_eth_devices[port_id];
776 if (!eth_dev_is_allocated(ethdev)) {
777 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
783 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u owner to NULL\n",
788 eth_dev_shared_data_prepare();
790 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
791 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
792 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
798 rte_eth_dev_socket_id(uint16_t port_id)
800 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
801 return rte_eth_devices[port_id].data->numa_node;
805 rte_eth_dev_get_sec_ctx(uint16_t port_id)
807 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
808 return rte_eth_devices[port_id].security_ctx;
812 rte_eth_dev_count_avail(void)
819 RTE_ETH_FOREACH_DEV(p)
826 rte_eth_dev_count_total(void)
828 uint16_t port, count = 0;
830 RTE_ETH_FOREACH_VALID_DEV(port)
837 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
841 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
844 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u name to NULL\n",
849 /* shouldn't check 'rte_eth_devices[i].data',
850 * because it might be overwritten by VDEV PMD */
851 tmp = eth_dev_shared_data->data[port_id].name;
857 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
862 RTE_ETHDEV_LOG(ERR, "Cannot get port ID from NULL name");
866 if (port_id == NULL) {
868 "Cannot get port ID to NULL for %s\n", name);
872 RTE_ETH_FOREACH_VALID_DEV(pid)
873 if (!strcmp(name, eth_dev_shared_data->data[pid].name)) {
882 eth_err(uint16_t port_id, int ret)
886 if (rte_eth_dev_is_removed(port_id))
892 eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
894 uint16_t old_nb_queues = dev->data->nb_rx_queues;
898 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
899 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
900 sizeof(dev->data->rx_queues[0]) * nb_queues,
901 RTE_CACHE_LINE_SIZE);
902 if (dev->data->rx_queues == NULL) {
903 dev->data->nb_rx_queues = 0;
906 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
907 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
909 rxq = dev->data->rx_queues;
911 for (i = nb_queues; i < old_nb_queues; i++)
912 (*dev->dev_ops->rx_queue_release)(rxq[i]);
913 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
914 RTE_CACHE_LINE_SIZE);
917 if (nb_queues > old_nb_queues) {
918 uint16_t new_qs = nb_queues - old_nb_queues;
920 memset(rxq + old_nb_queues, 0,
921 sizeof(rxq[0]) * new_qs);
924 dev->data->rx_queues = rxq;
926 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
927 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
929 rxq = dev->data->rx_queues;
931 for (i = nb_queues; i < old_nb_queues; i++)
932 (*dev->dev_ops->rx_queue_release)(rxq[i]);
934 rte_free(dev->data->rx_queues);
935 dev->data->rx_queues = NULL;
937 dev->data->nb_rx_queues = nb_queues;
942 eth_dev_validate_rx_queue(const struct rte_eth_dev *dev, uint16_t rx_queue_id)
946 if (rx_queue_id >= dev->data->nb_rx_queues) {
947 port_id = dev->data->port_id;
949 "Invalid Rx queue_id=%u of device with port_id=%u\n",
950 rx_queue_id, port_id);
954 if (dev->data->rx_queues[rx_queue_id] == NULL) {
955 port_id = dev->data->port_id;
957 "Queue %u of device with port_id=%u has not been setup\n",
958 rx_queue_id, port_id);
966 eth_dev_validate_tx_queue(const struct rte_eth_dev *dev, uint16_t tx_queue_id)
970 if (tx_queue_id >= dev->data->nb_tx_queues) {
971 port_id = dev->data->port_id;
973 "Invalid Tx queue_id=%u of device with port_id=%u\n",
974 tx_queue_id, port_id);
978 if (dev->data->tx_queues[tx_queue_id] == NULL) {
979 port_id = dev->data->port_id;
981 "Queue %u of device with port_id=%u has not been setup\n",
982 tx_queue_id, port_id);
990 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
992 struct rte_eth_dev *dev;
995 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
996 dev = &rte_eth_devices[port_id];
998 if (!dev->data->dev_started) {
1000 "Port %u must be started before start any queue\n",
1005 ret = eth_dev_validate_rx_queue(dev, rx_queue_id);
1009 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
1011 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
1012 RTE_ETHDEV_LOG(INFO,
1013 "Can't start Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1014 rx_queue_id, port_id);
1018 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
1019 RTE_ETHDEV_LOG(INFO,
1020 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
1021 rx_queue_id, port_id);
1025 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev, rx_queue_id));
1029 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
1031 struct rte_eth_dev *dev;
1034 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1035 dev = &rte_eth_devices[port_id];
1037 ret = eth_dev_validate_rx_queue(dev, rx_queue_id);
1041 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
1043 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
1044 RTE_ETHDEV_LOG(INFO,
1045 "Can't stop Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1046 rx_queue_id, port_id);
1050 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1051 RTE_ETHDEV_LOG(INFO,
1052 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1053 rx_queue_id, port_id);
1057 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
1061 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
1063 struct rte_eth_dev *dev;
1066 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1067 dev = &rte_eth_devices[port_id];
1069 if (!dev->data->dev_started) {
1071 "Port %u must be started before start any queue\n",
1076 ret = eth_dev_validate_tx_queue(dev, tx_queue_id);
1080 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
1082 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1083 RTE_ETHDEV_LOG(INFO,
1084 "Can't start Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1085 tx_queue_id, port_id);
1089 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
1090 RTE_ETHDEV_LOG(INFO,
1091 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
1092 tx_queue_id, port_id);
1096 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
1100 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
1102 struct rte_eth_dev *dev;
1105 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1106 dev = &rte_eth_devices[port_id];
1108 ret = eth_dev_validate_tx_queue(dev, tx_queue_id);
1112 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
1114 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1115 RTE_ETHDEV_LOG(INFO,
1116 "Can't stop Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1117 tx_queue_id, port_id);
1121 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1122 RTE_ETHDEV_LOG(INFO,
1123 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1124 tx_queue_id, port_id);
1128 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1132 eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1134 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1138 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1139 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1140 sizeof(dev->data->tx_queues[0]) * nb_queues,
1141 RTE_CACHE_LINE_SIZE);
1142 if (dev->data->tx_queues == NULL) {
1143 dev->data->nb_tx_queues = 0;
1146 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1147 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1149 txq = dev->data->tx_queues;
1151 for (i = nb_queues; i < old_nb_queues; i++)
1152 (*dev->dev_ops->tx_queue_release)(txq[i]);
1153 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1154 RTE_CACHE_LINE_SIZE);
1157 if (nb_queues > old_nb_queues) {
1158 uint16_t new_qs = nb_queues - old_nb_queues;
1160 memset(txq + old_nb_queues, 0,
1161 sizeof(txq[0]) * new_qs);
1164 dev->data->tx_queues = txq;
1166 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1167 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1169 txq = dev->data->tx_queues;
1171 for (i = nb_queues; i < old_nb_queues; i++)
1172 (*dev->dev_ops->tx_queue_release)(txq[i]);
1174 rte_free(dev->data->tx_queues);
1175 dev->data->tx_queues = NULL;
1177 dev->data->nb_tx_queues = nb_queues;
1182 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1185 case ETH_SPEED_NUM_10M:
1186 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1187 case ETH_SPEED_NUM_100M:
1188 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1189 case ETH_SPEED_NUM_1G:
1190 return ETH_LINK_SPEED_1G;
1191 case ETH_SPEED_NUM_2_5G:
1192 return ETH_LINK_SPEED_2_5G;
1193 case ETH_SPEED_NUM_5G:
1194 return ETH_LINK_SPEED_5G;
1195 case ETH_SPEED_NUM_10G:
1196 return ETH_LINK_SPEED_10G;
1197 case ETH_SPEED_NUM_20G:
1198 return ETH_LINK_SPEED_20G;
1199 case ETH_SPEED_NUM_25G:
1200 return ETH_LINK_SPEED_25G;
1201 case ETH_SPEED_NUM_40G:
1202 return ETH_LINK_SPEED_40G;
1203 case ETH_SPEED_NUM_50G:
1204 return ETH_LINK_SPEED_50G;
1205 case ETH_SPEED_NUM_56G:
1206 return ETH_LINK_SPEED_56G;
1207 case ETH_SPEED_NUM_100G:
1208 return ETH_LINK_SPEED_100G;
1209 case ETH_SPEED_NUM_200G:
1210 return ETH_LINK_SPEED_200G;
1217 rte_eth_dev_rx_offload_name(uint64_t offload)
1219 const char *name = "UNKNOWN";
1222 for (i = 0; i < RTE_DIM(eth_dev_rx_offload_names); ++i) {
1223 if (offload == eth_dev_rx_offload_names[i].offload) {
1224 name = eth_dev_rx_offload_names[i].name;
1233 rte_eth_dev_tx_offload_name(uint64_t offload)
1235 const char *name = "UNKNOWN";
1238 for (i = 0; i < RTE_DIM(eth_dev_tx_offload_names); ++i) {
1239 if (offload == eth_dev_tx_offload_names[i].offload) {
1240 name = eth_dev_tx_offload_names[i].name;
1249 eth_dev_check_lro_pkt_size(uint16_t port_id, uint32_t config_size,
1250 uint32_t max_rx_pkt_len, uint32_t dev_info_size)
1254 if (dev_info_size == 0) {
1255 if (config_size != max_rx_pkt_len) {
1256 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size"
1257 " %u != %u is not allowed\n",
1258 port_id, config_size, max_rx_pkt_len);
1261 } else if (config_size > dev_info_size) {
1262 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1263 "> max allowed value %u\n", port_id, config_size,
1266 } else if (config_size < RTE_ETHER_MIN_LEN) {
1267 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1268 "< min allowed value %u\n", port_id, config_size,
1269 (unsigned int)RTE_ETHER_MIN_LEN);
1276 * Validate offloads that are requested through rte_eth_dev_configure against
1277 * the offloads successfully set by the ethernet device.
1280 * The port identifier of the Ethernet device.
1281 * @param req_offloads
1282 * The offloads that have been requested through `rte_eth_dev_configure`.
1283 * @param set_offloads
1284 * The offloads successfully set by the ethernet device.
1285 * @param offload_type
1286 * The offload type i.e. Rx/Tx string.
1287 * @param offload_name
1288 * The function that prints the offload name.
1290 * - (0) if validation successful.
1291 * - (-EINVAL) if requested offload has been silently disabled.
1295 eth_dev_validate_offloads(uint16_t port_id, uint64_t req_offloads,
1296 uint64_t set_offloads, const char *offload_type,
1297 const char *(*offload_name)(uint64_t))
1299 uint64_t offloads_diff = req_offloads ^ set_offloads;
1303 while (offloads_diff != 0) {
1304 /* Check if any offload is requested but not enabled. */
1305 offload = 1ULL << __builtin_ctzll(offloads_diff);
1306 if (offload & req_offloads) {
1308 "Port %u failed to enable %s offload %s\n",
1309 port_id, offload_type, offload_name(offload));
1313 /* Check if offload couldn't be disabled. */
1314 if (offload & set_offloads) {
1315 RTE_ETHDEV_LOG(DEBUG,
1316 "Port %u %s offload %s is not requested but enabled\n",
1317 port_id, offload_type, offload_name(offload));
1320 offloads_diff &= ~offload;
1327 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1328 const struct rte_eth_conf *dev_conf)
1330 struct rte_eth_dev *dev;
1331 struct rte_eth_dev_info dev_info;
1332 struct rte_eth_conf orig_conf;
1333 uint16_t overhead_len;
1338 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1339 dev = &rte_eth_devices[port_id];
1341 if (dev_conf == NULL) {
1343 "Cannot configure ethdev port %u from NULL config\n",
1348 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1350 if (dev->data->dev_started) {
1352 "Port %u must be stopped to allow configuration\n",
1357 /* Store original config, as rollback required on failure */
1358 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1361 * Copy the dev_conf parameter into the dev structure.
1362 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1364 if (dev_conf != &dev->data->dev_conf)
1365 memcpy(&dev->data->dev_conf, dev_conf,
1366 sizeof(dev->data->dev_conf));
1368 /* Backup mtu for rollback */
1369 old_mtu = dev->data->mtu;
1371 ret = rte_eth_dev_info_get(port_id, &dev_info);
1375 /* Get the real Ethernet overhead length */
1376 if (dev_info.max_mtu != UINT16_MAX &&
1377 dev_info.max_rx_pktlen > dev_info.max_mtu)
1378 overhead_len = dev_info.max_rx_pktlen - dev_info.max_mtu;
1380 overhead_len = RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN;
1382 /* If number of queues specified by application for both Rx and Tx is
1383 * zero, use driver preferred values. This cannot be done individually
1384 * as it is valid for either Tx or Rx (but not both) to be zero.
1385 * If driver does not provide any preferred valued, fall back on
1388 if (nb_rx_q == 0 && nb_tx_q == 0) {
1389 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1391 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1392 nb_tx_q = dev_info.default_txportconf.nb_queues;
1394 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1397 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1399 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1400 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1405 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1407 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1408 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1414 * Check that the numbers of RX and TX queues are not greater
1415 * than the maximum number of RX and TX queues supported by the
1416 * configured device.
1418 if (nb_rx_q > dev_info.max_rx_queues) {
1419 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1420 port_id, nb_rx_q, dev_info.max_rx_queues);
1425 if (nb_tx_q > dev_info.max_tx_queues) {
1426 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1427 port_id, nb_tx_q, dev_info.max_tx_queues);
1432 /* Check that the device supports requested interrupts */
1433 if ((dev_conf->intr_conf.lsc == 1) &&
1434 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1435 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1436 dev->device->driver->name);
1440 if ((dev_conf->intr_conf.rmv == 1) &&
1441 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1442 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1443 dev->device->driver->name);
1449 * If jumbo frames are enabled, check that the maximum RX packet
1450 * length is supported by the configured device.
1452 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1453 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1455 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1456 port_id, dev_conf->rxmode.max_rx_pkt_len,
1457 dev_info.max_rx_pktlen);
1460 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1462 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1463 port_id, dev_conf->rxmode.max_rx_pkt_len,
1464 (unsigned int)RTE_ETHER_MIN_LEN);
1469 /* Scale the MTU size to adapt max_rx_pkt_len */
1470 dev->data->mtu = dev->data->dev_conf.rxmode.max_rx_pkt_len -
1473 uint16_t pktlen = dev_conf->rxmode.max_rx_pkt_len;
1474 if (pktlen < RTE_ETHER_MIN_MTU + overhead_len ||
1475 pktlen > RTE_ETHER_MTU + overhead_len)
1476 /* Use default value */
1477 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1478 RTE_ETHER_MTU + overhead_len;
1482 * If LRO is enabled, check that the maximum aggregated packet
1483 * size is supported by the configured device.
1485 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1486 if (dev_conf->rxmode.max_lro_pkt_size == 0)
1487 dev->data->dev_conf.rxmode.max_lro_pkt_size =
1488 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1489 ret = eth_dev_check_lro_pkt_size(port_id,
1490 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1491 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1492 dev_info.max_lro_pkt_size);
1497 /* Any requested offloading must be within its device capabilities */
1498 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1499 dev_conf->rxmode.offloads) {
1501 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1502 "capabilities 0x%"PRIx64" in %s()\n",
1503 port_id, dev_conf->rxmode.offloads,
1504 dev_info.rx_offload_capa,
1509 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1510 dev_conf->txmode.offloads) {
1512 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1513 "capabilities 0x%"PRIx64" in %s()\n",
1514 port_id, dev_conf->txmode.offloads,
1515 dev_info.tx_offload_capa,
1521 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
1522 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
1524 /* Check that device supports requested rss hash functions. */
1525 if ((dev_info.flow_type_rss_offloads |
1526 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1527 dev_info.flow_type_rss_offloads) {
1529 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1530 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1531 dev_info.flow_type_rss_offloads);
1536 /* Check if Rx RSS distribution is disabled but RSS hash is enabled. */
1537 if (((dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) == 0) &&
1538 (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) {
1540 "Ethdev port_id=%u config invalid Rx mq_mode without RSS but %s offload is requested\n",
1542 rte_eth_dev_rx_offload_name(DEV_RX_OFFLOAD_RSS_HASH));
1548 * Setup new number of RX/TX queues and reconfigure device.
1550 diag = eth_dev_rx_queue_config(dev, nb_rx_q);
1553 "Port%u eth_dev_rx_queue_config = %d\n",
1559 diag = eth_dev_tx_queue_config(dev, nb_tx_q);
1562 "Port%u eth_dev_tx_queue_config = %d\n",
1564 eth_dev_rx_queue_config(dev, 0);
1569 diag = (*dev->dev_ops->dev_configure)(dev);
1571 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1573 ret = eth_err(port_id, diag);
1577 /* Initialize Rx profiling if enabled at compilation time. */
1578 diag = __rte_eth_dev_profile_init(port_id, dev);
1580 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1582 ret = eth_err(port_id, diag);
1586 /* Validate Rx offloads. */
1587 diag = eth_dev_validate_offloads(port_id,
1588 dev_conf->rxmode.offloads,
1589 dev->data->dev_conf.rxmode.offloads, "Rx",
1590 rte_eth_dev_rx_offload_name);
1596 /* Validate Tx offloads. */
1597 diag = eth_dev_validate_offloads(port_id,
1598 dev_conf->txmode.offloads,
1599 dev->data->dev_conf.txmode.offloads, "Tx",
1600 rte_eth_dev_tx_offload_name);
1606 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, 0);
1609 eth_dev_rx_queue_config(dev, 0);
1610 eth_dev_tx_queue_config(dev, 0);
1612 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1613 if (old_mtu != dev->data->mtu)
1614 dev->data->mtu = old_mtu;
1616 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, ret);
1621 rte_eth_dev_internal_reset(struct rte_eth_dev *dev)
1623 if (dev->data->dev_started) {
1624 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1625 dev->data->port_id);
1629 eth_dev_rx_queue_config(dev, 0);
1630 eth_dev_tx_queue_config(dev, 0);
1632 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1636 eth_dev_mac_restore(struct rte_eth_dev *dev,
1637 struct rte_eth_dev_info *dev_info)
1639 struct rte_ether_addr *addr;
1644 /* replay MAC address configuration including default MAC */
1645 addr = &dev->data->mac_addrs[0];
1646 if (*dev->dev_ops->mac_addr_set != NULL)
1647 (*dev->dev_ops->mac_addr_set)(dev, addr);
1648 else if (*dev->dev_ops->mac_addr_add != NULL)
1649 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1651 if (*dev->dev_ops->mac_addr_add != NULL) {
1652 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1653 addr = &dev->data->mac_addrs[i];
1655 /* skip zero address */
1656 if (rte_is_zero_ether_addr(addr))
1660 pool_mask = dev->data->mac_pool_sel[i];
1663 if (pool_mask & 1ULL)
1664 (*dev->dev_ops->mac_addr_add)(dev,
1668 } while (pool_mask);
1674 eth_dev_config_restore(struct rte_eth_dev *dev,
1675 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1679 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1680 eth_dev_mac_restore(dev, dev_info);
1682 /* replay promiscuous configuration */
1684 * use callbacks directly since we don't need port_id check and
1685 * would like to bypass the same value set
1687 if (rte_eth_promiscuous_get(port_id) == 1 &&
1688 *dev->dev_ops->promiscuous_enable != NULL) {
1689 ret = eth_err(port_id,
1690 (*dev->dev_ops->promiscuous_enable)(dev));
1691 if (ret != 0 && ret != -ENOTSUP) {
1693 "Failed to enable promiscuous mode for device (port %u): %s\n",
1694 port_id, rte_strerror(-ret));
1697 } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1698 *dev->dev_ops->promiscuous_disable != NULL) {
1699 ret = eth_err(port_id,
1700 (*dev->dev_ops->promiscuous_disable)(dev));
1701 if (ret != 0 && ret != -ENOTSUP) {
1703 "Failed to disable promiscuous mode for device (port %u): %s\n",
1704 port_id, rte_strerror(-ret));
1709 /* replay all multicast configuration */
1711 * use callbacks directly since we don't need port_id check and
1712 * would like to bypass the same value set
1714 if (rte_eth_allmulticast_get(port_id) == 1 &&
1715 *dev->dev_ops->allmulticast_enable != NULL) {
1716 ret = eth_err(port_id,
1717 (*dev->dev_ops->allmulticast_enable)(dev));
1718 if (ret != 0 && ret != -ENOTSUP) {
1720 "Failed to enable allmulticast mode for device (port %u): %s\n",
1721 port_id, rte_strerror(-ret));
1724 } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1725 *dev->dev_ops->allmulticast_disable != NULL) {
1726 ret = eth_err(port_id,
1727 (*dev->dev_ops->allmulticast_disable)(dev));
1728 if (ret != 0 && ret != -ENOTSUP) {
1730 "Failed to disable allmulticast mode for device (port %u): %s\n",
1731 port_id, rte_strerror(-ret));
1740 rte_eth_dev_start(uint16_t port_id)
1742 struct rte_eth_dev *dev;
1743 struct rte_eth_dev_info dev_info;
1747 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1748 dev = &rte_eth_devices[port_id];
1750 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1752 if (dev->data->dev_started != 0) {
1753 RTE_ETHDEV_LOG(INFO,
1754 "Device with port_id=%"PRIu16" already started\n",
1759 ret = rte_eth_dev_info_get(port_id, &dev_info);
1763 /* Lets restore MAC now if device does not support live change */
1764 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1765 eth_dev_mac_restore(dev, &dev_info);
1767 diag = (*dev->dev_ops->dev_start)(dev);
1769 dev->data->dev_started = 1;
1771 return eth_err(port_id, diag);
1773 ret = eth_dev_config_restore(dev, &dev_info, port_id);
1776 "Error during restoring configuration for device (port %u): %s\n",
1777 port_id, rte_strerror(-ret));
1778 ret_stop = rte_eth_dev_stop(port_id);
1779 if (ret_stop != 0) {
1781 "Failed to stop device (port %u): %s\n",
1782 port_id, rte_strerror(-ret_stop));
1788 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1789 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1790 (*dev->dev_ops->link_update)(dev, 0);
1793 rte_ethdev_trace_start(port_id);
1798 rte_eth_dev_stop(uint16_t port_id)
1800 struct rte_eth_dev *dev;
1803 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1804 dev = &rte_eth_devices[port_id];
1806 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_stop, -ENOTSUP);
1808 if (dev->data->dev_started == 0) {
1809 RTE_ETHDEV_LOG(INFO,
1810 "Device with port_id=%"PRIu16" already stopped\n",
1815 dev->data->dev_started = 0;
1816 ret = (*dev->dev_ops->dev_stop)(dev);
1817 rte_ethdev_trace_stop(port_id, ret);
1823 rte_eth_dev_set_link_up(uint16_t port_id)
1825 struct rte_eth_dev *dev;
1827 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1828 dev = &rte_eth_devices[port_id];
1830 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1831 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1835 rte_eth_dev_set_link_down(uint16_t port_id)
1837 struct rte_eth_dev *dev;
1839 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1840 dev = &rte_eth_devices[port_id];
1842 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1843 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1847 rte_eth_dev_close(uint16_t port_id)
1849 struct rte_eth_dev *dev;
1850 int firsterr, binerr;
1851 int *lasterr = &firsterr;
1853 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1854 dev = &rte_eth_devices[port_id];
1856 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_close, -ENOTSUP);
1857 *lasterr = (*dev->dev_ops->dev_close)(dev);
1861 rte_ethdev_trace_close(port_id);
1862 *lasterr = rte_eth_dev_release_port(dev);
1868 rte_eth_dev_reset(uint16_t port_id)
1870 struct rte_eth_dev *dev;
1873 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1874 dev = &rte_eth_devices[port_id];
1876 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1878 ret = rte_eth_dev_stop(port_id);
1881 "Failed to stop device (port %u) before reset: %s - ignore\n",
1882 port_id, rte_strerror(-ret));
1884 ret = dev->dev_ops->dev_reset(dev);
1886 return eth_err(port_id, ret);
1890 rte_eth_dev_is_removed(uint16_t port_id)
1892 struct rte_eth_dev *dev;
1895 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1896 dev = &rte_eth_devices[port_id];
1898 if (dev->state == RTE_ETH_DEV_REMOVED)
1901 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1903 ret = dev->dev_ops->is_removed(dev);
1905 /* Device is physically removed. */
1906 dev->state = RTE_ETH_DEV_REMOVED;
1912 rte_eth_rx_queue_check_split(const struct rte_eth_rxseg_split *rx_seg,
1913 uint16_t n_seg, uint32_t *mbp_buf_size,
1914 const struct rte_eth_dev_info *dev_info)
1916 const struct rte_eth_rxseg_capa *seg_capa = &dev_info->rx_seg_capa;
1917 struct rte_mempool *mp_first;
1918 uint32_t offset_mask;
1921 if (n_seg > seg_capa->max_nseg) {
1923 "Requested Rx segments %u exceed supported %u\n",
1924 n_seg, seg_capa->max_nseg);
1928 * Check the sizes and offsets against buffer sizes
1929 * for each segment specified in extended configuration.
1931 mp_first = rx_seg[0].mp;
1932 offset_mask = (1u << seg_capa->offset_align_log2) - 1;
1933 for (seg_idx = 0; seg_idx < n_seg; seg_idx++) {
1934 struct rte_mempool *mpl = rx_seg[seg_idx].mp;
1935 uint32_t length = rx_seg[seg_idx].length;
1936 uint32_t offset = rx_seg[seg_idx].offset;
1939 RTE_ETHDEV_LOG(ERR, "null mempool pointer\n");
1942 if (seg_idx != 0 && mp_first != mpl &&
1943 seg_capa->multi_pools == 0) {
1944 RTE_ETHDEV_LOG(ERR, "Receiving to multiple pools is not supported\n");
1948 if (seg_capa->offset_allowed == 0) {
1949 RTE_ETHDEV_LOG(ERR, "Rx segmentation with offset is not supported\n");
1952 if (offset & offset_mask) {
1953 RTE_ETHDEV_LOG(ERR, "Rx segmentation invalid offset alignment %u, %u\n",
1955 seg_capa->offset_align_log2);
1959 if (mpl->private_data_size <
1960 sizeof(struct rte_pktmbuf_pool_private)) {
1962 "%s private_data_size %u < %u\n",
1963 mpl->name, mpl->private_data_size,
1964 (unsigned int)sizeof
1965 (struct rte_pktmbuf_pool_private));
1968 offset += seg_idx != 0 ? 0 : RTE_PKTMBUF_HEADROOM;
1969 *mbp_buf_size = rte_pktmbuf_data_room_size(mpl);
1970 length = length != 0 ? length : *mbp_buf_size;
1971 if (*mbp_buf_size < length + offset) {
1973 "%s mbuf_data_room_size %u < %u (segment length=%u + segment offset=%u)\n",
1974 mpl->name, *mbp_buf_size,
1975 length + offset, length, offset);
1983 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1984 uint16_t nb_rx_desc, unsigned int socket_id,
1985 const struct rte_eth_rxconf *rx_conf,
1986 struct rte_mempool *mp)
1989 uint32_t mbp_buf_size;
1990 struct rte_eth_dev *dev;
1991 struct rte_eth_dev_info dev_info;
1992 struct rte_eth_rxconf local_conf;
1995 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1996 dev = &rte_eth_devices[port_id];
1998 if (rx_queue_id >= dev->data->nb_rx_queues) {
1999 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
2003 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
2005 ret = rte_eth_dev_info_get(port_id, &dev_info);
2010 /* Single pool configuration check. */
2011 if (rx_conf != NULL && rx_conf->rx_nseg != 0) {
2013 "Ambiguous segment configuration\n");
2017 * Check the size of the mbuf data buffer, this value
2018 * must be provided in the private data of the memory pool.
2019 * First check that the memory pool(s) has a valid private data.
2021 if (mp->private_data_size <
2022 sizeof(struct rte_pktmbuf_pool_private)) {
2023 RTE_ETHDEV_LOG(ERR, "%s private_data_size %u < %u\n",
2024 mp->name, mp->private_data_size,
2026 sizeof(struct rte_pktmbuf_pool_private));
2029 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
2030 if (mbp_buf_size < dev_info.min_rx_bufsize +
2031 RTE_PKTMBUF_HEADROOM) {
2033 "%s mbuf_data_room_size %u < %u (RTE_PKTMBUF_HEADROOM=%u + min_rx_bufsize(dev)=%u)\n",
2034 mp->name, mbp_buf_size,
2035 RTE_PKTMBUF_HEADROOM +
2036 dev_info.min_rx_bufsize,
2037 RTE_PKTMBUF_HEADROOM,
2038 dev_info.min_rx_bufsize);
2042 const struct rte_eth_rxseg_split *rx_seg;
2045 /* Extended multi-segment configuration check. */
2046 if (rx_conf == NULL || rx_conf->rx_seg == NULL || rx_conf->rx_nseg == 0) {
2048 "Memory pool is null and no extended configuration provided\n");
2052 rx_seg = (const struct rte_eth_rxseg_split *)rx_conf->rx_seg;
2053 n_seg = rx_conf->rx_nseg;
2055 if (rx_conf->offloads & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT) {
2056 ret = rte_eth_rx_queue_check_split(rx_seg, n_seg,
2062 RTE_ETHDEV_LOG(ERR, "No Rx segmentation offload configured\n");
2067 /* Use default specified by driver, if nb_rx_desc is zero */
2068 if (nb_rx_desc == 0) {
2069 nb_rx_desc = dev_info.default_rxportconf.ring_size;
2070 /* If driver default is also zero, fall back on EAL default */
2071 if (nb_rx_desc == 0)
2072 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
2075 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
2076 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
2077 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
2080 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2081 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
2082 dev_info.rx_desc_lim.nb_min,
2083 dev_info.rx_desc_lim.nb_align);
2087 if (dev->data->dev_started &&
2088 !(dev_info.dev_capa &
2089 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
2092 if (dev->data->dev_started &&
2093 (dev->data->rx_queue_state[rx_queue_id] !=
2094 RTE_ETH_QUEUE_STATE_STOPPED))
2097 rxq = dev->data->rx_queues;
2098 if (rxq[rx_queue_id]) {
2099 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
2101 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
2102 rxq[rx_queue_id] = NULL;
2105 if (rx_conf == NULL)
2106 rx_conf = &dev_info.default_rxconf;
2108 local_conf = *rx_conf;
2111 * If an offloading has already been enabled in
2112 * rte_eth_dev_configure(), it has been enabled on all queues,
2113 * so there is no need to enable it in this queue again.
2114 * The local_conf.offloads input to underlying PMD only carries
2115 * those offloadings which are only enabled on this queue and
2116 * not enabled on all queues.
2118 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
2121 * New added offloadings for this queue are those not enabled in
2122 * rte_eth_dev_configure() and they must be per-queue type.
2123 * A pure per-port offloading can't be enabled on a queue while
2124 * disabled on another queue. A pure per-port offloading can't
2125 * be enabled for any queue as new added one if it hasn't been
2126 * enabled in rte_eth_dev_configure().
2128 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
2129 local_conf.offloads) {
2131 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2132 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2133 port_id, rx_queue_id, local_conf.offloads,
2134 dev_info.rx_queue_offload_capa,
2140 * If LRO is enabled, check that the maximum aggregated packet
2141 * size is supported by the configured device.
2143 if (local_conf.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
2144 if (dev->data->dev_conf.rxmode.max_lro_pkt_size == 0)
2145 dev->data->dev_conf.rxmode.max_lro_pkt_size =
2146 dev->data->dev_conf.rxmode.max_rx_pkt_len;
2147 int ret = eth_dev_check_lro_pkt_size(port_id,
2148 dev->data->dev_conf.rxmode.max_lro_pkt_size,
2149 dev->data->dev_conf.rxmode.max_rx_pkt_len,
2150 dev_info.max_lro_pkt_size);
2155 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
2156 socket_id, &local_conf, mp);
2158 if (!dev->data->min_rx_buf_size ||
2159 dev->data->min_rx_buf_size > mbp_buf_size)
2160 dev->data->min_rx_buf_size = mbp_buf_size;
2163 rte_ethdev_trace_rxq_setup(port_id, rx_queue_id, nb_rx_desc, mp,
2165 return eth_err(port_id, ret);
2169 rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
2170 uint16_t nb_rx_desc,
2171 const struct rte_eth_hairpin_conf *conf)
2174 struct rte_eth_dev *dev;
2175 struct rte_eth_hairpin_cap cap;
2180 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2181 dev = &rte_eth_devices[port_id];
2183 if (rx_queue_id >= dev->data->nb_rx_queues) {
2184 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
2190 "Cannot setup ethdev port %u Rx hairpin queue from NULL config\n",
2195 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2198 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_hairpin_queue_setup,
2200 /* if nb_rx_desc is zero use max number of desc from the driver. */
2201 if (nb_rx_desc == 0)
2202 nb_rx_desc = cap.max_nb_desc;
2203 if (nb_rx_desc > cap.max_nb_desc) {
2205 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu",
2206 nb_rx_desc, cap.max_nb_desc);
2209 if (conf->peer_count > cap.max_rx_2_tx) {
2211 "Invalid value for number of peers for Rx queue(=%u), should be: <= %hu",
2212 conf->peer_count, cap.max_rx_2_tx);
2215 if (conf->peer_count == 0) {
2217 "Invalid value for number of peers for Rx queue(=%u), should be: > 0",
2221 for (i = 0, count = 0; i < dev->data->nb_rx_queues &&
2222 cap.max_nb_queues != UINT16_MAX; i++) {
2223 if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i))
2226 if (count > cap.max_nb_queues) {
2227 RTE_ETHDEV_LOG(ERR, "To many Rx hairpin queues max is %d",
2231 if (dev->data->dev_started)
2233 rxq = dev->data->rx_queues;
2234 if (rxq[rx_queue_id] != NULL) {
2235 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
2237 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
2238 rxq[rx_queue_id] = NULL;
2240 ret = (*dev->dev_ops->rx_hairpin_queue_setup)(dev, rx_queue_id,
2243 dev->data->rx_queue_state[rx_queue_id] =
2244 RTE_ETH_QUEUE_STATE_HAIRPIN;
2245 return eth_err(port_id, ret);
2249 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2250 uint16_t nb_tx_desc, unsigned int socket_id,
2251 const struct rte_eth_txconf *tx_conf)
2253 struct rte_eth_dev *dev;
2254 struct rte_eth_dev_info dev_info;
2255 struct rte_eth_txconf local_conf;
2259 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2260 dev = &rte_eth_devices[port_id];
2262 if (tx_queue_id >= dev->data->nb_tx_queues) {
2263 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2267 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
2269 ret = rte_eth_dev_info_get(port_id, &dev_info);
2273 /* Use default specified by driver, if nb_tx_desc is zero */
2274 if (nb_tx_desc == 0) {
2275 nb_tx_desc = dev_info.default_txportconf.ring_size;
2276 /* If driver default is zero, fall back on EAL default */
2277 if (nb_tx_desc == 0)
2278 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
2280 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
2281 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
2282 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
2284 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2285 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
2286 dev_info.tx_desc_lim.nb_min,
2287 dev_info.tx_desc_lim.nb_align);
2291 if (dev->data->dev_started &&
2292 !(dev_info.dev_capa &
2293 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
2296 if (dev->data->dev_started &&
2297 (dev->data->tx_queue_state[tx_queue_id] !=
2298 RTE_ETH_QUEUE_STATE_STOPPED))
2301 txq = dev->data->tx_queues;
2302 if (txq[tx_queue_id]) {
2303 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2305 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2306 txq[tx_queue_id] = NULL;
2309 if (tx_conf == NULL)
2310 tx_conf = &dev_info.default_txconf;
2312 local_conf = *tx_conf;
2315 * If an offloading has already been enabled in
2316 * rte_eth_dev_configure(), it has been enabled on all queues,
2317 * so there is no need to enable it in this queue again.
2318 * The local_conf.offloads input to underlying PMD only carries
2319 * those offloadings which are only enabled on this queue and
2320 * not enabled on all queues.
2322 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
2325 * New added offloadings for this queue are those not enabled in
2326 * rte_eth_dev_configure() and they must be per-queue type.
2327 * A pure per-port offloading can't be enabled on a queue while
2328 * disabled on another queue. A pure per-port offloading can't
2329 * be enabled for any queue as new added one if it hasn't been
2330 * enabled in rte_eth_dev_configure().
2332 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
2333 local_conf.offloads) {
2335 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2336 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2337 port_id, tx_queue_id, local_conf.offloads,
2338 dev_info.tx_queue_offload_capa,
2343 rte_ethdev_trace_txq_setup(port_id, tx_queue_id, nb_tx_desc, tx_conf);
2344 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
2345 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
2349 rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2350 uint16_t nb_tx_desc,
2351 const struct rte_eth_hairpin_conf *conf)
2353 struct rte_eth_dev *dev;
2354 struct rte_eth_hairpin_cap cap;
2360 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2361 dev = &rte_eth_devices[port_id];
2363 if (tx_queue_id >= dev->data->nb_tx_queues) {
2364 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2370 "Cannot setup ethdev port %u Tx hairpin queue from NULL config\n",
2375 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2378 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_hairpin_queue_setup,
2380 /* if nb_rx_desc is zero use max number of desc from the driver. */
2381 if (nb_tx_desc == 0)
2382 nb_tx_desc = cap.max_nb_desc;
2383 if (nb_tx_desc > cap.max_nb_desc) {
2385 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu",
2386 nb_tx_desc, cap.max_nb_desc);
2389 if (conf->peer_count > cap.max_tx_2_rx) {
2391 "Invalid value for number of peers for Tx queue(=%u), should be: <= %hu",
2392 conf->peer_count, cap.max_tx_2_rx);
2395 if (conf->peer_count == 0) {
2397 "Invalid value for number of peers for Tx queue(=%u), should be: > 0",
2401 for (i = 0, count = 0; i < dev->data->nb_tx_queues &&
2402 cap.max_nb_queues != UINT16_MAX; i++) {
2403 if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i))
2406 if (count > cap.max_nb_queues) {
2407 RTE_ETHDEV_LOG(ERR, "To many Tx hairpin queues max is %d",
2411 if (dev->data->dev_started)
2413 txq = dev->data->tx_queues;
2414 if (txq[tx_queue_id] != NULL) {
2415 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2417 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2418 txq[tx_queue_id] = NULL;
2420 ret = (*dev->dev_ops->tx_hairpin_queue_setup)
2421 (dev, tx_queue_id, nb_tx_desc, conf);
2423 dev->data->tx_queue_state[tx_queue_id] =
2424 RTE_ETH_QUEUE_STATE_HAIRPIN;
2425 return eth_err(port_id, ret);
2429 rte_eth_hairpin_bind(uint16_t tx_port, uint16_t rx_port)
2431 struct rte_eth_dev *dev;
2434 RTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port, -ENODEV);
2435 dev = &rte_eth_devices[tx_port];
2437 if (dev->data->dev_started == 0) {
2438 RTE_ETHDEV_LOG(ERR, "Tx port %d is not started\n", tx_port);
2442 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_bind, -ENOTSUP);
2443 ret = (*dev->dev_ops->hairpin_bind)(dev, rx_port);
2445 RTE_ETHDEV_LOG(ERR, "Failed to bind hairpin Tx %d"
2446 " to Rx %d (%d - all ports)\n",
2447 tx_port, rx_port, RTE_MAX_ETHPORTS);
2453 rte_eth_hairpin_unbind(uint16_t tx_port, uint16_t rx_port)
2455 struct rte_eth_dev *dev;
2458 RTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port, -ENODEV);
2459 dev = &rte_eth_devices[tx_port];
2461 if (dev->data->dev_started == 0) {
2462 RTE_ETHDEV_LOG(ERR, "Tx port %d is already stopped\n", tx_port);
2466 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_unbind, -ENOTSUP);
2467 ret = (*dev->dev_ops->hairpin_unbind)(dev, rx_port);
2469 RTE_ETHDEV_LOG(ERR, "Failed to unbind hairpin Tx %d"
2470 " from Rx %d (%d - all ports)\n",
2471 tx_port, rx_port, RTE_MAX_ETHPORTS);
2477 rte_eth_hairpin_get_peer_ports(uint16_t port_id, uint16_t *peer_ports,
2478 size_t len, uint32_t direction)
2480 struct rte_eth_dev *dev;
2483 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2484 dev = &rte_eth_devices[port_id];
2486 if (peer_ports == NULL) {
2488 "Cannot get ethdev port %u hairpin peer ports to NULL\n",
2495 "Cannot get ethdev port %u hairpin peer ports to array with zero size\n",
2500 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_get_peer_ports,
2503 ret = (*dev->dev_ops->hairpin_get_peer_ports)(dev, peer_ports,
2506 RTE_ETHDEV_LOG(ERR, "Failed to get %d hairpin peer %s ports\n",
2507 port_id, direction ? "Rx" : "Tx");
2513 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
2514 void *userdata __rte_unused)
2516 rte_pktmbuf_free_bulk(pkts, unsent);
2520 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
2523 uint64_t *count = userdata;
2525 rte_pktmbuf_free_bulk(pkts, unsent);
2530 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
2531 buffer_tx_error_fn cbfn, void *userdata)
2533 if (buffer == NULL) {
2535 "Cannot set Tx buffer error callback to NULL buffer\n");
2539 buffer->error_callback = cbfn;
2540 buffer->error_userdata = userdata;
2545 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
2549 if (buffer == NULL) {
2550 RTE_ETHDEV_LOG(ERR, "Cannot initialize NULL buffer\n");
2554 buffer->size = size;
2555 if (buffer->error_callback == NULL) {
2556 ret = rte_eth_tx_buffer_set_err_callback(
2557 buffer, rte_eth_tx_buffer_drop_callback, NULL);
2564 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
2566 struct rte_eth_dev *dev;
2569 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2570 dev = &rte_eth_devices[port_id];
2572 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
2574 /* Call driver to free pending mbufs. */
2575 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
2577 return eth_err(port_id, ret);
2581 rte_eth_promiscuous_enable(uint16_t port_id)
2583 struct rte_eth_dev *dev;
2586 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2587 dev = &rte_eth_devices[port_id];
2589 if (dev->data->promiscuous == 1)
2592 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
2594 diag = (*dev->dev_ops->promiscuous_enable)(dev);
2595 dev->data->promiscuous = (diag == 0) ? 1 : 0;
2597 return eth_err(port_id, diag);
2601 rte_eth_promiscuous_disable(uint16_t port_id)
2603 struct rte_eth_dev *dev;
2606 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2607 dev = &rte_eth_devices[port_id];
2609 if (dev->data->promiscuous == 0)
2612 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
2614 dev->data->promiscuous = 0;
2615 diag = (*dev->dev_ops->promiscuous_disable)(dev);
2617 dev->data->promiscuous = 1;
2619 return eth_err(port_id, diag);
2623 rte_eth_promiscuous_get(uint16_t port_id)
2625 struct rte_eth_dev *dev;
2627 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2628 dev = &rte_eth_devices[port_id];
2630 return dev->data->promiscuous;
2634 rte_eth_allmulticast_enable(uint16_t port_id)
2636 struct rte_eth_dev *dev;
2639 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2640 dev = &rte_eth_devices[port_id];
2642 if (dev->data->all_multicast == 1)
2645 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2646 diag = (*dev->dev_ops->allmulticast_enable)(dev);
2647 dev->data->all_multicast = (diag == 0) ? 1 : 0;
2649 return eth_err(port_id, diag);
2653 rte_eth_allmulticast_disable(uint16_t port_id)
2655 struct rte_eth_dev *dev;
2658 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2659 dev = &rte_eth_devices[port_id];
2661 if (dev->data->all_multicast == 0)
2664 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2665 dev->data->all_multicast = 0;
2666 diag = (*dev->dev_ops->allmulticast_disable)(dev);
2668 dev->data->all_multicast = 1;
2670 return eth_err(port_id, diag);
2674 rte_eth_allmulticast_get(uint16_t port_id)
2676 struct rte_eth_dev *dev;
2678 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2679 dev = &rte_eth_devices[port_id];
2681 return dev->data->all_multicast;
2685 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2687 struct rte_eth_dev *dev;
2689 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2690 dev = &rte_eth_devices[port_id];
2692 if (eth_link == NULL) {
2693 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u link to NULL\n",
2698 if (dev->data->dev_conf.intr_conf.lsc && dev->data->dev_started)
2699 rte_eth_linkstatus_get(dev, eth_link);
2701 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2702 (*dev->dev_ops->link_update)(dev, 1);
2703 *eth_link = dev->data->dev_link;
2710 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2712 struct rte_eth_dev *dev;
2714 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2715 dev = &rte_eth_devices[port_id];
2717 if (eth_link == NULL) {
2718 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u link to NULL\n",
2723 if (dev->data->dev_conf.intr_conf.lsc && dev->data->dev_started)
2724 rte_eth_linkstatus_get(dev, eth_link);
2726 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2727 (*dev->dev_ops->link_update)(dev, 0);
2728 *eth_link = dev->data->dev_link;
2735 rte_eth_link_speed_to_str(uint32_t link_speed)
2737 switch (link_speed) {
2738 case ETH_SPEED_NUM_NONE: return "None";
2739 case ETH_SPEED_NUM_10M: return "10 Mbps";
2740 case ETH_SPEED_NUM_100M: return "100 Mbps";
2741 case ETH_SPEED_NUM_1G: return "1 Gbps";
2742 case ETH_SPEED_NUM_2_5G: return "2.5 Gbps";
2743 case ETH_SPEED_NUM_5G: return "5 Gbps";
2744 case ETH_SPEED_NUM_10G: return "10 Gbps";
2745 case ETH_SPEED_NUM_20G: return "20 Gbps";
2746 case ETH_SPEED_NUM_25G: return "25 Gbps";
2747 case ETH_SPEED_NUM_40G: return "40 Gbps";
2748 case ETH_SPEED_NUM_50G: return "50 Gbps";
2749 case ETH_SPEED_NUM_56G: return "56 Gbps";
2750 case ETH_SPEED_NUM_100G: return "100 Gbps";
2751 case ETH_SPEED_NUM_200G: return "200 Gbps";
2752 case ETH_SPEED_NUM_UNKNOWN: return "Unknown";
2753 default: return "Invalid";
2758 rte_eth_link_to_str(char *str, size_t len, const struct rte_eth_link *eth_link)
2761 RTE_ETHDEV_LOG(ERR, "Cannot convert link to NULL string\n");
2767 "Cannot convert link to string with zero size\n");
2771 if (eth_link == NULL) {
2772 RTE_ETHDEV_LOG(ERR, "Cannot convert to string from NULL link\n");
2776 if (eth_link->link_status == ETH_LINK_DOWN)
2777 return snprintf(str, len, "Link down");
2779 return snprintf(str, len, "Link up at %s %s %s",
2780 rte_eth_link_speed_to_str(eth_link->link_speed),
2781 (eth_link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
2783 (eth_link->link_autoneg == ETH_LINK_AUTONEG) ?
2784 "Autoneg" : "Fixed");
2788 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2790 struct rte_eth_dev *dev;
2792 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2793 dev = &rte_eth_devices[port_id];
2795 if (stats == NULL) {
2796 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u stats to NULL\n",
2801 memset(stats, 0, sizeof(*stats));
2803 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2804 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2805 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2809 rte_eth_stats_reset(uint16_t port_id)
2811 struct rte_eth_dev *dev;
2814 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2815 dev = &rte_eth_devices[port_id];
2817 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2818 ret = (*dev->dev_ops->stats_reset)(dev);
2820 return eth_err(port_id, ret);
2822 dev->data->rx_mbuf_alloc_failed = 0;
2828 eth_dev_get_xstats_basic_count(struct rte_eth_dev *dev)
2830 uint16_t nb_rxqs, nb_txqs;
2833 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2834 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2836 count = RTE_NB_STATS;
2837 if (dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) {
2838 count += nb_rxqs * RTE_NB_RXQ_STATS;
2839 count += nb_txqs * RTE_NB_TXQ_STATS;
2846 eth_dev_get_xstats_count(uint16_t port_id)
2848 struct rte_eth_dev *dev;
2851 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2852 dev = &rte_eth_devices[port_id];
2853 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2854 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2857 return eth_err(port_id, count);
2859 if (dev->dev_ops->xstats_get_names != NULL) {
2860 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2862 return eth_err(port_id, count);
2867 count += eth_dev_get_xstats_basic_count(dev);
2873 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2876 int cnt_xstats, idx_xstat;
2878 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2880 if (xstat_name == NULL) {
2882 "Cannot get ethdev port %u xstats ID from NULL xstat name\n",
2889 "Cannot get ethdev port %u xstats ID to NULL\n",
2895 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2896 if (cnt_xstats < 0) {
2897 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2901 /* Get id-name lookup table */
2902 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2904 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2905 port_id, xstats_names, cnt_xstats, NULL)) {
2906 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2910 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2911 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2920 /* retrieve basic stats names */
2922 eth_basic_stats_get_names(struct rte_eth_dev *dev,
2923 struct rte_eth_xstat_name *xstats_names)
2925 int cnt_used_entries = 0;
2926 uint32_t idx, id_queue;
2929 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2930 strlcpy(xstats_names[cnt_used_entries].name,
2931 eth_dev_stats_strings[idx].name,
2932 sizeof(xstats_names[0].name));
2936 if ((dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) == 0)
2937 return cnt_used_entries;
2939 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2940 for (id_queue = 0; id_queue < num_q; id_queue++) {
2941 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2942 snprintf(xstats_names[cnt_used_entries].name,
2943 sizeof(xstats_names[0].name),
2945 id_queue, eth_dev_rxq_stats_strings[idx].name);
2950 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2951 for (id_queue = 0; id_queue < num_q; id_queue++) {
2952 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2953 snprintf(xstats_names[cnt_used_entries].name,
2954 sizeof(xstats_names[0].name),
2956 id_queue, eth_dev_txq_stats_strings[idx].name);
2960 return cnt_used_entries;
2963 /* retrieve ethdev extended statistics names */
2965 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2966 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2969 struct rte_eth_xstat_name *xstats_names_copy;
2970 unsigned int no_basic_stat_requested = 1;
2971 unsigned int no_ext_stat_requested = 1;
2972 unsigned int expected_entries;
2973 unsigned int basic_count;
2974 struct rte_eth_dev *dev;
2978 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2979 dev = &rte_eth_devices[port_id];
2981 basic_count = eth_dev_get_xstats_basic_count(dev);
2982 ret = eth_dev_get_xstats_count(port_id);
2985 expected_entries = (unsigned int)ret;
2987 /* Return max number of stats if no ids given */
2990 return expected_entries;
2991 else if (xstats_names && size < expected_entries)
2992 return expected_entries;
2995 if (ids && !xstats_names)
2998 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2999 uint64_t ids_copy[size];
3001 for (i = 0; i < size; i++) {
3002 if (ids[i] < basic_count) {
3003 no_basic_stat_requested = 0;
3008 * Convert ids to xstats ids that PMD knows.
3009 * ids known by user are basic + extended stats.
3011 ids_copy[i] = ids[i] - basic_count;
3014 if (no_basic_stat_requested)
3015 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
3016 xstats_names, ids_copy, size);
3019 /* Retrieve all stats */
3021 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
3023 if (num_stats < 0 || num_stats > (int)expected_entries)
3026 return expected_entries;
3029 xstats_names_copy = calloc(expected_entries,
3030 sizeof(struct rte_eth_xstat_name));
3032 if (!xstats_names_copy) {
3033 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
3038 for (i = 0; i < size; i++) {
3039 if (ids[i] >= basic_count) {
3040 no_ext_stat_requested = 0;
3046 /* Fill xstats_names_copy structure */
3047 if (ids && no_ext_stat_requested) {
3048 eth_basic_stats_get_names(dev, xstats_names_copy);
3050 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
3053 free(xstats_names_copy);
3059 for (i = 0; i < size; i++) {
3060 if (ids[i] >= expected_entries) {
3061 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
3062 free(xstats_names_copy);
3065 xstats_names[i] = xstats_names_copy[ids[i]];
3068 free(xstats_names_copy);
3073 rte_eth_xstats_get_names(uint16_t port_id,
3074 struct rte_eth_xstat_name *xstats_names,
3077 struct rte_eth_dev *dev;
3078 int cnt_used_entries;
3079 int cnt_expected_entries;
3080 int cnt_driver_entries;
3082 cnt_expected_entries = eth_dev_get_xstats_count(port_id);
3083 if (xstats_names == NULL || cnt_expected_entries < 0 ||
3084 (int)size < cnt_expected_entries)
3085 return cnt_expected_entries;
3087 /* port_id checked in eth_dev_get_xstats_count() */
3088 dev = &rte_eth_devices[port_id];
3090 cnt_used_entries = eth_basic_stats_get_names(dev, xstats_names);
3092 if (dev->dev_ops->xstats_get_names != NULL) {
3093 /* If there are any driver-specific xstats, append them
3096 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
3098 xstats_names + cnt_used_entries,
3099 size - cnt_used_entries);
3100 if (cnt_driver_entries < 0)
3101 return eth_err(port_id, cnt_driver_entries);
3102 cnt_used_entries += cnt_driver_entries;
3105 return cnt_used_entries;
3110 eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
3112 struct rte_eth_dev *dev;
3113 struct rte_eth_stats eth_stats;
3114 unsigned int count = 0, i, q;
3115 uint64_t val, *stats_ptr;
3116 uint16_t nb_rxqs, nb_txqs;
3119 ret = rte_eth_stats_get(port_id, ð_stats);
3123 dev = &rte_eth_devices[port_id];
3125 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3126 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3129 for (i = 0; i < RTE_NB_STATS; i++) {
3130 stats_ptr = RTE_PTR_ADD(ð_stats,
3131 eth_dev_stats_strings[i].offset);
3133 xstats[count++].value = val;
3136 if ((dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) == 0)
3140 for (q = 0; q < nb_rxqs; q++) {
3141 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
3142 stats_ptr = RTE_PTR_ADD(ð_stats,
3143 eth_dev_rxq_stats_strings[i].offset +
3144 q * sizeof(uint64_t));
3146 xstats[count++].value = val;
3151 for (q = 0; q < nb_txqs; q++) {
3152 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
3153 stats_ptr = RTE_PTR_ADD(ð_stats,
3154 eth_dev_txq_stats_strings[i].offset +
3155 q * sizeof(uint64_t));
3157 xstats[count++].value = val;
3163 /* retrieve ethdev extended statistics */
3165 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
3166 uint64_t *values, unsigned int size)
3168 unsigned int no_basic_stat_requested = 1;
3169 unsigned int no_ext_stat_requested = 1;
3170 unsigned int num_xstats_filled;
3171 unsigned int basic_count;
3172 uint16_t expected_entries;
3173 struct rte_eth_dev *dev;
3177 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3178 dev = &rte_eth_devices[port_id];
3180 ret = eth_dev_get_xstats_count(port_id);
3183 expected_entries = (uint16_t)ret;
3184 struct rte_eth_xstat xstats[expected_entries];
3185 basic_count = eth_dev_get_xstats_basic_count(dev);
3187 /* Return max number of stats if no ids given */
3190 return expected_entries;
3191 else if (values && size < expected_entries)
3192 return expected_entries;
3198 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
3199 unsigned int basic_count = eth_dev_get_xstats_basic_count(dev);
3200 uint64_t ids_copy[size];
3202 for (i = 0; i < size; i++) {
3203 if (ids[i] < basic_count) {
3204 no_basic_stat_requested = 0;
3209 * Convert ids to xstats ids that PMD knows.
3210 * ids known by user are basic + extended stats.
3212 ids_copy[i] = ids[i] - basic_count;
3215 if (no_basic_stat_requested)
3216 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
3221 for (i = 0; i < size; i++) {
3222 if (ids[i] >= basic_count) {
3223 no_ext_stat_requested = 0;
3229 /* Fill the xstats structure */
3230 if (ids && no_ext_stat_requested)
3231 ret = eth_basic_stats_get(port_id, xstats);
3233 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
3237 num_xstats_filled = (unsigned int)ret;
3239 /* Return all stats */
3241 for (i = 0; i < num_xstats_filled; i++)
3242 values[i] = xstats[i].value;
3243 return expected_entries;
3247 for (i = 0; i < size; i++) {
3248 if (ids[i] >= expected_entries) {
3249 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
3252 values[i] = xstats[ids[i]].value;
3258 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
3261 struct rte_eth_dev *dev;
3262 unsigned int count = 0, i;
3263 signed int xcount = 0;
3264 uint16_t nb_rxqs, nb_txqs;
3267 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3268 dev = &rte_eth_devices[port_id];
3270 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3271 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3273 /* Return generic statistics */
3274 count = RTE_NB_STATS;
3275 if (dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS)
3276 count += (nb_rxqs * RTE_NB_RXQ_STATS) + (nb_txqs * RTE_NB_TXQ_STATS);
3278 /* implemented by the driver */
3279 if (dev->dev_ops->xstats_get != NULL) {
3280 /* Retrieve the xstats from the driver at the end of the
3283 xcount = (*dev->dev_ops->xstats_get)(dev,
3284 xstats ? xstats + count : NULL,
3285 (n > count) ? n - count : 0);
3288 return eth_err(port_id, xcount);
3291 if (n < count + xcount || xstats == NULL)
3292 return count + xcount;
3294 /* now fill the xstats structure */
3295 ret = eth_basic_stats_get(port_id, xstats);
3300 for (i = 0; i < count; i++)
3302 /* add an offset to driver-specific stats */
3303 for ( ; i < count + xcount; i++)
3304 xstats[i].id += count;
3306 return count + xcount;
3309 /* reset ethdev extended statistics */
3311 rte_eth_xstats_reset(uint16_t port_id)
3313 struct rte_eth_dev *dev;
3315 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3316 dev = &rte_eth_devices[port_id];
3318 /* implemented by the driver */
3319 if (dev->dev_ops->xstats_reset != NULL)
3320 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
3322 /* fallback to default */
3323 return rte_eth_stats_reset(port_id);
3327 eth_dev_set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id,
3328 uint8_t stat_idx, uint8_t is_rx)
3330 struct rte_eth_dev *dev;
3332 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3333 dev = &rte_eth_devices[port_id];
3335 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
3338 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
3341 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
3344 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
3345 return (*dev->dev_ops->queue_stats_mapping_set) (dev, queue_id, stat_idx, is_rx);
3349 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
3352 return eth_err(port_id, eth_dev_set_queue_stats_mapping(port_id,
3354 stat_idx, STAT_QMAP_TX));
3358 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
3361 return eth_err(port_id, eth_dev_set_queue_stats_mapping(port_id,
3363 stat_idx, STAT_QMAP_RX));
3367 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
3369 struct rte_eth_dev *dev;
3371 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3372 dev = &rte_eth_devices[port_id];
3374 if (fw_version == NULL && fw_size > 0) {
3376 "Cannot get ethdev port %u FW version to NULL when string size is non zero\n",
3381 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
3382 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
3383 fw_version, fw_size));
3387 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
3389 struct rte_eth_dev *dev;
3390 const struct rte_eth_desc_lim lim = {
3391 .nb_max = UINT16_MAX,
3394 .nb_seg_max = UINT16_MAX,
3395 .nb_mtu_seg_max = UINT16_MAX,
3399 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3400 dev = &rte_eth_devices[port_id];
3402 if (dev_info == NULL) {
3403 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u info to NULL\n",
3409 * Init dev_info before port_id check since caller does not have
3410 * return status and does not know if get is successful or not.
3412 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3413 dev_info->switch_info.domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
3415 dev_info->rx_desc_lim = lim;
3416 dev_info->tx_desc_lim = lim;
3417 dev_info->device = dev->device;
3418 dev_info->min_mtu = RTE_ETHER_MIN_MTU;
3419 dev_info->max_mtu = UINT16_MAX;
3421 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3422 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
3424 /* Cleanup already filled in device information */
3425 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3426 return eth_err(port_id, diag);
3429 /* Maximum number of queues should be <= RTE_MAX_QUEUES_PER_PORT */
3430 dev_info->max_rx_queues = RTE_MIN(dev_info->max_rx_queues,
3431 RTE_MAX_QUEUES_PER_PORT);
3432 dev_info->max_tx_queues = RTE_MIN(dev_info->max_tx_queues,
3433 RTE_MAX_QUEUES_PER_PORT);
3435 dev_info->driver_name = dev->device->driver->name;
3436 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
3437 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
3439 dev_info->dev_flags = &dev->data->dev_flags;
3445 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
3446 uint32_t *ptypes, int num)
3449 struct rte_eth_dev *dev;
3450 const uint32_t *all_ptypes;
3452 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3453 dev = &rte_eth_devices[port_id];
3455 if (ptypes == NULL && num > 0) {
3457 "Cannot get ethdev port %u supported packet types to NULL when array size is non zero\n",
3462 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
3463 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3468 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
3469 if (all_ptypes[i] & ptype_mask) {
3471 ptypes[j] = all_ptypes[i];
3479 rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
3480 uint32_t *set_ptypes, unsigned int num)
3482 const uint32_t valid_ptype_masks[] = {
3486 RTE_PTYPE_TUNNEL_MASK,
3487 RTE_PTYPE_INNER_L2_MASK,
3488 RTE_PTYPE_INNER_L3_MASK,
3489 RTE_PTYPE_INNER_L4_MASK,
3491 const uint32_t *all_ptypes;
3492 struct rte_eth_dev *dev;
3493 uint32_t unused_mask;
3497 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3498 dev = &rte_eth_devices[port_id];
3500 if (num > 0 && set_ptypes == NULL) {
3502 "Cannot get ethdev port %u set packet types to NULL when array size is non zero\n",
3507 if (*dev->dev_ops->dev_supported_ptypes_get == NULL ||
3508 *dev->dev_ops->dev_ptypes_set == NULL) {
3513 if (ptype_mask == 0) {
3514 ret = (*dev->dev_ops->dev_ptypes_set)(dev,
3519 unused_mask = ptype_mask;
3520 for (i = 0; i < RTE_DIM(valid_ptype_masks); i++) {
3521 uint32_t mask = ptype_mask & valid_ptype_masks[i];
3522 if (mask && mask != valid_ptype_masks[i]) {
3526 unused_mask &= ~valid_ptype_masks[i];
3534 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3535 if (all_ptypes == NULL) {
3541 * Accommodate as many set_ptypes as possible. If the supplied
3542 * set_ptypes array is insufficient fill it partially.
3544 for (i = 0, j = 0; set_ptypes != NULL &&
3545 (all_ptypes[i] != RTE_PTYPE_UNKNOWN); ++i) {
3546 if (ptype_mask & all_ptypes[i]) {
3548 set_ptypes[j] = all_ptypes[i];
3556 if (set_ptypes != NULL && j < num)
3557 set_ptypes[j] = RTE_PTYPE_UNKNOWN;
3559 return (*dev->dev_ops->dev_ptypes_set)(dev, ptype_mask);
3563 set_ptypes[0] = RTE_PTYPE_UNKNOWN;
3569 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
3571 struct rte_eth_dev *dev;
3573 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3574 dev = &rte_eth_devices[port_id];
3576 if (mac_addr == NULL) {
3578 "Cannot get ethdev port %u MAC address to NULL\n",
3583 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
3589 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
3591 struct rte_eth_dev *dev;
3593 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3594 dev = &rte_eth_devices[port_id];
3597 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u MTU to NULL\n",
3602 *mtu = dev->data->mtu;
3607 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
3610 struct rte_eth_dev_info dev_info;
3611 struct rte_eth_dev *dev;
3613 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3614 dev = &rte_eth_devices[port_id];
3615 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
3618 * Check if the device supports dev_infos_get, if it does not
3619 * skip min_mtu/max_mtu validation here as this requires values
3620 * that are populated within the call to rte_eth_dev_info_get()
3621 * which relies on dev->dev_ops->dev_infos_get.
3623 if (*dev->dev_ops->dev_infos_get != NULL) {
3624 ret = rte_eth_dev_info_get(port_id, &dev_info);
3628 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
3632 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
3634 dev->data->mtu = mtu;
3636 return eth_err(port_id, ret);
3640 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
3642 struct rte_eth_dev *dev;
3645 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3646 dev = &rte_eth_devices[port_id];
3648 if (!(dev->data->dev_conf.rxmode.offloads &
3649 DEV_RX_OFFLOAD_VLAN_FILTER)) {
3650 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
3655 if (vlan_id > 4095) {
3656 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
3660 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
3662 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
3664 struct rte_vlan_filter_conf *vfc;
3668 vfc = &dev->data->vlan_filter_conf;
3669 vidx = vlan_id / 64;
3670 vbit = vlan_id % 64;
3673 vfc->ids[vidx] |= UINT64_C(1) << vbit;
3675 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
3678 return eth_err(port_id, ret);
3682 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3685 struct rte_eth_dev *dev;
3687 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3688 dev = &rte_eth_devices[port_id];
3690 if (rx_queue_id >= dev->data->nb_rx_queues) {
3691 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
3695 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
3696 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
3702 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3703 enum rte_vlan_type vlan_type,
3706 struct rte_eth_dev *dev;
3708 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3709 dev = &rte_eth_devices[port_id];
3711 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
3712 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
3717 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
3719 struct rte_eth_dev_info dev_info;
3720 struct rte_eth_dev *dev;
3724 uint64_t orig_offloads;
3725 uint64_t dev_offloads;
3726 uint64_t new_offloads;
3728 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3729 dev = &rte_eth_devices[port_id];
3731 /* save original values in case of failure */
3732 orig_offloads = dev->data->dev_conf.rxmode.offloads;
3733 dev_offloads = orig_offloads;
3735 /* check which option changed by application */
3736 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
3737 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
3740 dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
3742 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
3743 mask |= ETH_VLAN_STRIP_MASK;
3746 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
3747 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
3750 dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
3752 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
3753 mask |= ETH_VLAN_FILTER_MASK;
3756 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
3757 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
3760 dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
3762 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
3763 mask |= ETH_VLAN_EXTEND_MASK;
3766 cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
3767 org = !!(dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
3770 dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
3772 dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
3773 mask |= ETH_QINQ_STRIP_MASK;
3780 ret = rte_eth_dev_info_get(port_id, &dev_info);
3784 /* Rx VLAN offloading must be within its device capabilities */
3785 if ((dev_offloads & dev_info.rx_offload_capa) != dev_offloads) {
3786 new_offloads = dev_offloads & ~orig_offloads;
3788 "Ethdev port_id=%u requested new added VLAN offloads "
3789 "0x%" PRIx64 " must be within Rx offloads capabilities "
3790 "0x%" PRIx64 " in %s()\n",
3791 port_id, new_offloads, dev_info.rx_offload_capa,
3796 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
3797 dev->data->dev_conf.rxmode.offloads = dev_offloads;
3798 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
3800 /* hit an error restore original values */
3801 dev->data->dev_conf.rxmode.offloads = orig_offloads;
3804 return eth_err(port_id, ret);
3808 rte_eth_dev_get_vlan_offload(uint16_t port_id)
3810 struct rte_eth_dev *dev;
3811 uint64_t *dev_offloads;
3814 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3815 dev = &rte_eth_devices[port_id];
3816 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3818 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
3819 ret |= ETH_VLAN_STRIP_OFFLOAD;
3821 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
3822 ret |= ETH_VLAN_FILTER_OFFLOAD;
3824 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
3825 ret |= ETH_VLAN_EXTEND_OFFLOAD;
3827 if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
3828 ret |= ETH_QINQ_STRIP_OFFLOAD;
3834 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
3836 struct rte_eth_dev *dev;
3838 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3839 dev = &rte_eth_devices[port_id];
3841 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
3842 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
3846 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3848 struct rte_eth_dev *dev;
3850 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3851 dev = &rte_eth_devices[port_id];
3853 if (fc_conf == NULL) {
3855 "Cannot get ethdev port %u flow control config to NULL\n",
3860 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
3861 memset(fc_conf, 0, sizeof(*fc_conf));
3862 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
3866 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3868 struct rte_eth_dev *dev;
3870 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3871 dev = &rte_eth_devices[port_id];
3873 if (fc_conf == NULL) {
3875 "Cannot set ethdev port %u flow control from NULL config\n",
3880 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
3881 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
3885 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3886 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3890 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3891 struct rte_eth_pfc_conf *pfc_conf)
3893 struct rte_eth_dev *dev;
3895 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3896 dev = &rte_eth_devices[port_id];
3898 if (pfc_conf == NULL) {
3900 "Cannot set ethdev port %u priority flow control from NULL config\n",
3905 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
3906 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
3910 /* High water, low water validation are device specific */
3911 if (*dev->dev_ops->priority_flow_ctrl_set)
3912 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
3918 eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
3923 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
3924 for (i = 0; i < num; i++) {
3925 if (reta_conf[i].mask)
3933 eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
3937 uint16_t i, idx, shift;
3940 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3944 for (i = 0; i < reta_size; i++) {
3945 idx = i / RTE_RETA_GROUP_SIZE;
3946 shift = i % RTE_RETA_GROUP_SIZE;
3947 if ((reta_conf[idx].mask & (1ULL << shift)) &&
3948 (reta_conf[idx].reta[shift] >= max_rxq)) {
3950 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
3952 reta_conf[idx].reta[shift], max_rxq);
3961 rte_eth_dev_rss_reta_update(uint16_t port_id,
3962 struct rte_eth_rss_reta_entry64 *reta_conf,
3965 struct rte_eth_dev *dev;
3968 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3969 dev = &rte_eth_devices[port_id];
3971 if (reta_conf == NULL) {
3973 "Cannot update ethdev port %u RSS RETA to NULL\n",
3978 if (reta_size == 0) {
3980 "Cannot update ethdev port %u RSS RETA with zero size\n",
3985 /* Check mask bits */
3986 ret = eth_check_reta_mask(reta_conf, reta_size);
3990 /* Check entry value */
3991 ret = eth_check_reta_entry(reta_conf, reta_size,
3992 dev->data->nb_rx_queues);
3996 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
3997 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
4002 rte_eth_dev_rss_reta_query(uint16_t port_id,
4003 struct rte_eth_rss_reta_entry64 *reta_conf,
4006 struct rte_eth_dev *dev;
4009 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4010 dev = &rte_eth_devices[port_id];
4012 if (reta_conf == NULL) {
4014 "Cannot query ethdev port %u RSS RETA from NULL config\n",
4019 /* Check mask bits */
4020 ret = eth_check_reta_mask(reta_conf, reta_size);
4024 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
4025 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
4030 rte_eth_dev_rss_hash_update(uint16_t port_id,
4031 struct rte_eth_rss_conf *rss_conf)
4033 struct rte_eth_dev *dev;
4034 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
4037 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4038 dev = &rte_eth_devices[port_id];
4040 if (rss_conf == NULL) {
4042 "Cannot update ethdev port %u RSS hash from NULL config\n",
4047 ret = rte_eth_dev_info_get(port_id, &dev_info);
4051 rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
4052 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
4053 dev_info.flow_type_rss_offloads) {
4055 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
4056 port_id, rss_conf->rss_hf,
4057 dev_info.flow_type_rss_offloads);
4060 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
4061 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
4066 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
4067 struct rte_eth_rss_conf *rss_conf)
4069 struct rte_eth_dev *dev;
4071 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4072 dev = &rte_eth_devices[port_id];
4074 if (rss_conf == NULL) {
4076 "Cannot get ethdev port %u RSS hash config to NULL\n",
4081 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
4082 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
4087 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
4088 struct rte_eth_udp_tunnel *udp_tunnel)
4090 struct rte_eth_dev *dev;
4092 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4093 dev = &rte_eth_devices[port_id];
4095 if (udp_tunnel == NULL) {
4097 "Cannot add ethdev port %u UDP tunnel port from NULL UDP tunnel\n",
4102 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
4103 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4107 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
4108 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
4113 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
4114 struct rte_eth_udp_tunnel *udp_tunnel)
4116 struct rte_eth_dev *dev;
4118 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4119 dev = &rte_eth_devices[port_id];
4121 if (udp_tunnel == NULL) {
4123 "Cannot delete ethdev port %u UDP tunnel port from NULL UDP tunnel\n",
4128 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
4129 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4133 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
4134 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
4139 rte_eth_led_on(uint16_t port_id)
4141 struct rte_eth_dev *dev;
4143 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4144 dev = &rte_eth_devices[port_id];
4146 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
4147 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
4151 rte_eth_led_off(uint16_t port_id)
4153 struct rte_eth_dev *dev;
4155 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4156 dev = &rte_eth_devices[port_id];
4158 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
4159 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
4163 rte_eth_fec_get_capability(uint16_t port_id,
4164 struct rte_eth_fec_capa *speed_fec_capa,
4167 struct rte_eth_dev *dev;
4170 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4171 dev = &rte_eth_devices[port_id];
4173 if (speed_fec_capa == NULL && num > 0) {
4175 "Cannot get ethdev port %u FEC capability to NULL when array size is non zero\n",
4180 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get_capability, -ENOTSUP);
4181 ret = (*dev->dev_ops->fec_get_capability)(dev, speed_fec_capa, num);
4187 rte_eth_fec_get(uint16_t port_id, uint32_t *fec_capa)
4189 struct rte_eth_dev *dev;
4191 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4192 dev = &rte_eth_devices[port_id];
4194 if (fec_capa == NULL) {
4196 "Cannot get ethdev port %u current FEC mode to NULL\n",
4201 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get, -ENOTSUP);
4202 return eth_err(port_id, (*dev->dev_ops->fec_get)(dev, fec_capa));
4206 rte_eth_fec_set(uint16_t port_id, uint32_t fec_capa)
4208 struct rte_eth_dev *dev;
4210 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4211 dev = &rte_eth_devices[port_id];
4213 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_set, -ENOTSUP);
4214 return eth_err(port_id, (*dev->dev_ops->fec_set)(dev, fec_capa));
4218 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
4222 eth_dev_get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
4224 struct rte_eth_dev_info dev_info;
4225 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4229 ret = rte_eth_dev_info_get(port_id, &dev_info);
4233 for (i = 0; i < dev_info.max_mac_addrs; i++)
4234 if (memcmp(addr, &dev->data->mac_addrs[i],
4235 RTE_ETHER_ADDR_LEN) == 0)
4241 static const struct rte_ether_addr null_mac_addr;
4244 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
4247 struct rte_eth_dev *dev;
4252 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4253 dev = &rte_eth_devices[port_id];
4257 "Cannot add ethdev port %u MAC address from NULL address\n",
4262 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
4264 if (rte_is_zero_ether_addr(addr)) {
4265 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
4269 if (pool >= ETH_64_POOLS) {
4270 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
4274 index = eth_dev_get_mac_addr_index(port_id, addr);
4276 index = eth_dev_get_mac_addr_index(port_id, &null_mac_addr);
4278 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
4283 pool_mask = dev->data->mac_pool_sel[index];
4285 /* Check if both MAC address and pool is already there, and do nothing */
4286 if (pool_mask & (1ULL << pool))
4291 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
4294 /* Update address in NIC data structure */
4295 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
4297 /* Update pool bitmap in NIC data structure */
4298 dev->data->mac_pool_sel[index] |= (1ULL << pool);
4301 return eth_err(port_id, ret);
4305 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
4307 struct rte_eth_dev *dev;
4310 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4311 dev = &rte_eth_devices[port_id];
4315 "Cannot remove ethdev port %u MAC address from NULL address\n",
4320 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
4322 index = eth_dev_get_mac_addr_index(port_id, addr);
4325 "Port %u: Cannot remove default MAC address\n",
4328 } else if (index < 0)
4329 return 0; /* Do nothing if address wasn't found */
4332 (*dev->dev_ops->mac_addr_remove)(dev, index);
4334 /* Update address in NIC data structure */
4335 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
4337 /* reset pool bitmap */
4338 dev->data->mac_pool_sel[index] = 0;
4344 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
4346 struct rte_eth_dev *dev;
4349 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4350 dev = &rte_eth_devices[port_id];
4354 "Cannot set ethdev port %u default MAC address from NULL address\n",
4359 if (!rte_is_valid_assigned_ether_addr(addr))
4362 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
4364 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
4368 /* Update default address in NIC data structure */
4369 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
4376 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
4380 eth_dev_get_hash_mac_addr_index(uint16_t port_id,
4381 const struct rte_ether_addr *addr)
4383 struct rte_eth_dev_info dev_info;
4384 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4388 ret = rte_eth_dev_info_get(port_id, &dev_info);
4392 if (!dev->data->hash_mac_addrs)
4395 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
4396 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
4397 RTE_ETHER_ADDR_LEN) == 0)
4404 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
4409 struct rte_eth_dev *dev;
4411 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4412 dev = &rte_eth_devices[port_id];
4416 "Cannot set ethdev port %u unicast hash table from NULL address\n",
4421 if (rte_is_zero_ether_addr(addr)) {
4422 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
4427 index = eth_dev_get_hash_mac_addr_index(port_id, addr);
4428 /* Check if it's already there, and do nothing */
4429 if ((index >= 0) && on)
4435 "Port %u: the MAC address was not set in UTA\n",
4440 index = eth_dev_get_hash_mac_addr_index(port_id, &null_mac_addr);
4442 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
4448 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
4449 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
4451 /* Update address in NIC data structure */
4453 rte_ether_addr_copy(addr,
4454 &dev->data->hash_mac_addrs[index]);
4456 rte_ether_addr_copy(&null_mac_addr,
4457 &dev->data->hash_mac_addrs[index]);
4460 return eth_err(port_id, ret);
4464 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
4466 struct rte_eth_dev *dev;
4468 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4469 dev = &rte_eth_devices[port_id];
4471 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
4472 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
4476 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
4479 struct rte_eth_dev *dev;
4480 struct rte_eth_dev_info dev_info;
4481 struct rte_eth_link link;
4484 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4485 dev = &rte_eth_devices[port_id];
4487 ret = rte_eth_dev_info_get(port_id, &dev_info);
4491 link = dev->data->dev_link;
4493 if (queue_idx > dev_info.max_tx_queues) {
4495 "Set queue rate limit:port %u: invalid queue id=%u\n",
4496 port_id, queue_idx);
4500 if (tx_rate > link.link_speed) {
4502 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
4503 tx_rate, link.link_speed);
4507 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
4508 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
4509 queue_idx, tx_rate));
4513 rte_eth_mirror_rule_set(uint16_t port_id,
4514 struct rte_eth_mirror_conf *mirror_conf,
4515 uint8_t rule_id, uint8_t on)
4517 struct rte_eth_dev *dev;
4519 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4520 dev = &rte_eth_devices[port_id];
4522 if (mirror_conf == NULL) {
4524 "Cannot set ethdev port %u mirror rule from NULL config\n",
4529 if (mirror_conf->rule_type == 0) {
4530 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
4534 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
4535 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
4540 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
4541 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
4542 (mirror_conf->pool_mask == 0)) {
4544 "Invalid mirror pool, pool mask can not be 0\n");
4548 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
4549 mirror_conf->vlan.vlan_mask == 0) {
4551 "Invalid vlan mask, vlan mask can not be 0\n");
4555 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
4557 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
4558 mirror_conf, rule_id, on));
4562 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
4564 struct rte_eth_dev *dev;
4566 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4567 dev = &rte_eth_devices[port_id];
4569 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
4570 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev, rule_id));
4573 RTE_INIT(eth_dev_init_cb_lists)
4577 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
4578 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
4582 rte_eth_dev_callback_register(uint16_t port_id,
4583 enum rte_eth_event_type event,
4584 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4586 struct rte_eth_dev *dev;
4587 struct rte_eth_dev_callback *user_cb;
4591 if (cb_fn == NULL) {
4593 "Cannot register ethdev port %u callback from NULL\n",
4598 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4599 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4603 if (port_id == RTE_ETH_ALL) {
4605 last_port = RTE_MAX_ETHPORTS - 1;
4607 next_port = last_port = port_id;
4610 rte_spinlock_lock(ð_dev_cb_lock);
4613 dev = &rte_eth_devices[next_port];
4615 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
4616 if (user_cb->cb_fn == cb_fn &&
4617 user_cb->cb_arg == cb_arg &&
4618 user_cb->event == event) {
4623 /* create a new callback. */
4624 if (user_cb == NULL) {
4625 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
4626 sizeof(struct rte_eth_dev_callback), 0);
4627 if (user_cb != NULL) {
4628 user_cb->cb_fn = cb_fn;
4629 user_cb->cb_arg = cb_arg;
4630 user_cb->event = event;
4631 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
4634 rte_spinlock_unlock(ð_dev_cb_lock);
4635 rte_eth_dev_callback_unregister(port_id, event,
4641 } while (++next_port <= last_port);
4643 rte_spinlock_unlock(ð_dev_cb_lock);
4648 rte_eth_dev_callback_unregister(uint16_t port_id,
4649 enum rte_eth_event_type event,
4650 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4653 struct rte_eth_dev *dev;
4654 struct rte_eth_dev_callback *cb, *next;
4658 if (cb_fn == NULL) {
4660 "Cannot unregister ethdev port %u callback from NULL\n",
4665 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4666 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4670 if (port_id == RTE_ETH_ALL) {
4672 last_port = RTE_MAX_ETHPORTS - 1;
4674 next_port = last_port = port_id;
4677 rte_spinlock_lock(ð_dev_cb_lock);
4680 dev = &rte_eth_devices[next_port];
4682 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
4685 next = TAILQ_NEXT(cb, next);
4687 if (cb->cb_fn != cb_fn || cb->event != event ||
4688 (cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
4692 * if this callback is not executing right now,
4695 if (cb->active == 0) {
4696 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
4702 } while (++next_port <= last_port);
4704 rte_spinlock_unlock(ð_dev_cb_lock);
4709 rte_eth_dev_callback_process(struct rte_eth_dev *dev,
4710 enum rte_eth_event_type event, void *ret_param)
4712 struct rte_eth_dev_callback *cb_lst;
4713 struct rte_eth_dev_callback dev_cb;
4716 rte_spinlock_lock(ð_dev_cb_lock);
4717 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
4718 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
4722 if (ret_param != NULL)
4723 dev_cb.ret_param = ret_param;
4725 rte_spinlock_unlock(ð_dev_cb_lock);
4726 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
4727 dev_cb.cb_arg, dev_cb.ret_param);
4728 rte_spinlock_lock(ð_dev_cb_lock);
4731 rte_spinlock_unlock(ð_dev_cb_lock);
4736 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
4741 rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
4743 dev->state = RTE_ETH_DEV_ATTACHED;
4747 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
4750 struct rte_eth_dev *dev;
4751 struct rte_intr_handle *intr_handle;
4755 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4756 dev = &rte_eth_devices[port_id];
4758 if (!dev->intr_handle) {
4759 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4763 intr_handle = dev->intr_handle;
4764 if (!intr_handle->intr_vec) {
4765 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4769 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
4770 vec = intr_handle->intr_vec[qid];
4771 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4772 if (rc && rc != -EEXIST) {
4774 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4775 port_id, qid, op, epfd, vec);
4783 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
4785 struct rte_intr_handle *intr_handle;
4786 struct rte_eth_dev *dev;
4787 unsigned int efd_idx;
4791 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
4792 dev = &rte_eth_devices[port_id];
4794 if (queue_id >= dev->data->nb_rx_queues) {
4795 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4799 if (!dev->intr_handle) {
4800 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4804 intr_handle = dev->intr_handle;
4805 if (!intr_handle->intr_vec) {
4806 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4810 vec = intr_handle->intr_vec[queue_id];
4811 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
4812 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
4813 fd = intr_handle->efds[efd_idx];
4819 eth_dev_dma_mzone_name(char *name, size_t len, uint16_t port_id, uint16_t queue_id,
4820 const char *ring_name)
4822 return snprintf(name, len, "eth_p%d_q%d_%s",
4823 port_id, queue_id, ring_name);
4826 const struct rte_memzone *
4827 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
4828 uint16_t queue_id, size_t size, unsigned align,
4831 char z_name[RTE_MEMZONE_NAMESIZE];
4832 const struct rte_memzone *mz;
4835 rc = eth_dev_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4836 queue_id, ring_name);
4837 if (rc >= RTE_MEMZONE_NAMESIZE) {
4838 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4839 rte_errno = ENAMETOOLONG;
4843 mz = rte_memzone_lookup(z_name);
4845 if ((socket_id != SOCKET_ID_ANY && socket_id != mz->socket_id) ||
4847 ((uintptr_t)mz->addr & (align - 1)) != 0) {
4849 "memzone %s does not justify the requested attributes\n",
4857 return rte_memzone_reserve_aligned(z_name, size, socket_id,
4858 RTE_MEMZONE_IOVA_CONTIG, align);
4862 rte_eth_dma_zone_free(const struct rte_eth_dev *dev, const char *ring_name,
4865 char z_name[RTE_MEMZONE_NAMESIZE];
4866 const struct rte_memzone *mz;
4869 rc = eth_dev_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4870 queue_id, ring_name);
4871 if (rc >= RTE_MEMZONE_NAMESIZE) {
4872 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4873 return -ENAMETOOLONG;
4876 mz = rte_memzone_lookup(z_name);
4878 rc = rte_memzone_free(mz);
4886 rte_eth_dev_create(struct rte_device *device, const char *name,
4887 size_t priv_data_size,
4888 ethdev_bus_specific_init ethdev_bus_specific_init,
4889 void *bus_init_params,
4890 ethdev_init_t ethdev_init, void *init_params)
4892 struct rte_eth_dev *ethdev;
4895 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
4897 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
4898 ethdev = rte_eth_dev_allocate(name);
4902 if (priv_data_size) {
4903 ethdev->data->dev_private = rte_zmalloc_socket(
4904 name, priv_data_size, RTE_CACHE_LINE_SIZE,
4907 if (!ethdev->data->dev_private) {
4909 "failed to allocate private data\n");
4915 ethdev = rte_eth_dev_attach_secondary(name);
4918 "secondary process attach failed, ethdev doesn't exist\n");
4923 ethdev->device = device;
4925 if (ethdev_bus_specific_init) {
4926 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
4929 "ethdev bus specific initialisation failed\n");
4934 retval = ethdev_init(ethdev, init_params);
4936 RTE_ETHDEV_LOG(ERR, "ethdev initialisation failed\n");
4940 rte_eth_dev_probing_finish(ethdev);
4945 rte_eth_dev_release_port(ethdev);
4950 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
4951 ethdev_uninit_t ethdev_uninit)
4955 ethdev = rte_eth_dev_allocated(ethdev->data->name);
4959 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
4961 ret = ethdev_uninit(ethdev);
4965 return rte_eth_dev_release_port(ethdev);
4969 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
4970 int epfd, int op, void *data)
4973 struct rte_eth_dev *dev;
4974 struct rte_intr_handle *intr_handle;
4977 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4978 dev = &rte_eth_devices[port_id];
4980 if (queue_id >= dev->data->nb_rx_queues) {
4981 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4985 if (!dev->intr_handle) {
4986 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4990 intr_handle = dev->intr_handle;
4991 if (!intr_handle->intr_vec) {
4992 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4996 vec = intr_handle->intr_vec[queue_id];
4997 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4998 if (rc && rc != -EEXIST) {
5000 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
5001 port_id, queue_id, op, epfd, vec);
5009 rte_eth_dev_rx_intr_enable(uint16_t port_id,
5012 struct rte_eth_dev *dev;
5015 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5016 dev = &rte_eth_devices[port_id];
5018 ret = eth_dev_validate_rx_queue(dev, queue_id);
5022 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
5023 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id));
5027 rte_eth_dev_rx_intr_disable(uint16_t port_id,
5030 struct rte_eth_dev *dev;
5033 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5034 dev = &rte_eth_devices[port_id];
5036 ret = eth_dev_validate_rx_queue(dev, queue_id);
5040 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
5041 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id));
5045 const struct rte_eth_rxtx_callback *
5046 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
5047 rte_rx_callback_fn fn, void *user_param)
5049 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5050 rte_errno = ENOTSUP;
5053 struct rte_eth_dev *dev;
5055 /* check input parameters */
5056 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
5057 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
5061 dev = &rte_eth_devices[port_id];
5062 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
5066 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
5074 cb->param = user_param;
5076 rte_spinlock_lock(ð_dev_rx_cb_lock);
5077 /* Add the callbacks in fifo order. */
5078 struct rte_eth_rxtx_callback *tail =
5079 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
5082 /* Stores to cb->fn and cb->param should complete before
5083 * cb is visible to data plane.
5086 &rte_eth_devices[port_id].post_rx_burst_cbs[queue_id],
5087 cb, __ATOMIC_RELEASE);
5092 /* Stores to cb->fn and cb->param should complete before
5093 * cb is visible to data plane.
5095 __atomic_store_n(&tail->next, cb, __ATOMIC_RELEASE);
5097 rte_spinlock_unlock(ð_dev_rx_cb_lock);
5102 const struct rte_eth_rxtx_callback *
5103 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
5104 rte_rx_callback_fn fn, void *user_param)
5106 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5107 rte_errno = ENOTSUP;
5110 /* check input parameters */
5111 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
5112 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
5117 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
5125 cb->param = user_param;
5127 rte_spinlock_lock(ð_dev_rx_cb_lock);
5128 /* Add the callbacks at first position */
5129 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
5130 /* Stores to cb->fn, cb->param and cb->next should complete before
5131 * cb is visible to data plane threads.
5134 &rte_eth_devices[port_id].post_rx_burst_cbs[queue_id],
5135 cb, __ATOMIC_RELEASE);
5136 rte_spinlock_unlock(ð_dev_rx_cb_lock);
5141 const struct rte_eth_rxtx_callback *
5142 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
5143 rte_tx_callback_fn fn, void *user_param)
5145 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5146 rte_errno = ENOTSUP;
5149 struct rte_eth_dev *dev;
5151 /* check input parameters */
5152 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
5153 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
5158 dev = &rte_eth_devices[port_id];
5159 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
5164 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
5172 cb->param = user_param;
5174 rte_spinlock_lock(ð_dev_tx_cb_lock);
5175 /* Add the callbacks in fifo order. */
5176 struct rte_eth_rxtx_callback *tail =
5177 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
5180 /* Stores to cb->fn and cb->param should complete before
5181 * cb is visible to data plane.
5184 &rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id],
5185 cb, __ATOMIC_RELEASE);
5190 /* Stores to cb->fn and cb->param should complete before
5191 * cb is visible to data plane.
5193 __atomic_store_n(&tail->next, cb, __ATOMIC_RELEASE);
5195 rte_spinlock_unlock(ð_dev_tx_cb_lock);
5201 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
5202 const struct rte_eth_rxtx_callback *user_cb)
5204 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5207 /* Check input parameters. */
5208 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5209 if (user_cb == NULL ||
5210 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
5213 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
5214 struct rte_eth_rxtx_callback *cb;
5215 struct rte_eth_rxtx_callback **prev_cb;
5218 rte_spinlock_lock(ð_dev_rx_cb_lock);
5219 prev_cb = &dev->post_rx_burst_cbs[queue_id];
5220 for (; *prev_cb != NULL; prev_cb = &cb->next) {
5222 if (cb == user_cb) {
5223 /* Remove the user cb from the callback list. */
5224 __atomic_store_n(prev_cb, cb->next, __ATOMIC_RELAXED);
5229 rte_spinlock_unlock(ð_dev_rx_cb_lock);
5235 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
5236 const struct rte_eth_rxtx_callback *user_cb)
5238 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5241 /* Check input parameters. */
5242 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5243 if (user_cb == NULL ||
5244 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
5247 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
5249 struct rte_eth_rxtx_callback *cb;
5250 struct rte_eth_rxtx_callback **prev_cb;
5252 rte_spinlock_lock(ð_dev_tx_cb_lock);
5253 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
5254 for (; *prev_cb != NULL; prev_cb = &cb->next) {
5256 if (cb == user_cb) {
5257 /* Remove the user cb from the callback list. */
5258 __atomic_store_n(prev_cb, cb->next, __ATOMIC_RELAXED);
5263 rte_spinlock_unlock(ð_dev_tx_cb_lock);
5269 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
5270 struct rte_eth_rxq_info *qinfo)
5272 struct rte_eth_dev *dev;
5274 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5275 dev = &rte_eth_devices[port_id];
5277 if (queue_id >= dev->data->nb_rx_queues) {
5278 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
5282 if (qinfo == NULL) {
5283 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u Rx queue %u info to NULL\n",
5288 if (dev->data->rx_queues == NULL ||
5289 dev->data->rx_queues[queue_id] == NULL) {
5291 "Rx queue %"PRIu16" of device with port_id=%"
5292 PRIu16" has not been setup\n",
5297 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
5298 RTE_ETHDEV_LOG(INFO,
5299 "Can't get hairpin Rx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
5304 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
5306 memset(qinfo, 0, sizeof(*qinfo));
5307 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
5308 qinfo->queue_state = dev->data->rx_queue_state[queue_id];
5314 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
5315 struct rte_eth_txq_info *qinfo)
5317 struct rte_eth_dev *dev;
5319 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5320 dev = &rte_eth_devices[port_id];
5322 if (queue_id >= dev->data->nb_tx_queues) {
5323 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
5327 if (qinfo == NULL) {
5328 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u Tx queue %u info to NULL\n",
5333 if (dev->data->tx_queues == NULL ||
5334 dev->data->tx_queues[queue_id] == NULL) {
5336 "Tx queue %"PRIu16" of device with port_id=%"
5337 PRIu16" has not been setup\n",
5342 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
5343 RTE_ETHDEV_LOG(INFO,
5344 "Can't get hairpin Tx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
5349 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
5351 memset(qinfo, 0, sizeof(*qinfo));
5352 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
5353 qinfo->queue_state = dev->data->tx_queue_state[queue_id];
5359 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
5360 struct rte_eth_burst_mode *mode)
5362 struct rte_eth_dev *dev;
5364 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5365 dev = &rte_eth_devices[port_id];
5367 if (queue_id >= dev->data->nb_rx_queues) {
5368 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
5374 "Cannot get ethdev port %u Rx queue %u burst mode to NULL\n",
5379 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
5380 memset(mode, 0, sizeof(*mode));
5381 return eth_err(port_id,
5382 dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
5386 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
5387 struct rte_eth_burst_mode *mode)
5389 struct rte_eth_dev *dev;
5391 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5392 dev = &rte_eth_devices[port_id];
5394 if (queue_id >= dev->data->nb_tx_queues) {
5395 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
5401 "Cannot get ethdev port %u Tx queue %u burst mode to NULL\n",
5406 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
5407 memset(mode, 0, sizeof(*mode));
5408 return eth_err(port_id,
5409 dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
5413 rte_eth_get_monitor_addr(uint16_t port_id, uint16_t queue_id,
5414 struct rte_power_monitor_cond *pmc)
5416 struct rte_eth_dev *dev;
5418 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5419 dev = &rte_eth_devices[port_id];
5421 if (queue_id >= dev->data->nb_rx_queues) {
5422 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", queue_id);
5428 "Cannot get ethdev port %u Rx queue %u power monitor condition to NULL\n",
5433 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_monitor_addr, -ENOTSUP);
5434 return eth_err(port_id,
5435 dev->dev_ops->get_monitor_addr(dev->data->rx_queues[queue_id], pmc));
5439 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
5440 struct rte_ether_addr *mc_addr_set,
5441 uint32_t nb_mc_addr)
5443 struct rte_eth_dev *dev;
5445 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5446 dev = &rte_eth_devices[port_id];
5448 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
5449 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
5450 mc_addr_set, nb_mc_addr));
5454 rte_eth_timesync_enable(uint16_t port_id)
5456 struct rte_eth_dev *dev;
5458 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5459 dev = &rte_eth_devices[port_id];
5461 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
5462 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
5466 rte_eth_timesync_disable(uint16_t port_id)
5468 struct rte_eth_dev *dev;
5470 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5471 dev = &rte_eth_devices[port_id];
5473 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
5474 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
5478 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
5481 struct rte_eth_dev *dev;
5483 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5484 dev = &rte_eth_devices[port_id];
5486 if (timestamp == NULL) {
5488 "Cannot read ethdev port %u Rx timestamp to NULL\n",
5493 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
5494 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
5495 (dev, timestamp, flags));
5499 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
5500 struct timespec *timestamp)
5502 struct rte_eth_dev *dev;
5504 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5505 dev = &rte_eth_devices[port_id];
5507 if (timestamp == NULL) {
5509 "Cannot read ethdev port %u Tx timestamp to NULL\n",
5514 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
5515 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
5520 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
5522 struct rte_eth_dev *dev;
5524 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5525 dev = &rte_eth_devices[port_id];
5527 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
5528 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev, delta));
5532 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
5534 struct rte_eth_dev *dev;
5536 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5537 dev = &rte_eth_devices[port_id];
5539 if (timestamp == NULL) {
5541 "Cannot read ethdev port %u timesync time to NULL\n",
5546 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
5547 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
5552 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
5554 struct rte_eth_dev *dev;
5556 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5557 dev = &rte_eth_devices[port_id];
5559 if (timestamp == NULL) {
5561 "Cannot write ethdev port %u timesync from NULL time\n",
5566 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
5567 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
5572 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
5574 struct rte_eth_dev *dev;
5576 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5577 dev = &rte_eth_devices[port_id];
5579 if (clock == NULL) {
5580 RTE_ETHDEV_LOG(ERR, "Cannot read ethdev port %u clock to NULL\n",
5585 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
5586 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
5590 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
5592 struct rte_eth_dev *dev;
5594 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5595 dev = &rte_eth_devices[port_id];
5599 "Cannot get ethdev port %u register info to NULL\n",
5604 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
5605 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
5609 rte_eth_dev_get_eeprom_length(uint16_t port_id)
5611 struct rte_eth_dev *dev;
5613 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5614 dev = &rte_eth_devices[port_id];
5616 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
5617 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
5621 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
5623 struct rte_eth_dev *dev;
5625 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5626 dev = &rte_eth_devices[port_id];
5630 "Cannot get ethdev port %u EEPROM info to NULL\n",
5635 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
5636 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
5640 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
5642 struct rte_eth_dev *dev;
5644 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5645 dev = &rte_eth_devices[port_id];
5649 "Cannot set ethdev port %u EEPROM from NULL info\n",
5654 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
5655 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
5659 rte_eth_dev_get_module_info(uint16_t port_id,
5660 struct rte_eth_dev_module_info *modinfo)
5662 struct rte_eth_dev *dev;
5664 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5665 dev = &rte_eth_devices[port_id];
5667 if (modinfo == NULL) {
5669 "Cannot get ethdev port %u EEPROM module info to NULL\n",
5674 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
5675 return (*dev->dev_ops->get_module_info)(dev, modinfo);
5679 rte_eth_dev_get_module_eeprom(uint16_t port_id,
5680 struct rte_dev_eeprom_info *info)
5682 struct rte_eth_dev *dev;
5684 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5685 dev = &rte_eth_devices[port_id];
5689 "Cannot get ethdev port %u module EEPROM info to NULL\n",
5694 if (info->data == NULL) {
5696 "Cannot get ethdev port %u module EEPROM data to NULL\n",
5701 if (info->length == 0) {
5703 "Cannot get ethdev port %u module EEPROM to data with zero size\n",
5708 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
5709 return (*dev->dev_ops->get_module_eeprom)(dev, info);
5713 rte_eth_dev_get_dcb_info(uint16_t port_id,
5714 struct rte_eth_dcb_info *dcb_info)
5716 struct rte_eth_dev *dev;
5718 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5719 dev = &rte_eth_devices[port_id];
5721 if (dcb_info == NULL) {
5723 "Cannot get ethdev port %u DCB info to NULL\n",
5728 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
5730 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
5731 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
5735 eth_dev_adjust_nb_desc(uint16_t *nb_desc,
5736 const struct rte_eth_desc_lim *desc_lim)
5738 if (desc_lim->nb_align != 0)
5739 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
5741 if (desc_lim->nb_max != 0)
5742 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
5744 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
5748 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
5749 uint16_t *nb_rx_desc,
5750 uint16_t *nb_tx_desc)
5752 struct rte_eth_dev_info dev_info;
5755 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5757 ret = rte_eth_dev_info_get(port_id, &dev_info);
5761 if (nb_rx_desc != NULL)
5762 eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
5764 if (nb_tx_desc != NULL)
5765 eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
5771 rte_eth_dev_hairpin_capability_get(uint16_t port_id,
5772 struct rte_eth_hairpin_cap *cap)
5774 struct rte_eth_dev *dev;
5776 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5777 dev = &rte_eth_devices[port_id];
5781 "Cannot get ethdev port %u hairpin capability to NULL\n",
5786 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_cap_get, -ENOTSUP);
5787 memset(cap, 0, sizeof(*cap));
5788 return eth_err(port_id, (*dev->dev_ops->hairpin_cap_get)(dev, cap));
5792 rte_eth_dev_is_rx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5794 if (dev->data->rx_queue_state[queue_id] == RTE_ETH_QUEUE_STATE_HAIRPIN)
5800 rte_eth_dev_is_tx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5802 if (dev->data->tx_queue_state[queue_id] == RTE_ETH_QUEUE_STATE_HAIRPIN)
5808 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
5810 struct rte_eth_dev *dev;
5812 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5813 dev = &rte_eth_devices[port_id];
5817 "Cannot test ethdev port %u mempool operation from NULL pool\n",
5822 if (*dev->dev_ops->pool_ops_supported == NULL)
5823 return 1; /* all pools are supported */
5825 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
5829 * A set of values to describe the possible states of a switch domain.
5831 enum rte_eth_switch_domain_state {
5832 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
5833 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
5837 * Array of switch domains available for allocation. Array is sized to
5838 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
5839 * ethdev ports in a single process.
5841 static struct rte_eth_dev_switch {
5842 enum rte_eth_switch_domain_state state;
5843 } eth_dev_switch_domains[RTE_MAX_ETHPORTS];
5846 rte_eth_switch_domain_alloc(uint16_t *domain_id)
5850 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
5852 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
5853 if (eth_dev_switch_domains[i].state ==
5854 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
5855 eth_dev_switch_domains[i].state =
5856 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
5866 rte_eth_switch_domain_free(uint16_t domain_id)
5868 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
5869 domain_id >= RTE_MAX_ETHPORTS)
5872 if (eth_dev_switch_domains[domain_id].state !=
5873 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
5876 eth_dev_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
5882 eth_dev_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
5885 struct rte_kvargs_pair *pair;
5888 arglist->str = strdup(str_in);
5889 if (arglist->str == NULL)
5892 letter = arglist->str;
5895 pair = &arglist->pairs[0];
5898 case 0: /* Initial */
5901 else if (*letter == '\0')
5908 case 1: /* Parsing key */
5909 if (*letter == '=') {
5911 pair->value = letter + 1;
5913 } else if (*letter == ',' || *letter == '\0')
5918 case 2: /* Parsing value */
5921 else if (*letter == ',') {
5924 pair = &arglist->pairs[arglist->count];
5926 } else if (*letter == '\0') {
5929 pair = &arglist->pairs[arglist->count];
5934 case 3: /* Parsing list */
5937 else if (*letter == '\0')
5946 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
5948 struct rte_kvargs args;
5949 struct rte_kvargs_pair *pair;
5953 memset(eth_da, 0, sizeof(*eth_da));
5955 result = eth_dev_devargs_tokenise(&args, dargs);
5959 for (i = 0; i < args.count; i++) {
5960 pair = &args.pairs[i];
5961 if (strcmp("representor", pair->key) == 0) {
5962 if (eth_da->type != RTE_ETH_REPRESENTOR_NONE) {
5963 RTE_LOG(ERR, EAL, "duplicated representor key: %s\n",
5968 result = rte_eth_devargs_parse_representor_ports(
5969 pair->value, eth_da);
5983 rte_eth_representor_id_get(const struct rte_eth_dev *ethdev,
5984 enum rte_eth_representor_type type,
5985 int controller, int pf, int representor_port,
5988 int ret, n, i, count;
5989 struct rte_eth_representor_info *info = NULL;
5992 if (type == RTE_ETH_REPRESENTOR_NONE)
5994 if (repr_id == NULL)
5997 /* Get PMD representor range info. */
5998 ret = rte_eth_representor_info_get(ethdev->data->port_id, NULL);
5999 if (ret == -ENOTSUP && type == RTE_ETH_REPRESENTOR_VF &&
6000 controller == -1 && pf == -1) {
6001 /* Direct mapping for legacy VF representor. */
6002 *repr_id = representor_port;
6004 } else if (ret < 0) {
6008 size = sizeof(*info) + n * sizeof(info->ranges[0]);
6009 info = calloc(1, size);
6012 ret = rte_eth_representor_info_get(ethdev->data->port_id, info);
6016 /* Default controller and pf to caller. */
6017 if (controller == -1)
6018 controller = info->controller;
6022 /* Locate representor ID. */
6024 for (i = 0; i < n; ++i) {
6025 if (info->ranges[i].type != type)
6027 if (info->ranges[i].controller != controller)
6029 if (info->ranges[i].id_end < info->ranges[i].id_base) {
6030 RTE_LOG(WARNING, EAL, "Port %hu invalid representor ID Range %u - %u, entry %d\n",
6031 ethdev->data->port_id, info->ranges[i].id_base,
6032 info->ranges[i].id_end, i);
6036 count = info->ranges[i].id_end - info->ranges[i].id_base + 1;
6037 switch (info->ranges[i].type) {
6038 case RTE_ETH_REPRESENTOR_PF:
6039 if (pf < info->ranges[i].pf ||
6040 pf >= info->ranges[i].pf + count)
6042 *repr_id = info->ranges[i].id_base +
6043 (pf - info->ranges[i].pf);
6046 case RTE_ETH_REPRESENTOR_VF:
6047 if (info->ranges[i].pf != pf)
6049 if (representor_port < info->ranges[i].vf ||
6050 representor_port >= info->ranges[i].vf + count)
6052 *repr_id = info->ranges[i].id_base +
6053 (representor_port - info->ranges[i].vf);
6056 case RTE_ETH_REPRESENTOR_SF:
6057 if (info->ranges[i].pf != pf)
6059 if (representor_port < info->ranges[i].sf ||
6060 representor_port >= info->ranges[i].sf + count)
6062 *repr_id = info->ranges[i].id_base +
6063 (representor_port - info->ranges[i].sf);
6076 eth_dev_handle_port_list(const char *cmd __rte_unused,
6077 const char *params __rte_unused,
6078 struct rte_tel_data *d)
6082 rte_tel_data_start_array(d, RTE_TEL_INT_VAL);
6083 RTE_ETH_FOREACH_DEV(port_id)
6084 rte_tel_data_add_array_int(d, port_id);
6089 eth_dev_add_port_queue_stats(struct rte_tel_data *d, uint64_t *q_stats,
6090 const char *stat_name)
6093 struct rte_tel_data *q_data = rte_tel_data_alloc();
6094 rte_tel_data_start_array(q_data, RTE_TEL_U64_VAL);
6095 for (q = 0; q < RTE_ETHDEV_QUEUE_STAT_CNTRS; q++)
6096 rte_tel_data_add_array_u64(q_data, q_stats[q]);
6097 rte_tel_data_add_dict_container(d, stat_name, q_data, 0);
6100 #define ADD_DICT_STAT(stats, s) rte_tel_data_add_dict_u64(d, #s, stats.s)
6103 eth_dev_handle_port_stats(const char *cmd __rte_unused,
6105 struct rte_tel_data *d)
6107 struct rte_eth_stats stats;
6110 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
6113 port_id = atoi(params);
6114 if (!rte_eth_dev_is_valid_port(port_id))
6117 ret = rte_eth_stats_get(port_id, &stats);
6121 rte_tel_data_start_dict(d);
6122 ADD_DICT_STAT(stats, ipackets);
6123 ADD_DICT_STAT(stats, opackets);
6124 ADD_DICT_STAT(stats, ibytes);
6125 ADD_DICT_STAT(stats, obytes);
6126 ADD_DICT_STAT(stats, imissed);
6127 ADD_DICT_STAT(stats, ierrors);
6128 ADD_DICT_STAT(stats, oerrors);
6129 ADD_DICT_STAT(stats, rx_nombuf);
6130 eth_dev_add_port_queue_stats(d, stats.q_ipackets, "q_ipackets");
6131 eth_dev_add_port_queue_stats(d, stats.q_opackets, "q_opackets");
6132 eth_dev_add_port_queue_stats(d, stats.q_ibytes, "q_ibytes");
6133 eth_dev_add_port_queue_stats(d, stats.q_obytes, "q_obytes");
6134 eth_dev_add_port_queue_stats(d, stats.q_errors, "q_errors");
6140 eth_dev_handle_port_xstats(const char *cmd __rte_unused,
6142 struct rte_tel_data *d)
6144 struct rte_eth_xstat *eth_xstats;
6145 struct rte_eth_xstat_name *xstat_names;
6146 int port_id, num_xstats;
6150 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
6153 port_id = strtoul(params, &end_param, 0);
6154 if (*end_param != '\0')
6155 RTE_ETHDEV_LOG(NOTICE,
6156 "Extra parameters passed to ethdev telemetry command, ignoring");
6157 if (!rte_eth_dev_is_valid_port(port_id))
6160 num_xstats = rte_eth_xstats_get(port_id, NULL, 0);
6164 /* use one malloc for both names and stats */
6165 eth_xstats = malloc((sizeof(struct rte_eth_xstat) +
6166 sizeof(struct rte_eth_xstat_name)) * num_xstats);
6167 if (eth_xstats == NULL)
6169 xstat_names = (void *)ð_xstats[num_xstats];
6171 ret = rte_eth_xstats_get_names(port_id, xstat_names, num_xstats);
6172 if (ret < 0 || ret > num_xstats) {
6177 ret = rte_eth_xstats_get(port_id, eth_xstats, num_xstats);
6178 if (ret < 0 || ret > num_xstats) {
6183 rte_tel_data_start_dict(d);
6184 for (i = 0; i < num_xstats; i++)
6185 rte_tel_data_add_dict_u64(d, xstat_names[i].name,
6186 eth_xstats[i].value);
6191 eth_dev_handle_port_link_status(const char *cmd __rte_unused,
6193 struct rte_tel_data *d)
6195 static const char *status_str = "status";
6197 struct rte_eth_link link;
6200 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
6203 port_id = strtoul(params, &end_param, 0);
6204 if (*end_param != '\0')
6205 RTE_ETHDEV_LOG(NOTICE,
6206 "Extra parameters passed to ethdev telemetry command, ignoring");
6207 if (!rte_eth_dev_is_valid_port(port_id))
6210 ret = rte_eth_link_get_nowait(port_id, &link);
6214 rte_tel_data_start_dict(d);
6215 if (!link.link_status) {
6216 rte_tel_data_add_dict_string(d, status_str, "DOWN");
6219 rte_tel_data_add_dict_string(d, status_str, "UP");
6220 rte_tel_data_add_dict_u64(d, "speed", link.link_speed);
6221 rte_tel_data_add_dict_string(d, "duplex",
6222 (link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
6223 "full-duplex" : "half-duplex");
6228 rte_eth_hairpin_queue_peer_update(uint16_t peer_port, uint16_t peer_queue,
6229 struct rte_hairpin_peer_info *cur_info,
6230 struct rte_hairpin_peer_info *peer_info,
6233 struct rte_eth_dev *dev;
6235 /* Current queue information is not mandatory. */
6236 if (peer_info == NULL)
6239 /* No need to check the validity again. */
6240 dev = &rte_eth_devices[peer_port];
6241 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_update,
6244 return (*dev->dev_ops->hairpin_queue_peer_update)(dev, peer_queue,
6245 cur_info, peer_info, direction);
6249 rte_eth_hairpin_queue_peer_bind(uint16_t cur_port, uint16_t cur_queue,
6250 struct rte_hairpin_peer_info *peer_info,
6253 struct rte_eth_dev *dev;
6255 if (peer_info == NULL)
6258 /* No need to check the validity again. */
6259 dev = &rte_eth_devices[cur_port];
6260 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_bind,
6263 return (*dev->dev_ops->hairpin_queue_peer_bind)(dev, cur_queue,
6264 peer_info, direction);
6268 rte_eth_hairpin_queue_peer_unbind(uint16_t cur_port, uint16_t cur_queue,
6271 struct rte_eth_dev *dev;
6273 /* No need to check the validity again. */
6274 dev = &rte_eth_devices[cur_port];
6275 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_unbind,
6278 return (*dev->dev_ops->hairpin_queue_peer_unbind)(dev, cur_queue,
6283 rte_eth_representor_info_get(uint16_t port_id,
6284 struct rte_eth_representor_info *info)
6286 struct rte_eth_dev *dev;
6288 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
6289 dev = &rte_eth_devices[port_id];
6291 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->representor_info_get, -ENOTSUP);
6292 return eth_err(port_id, (*dev->dev_ops->representor_info_get)(dev, info));
6295 RTE_LOG_REGISTER(rte_eth_dev_logtype, lib.ethdev, INFO);
6297 RTE_INIT(ethdev_init_telemetry)
6299 rte_telemetry_register_cmd("/ethdev/list", eth_dev_handle_port_list,
6300 "Returns list of available ethdev ports. Takes no parameters");
6301 rte_telemetry_register_cmd("/ethdev/stats", eth_dev_handle_port_stats,
6302 "Returns the common stats for a port. Parameters: int port_id");
6303 rte_telemetry_register_cmd("/ethdev/xstats", eth_dev_handle_port_xstats,
6304 "Returns the extended stats for a port. Parameters: int port_id");
6305 rte_telemetry_register_cmd("/ethdev/link_status",
6306 eth_dev_handle_port_link_status,
6307 "Returns the link status for a port. Parameters: int port_id");