lib/librte_eal/common/include/rte_cpuflags.h

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2012 Intel Corporation. All rights reserved.
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  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  *
  33  *  version: DPDK.L.1.2.3-3
  34  */
  35
  36 #ifndef _RTE_CPUFLAGS_H_
  37 #define _RTE_CPUFLAGS_H_
  38
  39 /**
  40  * @file
  41  * Simple API to determine available CPU features at runtime.
  42  */
  43
  44 #ifdef __cplusplus
  45 extern "C" {
  46 #endif
  47
  48
  49 /**
  50  * Enumeration of all CPU features supported
  51  */
  52 enum rte_cpu_flag_t {
  53         /* (EAX 01h) ECX features*/
  54         RTE_CPUFLAG_SSE3 = 0,               /**< SSE3 */
  55         RTE_CPUFLAG_PCLMULQDQ,              /**< PCLMULQDQ */
  56         RTE_CPUFLAG_DTES64,                 /**< DTES64 */
  57         RTE_CPUFLAG_MONITOR,                /**< MONITOR */
  58         RTE_CPUFLAG_DS_CPL,                 /**< DS_CPL */
  59         RTE_CPUFLAG_VMX,                    /**< VMX */
  60         RTE_CPUFLAG_SMX,                    /**< SMX */
  61         RTE_CPUFLAG_EIST,                   /**< EIST */
  62         RTE_CPUFLAG_TM2,                    /**< TM2 */
  63         RTE_CPUFLAG_SSSE3,                  /**< SSSE3 */
  64         RTE_CPUFLAG_CNXT_ID,                /**< CNXT_ID */
  65         RTE_CPUFLAG_FMA,                    /**< FMA */
  66         RTE_CPUFLAG_CMPXCHG16B,             /**< CMPXCHG16B */
  67         RTE_CPUFLAG_XTPR,                   /**< XTPR */
  68         RTE_CPUFLAG_PDCM,                   /**< PDCM */
  69         RTE_CPUFLAG_PCID,                   /**< PCID */
  70         RTE_CPUFLAG_DCA,                    /**< DCA */
  71         RTE_CPUFLAG_SSE4_1,                 /**< SSE4_1 */
  72         RTE_CPUFLAG_SSE4_2,                 /**< SSE4_2 */
  73         RTE_CPUFLAG_X2APIC,                 /**< X2APIC */
  74         RTE_CPUFLAG_MOVBE,                  /**< MOVBE */
  75         RTE_CPUFLAG_POPCNT,                 /**< POPCNT */
  76         RTE_CPUFLAG_TSC_DEADLINE,           /**< TSC_DEADLINE */
  77         RTE_CPUFLAG_AES,                    /**< AES */
  78         RTE_CPUFLAG_XSAVE,                  /**< XSAVE */
  79         RTE_CPUFLAG_OSXSAVE,                /**< OSXSAVE */
  80         RTE_CPUFLAG_AVX,                    /**< AVX */
  81         RTE_CPUFLAG_F16C,                   /**< F16C */
  82         RTE_CPUFLAG_RDRAND,                 /**< RDRAND */
  83
  84         /* (EAX 01h) EDX features */
  85         RTE_CPUFLAG_FPU,                    /**< FPU */
  86         RTE_CPUFLAG_VME,                    /**< VME */
  87         RTE_CPUFLAG_DE,                     /**< DE */
  88         RTE_CPUFLAG_PSE,                    /**< PSE */
  89         RTE_CPUFLAG_TSC,                    /**< TSC */
  90         RTE_CPUFLAG_MSR,                    /**< MSR */
  91         RTE_CPUFLAG_PAE,                    /**< PAE */
  92         RTE_CPUFLAG_MCE,                    /**< MCE */
  93         RTE_CPUFLAG_CX8,                    /**< CX8 */
  94         RTE_CPUFLAG_APIC,                   /**< APIC */
  95         RTE_CPUFLAG_SEP,                    /**< SEP */
  96         RTE_CPUFLAG_MTRR,                   /**< MTRR */
  97         RTE_CPUFLAG_PGE,                    /**< PGE */
  98         RTE_CPUFLAG_MCA,                    /**< MCA */
  99         RTE_CPUFLAG_CMOV,                   /**< CMOV */
 100         RTE_CPUFLAG_PAT,                    /**< PAT */
 101         RTE_CPUFLAG_PSE36,                  /**< PSE36 */
 102         RTE_CPUFLAG_PSN,                    /**< PSN */
 103         RTE_CPUFLAG_CLFSH,                  /**< CLFSH */
 104         RTE_CPUFLAG_DS,                     /**< DS */
 105         RTE_CPUFLAG_ACPI,                   /**< ACPI */
 106         RTE_CPUFLAG_MMX,                    /**< MMX */
 107         RTE_CPUFLAG_FXSR,                   /**< FXSR */
 108         RTE_CPUFLAG_SSE,                    /**< SSE */
 109         RTE_CPUFLAG_SSE2,                   /**< SSE2 */
 110         RTE_CPUFLAG_SS,                     /**< SS */
 111         RTE_CPUFLAG_HTT,                    /**< HTT */
 112         RTE_CPUFLAG_TM,                     /**< TM */
 113         RTE_CPUFLAG_PBE,                    /**< PBE */
 114
 115         /* (EAX 06h) EAX features */
 116         RTE_CPUFLAG_DIGTEMP,                /**< DIGTEMP */
 117         RTE_CPUFLAG_TRBOBST,                /**< TRBOBST */
 118         RTE_CPUFLAG_ARAT,                   /**< ARAT */
 119         RTE_CPUFLAG_PLN,                    /**< PLN */
 120         RTE_CPUFLAG_ECMD,                   /**< ECMD */
 121         RTE_CPUFLAG_PTM,                    /**< PTM */
 122
 123         /* (EAX 06h) ECX features */
 124         RTE_CPUFLAG_MPERF_APERF_MSR,        /**< MPERF_APERF_MSR */
 125         RTE_CPUFLAG_ACNT2,                  /**< ACNT2 */
 126         RTE_CPUFLAG_ENERGY_EFF,             /**< ENERGY_EFF */
 127
 128         /* (EAX 07h, ECX 0h) EBX features */
 129         RTE_CPUFLAG_FSGSBASE,               /**< FSGSBASE */
 130         RTE_CPUFLAG_BMI1,                   /**< BMI1 */
 131         RTE_CPUFLAG_AVX2,                   /**< AVX2 */
 132         RTE_CPUFLAG_SMEP,                   /**< SMEP */
 133         RTE_CPUFLAG_BMI2,                   /**< BMI2 */
 134         RTE_CPUFLAG_ERMS,                   /**< ERMS */
 135         RTE_CPUFLAG_INVPCID,                /**< INVPCID */
 136
 137         /* (EAX 80000001h) ECX features */
 138         RTE_CPUFLAG_LAHF_SAHF,              /**< LAHF_SAHF */
 139         RTE_CPUFLAG_LZCNT,                  /**< LZCNT */
 140
 141         /* (EAX 80000001h) EDX features */
 142         RTE_CPUFLAG_SYSCALL,                /**< SYSCALL */
 143         RTE_CPUFLAG_XD,                     /**< XD */
 144         RTE_CPUFLAG_1GB_PG,                 /**< 1GB_PG */
 145         RTE_CPUFLAG_RDTSCP,                 /**< RDTSCP */
 146         RTE_CPUFLAG_EM64T,                  /**< EM64T */
 147
 148         /* (EAX 80000007h) EDX features */
 149         RTE_CPUFLAG_INVTSC,                 /**< INVTSC */
 150
 151         /* The last item */
 152         RTE_CPUFLAG_NUMFLAGS,               /**< This should always be the last! */
 153 };
 154
 155
 156 /**
 157  * Function for checking a CPU flag availability
 158  *
 159  * @param flag
 160  *      CPU flag to query CPU for
 161  * @return
 162  *  1 if flag is available
 163  *  0 if flag is not available
 164  *  -ENOENT if flag is invalid
 165  */
 166 int
 167 rte_cpu_get_flag_enabled(enum rte_cpu_flag_t flag);
 168
 169 #ifdef __cplusplus
 170 }
 171 #endif
 172
 173
 174 #endif /* _RTE_CPUFLAGS_H_ */