first public release
[dpdk.git] / lib / librte_eal / common / include / rte_pci_dev_ids.h
1 /*-
2  *   BSD LICENSE
3  * 
4  *   Copyright(c) 2010-2012 Intel Corporation. All rights reserved.
5  *   All rights reserved.
6  * 
7  *   Redistribution and use in source and binary forms, with or without 
8  *   modification, are permitted provided that the following conditions 
9  *   are met:
10  * 
11  *     * Redistributions of source code must retain the above copyright 
12  *       notice, this list of conditions and the following disclaimer.
13  *     * Redistributions in binary form must reproduce the above copyright 
14  *       notice, this list of conditions and the following disclaimer in 
15  *       the documentation and/or other materials provided with the 
16  *       distribution.
17  *     * Neither the name of Intel Corporation nor the names of its 
18  *       contributors may be used to endorse or promote products derived 
19  *       from this software without specific prior written permission.
20  * 
21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 
24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 
28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 
29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  * 
33  *  version: DPDK.L.1.2.3-3
34  */
35
36 /**
37  * @file
38  *
39  * This file contains a list of the PCI device IDs recognised by DPDK, which
40  * can be used to fill out an array of structures describing the devices.
41  *
42  * Currently two families of devices are recognised: those supported by the
43  * IGB driver, and those supported by the IXGBE driver. The inclusion of these
44  * in an array built using this file depends on the definition of
45  * RTE_LIBRTE_IGB_PMD and RTE_LIBRTE_IXGBE_PMD at the time when this file is
46  * included.
47  *
48  * In order to populate an array, the user of this file must define this macro:
49  * RTE_PCI_DEV_ID_DECL(vendorID, deviceID). For example:
50  *
51  * @code
52  * struct device {
53  *     int vend;
54  *     int dev;
55  * };
56  *
57  * struct device devices[] = {
58  * #define RTE_PCI_DEV_ID_DECL(vendorID, deviceID) {vend, dev},
59  * #include <rte_pci_dev_ids.h>
60  * };
61  * @endcode
62  *
63  * Note that this file can be included multiple times within the same file.
64  */
65
66 #ifndef RTE_PCI_DEV_ID_DECL
67 #error "You must define RTE_PCI_DEV_ID_DECL before including rte_pci_dev_ids.h"
68 #endif
69
70 #ifndef PCI_VENDOR_ID_INTEL
71 /** Vendor ID used by Intel devices */
72 #define PCI_VENDOR_ID_INTEL 0x8086
73 #endif
74
75 /******************** Physical IGB devices from e1000_hw.h ********************/
76 #ifdef RTE_LIBRTE_IGB_PMD
77
78 #define E1000_DEV_ID_82576                      0x10C9
79 #define E1000_DEV_ID_82576_FIBER                0x10E6
80 #define E1000_DEV_ID_82576_SERDES               0x10E7
81 #define E1000_DEV_ID_82576_QUAD_COPPER          0x10E8
82 #define E1000_DEV_ID_82576_QUAD_COPPER_ET2      0x1526
83 #define E1000_DEV_ID_82576_NS                   0x150A
84 #define E1000_DEV_ID_82576_NS_SERDES            0x1518
85 #define E1000_DEV_ID_82576_SERDES_QUAD          0x150D
86 #define E1000_DEV_ID_82575EB_COPPER             0x10A7
87 #define E1000_DEV_ID_82575EB_FIBER_SERDES       0x10A9
88 #define E1000_DEV_ID_82575GB_QUAD_COPPER        0x10D6
89 #define E1000_DEV_ID_82580_COPPER               0x150E
90 #define E1000_DEV_ID_82580_FIBER                0x150F
91 #define E1000_DEV_ID_82580_SERDES               0x1510
92 #define E1000_DEV_ID_82580_SGMII                0x1511
93 #define E1000_DEV_ID_82580_COPPER_DUAL          0x1516
94 #define E1000_DEV_ID_82580_QUAD_FIBER           0x1527
95 #define E1000_DEV_ID_I350_COPPER                0x1521
96 #define E1000_DEV_ID_I350_FIBER                 0x1522
97 #define E1000_DEV_ID_I350_SERDES                0x1523
98 #define E1000_DEV_ID_I350_SGMII                 0x1524
99 #define E1000_DEV_ID_I350_DA4                   0x1546
100 #define E1000_DEV_ID_DH89XXCC_SGMII             0x0438
101 #define E1000_DEV_ID_DH89XXCC_SERDES            0x043A
102 #define E1000_DEV_ID_DH89XXCC_BACKPLANE         0x043C
103 #define E1000_DEV_ID_DH89XXCC_SFP               0x0440
104
105 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576)
106 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_FIBER)
107 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_SERDES)
108 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_QUAD_COPPER)
109 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2)
110 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_NS)
111 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_NS_SERDES)
112 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_SERDES_QUAD)
113
114 /* This device is the on-board NIC on some development boards. */
115 #ifdef RTE_PCI_DEV_USE_82575EB_COPPER
116 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82575EB_COPPER)
117 #endif
118
119 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES)
120 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER)
121
122 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_COPPER)
123 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_FIBER)
124 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_SERDES)
125 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_SGMII)
126 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_COPPER_DUAL)
127 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_QUAD_FIBER)
128
129 /* This device is the on-board NIC on some development boards. */
130 #ifndef RTE_PCI_DEV_NO_USE_I350_COPPER
131 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_COPPER)
132 #endif
133
134 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_FIBER)
135 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_SERDES)
136 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_SGMII)
137 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_DA4)
138 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_SGMII)
139 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_SERDES)
140 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE)
141 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_SFP)
142
143 #endif /* RTE_LIBRTE_IGB_PMD */
144
145
146 /****************** Physical IXGBE devices from ixgbe_type.h ******************/
147 #ifdef RTE_LIBRTE_IXGBE_PMD
148
149 #define IXGBE_DEV_ID_82598                      0x10B6
150 #define IXGBE_DEV_ID_82598_BX                   0x1508
151 #define IXGBE_DEV_ID_82598AF_DUAL_PORT          0x10C6
152 #define IXGBE_DEV_ID_82598AF_SINGLE_PORT        0x10C7
153 #define IXGBE_DEV_ID_82598AT                    0x10C8
154 #define IXGBE_DEV_ID_82598AT2                   0x150B
155 #define IXGBE_DEV_ID_82598EB_SFP_LOM            0x10DB
156 #define IXGBE_DEV_ID_82598EB_CX4                0x10DD
157 #define IXGBE_DEV_ID_82598_CX4_DUAL_PORT        0x10EC
158 #define IXGBE_DEV_ID_82598_DA_DUAL_PORT         0x10F1
159 #define IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM      0x10E1
160 #define IXGBE_DEV_ID_82598EB_XF_LR              0x10F4
161 #define IXGBE_DEV_ID_82599_KX4                  0x10F7
162 #define IXGBE_DEV_ID_82599_KX4_MEZZ             0x1514
163 #define IXGBE_DEV_ID_82599_KR                   0x1517
164 #define IXGBE_DEV_ID_82599_COMBO_BACKPLANE      0x10F8
165 #define IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ       0x000C
166 #define IXGBE_DEV_ID_82599_CX4                  0x10F9
167 #define IXGBE_DEV_ID_82599_SFP                  0x10FB
168 #define IXGBE_SUBDEV_ID_82599_SFP               0x11A9
169 #define IXGBE_DEV_ID_82599_BACKPLANE_FCOE       0x152A
170 #define IXGBE_DEV_ID_82599_SFP_FCOE             0x1529
171 #define IXGBE_DEV_ID_82599_SFP_EM               0x1507
172 #define IXGBE_DEV_ID_82599EN_SFP                0x1557
173 #define IXGBE_DEV_ID_82599_XAUI_LOM             0x10FC
174 #define IXGBE_DEV_ID_82599_T3_LOM               0x151C
175 #define IXGBE_DEV_ID_X540T                      0x1528
176
177 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598)
178 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_BX)
179 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT)
180 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT)
181 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AT)
182 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AT2)
183 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM)
184 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_CX4)
185 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT)
186 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT)
187 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM)
188 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_XF_LR)
189 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KX4)
190 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ)
191 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KR)
192 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE)
193 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
194 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_CX4)
195 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP)
196 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_SFP)
197 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE)
198 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_FCOE)
199 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_EM)
200 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599EN_SFP)
201 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_XAUI_LOM)
202 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_T3_LOM)
203 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540T)
204
205 #endif /* RTE_LIBRTE_IXGBE_PMD */