lib/librte_eal/common/include/rte_pci_dev_ids.h

   1 /*-
   2  * This file is provided under a dual BSD/GPLv2 license.  When using or
   3  *   redistributing this file, you may do so under either license.
   4  *
   5  *   GPL LICENSE SUMMARY
   6  *
   7  *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
   8  *
   9  *   This program is free software; you can redistribute it and/or modify
  10  *   it under the terms of version 2 of the GNU General Public License as
  11  *   published by the Free Software Foundation.
  12  *
  13  *   This program is distributed in the hope that it will be useful, but
  14  *   WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16  *   General Public License for more details.
  17  *
  18  *   You should have received a copy of the GNU General Public License
  19  *   along with this program; if not, write to the Free Software
  20  *   Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  21  *   The full GNU General Public License is included in this distribution
  22  *   in the file called LICENSE.GPL.
  23  *
  24  *   Contact Information:
  25  *   Intel Corporation
  26  *
  27  *   BSD LICENSE
  28  *
  29  *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
  30  *   All rights reserved.
  31  *
  32  *   Redistribution and use in source and binary forms, with or without
  33  *   modification, are permitted provided that the following conditions
  34  *   are met:
  35  *
  36  *     * Redistributions of source code must retain the above copyright
  37  *       notice, this list of conditions and the following disclaimer.
  38  *     * Redistributions in binary form must reproduce the above copyright
  39  *       notice, this list of conditions and the following disclaimer in
  40  *       the documentation and/or other materials provided with the
  41  *       distribution.
  42  *     * Neither the name of Intel Corporation nor the names of its
  43  *       contributors may be used to endorse or promote products derived
  44  *       from this software without specific prior written permission.
  45  *
  46  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  47  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  48  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  49  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  50  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  51  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  52  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  53  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  54  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  55  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  56  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  57  *
  58  */
  59
  60 /**
  61  * @file
  62  *
  63  * This file contains a list of the PCI device IDs recognised by DPDK, which
  64  * can be used to fill out an array of structures describing the devices.
  65  *
  66  * Currently four families of devices are recognised: those supported by the
  67  * IGB driver, by EM driver, those supported by the IXGBE driver, and by virtio
  68  * driver which is a para virtualization driver running in guest virtual machine.
  69  * The inclusion of these in an array built using this file depends on the
  70  * definition of
  71  * RTE_PCI_DEV_ID_DECL_EM
  72  * RTE_PCI_DEV_ID_DECL_IGB
  73  * RTE_PCI_DEV_ID_DECL_IGBVF
  74  * RTE_PCI_DEV_ID_DECL_IXGBE
  75  * RTE_PCI_DEV_ID_DECL_IXGBEVF
  76  * RTE_PCI_DEV_ID_DECL_VIRTIO
  77  * at the time when this file is included.
  78  *
  79  * In order to populate an array, the user of this file must define this macro:
  80  * RTE_PCI_DEV_ID_DECL_IXGBE(vendorID, deviceID). For example:
  81  *
  82  * @code
  83  * struct device {
  84  *     int vend;
  85  *     int dev;
  86  * };
  87  *
  88  * struct device devices[] = {
  89  * #define RTE_PCI_DEV_ID_DECL_IXGBE(vendorID, deviceID) {vend, dev},
  90  * #include <rte_pci_dev_ids.h>
  91  * };
  92  * @endcode
  93  *
  94  * Note that this file can be included multiple times within the same file.
  95  */
  96
  97 #ifndef RTE_PCI_DEV_ID_DECL_EM
  98 #define RTE_PCI_DEV_ID_DECL_EM(vend, dev)
  99 #endif
 100
 101 #ifndef RTE_PCI_DEV_ID_DECL_IGB
 102 #define RTE_PCI_DEV_ID_DECL_IGB(vend, dev)
 103 #endif
 104
 105 #ifndef RTE_PCI_DEV_ID_DECL_IGBVF
 106 #define RTE_PCI_DEV_ID_DECL_IGBVF(vend, dev)
 107 #endif
 108
 109 #ifndef RTE_PCI_DEV_ID_DECL_IXGBE
 110 #define RTE_PCI_DEV_ID_DECL_IXGBE(vend, dev)
 111 #endif
 112
 113 #ifndef RTE_PCI_DEV_ID_DECL_IXGBEVF
 114 #define RTE_PCI_DEV_ID_DECL_IXGBEVF(vend, dev)
 115 #endif
 116
 117 #ifndef RTE_PCI_DEV_ID_DECL_VIRTIO
 118 #define RTE_PCI_DEV_ID_DECL_VIRTIO(vend, dev)
 119 #endif
 120
 121 #ifndef PCI_VENDOR_ID_INTEL
 122 /** Vendor ID used by Intel devices */
 123 #define PCI_VENDOR_ID_INTEL 0x8086
 124 #endif
 125
 126 #ifndef PCI_VENDOR_ID_QUMRANET
 127 /** Vendor ID used by virtio devices */
 128 #define PCI_VENDOR_ID_QUMRANET 0x1AF4
 129 #endif
 130
 131 /******************** Physical EM devices from e1000_hw.h ********************/
 132
 133 #define E1000_DEV_ID_82542                    0x1000
 134 #define E1000_DEV_ID_82543GC_FIBER            0x1001
 135 #define E1000_DEV_ID_82543GC_COPPER           0x1004
 136 #define E1000_DEV_ID_82544EI_COPPER           0x1008
 137 #define E1000_DEV_ID_82544EI_FIBER            0x1009
 138 #define E1000_DEV_ID_82544GC_COPPER           0x100C
 139 #define E1000_DEV_ID_82544GC_LOM              0x100D
 140 #define E1000_DEV_ID_82540EM                  0x100E
 141 #define E1000_DEV_ID_82540EM_LOM              0x1015
 142 #define E1000_DEV_ID_82540EP_LOM              0x1016
 143 #define E1000_DEV_ID_82540EP                  0x1017
 144 #define E1000_DEV_ID_82540EP_LP               0x101E
 145 #define E1000_DEV_ID_82545EM_COPPER           0x100F
 146 #define E1000_DEV_ID_82545EM_FIBER            0x1011
 147 #define E1000_DEV_ID_82545GM_COPPER           0x1026
 148 #define E1000_DEV_ID_82545GM_FIBER            0x1027
 149 #define E1000_DEV_ID_82545GM_SERDES           0x1028
 150 #define E1000_DEV_ID_82546EB_COPPER           0x1010
 151 #define E1000_DEV_ID_82546EB_FIBER            0x1012
 152 #define E1000_DEV_ID_82546EB_QUAD_COPPER      0x101D
 153 #define E1000_DEV_ID_82546GB_COPPER           0x1079
 154 #define E1000_DEV_ID_82546GB_FIBER            0x107A
 155 #define E1000_DEV_ID_82546GB_SERDES           0x107B
 156 #define E1000_DEV_ID_82546GB_PCIE             0x108A
 157 #define E1000_DEV_ID_82546GB_QUAD_COPPER      0x1099
 158 #define E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 0x10B5
 159 #define E1000_DEV_ID_82541EI                  0x1013
 160 #define E1000_DEV_ID_82541EI_MOBILE           0x1018
 161 #define E1000_DEV_ID_82541ER_LOM              0x1014
 162 #define E1000_DEV_ID_82541ER                  0x1078
 163 #define E1000_DEV_ID_82541GI                  0x1076
 164 #define E1000_DEV_ID_82541GI_LF               0x107C
 165 #define E1000_DEV_ID_82541GI_MOBILE           0x1077
 166 #define E1000_DEV_ID_82547EI                  0x1019
 167 #define E1000_DEV_ID_82547EI_MOBILE           0x101A
 168 #define E1000_DEV_ID_82547GI                  0x1075
 169 #define E1000_DEV_ID_82571EB_COPPER           0x105E
 170 #define E1000_DEV_ID_82571EB_FIBER            0x105F
 171 #define E1000_DEV_ID_82571EB_SERDES           0x1060
 172 #define E1000_DEV_ID_82571EB_SERDES_DUAL      0x10D9
 173 #define E1000_DEV_ID_82571EB_SERDES_QUAD      0x10DA
 174 #define E1000_DEV_ID_82571EB_QUAD_COPPER      0x10A4
 175 #define E1000_DEV_ID_82571PT_QUAD_COPPER      0x10D5
 176 #define E1000_DEV_ID_82571EB_QUAD_FIBER       0x10A5
 177 #define E1000_DEV_ID_82571EB_QUAD_COPPER_LP   0x10BC
 178 #define E1000_DEV_ID_82572EI_COPPER           0x107D
 179 #define E1000_DEV_ID_82572EI_FIBER            0x107E
 180 #define E1000_DEV_ID_82572EI_SERDES           0x107F
 181 #define E1000_DEV_ID_82572EI                  0x10B9
 182 #define E1000_DEV_ID_82573E                   0x108B
 183 #define E1000_DEV_ID_82573E_IAMT              0x108C
 184 #define E1000_DEV_ID_82573L                   0x109A
 185 #define E1000_DEV_ID_82574L                   0x10D3
 186 #define E1000_DEV_ID_82574LA                  0x10F6
 187 #define E1000_DEV_ID_82583V                   0x150C
 188 #define E1000_DEV_ID_80003ES2LAN_COPPER_DPT   0x1096
 189 #define E1000_DEV_ID_80003ES2LAN_SERDES_DPT   0x1098
 190 #define E1000_DEV_ID_80003ES2LAN_COPPER_SPT   0x10BA
 191 #define E1000_DEV_ID_80003ES2LAN_SERDES_SPT   0x10BB
 192 #define E1000_DEV_ID_ICH8_82567V_3            0x1501
 193 #define E1000_DEV_ID_ICH8_IGP_M_AMT           0x1049
 194 #define E1000_DEV_ID_ICH8_IGP_AMT             0x104A
 195 #define E1000_DEV_ID_ICH8_IGP_C               0x104B
 196 #define E1000_DEV_ID_ICH8_IFE                 0x104C
 197 #define E1000_DEV_ID_ICH8_IFE_GT              0x10C4
 198 #define E1000_DEV_ID_ICH8_IFE_G               0x10C5
 199 #define E1000_DEV_ID_ICH8_IGP_M               0x104D
 200 #define E1000_DEV_ID_ICH9_IGP_M               0x10BF
 201 #define E1000_DEV_ID_ICH9_IGP_M_AMT           0x10F5
 202 #define E1000_DEV_ID_ICH9_IGP_M_V             0x10CB
 203 #define E1000_DEV_ID_ICH9_IGP_AMT             0x10BD
 204 #define E1000_DEV_ID_ICH9_BM                  0x10E5
 205 #define E1000_DEV_ID_ICH9_IGP_C               0x294C
 206 #define E1000_DEV_ID_ICH9_IFE                 0x10C0
 207 #define E1000_DEV_ID_ICH9_IFE_GT              0x10C3
 208 #define E1000_DEV_ID_ICH9_IFE_G               0x10C2
 209 #define E1000_DEV_ID_ICH10_R_BM_LM            0x10CC
 210 #define E1000_DEV_ID_ICH10_R_BM_LF            0x10CD
 211 #define E1000_DEV_ID_ICH10_R_BM_V             0x10CE
 212 #define E1000_DEV_ID_ICH10_D_BM_LM            0x10DE
 213 #define E1000_DEV_ID_ICH10_D_BM_LF            0x10DF
 214 #define E1000_DEV_ID_ICH10_D_BM_V             0x1525
 215
 216 #define E1000_DEV_ID_PCH_M_HV_LM              0x10EA
 217 #define E1000_DEV_ID_PCH_M_HV_LC              0x10EB
 218 #define E1000_DEV_ID_PCH_D_HV_DM              0x10EF
 219 #define E1000_DEV_ID_PCH_D_HV_DC              0x10F0
 220 #define E1000_DEV_ID_PCH2_LV_LM               0x1502
 221 #define E1000_DEV_ID_PCH2_LV_V                0x1503
 222 #define E1000_DEV_ID_PCH_LPT_I217_LM          0x153A
 223 #define E1000_DEV_ID_PCH_LPT_I217_V           0x153B
 224 #define E1000_DEV_ID_PCH_LPTLP_I218_LM        0x155A
 225 #define E1000_DEV_ID_PCH_LPTLP_I218_V         0x1559
 226 #ifdef NAHUM6_LPTH_I218_HW
 227 #define E1000_DEV_ID_PCH_I218_LM2             0x15A0
 228 #define E1000_DEV_ID_PCH_I218_V2              0x15A1
 229 #endif /* NAHUM6_LPTH_I218_HW */
 230 #ifdef NAHUM6_WPT_HW
 231 #define E1000_DEV_ID_PCH_I218_LM3             0x15A2 /* Wildcat Point PCH */
 232 #define E1000_DEV_ID_PCH_I218_V3              0x15A3 /* Wildcat Point PCH */
 233 #endif /* NAHUM6_WPT_HW */
 234
 235 /*
 236  * Tested (supported) on VM emulated HW.
 237  */
 238
 239 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82540EM)
 240 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82545EM_COPPER)
 241 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82545EM_FIBER)
 242
 243 /*
 244  * Tested (supported) on real HW.
 245  */
 246
 247 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_COPPER)
 248 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_FIBER)
 249 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_SERDES)
 250 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL)
 251 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD)
 252 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER)
 253 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER)
 254 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER)
 255 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP)
 256 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82572EI_COPPER)
 257 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82572EI_FIBER)
 258 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82572EI_SERDES)
 259 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82572EI)
 260 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82573L)
 261 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82574L)
 262 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82574LA)
 263
 264 /******************** Physical IGB devices from e1000_hw.h ********************/
 265
 266 #define E1000_DEV_ID_82576                      0x10C9
 267 #define E1000_DEV_ID_82576_FIBER                0x10E6
 268 #define E1000_DEV_ID_82576_SERDES               0x10E7
 269 #define E1000_DEV_ID_82576_QUAD_COPPER          0x10E8
 270 #define E1000_DEV_ID_82576_QUAD_COPPER_ET2      0x1526
 271 #define E1000_DEV_ID_82576_NS                   0x150A
 272 #define E1000_DEV_ID_82576_NS_SERDES            0x1518
 273 #define E1000_DEV_ID_82576_SERDES_QUAD          0x150D
 274 #define E1000_DEV_ID_82575EB_COPPER             0x10A7
 275 #define E1000_DEV_ID_82575EB_FIBER_SERDES       0x10A9
 276 #define E1000_DEV_ID_82575GB_QUAD_COPPER        0x10D6
 277 #define E1000_DEV_ID_82580_COPPER               0x150E
 278 #define E1000_DEV_ID_82580_FIBER                0x150F
 279 #define E1000_DEV_ID_82580_SERDES               0x1510
 280 #define E1000_DEV_ID_82580_SGMII                0x1511
 281 #define E1000_DEV_ID_82580_COPPER_DUAL          0x1516
 282 #define E1000_DEV_ID_82580_QUAD_FIBER           0x1527
 283 #define E1000_DEV_ID_I350_COPPER                0x1521
 284 #define E1000_DEV_ID_I350_FIBER                 0x1522
 285 #define E1000_DEV_ID_I350_SERDES                0x1523
 286 #define E1000_DEV_ID_I350_SGMII                 0x1524
 287 #define E1000_DEV_ID_I350_DA4                   0x1546
 288 #define E1000_DEV_ID_I210_COPPER                0x1533
 289 #define E1000_DEV_ID_I210_COPPER_OEM1           0x1534
 290 #define E1000_DEV_ID_I210_COPPER_IT             0x1535
 291 #define E1000_DEV_ID_I210_FIBER                 0x1536
 292 #define E1000_DEV_ID_I210_SERDES                0x1537
 293 #define E1000_DEV_ID_I210_SGMII                 0x1538
 294 #define E1000_DEV_ID_I210_COPPER_FLASHLESS      0x157B
 295 #define E1000_DEV_ID_I210_SERDES_FLASHLESS      0x157C
 296 #define E1000_DEV_ID_I211_COPPER                0x1539
 297 #define E1000_DEV_ID_I354_BACKPLANE_1GBPS       0x1F40
 298 #define E1000_DEV_ID_I354_SGMII                 0x1F41
 299 #define E1000_DEV_ID_I354_BACKPLANE_2_5GBPS     0x1F45
 300 #define E1000_DEV_ID_DH89XXCC_SGMII             0x0438
 301 #define E1000_DEV_ID_DH89XXCC_SERDES            0x043A
 302 #define E1000_DEV_ID_DH89XXCC_BACKPLANE         0x043C
 303 #define E1000_DEV_ID_DH89XXCC_SFP               0x0440
 304
 305 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576)
 306 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_FIBER)
 307 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_SERDES)
 308 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_QUAD_COPPER)
 309 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2)
 310 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_NS)
 311 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_NS_SERDES)
 312 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_SERDES_QUAD)
 313
 314 /* This device is the on-board NIC on some development boards. */
 315 #ifdef RTE_PCI_DEV_USE_82575EB_COPPER
 316 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82575EB_COPPER)
 317 #endif
 318
 319 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES)
 320 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER)
 321
 322 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_COPPER)
 323 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_FIBER)
 324 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_SERDES)
 325 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_SGMII)
 326 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_COPPER_DUAL)
 327 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_QUAD_FIBER)
 328
 329 /* This device is the on-board NIC on some development boards. */
 330 #ifndef RTE_PCI_DEV_NO_USE_I350_COPPER
 331 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_COPPER)
 332 #endif
 333
 334 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_FIBER)
 335 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_SERDES)
 336 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_SGMII)
 337 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_DA4)
 338 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_COPPER)
 339 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_COPPER_OEM1)
 340 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_COPPER_IT)
 341 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_FIBER)
 342 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_SERDES)
 343 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_SGMII)
 344 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I211_COPPER)
 345 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS)
 346 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I354_SGMII)
 347 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS)
 348 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_SGMII)
 349 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_SERDES)
 350 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE)
 351 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_SFP)
 352
 353 /****************** Physical IXGBE devices from ixgbe_type.h ******************/
 354
 355 #define IXGBE_DEV_ID_82598                      0x10B6
 356 #define IXGBE_DEV_ID_82598_BX                   0x1508
 357 #define IXGBE_DEV_ID_82598AF_DUAL_PORT          0x10C6
 358 #define IXGBE_DEV_ID_82598AF_SINGLE_PORT        0x10C7
 359 #define IXGBE_DEV_ID_82598AT                    0x10C8
 360 #define IXGBE_DEV_ID_82598AT2                   0x150B
 361 #define IXGBE_DEV_ID_82598EB_SFP_LOM            0x10DB
 362 #define IXGBE_DEV_ID_82598EB_CX4                0x10DD
 363 #define IXGBE_DEV_ID_82598_CX4_DUAL_PORT        0x10EC
 364 #define IXGBE_DEV_ID_82598_DA_DUAL_PORT         0x10F1
 365 #define IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM      0x10E1
 366 #define IXGBE_DEV_ID_82598EB_XF_LR              0x10F4
 367 #define IXGBE_DEV_ID_82599_KX4                  0x10F7
 368 #define IXGBE_DEV_ID_82599_KX4_MEZZ             0x1514
 369 #define IXGBE_DEV_ID_82599_KR                   0x1517
 370 #define IXGBE_DEV_ID_82599_COMBO_BACKPLANE      0x10F8
 371 #define IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ       0x000C
 372 #define IXGBE_DEV_ID_82599_CX4                  0x10F9
 373 #define IXGBE_DEV_ID_82599_SFP                  0x10FB
 374 #define IXGBE_SUBDEV_ID_82599_SFP               0x11A9
 375 #define IXGBE_SUBDEV_ID_82599_RNDC              0x1F72
 376 #define IXGBE_SUBDEV_ID_82599_560FLR            0x17D0
 377 #define IXGBE_SUBDEV_ID_82599_ECNA_DP           0x0470
 378 #define IXGBE_DEV_ID_82599_BACKPLANE_FCOE       0x152A
 379 #define IXGBE_DEV_ID_82599_SFP_FCOE             0x1529
 380 #define IXGBE_DEV_ID_82599_SFP_EM               0x1507
 381 #define IXGBE_DEV_ID_82599_SFP_SF2              0x154D
 382 #define IXGBE_DEV_ID_82599_SFP_SF_QP            0x154A
 383 #define IXGBE_DEV_ID_82599EN_SFP                0x1557
 384 #define IXGBE_DEV_ID_82599_XAUI_LOM             0x10FC
 385 #define IXGBE_DEV_ID_82599_T3_LOM               0x151C
 386 #define IXGBE_DEV_ID_X540T                      0x1528
 387 #define IXGBE_DEV_ID_X540T1                     0x1560
 388
 389 #ifdef RTE_NIC_BYPASS
 390 #define IXGBE_DEV_ID_82599_BYPASS               0x155D
 391 #endif
 392
 393 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598)
 394 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_BX)
 395 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT)
 396 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, \
 397         IXGBE_DEV_ID_82598AF_SINGLE_PORT)
 398 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AT)
 399 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AT2)
 400 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM)
 401 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_CX4)
 402 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT)
 403 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT)
 404 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, \
 405         IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM)
 406 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_XF_LR)
 407 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KX4)
 408 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ)
 409 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KR)
 410 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, \
 411         IXGBE_DEV_ID_82599_COMBO_BACKPLANE)
 412 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, \
 413         IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
 414 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_CX4)
 415 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP)
 416 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_SFP)
 417 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_RNDC)
 418 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_560FLR)
 419 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_ECNA_DP)
 420 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE)
 421 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_FCOE)
 422 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_EM)
 423 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_SF2)
 424 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP)
 425 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599EN_SFP)
 426 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_XAUI_LOM)
 427 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_T3_LOM)
 428 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540T)
 429 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540T1)
 430
 431 #ifdef RTE_NIC_BYPASS
 432 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_BYPASS)
 433 #endif
 434
 435 /****************** Virtual IGB devices from e1000_hw.h ******************/
 436
 437 #define E1000_DEV_ID_82576_VF                   0x10CA
 438 #define E1000_DEV_ID_82576_VF_HV                0x152D
 439 #define E1000_DEV_ID_I350_VF                    0x1520
 440 #define E1000_DEV_ID_I350_VF_HV                 0x152F
 441
 442 RTE_PCI_DEV_ID_DECL_IGBVF(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_VF)
 443 RTE_PCI_DEV_ID_DECL_IGBVF(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_VF_HV)
 444 RTE_PCI_DEV_ID_DECL_IGBVF(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_VF)
 445 RTE_PCI_DEV_ID_DECL_IGBVF(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_VF_HV)
 446
 447 /****************** Virtual IXGBE devices from ixgbe_type.h ******************/
 448
 449 #define IXGBE_DEV_ID_82599_VF                   0x10ED
 450 #define IXGBE_DEV_ID_82599_VF_HV                0x152E
 451 #define IXGBE_DEV_ID_X540_VF                    0x1515
 452 #define IXGBE_DEV_ID_X540_VF_HV                 0x1530
 453
 454 RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_VF)
 455 RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_VF_HV)
 456 RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540_VF)
 457 RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540_VF_HV)
 458
 459 /****************** Virtio devices from virtio.h ******************/
 460
 461 #define QUMRANET_DEV_ID_VIRTIO                          0x1000
 462
 463 RTE_PCI_DEV_ID_DECL_VIRTIO(PCI_VENDOR_ID_QUMRANET, QUMRANET_DEV_ID_VIRTIO)
 464
 465 /*
 466  * Undef all RTE_PCI_DEV_ID_DECL_* here.
 467  */
 468 #undef RTE_PCI_DEV_ID_DECL_EM
 469 #undef RTE_PCI_DEV_ID_DECL_IGB
 470 #undef RTE_PCI_DEV_ID_DECL_IGBVF
 471 #undef RTE_PCI_DEV_ID_DECL_IXGBE
 472 #undef RTE_PCI_DEV_ID_DECL_IXGBEVF
 473 #undef RTE_PCI_DEV_ID_DECL_VIRTIO