e1000: update base driver
[dpdk.git] / lib / librte_eal / common / include / rte_pci_dev_ids.h
1 /*-
2  * This file is provided under a dual BSD/GPLv2 license.  When using or 
3  *   redistributing this file, you may do so under either license.
4  * 
5  *   GPL LICENSE SUMMARY
6  * 
7  *   Copyright(c) 2010-2012 Intel Corporation. All rights reserved.
8  * 
9  *   This program is free software; you can redistribute it and/or modify 
10  *   it under the terms of version 2 of the GNU General Public License as
11  *   published by the Free Software Foundation.
12  * 
13  *   This program is distributed in the hope that it will be useful, but 
14  *   WITHOUT ANY WARRANTY; without even the implied warranty of 
15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU 
16  *   General Public License for more details.
17  * 
18  *   You should have received a copy of the GNU General Public License 
19  *   along with this program; if not, write to the Free Software 
20  *   Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21  *   The full GNU General Public License is included in this distribution 
22  *   in the file called LICENSE.GPL.
23  * 
24  *   Contact Information:
25  *   Intel Corporation
26  * 
27  *   BSD LICENSE 
28  * 
29  *   Copyright(c) 2010-2012 Intel Corporation. All rights reserved.
30  *   All rights reserved.
31  * 
32  *   Redistribution and use in source and binary forms, with or without 
33  *   modification, are permitted provided that the following conditions 
34  *   are met:
35  * 
36  *     * Redistributions of source code must retain the above copyright 
37  *       notice, this list of conditions and the following disclaimer.
38  *     * Redistributions in binary form must reproduce the above copyright 
39  *       notice, this list of conditions and the following disclaimer in 
40  *       the documentation and/or other materials provided with the 
41  *       distribution.
42  *     * Neither the name of Intel Corporation nor the names of its 
43  *       contributors may be used to endorse or promote products derived 
44  *       from this software without specific prior written permission.
45  * 
46  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
47  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
48  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 
49  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
50  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
51  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
52  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 
53  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 
54  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
55  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
56  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
57  * 
58  * 
59  */
60
61 /**
62  * @file
63  *
64  * This file contains a list of the PCI device IDs recognised by DPDK, which
65  * can be used to fill out an array of structures describing the devices.
66  *
67  * Currently three families of devices are recognised: those supported by the
68  * IGB driver, by EM driver, and those supported by the IXGBE driver.
69  * The inclusion of these in an array built using this file depends on the
70  * definition of
71  * RTE_PCI_DEV_ID_DECL_EM
72  * RTE_PCI_DEV_ID_DECL_IGB
73  * RTE_PCI_DEV_ID_DECL_IGBVF
74  * RTE_PCI_DEV_ID_DECL_IXGBE
75  * RTE_PCI_DEV_ID_DECL_IXGBEVF
76  * at the time when this file is included.
77  *
78  * In order to populate an array, the user of this file must define this macro:
79  * RTE_PCI_DEV_ID_DECL_IXGBE(vendorID, deviceID). For example:
80  *
81  * @code
82  * struct device {
83  *     int vend;
84  *     int dev;
85  * };
86  *
87  * struct device devices[] = {
88  * #define RTE_PCI_DEV_ID_DECL(vendorID, deviceID) {vend, dev},
89  * #include <rte_pci_dev_ids.h>
90  * };
91  * @endcode
92  *
93  * Note that this file can be included multiple times within the same file.
94  */
95
96 #ifndef RTE_PCI_DEV_ID_DECL_EM
97 #define RTE_PCI_DEV_ID_DECL_EM(vend, dev)
98 #endif
99
100 #ifndef RTE_PCI_DEV_ID_DECL_IGB
101 #define RTE_PCI_DEV_ID_DECL_IGB(vend, dev)
102 #endif
103
104 #ifndef RTE_PCI_DEV_ID_DECL_IGBVF
105 #define RTE_PCI_DEV_ID_DECL_IGBVF(vend, dev)
106 #endif
107
108 #ifndef PCI_VENDOR_ID_INTEL
109 /** Vendor ID used by Intel devices */
110 #define PCI_VENDOR_ID_INTEL 0x8086
111 #endif
112
113 /******************** Physical EM devices from e1000_hw.h ********************/
114
115 #define E1000_DEV_ID_82542                    0x1000
116 #define E1000_DEV_ID_82543GC_FIBER            0x1001
117 #define E1000_DEV_ID_82543GC_COPPER           0x1004
118 #define E1000_DEV_ID_82544EI_COPPER           0x1008
119 #define E1000_DEV_ID_82544EI_FIBER            0x1009
120 #define E1000_DEV_ID_82544GC_COPPER           0x100C
121 #define E1000_DEV_ID_82544GC_LOM              0x100D
122 #define E1000_DEV_ID_82540EM                  0x100E
123 #define E1000_DEV_ID_82540EM_LOM              0x1015
124 #define E1000_DEV_ID_82540EP_LOM              0x1016
125 #define E1000_DEV_ID_82540EP                  0x1017
126 #define E1000_DEV_ID_82540EP_LP               0x101E
127 #define E1000_DEV_ID_82545EM_COPPER           0x100F
128 #define E1000_DEV_ID_82545EM_FIBER            0x1011
129 #define E1000_DEV_ID_82545GM_COPPER           0x1026
130 #define E1000_DEV_ID_82545GM_FIBER            0x1027
131 #define E1000_DEV_ID_82545GM_SERDES           0x1028
132 #define E1000_DEV_ID_82546EB_COPPER           0x1010
133 #define E1000_DEV_ID_82546EB_FIBER            0x1012
134 #define E1000_DEV_ID_82546EB_QUAD_COPPER      0x101D
135 #define E1000_DEV_ID_82546GB_COPPER           0x1079
136 #define E1000_DEV_ID_82546GB_FIBER            0x107A
137 #define E1000_DEV_ID_82546GB_SERDES           0x107B
138 #define E1000_DEV_ID_82546GB_PCIE             0x108A
139 #define E1000_DEV_ID_82546GB_QUAD_COPPER      0x1099
140 #define E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 0x10B5
141 #define E1000_DEV_ID_82541EI                  0x1013
142 #define E1000_DEV_ID_82541EI_MOBILE           0x1018
143 #define E1000_DEV_ID_82541ER_LOM              0x1014
144 #define E1000_DEV_ID_82541ER                  0x1078
145 #define E1000_DEV_ID_82541GI                  0x1076
146 #define E1000_DEV_ID_82541GI_LF               0x107C
147 #define E1000_DEV_ID_82541GI_MOBILE           0x1077
148 #define E1000_DEV_ID_82547EI                  0x1019
149 #define E1000_DEV_ID_82547EI_MOBILE           0x101A
150 #define E1000_DEV_ID_82547GI                  0x1075
151 #define E1000_DEV_ID_82571EB_COPPER           0x105E
152 #define E1000_DEV_ID_82571EB_FIBER            0x105F
153 #define E1000_DEV_ID_82571EB_SERDES           0x1060
154 #define E1000_DEV_ID_82571EB_SERDES_DUAL      0x10D9
155 #define E1000_DEV_ID_82571EB_SERDES_QUAD      0x10DA
156 #define E1000_DEV_ID_82571EB_QUAD_COPPER      0x10A4
157 #define E1000_DEV_ID_82571PT_QUAD_COPPER      0x10D5
158 #define E1000_DEV_ID_82571EB_QUAD_FIBER       0x10A5
159 #define E1000_DEV_ID_82571EB_QUAD_COPPER_LP   0x10BC
160 #define E1000_DEV_ID_82572EI_COPPER           0x107D
161 #define E1000_DEV_ID_82572EI_FIBER            0x107E
162 #define E1000_DEV_ID_82572EI_SERDES           0x107F
163 #define E1000_DEV_ID_82572EI                  0x10B9
164 #define E1000_DEV_ID_82573E                   0x108B
165 #define E1000_DEV_ID_82573E_IAMT              0x108C
166 #define E1000_DEV_ID_82573L                   0x109A
167 #define E1000_DEV_ID_82574L                   0x10D3
168 #define E1000_DEV_ID_82574LA                  0x10F6
169 #define E1000_DEV_ID_82583V                   0x150C
170 #define E1000_DEV_ID_80003ES2LAN_COPPER_DPT   0x1096
171 #define E1000_DEV_ID_80003ES2LAN_SERDES_DPT   0x1098
172 #define E1000_DEV_ID_80003ES2LAN_COPPER_SPT   0x10BA
173 #define E1000_DEV_ID_80003ES2LAN_SERDES_SPT   0x10BB
174 #define E1000_DEV_ID_ICH8_82567V_3            0x1501
175 #define E1000_DEV_ID_ICH8_IGP_M_AMT           0x1049
176 #define E1000_DEV_ID_ICH8_IGP_AMT             0x104A
177 #define E1000_DEV_ID_ICH8_IGP_C               0x104B
178 #define E1000_DEV_ID_ICH8_IFE                 0x104C
179 #define E1000_DEV_ID_ICH8_IFE_GT              0x10C4
180 #define E1000_DEV_ID_ICH8_IFE_G               0x10C5
181 #define E1000_DEV_ID_ICH8_IGP_M               0x104D
182 #define E1000_DEV_ID_ICH9_IGP_M               0x10BF
183 #define E1000_DEV_ID_ICH9_IGP_M_AMT           0x10F5
184 #define E1000_DEV_ID_ICH9_IGP_M_V             0x10CB
185 #define E1000_DEV_ID_ICH9_IGP_AMT             0x10BD
186 #define E1000_DEV_ID_ICH9_BM                  0x10E5
187 #define E1000_DEV_ID_ICH9_IGP_C               0x294C
188 #define E1000_DEV_ID_ICH9_IFE                 0x10C0
189 #define E1000_DEV_ID_ICH9_IFE_GT              0x10C3
190 #define E1000_DEV_ID_ICH9_IFE_G               0x10C2
191 #define E1000_DEV_ID_ICH10_R_BM_LM            0x10CC
192 #define E1000_DEV_ID_ICH10_R_BM_LF            0x10CD
193 #define E1000_DEV_ID_ICH10_R_BM_V             0x10CE
194 #define E1000_DEV_ID_ICH10_D_BM_LM            0x10DE
195 #define E1000_DEV_ID_ICH10_D_BM_LF            0x10DF
196 #define E1000_DEV_ID_ICH10_D_BM_V             0x1525
197
198 #define E1000_DEV_ID_PCH_M_HV_LM              0x10EA
199 #define E1000_DEV_ID_PCH_M_HV_LC              0x10EB
200 #define E1000_DEV_ID_PCH_D_HV_DM              0x10EF
201 #define E1000_DEV_ID_PCH_D_HV_DC              0x10F0
202 #define E1000_DEV_ID_PCH2_LV_LM               0x1502
203 #define E1000_DEV_ID_PCH2_LV_V                0x1503
204
205 /*
206  * Tested (supported) on VM emulated HW.
207  */
208
209 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82540EM)
210 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82545EM_COPPER)
211 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82545EM_FIBER)
212
213 /*
214  * Tested (supported) on real HW.
215  */
216
217 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_COPPER)
218 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_FIBER)
219 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_SERDES)
220 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL)
221 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD)
222 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER)
223 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER)
224 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER)
225 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP)
226 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82572EI_COPPER)
227 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82572EI_FIBER)
228 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82572EI_SERDES)
229 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82572EI)
230 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82573L)
231 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82574L)
232 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82574LA)
233
234 /******************** Physical IGB devices from e1000_hw.h ********************/
235
236 #define E1000_DEV_ID_82576                      0x10C9
237 #define E1000_DEV_ID_82576_FIBER                0x10E6
238 #define E1000_DEV_ID_82576_SERDES               0x10E7
239 #define E1000_DEV_ID_82576_QUAD_COPPER          0x10E8
240 #define E1000_DEV_ID_82576_QUAD_COPPER_ET2      0x1526
241 #define E1000_DEV_ID_82576_NS                   0x150A
242 #define E1000_DEV_ID_82576_NS_SERDES            0x1518
243 #define E1000_DEV_ID_82576_SERDES_QUAD          0x150D
244 #define E1000_DEV_ID_82575EB_COPPER             0x10A7
245 #define E1000_DEV_ID_82575EB_FIBER_SERDES       0x10A9
246 #define E1000_DEV_ID_82575GB_QUAD_COPPER        0x10D6
247 #define E1000_DEV_ID_82580_COPPER               0x150E
248 #define E1000_DEV_ID_82580_FIBER                0x150F
249 #define E1000_DEV_ID_82580_SERDES               0x1510
250 #define E1000_DEV_ID_82580_SGMII                0x1511
251 #define E1000_DEV_ID_82580_COPPER_DUAL          0x1516
252 #define E1000_DEV_ID_82580_QUAD_FIBER           0x1527
253 #define E1000_DEV_ID_I350_COPPER                0x1521
254 #define E1000_DEV_ID_I350_FIBER                 0x1522
255 #define E1000_DEV_ID_I350_SERDES                0x1523
256 #define E1000_DEV_ID_I350_SGMII                 0x1524
257 #define E1000_DEV_ID_I350_DA4                   0x1546
258 #define E1000_DEV_ID_I210_COPPER                0x1533
259 #define E1000_DEV_ID_I210_COPPER_OEM1           0x1534
260 #define E1000_DEV_ID_I210_COPPER_IT             0x1535
261 #define E1000_DEV_ID_I210_FIBER                 0x1536
262 #define E1000_DEV_ID_I210_SERDES                0x1537
263 #define E1000_DEV_ID_I210_SGMII                 0x1538
264 #define E1000_DEV_ID_I211_COPPER                0x1539
265 #define E1000_DEV_ID_DH89XXCC_SGMII             0x0438
266 #define E1000_DEV_ID_DH89XXCC_SERDES            0x043A
267 #define E1000_DEV_ID_DH89XXCC_BACKPLANE         0x043C
268 #define E1000_DEV_ID_DH89XXCC_SFP               0x0440
269
270 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576)
271 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_FIBER)
272 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_SERDES)
273 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_QUAD_COPPER)
274 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2)
275 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_NS)
276 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_NS_SERDES)
277 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_SERDES_QUAD)
278
279 /* This device is the on-board NIC on some development boards. */
280 #ifdef RTE_PCI_DEV_USE_82575EB_COPPER
281 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82575EB_COPPER)
282 #endif
283
284 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES)
285 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER)
286
287 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_COPPER)
288 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_FIBER)
289 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_SERDES)
290 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_SGMII)
291 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_COPPER_DUAL)
292 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_QUAD_FIBER)
293
294 /* This device is the on-board NIC on some development boards. */
295 #ifndef RTE_PCI_DEV_NO_USE_I350_COPPER
296 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_COPPER)
297 #endif
298
299 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_FIBER)
300 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_SERDES)
301 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_SGMII)
302 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_DA4)
303 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_COPPER)
304 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_COPPER_OEM1)
305 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_COPPER_IT)
306 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_FIBER)
307 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_SERDES)
308 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_SGMII)
309 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I211_COPPER)
310 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_SGMII)
311 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_SERDES)
312 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE)
313 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_SFP)
314
315 /****************** Physical IXGBE devices from ixgbe_type.h ******************/
316 #ifdef RTE_LIBRTE_IXGBE_PMD
317
318 #define IXGBE_DEV_ID_82598                      0x10B6
319 #define IXGBE_DEV_ID_82598_BX                   0x1508
320 #define IXGBE_DEV_ID_82598AF_DUAL_PORT          0x10C6
321 #define IXGBE_DEV_ID_82598AF_SINGLE_PORT        0x10C7
322 #define IXGBE_DEV_ID_82598AT                    0x10C8
323 #define IXGBE_DEV_ID_82598AT2                   0x150B
324 #define IXGBE_DEV_ID_82598EB_SFP_LOM            0x10DB
325 #define IXGBE_DEV_ID_82598EB_CX4                0x10DD
326 #define IXGBE_DEV_ID_82598_CX4_DUAL_PORT        0x10EC
327 #define IXGBE_DEV_ID_82598_DA_DUAL_PORT         0x10F1
328 #define IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM      0x10E1
329 #define IXGBE_DEV_ID_82598EB_XF_LR              0x10F4
330 #define IXGBE_DEV_ID_82599_KX4                  0x10F7
331 #define IXGBE_DEV_ID_82599_KX4_MEZZ             0x1514
332 #define IXGBE_DEV_ID_82599_KR                   0x1517
333 #define IXGBE_DEV_ID_82599_COMBO_BACKPLANE      0x10F8
334 #define IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ       0x000C
335 #define IXGBE_DEV_ID_82599_CX4                  0x10F9
336 #define IXGBE_DEV_ID_82599_SFP                  0x10FB
337 #define IXGBE_SUBDEV_ID_82599_SFP               0x11A9
338 #define IXGBE_DEV_ID_82599_BACKPLANE_FCOE       0x152A
339 #define IXGBE_DEV_ID_82599_SFP_FCOE             0x1529
340 #define IXGBE_DEV_ID_82599_SFP_EM               0x1507
341 #define IXGBE_DEV_ID_82599EN_SFP                0x1557
342 #define IXGBE_DEV_ID_82599_XAUI_LOM             0x10FC
343 #define IXGBE_DEV_ID_82599_T3_LOM               0x151C
344 #define IXGBE_DEV_ID_X540T                      0x1528
345
346 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598)
347 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_BX)
348 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT)
349 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT)
350 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AT)
351 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AT2)
352 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM)
353 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_CX4)
354 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT)
355 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT)
356 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM)
357 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_XF_LR)
358 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KX4)
359 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ)
360 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KR)
361 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE)
362 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
363 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_CX4)
364 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP)
365 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_SFP)
366 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE)
367 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_FCOE)
368 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_EM)
369 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599EN_SFP)
370 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_XAUI_LOM)
371 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_T3_LOM)
372 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540T)
373
374 #endif /* RTE_LIBRTE_IXGBE_PMD */
375
376 /*
377  * Undef all RTE_PCI_DEV_ID_DECL_* here.
378  */
379 #undef RTE_PCI_DEV_ID_DECL_EM
380 #undef RTE_PCI_DEV_ID_DECL_IGB
381 #undef RTE_PCI_DEV_ID_DECL_IGBVF