virtio: add new driver
[dpdk.git] / lib / librte_eal / common / include / rte_pci_dev_ids.h
1 /*-
2  * This file is provided under a dual BSD/GPLv2 license.  When using or
3  *   redistributing this file, you may do so under either license.
4  * 
5  *   GPL LICENSE SUMMARY
6  * 
7  *   Copyright(c) 2010-2013 Intel Corporation. All rights reserved.
8  * 
9  *   This program is free software; you can redistribute it and/or modify
10  *   it under the terms of version 2 of the GNU General Public License as
11  *   published by the Free Software Foundation.
12  * 
13  *   This program is distributed in the hope that it will be useful, but
14  *   WITHOUT ANY WARRANTY; without even the implied warranty of
15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
16  *   General Public License for more details.
17  * 
18  *   You should have received a copy of the GNU General Public License
19  *   along with this program; if not, write to the Free Software
20  *   Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21  *   The full GNU General Public License is included in this distribution
22  *   in the file called LICENSE.GPL.
23  * 
24  *   Contact Information:
25  *   Intel Corporation
26  * 
27  *   BSD LICENSE
28  * 
29  *   Copyright(c) 2010-2013 Intel Corporation. All rights reserved.
30  *   All rights reserved.
31  * 
32  *   Redistribution and use in source and binary forms, with or without
33  *   modification, are permitted provided that the following conditions
34  *   are met:
35  * 
36  *     * Redistributions of source code must retain the above copyright
37  *       notice, this list of conditions and the following disclaimer.
38  *     * Redistributions in binary form must reproduce the above copyright
39  *       notice, this list of conditions and the following disclaimer in
40  *       the documentation and/or other materials provided with the
41  *       distribution.
42  *     * Neither the name of Intel Corporation nor the names of its
43  *       contributors may be used to endorse or promote products derived
44  *       from this software without specific prior written permission.
45  * 
46  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
47  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
48  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
49  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
50  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
51  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
52  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
53  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
54  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
55  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
56  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
57  * 
58  */
59
60 /**
61  * @file
62  *
63  * This file contains a list of the PCI device IDs recognised by DPDK, which
64  * can be used to fill out an array of structures describing the devices.
65  *
66  * Currently four families of devices are recognised: those supported by the
67  * IGB driver, by EM driver, those supported by the IXGBE driver, and by virtio
68  * driver which is a para virtualization driver running in guest virtual machine.
69  * The inclusion of these in an array built using this file depends on the
70  * definition of
71  * RTE_PCI_DEV_ID_DECL_EM
72  * RTE_PCI_DEV_ID_DECL_IGB
73  * RTE_PCI_DEV_ID_DECL_IGBVF
74  * RTE_PCI_DEV_ID_DECL_IXGBE
75  * RTE_PCI_DEV_ID_DECL_IXGBEVF
76  * RTE_PCI_DEV_ID_DECL_VIRTIO
77  * at the time when this file is included.
78  *
79  * In order to populate an array, the user of this file must define this macro:
80  * RTE_PCI_DEV_ID_DECL_IXGBE(vendorID, deviceID). For example:
81  *
82  * @code
83  * struct device {
84  *     int vend;
85  *     int dev;
86  * };
87  *
88  * struct device devices[] = {
89  * #define RTE_PCI_DEV_ID_DECL_IXGBE(vendorID, deviceID) {vend, dev},
90  * #include <rte_pci_dev_ids.h>
91  * };
92  * @endcode
93  *
94  * Note that this file can be included multiple times within the same file.
95  */
96
97 #ifndef RTE_PCI_DEV_ID_DECL_EM
98 #define RTE_PCI_DEV_ID_DECL_EM(vend, dev)
99 #endif
100
101 #ifndef RTE_PCI_DEV_ID_DECL_IGB
102 #define RTE_PCI_DEV_ID_DECL_IGB(vend, dev)
103 #endif
104
105 #ifndef RTE_PCI_DEV_ID_DECL_IGBVF
106 #define RTE_PCI_DEV_ID_DECL_IGBVF(vend, dev)
107 #endif
108
109 #ifndef RTE_PCI_DEV_ID_DECL_IXGBE
110 #define RTE_PCI_DEV_ID_DECL_IXGBE(vend, dev)
111 #endif
112
113 #ifndef RTE_PCI_DEV_ID_DECL_IXGBEVF
114 #define RTE_PCI_DEV_ID_DECL_IXGBEVF(vend, dev)
115 #endif
116
117 #ifndef RTE_PCI_DEV_ID_DECL_VIRTIO
118 #define RTE_PCI_DEV_ID_DECL_VIRTIO(vend, dev)
119 #endif
120
121 #ifndef PCI_VENDOR_ID_INTEL
122 /** Vendor ID used by Intel devices */
123 #define PCI_VENDOR_ID_INTEL 0x8086
124 #endif
125
126 #ifndef PCI_VENDOR_ID_QUMRANET
127 /** Vendor ID used by virtio devices */
128 #define PCI_VENDOR_ID_QUMRANET 0x1AF4
129 #endif
130
131 /******************** Physical EM devices from e1000_hw.h ********************/
132
133 #define E1000_DEV_ID_82542                    0x1000
134 #define E1000_DEV_ID_82543GC_FIBER            0x1001
135 #define E1000_DEV_ID_82543GC_COPPER           0x1004
136 #define E1000_DEV_ID_82544EI_COPPER           0x1008
137 #define E1000_DEV_ID_82544EI_FIBER            0x1009
138 #define E1000_DEV_ID_82544GC_COPPER           0x100C
139 #define E1000_DEV_ID_82544GC_LOM              0x100D
140 #define E1000_DEV_ID_82540EM                  0x100E
141 #define E1000_DEV_ID_82540EM_LOM              0x1015
142 #define E1000_DEV_ID_82540EP_LOM              0x1016
143 #define E1000_DEV_ID_82540EP                  0x1017
144 #define E1000_DEV_ID_82540EP_LP               0x101E
145 #define E1000_DEV_ID_82545EM_COPPER           0x100F
146 #define E1000_DEV_ID_82545EM_FIBER            0x1011
147 #define E1000_DEV_ID_82545GM_COPPER           0x1026
148 #define E1000_DEV_ID_82545GM_FIBER            0x1027
149 #define E1000_DEV_ID_82545GM_SERDES           0x1028
150 #define E1000_DEV_ID_82546EB_COPPER           0x1010
151 #define E1000_DEV_ID_82546EB_FIBER            0x1012
152 #define E1000_DEV_ID_82546EB_QUAD_COPPER      0x101D
153 #define E1000_DEV_ID_82546GB_COPPER           0x1079
154 #define E1000_DEV_ID_82546GB_FIBER            0x107A
155 #define E1000_DEV_ID_82546GB_SERDES           0x107B
156 #define E1000_DEV_ID_82546GB_PCIE             0x108A
157 #define E1000_DEV_ID_82546GB_QUAD_COPPER      0x1099
158 #define E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 0x10B5
159 #define E1000_DEV_ID_82541EI                  0x1013
160 #define E1000_DEV_ID_82541EI_MOBILE           0x1018
161 #define E1000_DEV_ID_82541ER_LOM              0x1014
162 #define E1000_DEV_ID_82541ER                  0x1078
163 #define E1000_DEV_ID_82541GI                  0x1076
164 #define E1000_DEV_ID_82541GI_LF               0x107C
165 #define E1000_DEV_ID_82541GI_MOBILE           0x1077
166 #define E1000_DEV_ID_82547EI                  0x1019
167 #define E1000_DEV_ID_82547EI_MOBILE           0x101A
168 #define E1000_DEV_ID_82547GI                  0x1075
169 #define E1000_DEV_ID_82571EB_COPPER           0x105E
170 #define E1000_DEV_ID_82571EB_FIBER            0x105F
171 #define E1000_DEV_ID_82571EB_SERDES           0x1060
172 #define E1000_DEV_ID_82571EB_SERDES_DUAL      0x10D9
173 #define E1000_DEV_ID_82571EB_SERDES_QUAD      0x10DA
174 #define E1000_DEV_ID_82571EB_QUAD_COPPER      0x10A4
175 #define E1000_DEV_ID_82571PT_QUAD_COPPER      0x10D5
176 #define E1000_DEV_ID_82571EB_QUAD_FIBER       0x10A5
177 #define E1000_DEV_ID_82571EB_QUAD_COPPER_LP   0x10BC
178 #define E1000_DEV_ID_82572EI_COPPER           0x107D
179 #define E1000_DEV_ID_82572EI_FIBER            0x107E
180 #define E1000_DEV_ID_82572EI_SERDES           0x107F
181 #define E1000_DEV_ID_82572EI                  0x10B9
182 #define E1000_DEV_ID_82573E                   0x108B
183 #define E1000_DEV_ID_82573E_IAMT              0x108C
184 #define E1000_DEV_ID_82573L                   0x109A
185 #define E1000_DEV_ID_82574L                   0x10D3
186 #define E1000_DEV_ID_82574LA                  0x10F6
187 #define E1000_DEV_ID_82583V                   0x150C
188 #define E1000_DEV_ID_80003ES2LAN_COPPER_DPT   0x1096
189 #define E1000_DEV_ID_80003ES2LAN_SERDES_DPT   0x1098
190 #define E1000_DEV_ID_80003ES2LAN_COPPER_SPT   0x10BA
191 #define E1000_DEV_ID_80003ES2LAN_SERDES_SPT   0x10BB
192 #define E1000_DEV_ID_ICH8_82567V_3            0x1501
193 #define E1000_DEV_ID_ICH8_IGP_M_AMT           0x1049
194 #define E1000_DEV_ID_ICH8_IGP_AMT             0x104A
195 #define E1000_DEV_ID_ICH8_IGP_C               0x104B
196 #define E1000_DEV_ID_ICH8_IFE                 0x104C
197 #define E1000_DEV_ID_ICH8_IFE_GT              0x10C4
198 #define E1000_DEV_ID_ICH8_IFE_G               0x10C5
199 #define E1000_DEV_ID_ICH8_IGP_M               0x104D
200 #define E1000_DEV_ID_ICH9_IGP_M               0x10BF
201 #define E1000_DEV_ID_ICH9_IGP_M_AMT           0x10F5
202 #define E1000_DEV_ID_ICH9_IGP_M_V             0x10CB
203 #define E1000_DEV_ID_ICH9_IGP_AMT             0x10BD
204 #define E1000_DEV_ID_ICH9_BM                  0x10E5
205 #define E1000_DEV_ID_ICH9_IGP_C               0x294C
206 #define E1000_DEV_ID_ICH9_IFE                 0x10C0
207 #define E1000_DEV_ID_ICH9_IFE_GT              0x10C3
208 #define E1000_DEV_ID_ICH9_IFE_G               0x10C2
209 #define E1000_DEV_ID_ICH10_R_BM_LM            0x10CC
210 #define E1000_DEV_ID_ICH10_R_BM_LF            0x10CD
211 #define E1000_DEV_ID_ICH10_R_BM_V             0x10CE
212 #define E1000_DEV_ID_ICH10_D_BM_LM            0x10DE
213 #define E1000_DEV_ID_ICH10_D_BM_LF            0x10DF
214 #define E1000_DEV_ID_ICH10_D_BM_V             0x1525
215
216 #define E1000_DEV_ID_PCH_M_HV_LM              0x10EA
217 #define E1000_DEV_ID_PCH_M_HV_LC              0x10EB
218 #define E1000_DEV_ID_PCH_D_HV_DM              0x10EF
219 #define E1000_DEV_ID_PCH_D_HV_DC              0x10F0
220 #define E1000_DEV_ID_PCH2_LV_LM               0x1502
221 #define E1000_DEV_ID_PCH2_LV_V                0x1503
222
223 /*
224  * Tested (supported) on VM emulated HW.
225  */
226
227 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82540EM)
228 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82545EM_COPPER)
229 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82545EM_FIBER)
230
231 /*
232  * Tested (supported) on real HW.
233  */
234
235 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_COPPER)
236 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_FIBER)
237 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_SERDES)
238 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL)
239 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD)
240 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER)
241 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER)
242 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER)
243 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP)
244 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82572EI_COPPER)
245 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82572EI_FIBER)
246 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82572EI_SERDES)
247 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82572EI)
248 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82573L)
249 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82574L)
250 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82574LA)
251
252 /******************** Physical IGB devices from e1000_hw.h ********************/
253
254 #define E1000_DEV_ID_82576                      0x10C9
255 #define E1000_DEV_ID_82576_FIBER                0x10E6
256 #define E1000_DEV_ID_82576_SERDES               0x10E7
257 #define E1000_DEV_ID_82576_QUAD_COPPER          0x10E8
258 #define E1000_DEV_ID_82576_QUAD_COPPER_ET2      0x1526
259 #define E1000_DEV_ID_82576_NS                   0x150A
260 #define E1000_DEV_ID_82576_NS_SERDES            0x1518
261 #define E1000_DEV_ID_82576_SERDES_QUAD          0x150D
262 #define E1000_DEV_ID_82575EB_COPPER             0x10A7
263 #define E1000_DEV_ID_82575EB_FIBER_SERDES       0x10A9
264 #define E1000_DEV_ID_82575GB_QUAD_COPPER        0x10D6
265 #define E1000_DEV_ID_82580_COPPER               0x150E
266 #define E1000_DEV_ID_82580_FIBER                0x150F
267 #define E1000_DEV_ID_82580_SERDES               0x1510
268 #define E1000_DEV_ID_82580_SGMII                0x1511
269 #define E1000_DEV_ID_82580_COPPER_DUAL          0x1516
270 #define E1000_DEV_ID_82580_QUAD_FIBER           0x1527
271 #define E1000_DEV_ID_I350_COPPER                0x1521
272 #define E1000_DEV_ID_I350_FIBER                 0x1522
273 #define E1000_DEV_ID_I350_SERDES                0x1523
274 #define E1000_DEV_ID_I350_SGMII                 0x1524
275 #define E1000_DEV_ID_I350_DA4                   0x1546
276 #define E1000_DEV_ID_I210_COPPER                0x1533
277 #define E1000_DEV_ID_I210_COPPER_OEM1           0x1534
278 #define E1000_DEV_ID_I210_COPPER_IT             0x1535
279 #define E1000_DEV_ID_I210_FIBER                 0x1536
280 #define E1000_DEV_ID_I210_SERDES                0x1537
281 #define E1000_DEV_ID_I210_SGMII                 0x1538
282 #define E1000_DEV_ID_I211_COPPER                0x1539
283 #define E1000_DEV_ID_DH89XXCC_SGMII             0x0438
284 #define E1000_DEV_ID_DH89XXCC_SERDES            0x043A
285 #define E1000_DEV_ID_DH89XXCC_BACKPLANE         0x043C
286 #define E1000_DEV_ID_DH89XXCC_SFP               0x0440
287
288 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576)
289 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_FIBER)
290 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_SERDES)
291 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_QUAD_COPPER)
292 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2)
293 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_NS)
294 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_NS_SERDES)
295 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_SERDES_QUAD)
296
297 /* This device is the on-board NIC on some development boards. */
298 #ifdef RTE_PCI_DEV_USE_82575EB_COPPER
299 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82575EB_COPPER)
300 #endif
301
302 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES)
303 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER)
304
305 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_COPPER)
306 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_FIBER)
307 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_SERDES)
308 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_SGMII)
309 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_COPPER_DUAL)
310 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_QUAD_FIBER)
311
312 /* This device is the on-board NIC on some development boards. */
313 #ifndef RTE_PCI_DEV_NO_USE_I350_COPPER
314 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_COPPER)
315 #endif
316
317 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_FIBER)
318 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_SERDES)
319 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_SGMII)
320 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_DA4)
321 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_COPPER)
322 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_COPPER_OEM1)
323 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_COPPER_IT)
324 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_FIBER)
325 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_SERDES)
326 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_SGMII)
327 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I211_COPPER)
328 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_SGMII)
329 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_SERDES)
330 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE)
331 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_SFP)
332
333 /****************** Physical IXGBE devices from ixgbe_type.h ******************/
334
335 #define IXGBE_DEV_ID_82598                      0x10B6
336 #define IXGBE_DEV_ID_82598_BX                   0x1508
337 #define IXGBE_DEV_ID_82598AF_DUAL_PORT          0x10C6
338 #define IXGBE_DEV_ID_82598AF_SINGLE_PORT        0x10C7
339 #define IXGBE_DEV_ID_82598AT                    0x10C8
340 #define IXGBE_DEV_ID_82598AT2                   0x150B
341 #define IXGBE_DEV_ID_82598EB_SFP_LOM            0x10DB
342 #define IXGBE_DEV_ID_82598EB_CX4                0x10DD
343 #define IXGBE_DEV_ID_82598_CX4_DUAL_PORT        0x10EC
344 #define IXGBE_DEV_ID_82598_DA_DUAL_PORT         0x10F1
345 #define IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM      0x10E1
346 #define IXGBE_DEV_ID_82598EB_XF_LR              0x10F4
347 #define IXGBE_DEV_ID_82599_KX4                  0x10F7
348 #define IXGBE_DEV_ID_82599_KX4_MEZZ             0x1514
349 #define IXGBE_DEV_ID_82599_KR                   0x1517
350 #define IXGBE_DEV_ID_82599_COMBO_BACKPLANE      0x10F8
351 #define IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ       0x000C
352 #define IXGBE_DEV_ID_82599_CX4                  0x10F9
353 #define IXGBE_DEV_ID_82599_SFP                  0x10FB
354 #define IXGBE_SUBDEV_ID_82599_SFP               0x11A9
355 #define IXGBE_SUBDEV_ID_82599_RNDC              0x1F72
356 #define IXGBE_SUBDEV_ID_82599_560FLR            0x17D0
357 #define IXGBE_SUBDEV_ID_82599_ECNA_DP           0x0470
358 #define IXGBE_DEV_ID_82599_BACKPLANE_FCOE       0x152A
359 #define IXGBE_DEV_ID_82599_SFP_FCOE             0x1529
360 #define IXGBE_DEV_ID_82599_SFP_EM               0x1507
361 #define IXGBE_DEV_ID_82599_SFP_SF2              0x154D
362 #define IXGBE_DEV_ID_82599_SFP_SF_QP            0x154A
363 #define IXGBE_DEV_ID_82599EN_SFP                0x1557
364 #define IXGBE_DEV_ID_82599_XAUI_LOM             0x10FC
365 #define IXGBE_DEV_ID_82599_T3_LOM               0x151C
366 #define IXGBE_DEV_ID_X540T                      0x1528
367 #define IXGBE_DEV_ID_X540T1                     0x1560
368
369 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598)
370 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_BX)
371 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT)
372 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, \
373         IXGBE_DEV_ID_82598AF_SINGLE_PORT)
374 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AT)
375 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AT2)
376 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM)
377 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_CX4)
378 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT)
379 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT)
380 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, \
381         IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM)
382 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_XF_LR)
383 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KX4)
384 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ)
385 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KR)
386 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, \
387         IXGBE_DEV_ID_82599_COMBO_BACKPLANE)
388 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, \
389         IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
390 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_CX4)
391 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP)
392 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_SFP)
393 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_RNDC)
394 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_560FLR)
395 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_ECNA_DP)
396 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE)
397 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_FCOE)
398 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_EM)
399 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_SF2)
400 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP)
401 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599EN_SFP)
402 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_XAUI_LOM)
403 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_T3_LOM)
404 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540T)
405 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540T1)
406
407 /****************** Virtual IGB devices from e1000_hw.h ******************/
408
409 #define E1000_DEV_ID_82576_VF                   0x10CA
410 #define E1000_DEV_ID_82576_VF_HV                0x152D
411 #define E1000_DEV_ID_I350_VF                    0x1520
412 #define E1000_DEV_ID_I350_VF_HV                 0x152F
413
414 RTE_PCI_DEV_ID_DECL_IGBVF(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_VF)
415 RTE_PCI_DEV_ID_DECL_IGBVF(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_VF_HV)
416 RTE_PCI_DEV_ID_DECL_IGBVF(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_VF)
417 RTE_PCI_DEV_ID_DECL_IGBVF(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_VF_HV)
418
419 /****************** Virtual IXGBE devices from ixgbe_type.h ******************/
420
421 #define IXGBE_DEV_ID_82599_VF                   0x10ED
422 #define IXGBE_DEV_ID_82599_VF_HV                0x152E
423 #define IXGBE_DEV_ID_X540_VF                    0x1515
424 #define IXGBE_DEV_ID_X540_VF_HV                 0x1530
425
426 RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_VF)
427 RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_VF_HV)
428 RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540_VF)
429 RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540_VF_HV)
430
431 /****************** Virtio devices from virtio.h ******************/
432
433 #define QUMRANET_DEV_ID_VIRTIO                          0x1000
434
435 RTE_PCI_DEV_ID_DECL_VIRTIO(PCI_VENDOR_ID_QUMRANET, QUMRANET_DEV_ID_VIRTIO)
436
437 /*
438  * Undef all RTE_PCI_DEV_ID_DECL_* here.
439  */
440 #undef RTE_PCI_DEV_ID_DECL_EM
441 #undef RTE_PCI_DEV_ID_DECL_IGB
442 #undef RTE_PCI_DEV_ID_DECL_IGBVF
443 #undef RTE_PCI_DEV_ID_DECL_IXGBE
444 #undef RTE_PCI_DEV_ID_DECL_IXGBEVF
445 #undef RTE_PCI_DEV_ID_DECL_VIRTIO