4 * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 * The full GNU General Public License is included in this distribution
19 * in the file called LICENSE.GPL.
21 * Contact Information:
25 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
27 #include <linux/device.h>
28 #include <linux/module.h>
29 #include <linux/pci.h>
30 #include <linux/uio_driver.h>
32 #include <linux/irq.h>
33 #include <linux/msi.h>
34 #include <linux/version.h>
35 #include <linux/slab.h>
37 #ifdef CONFIG_XEN_DOM0
40 #include <rte_pci_dev_features.h>
45 * A structure describing the private information for a uio device.
47 struct rte_uio_pci_dev {
50 enum rte_intr_mode mode;
53 static char *intr_mode;
54 static enum rte_intr_mode igbuio_intr_mode_preferred = RTE_INTR_MODE_MSIX;
58 show_max_vfs(struct device *dev, struct device_attribute *attr,
61 return snprintf(buf, 10, "%u\n", dev_num_vf(dev));
65 store_max_vfs(struct device *dev, struct device_attribute *attr,
66 const char *buf, size_t count)
69 unsigned long max_vfs;
70 struct pci_dev *pdev = to_pci_dev(dev);
72 if (0 != kstrtoul(buf, 0, &max_vfs))
76 pci_disable_sriov(pdev);
77 else if (0 == pci_num_vf(pdev))
78 err = pci_enable_sriov(pdev, max_vfs);
79 else /* do nothing if change max_vfs number */
82 return err ? err : count;
85 static DEVICE_ATTR(max_vfs, S_IRUGO | S_IWUSR, show_max_vfs, store_max_vfs);
87 static struct attribute *dev_attrs[] = {
88 &dev_attr_max_vfs.attr,
92 static const struct attribute_group dev_attr_grp = {
97 * This is the irqcontrol callback to be registered to uio_info.
98 * It can be used to disable/enable interrupt from user space processes.
101 * pointer to uio_info.
103 * state value. 1 to enable interrupt, 0 to disable interrupt.
107 * - On failure, a negative value.
110 igbuio_pci_irqcontrol(struct uio_info *info, s32 irq_state)
112 struct rte_uio_pci_dev *udev = info->priv;
113 struct pci_dev *pdev = udev->pdev;
116 struct irq_data *irq = irq_get_irq_data(udev->info.irq);
118 unsigned int irq = udev->info.irq;
121 pci_cfg_access_lock(pdev);
123 if (udev->mode == RTE_INTR_MODE_MSIX || udev->mode == RTE_INTR_MODE_MSI) {
124 #ifdef HAVE_PCI_MSI_MASK_IRQ
126 pci_msi_unmask_irq(irq);
128 pci_msi_mask_irq(irq);
137 if (udev->mode == RTE_INTR_MODE_LEGACY)
138 pci_intx(pdev, !!irq_state);
140 pci_cfg_access_unlock(pdev);
146 * This is interrupt handler which will check if the interrupt is for the right device.
147 * If yes, disable it here and will be enable later.
150 igbuio_pci_irqhandler(int irq, struct uio_info *info)
152 struct rte_uio_pci_dev *udev = info->priv;
154 /* Legacy mode need to mask in hardware */
155 if (udev->mode == RTE_INTR_MODE_LEGACY &&
156 !pci_check_and_mask_intx(udev->pdev))
159 /* Message signal mode, no share IRQ and automasked */
164 * This gets called while opening uio device file.
167 igbuio_pci_open(struct uio_info *info, struct inode *inode)
169 struct rte_uio_pci_dev *udev = info->priv;
170 struct pci_dev *dev = udev->pdev;
172 pci_reset_function(dev);
174 /* set bus master, which was cleared by the reset function */
181 igbuio_pci_release(struct uio_info *info, struct inode *inode)
183 struct rte_uio_pci_dev *udev = info->priv;
184 struct pci_dev *dev = udev->pdev;
186 /* stop the device from further DMA */
187 pci_clear_master(dev);
189 pci_reset_function(dev);
194 #ifdef CONFIG_XEN_DOM0
196 igbuio_dom0_mmap_phys(struct uio_info *info, struct vm_area_struct *vma)
200 idx = (int)vma->vm_pgoff;
201 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
202 #ifdef HAVE_PTE_MASK_PAGE_IOMAP
203 vma->vm_page_prot.pgprot |= _PAGE_IOMAP;
206 return remap_pfn_range(vma,
208 info->mem[idx].addr >> PAGE_SHIFT,
209 vma->vm_end - vma->vm_start,
214 * This is uio device mmap method which will use igbuio mmap for Xen
218 igbuio_dom0_pci_mmap(struct uio_info *info, struct vm_area_struct *vma)
222 if (vma->vm_pgoff >= MAX_UIO_MAPS)
225 if (info->mem[vma->vm_pgoff].size == 0)
228 idx = (int)vma->vm_pgoff;
229 switch (info->mem[idx].memtype) {
231 return igbuio_dom0_mmap_phys(info, vma);
232 case UIO_MEM_LOGICAL:
233 case UIO_MEM_VIRTUAL:
240 /* Remap pci resources described by bar #pci_bar in uio resource n. */
242 igbuio_pci_setup_iomem(struct pci_dev *dev, struct uio_info *info,
243 int n, int pci_bar, const char *name)
245 unsigned long addr, len;
248 if (n >= ARRAY_SIZE(info->mem))
251 addr = pci_resource_start(dev, pci_bar);
252 len = pci_resource_len(dev, pci_bar);
253 if (addr == 0 || len == 0)
255 internal_addr = ioremap(addr, len);
256 if (internal_addr == NULL)
258 info->mem[n].name = name;
259 info->mem[n].addr = addr;
260 info->mem[n].internal_addr = internal_addr;
261 info->mem[n].size = len;
262 info->mem[n].memtype = UIO_MEM_PHYS;
266 /* Get pci port io resources described by bar #pci_bar in uio resource n. */
268 igbuio_pci_setup_ioport(struct pci_dev *dev, struct uio_info *info,
269 int n, int pci_bar, const char *name)
271 unsigned long addr, len;
273 if (n >= ARRAY_SIZE(info->port))
276 addr = pci_resource_start(dev, pci_bar);
277 len = pci_resource_len(dev, pci_bar);
278 if (addr == 0 || len == 0)
281 info->port[n].name = name;
282 info->port[n].start = addr;
283 info->port[n].size = len;
284 info->port[n].porttype = UIO_PORT_X86;
289 /* Unmap previously ioremap'd resources */
291 igbuio_pci_release_iomem(struct uio_info *info)
295 for (i = 0; i < MAX_UIO_MAPS; i++) {
296 if (info->mem[i].internal_addr)
297 iounmap(info->mem[i].internal_addr);
302 igbuio_pci_enable_interrupts(struct rte_uio_pci_dev *udev)
305 #ifndef HAVE_ALLOC_IRQ_VECTORS
306 struct msix_entry msix_entry;
309 switch (igbuio_intr_mode_preferred) {
310 case RTE_INTR_MODE_MSIX:
311 /* Only 1 msi-x vector needed */
312 #ifndef HAVE_ALLOC_IRQ_VECTORS
313 msix_entry.entry = 0;
314 if (pci_enable_msix(udev->pdev, &msix_entry, 1) == 0) {
315 dev_dbg(&udev->pdev->dev, "using MSI-X");
316 udev->info.irq_flags = IRQF_NO_THREAD;
317 udev->info.irq = msix_entry.vector;
318 udev->mode = RTE_INTR_MODE_MSIX;
322 if (pci_alloc_irq_vectors(udev->pdev, 1, 1, PCI_IRQ_MSIX) == 1) {
323 dev_dbg(&udev->pdev->dev, "using MSI-X");
324 udev->info.irq_flags = IRQF_NO_THREAD;
325 udev->info.irq = pci_irq_vector(udev->pdev, 0);
326 udev->mode = RTE_INTR_MODE_MSIX;
330 /* fall back to MSI */
331 case RTE_INTR_MODE_MSI:
332 #ifndef HAVE_ALLOC_IRQ_VECTORS
333 if (pci_enable_msi(udev->pdev) == 0) {
334 dev_dbg(&udev->pdev->dev, "using MSI");
335 udev->info.irq_flags = IRQF_NO_THREAD;
336 udev->info.irq = udev->pdev->irq;
337 udev->mode = RTE_INTR_MODE_MSI;
341 if (pci_alloc_irq_vectors(udev->pdev, 1, 1, PCI_IRQ_MSI) == 1) {
342 dev_dbg(&udev->pdev->dev, "using MSI");
343 udev->info.irq_flags = IRQF_NO_THREAD;
344 udev->info.irq = pci_irq_vector(udev->pdev, 0);
345 udev->mode = RTE_INTR_MODE_MSI;
349 /* fall back to INTX */
350 case RTE_INTR_MODE_LEGACY:
351 if (pci_intx_mask_supported(udev->pdev)) {
352 dev_dbg(&udev->pdev->dev, "using INTX");
353 udev->info.irq_flags = IRQF_SHARED | IRQF_NO_THREAD;
354 udev->info.irq = udev->pdev->irq;
355 udev->mode = RTE_INTR_MODE_LEGACY;
358 dev_notice(&udev->pdev->dev, "PCI INTX mask not supported\n");
359 /* fall back to no IRQ */
360 case RTE_INTR_MODE_NONE:
361 udev->mode = RTE_INTR_MODE_NONE;
362 udev->info.irq = UIO_IRQ_NONE;
366 dev_err(&udev->pdev->dev, "invalid IRQ mode %u",
367 igbuio_intr_mode_preferred);
375 igbuio_pci_disable_interrupts(struct rte_uio_pci_dev *udev)
377 #ifndef HAVE_ALLOC_IRQ_VECTORS
378 if (udev->mode == RTE_INTR_MODE_MSIX)
379 pci_disable_msix(udev->pdev);
380 if (udev->mode == RTE_INTR_MODE_MSI)
381 pci_disable_msi(udev->pdev);
383 if (udev->mode == RTE_INTR_MODE_MSIX ||
384 udev->mode == RTE_INTR_MODE_MSI)
385 pci_free_irq_vectors(udev->pdev);
390 igbuio_setup_bars(struct pci_dev *dev, struct uio_info *info)
392 int i, iom, iop, ret;
394 static const char *bar_names[PCI_STD_RESOURCE_END + 1] = {
406 for (i = 0; i < ARRAY_SIZE(bar_names); i++) {
407 if (pci_resource_len(dev, i) != 0 &&
408 pci_resource_start(dev, i) != 0) {
409 flags = pci_resource_flags(dev, i);
410 if (flags & IORESOURCE_MEM) {
411 ret = igbuio_pci_setup_iomem(dev, info, iom,
416 } else if (flags & IORESOURCE_IO) {
417 ret = igbuio_pci_setup_ioport(dev, info, iop,
426 return (iom != 0 || iop != 0) ? ret : -ENOENT;
429 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0)
434 igbuio_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
436 struct rte_uio_pci_dev *udev;
437 dma_addr_t map_dma_addr;
441 udev = kzalloc(sizeof(struct rte_uio_pci_dev), GFP_KERNEL);
446 * enable device: ask low-level code to enable I/O and
449 err = pci_enable_device(dev);
451 dev_err(&dev->dev, "Cannot enable PCI device\n");
455 /* enable bus mastering on the device */
458 /* remap IO memory */
459 err = igbuio_setup_bars(dev, &udev->info);
461 goto fail_release_iomem;
463 /* set 64-bit DMA mask */
464 err = pci_set_dma_mask(dev, DMA_BIT_MASK(64));
466 dev_err(&dev->dev, "Cannot set DMA mask\n");
467 goto fail_release_iomem;
470 err = pci_set_consistent_dma_mask(dev, DMA_BIT_MASK(64));
472 dev_err(&dev->dev, "Cannot set consistent DMA mask\n");
473 goto fail_release_iomem;
477 udev->info.name = "igb_uio";
478 udev->info.version = "0.1";
479 udev->info.handler = igbuio_pci_irqhandler;
480 udev->info.irqcontrol = igbuio_pci_irqcontrol;
481 udev->info.open = igbuio_pci_open;
482 udev->info.release = igbuio_pci_release;
483 #ifdef CONFIG_XEN_DOM0
484 /* check if the driver run on Xen Dom0 */
485 if (xen_initial_domain())
486 udev->info.mmap = igbuio_dom0_pci_mmap;
488 udev->info.priv = udev;
491 err = igbuio_pci_enable_interrupts(udev);
493 goto fail_release_iomem;
495 err = sysfs_create_group(&dev->dev.kobj, &dev_attr_grp);
497 goto fail_disable_interrupts;
499 /* register uio driver */
500 err = uio_register_device(&dev->dev, &udev->info);
502 goto fail_remove_group;
504 pci_set_drvdata(dev, udev);
506 dev_info(&dev->dev, "uio device registered with irq %lx\n",
510 * Doing a harmless dma mapping for attaching the device to
511 * the iommu identity mapping if kernel boots with iommu=pt.
512 * Note this is not a problem if no IOMMU at all.
514 map_addr = dma_alloc_coherent(&dev->dev, 1024, &map_dma_addr,
517 memset(map_addr, 0, 1024);
520 dev_info(&dev->dev, "dma mapping failed\n");
522 dev_info(&dev->dev, "mapping 1K dma=%#llx host=%p\n",
523 (unsigned long long)map_dma_addr, map_addr);
525 dma_free_coherent(&dev->dev, 1024, map_addr, map_dma_addr);
526 dev_info(&dev->dev, "unmapping 1K dma=%#llx host=%p\n",
527 (unsigned long long)map_dma_addr, map_addr);
533 sysfs_remove_group(&dev->dev.kobj, &dev_attr_grp);
534 fail_disable_interrupts:
535 igbuio_pci_disable_interrupts(udev);
537 igbuio_pci_release_iomem(&udev->info);
538 pci_disable_device(dev);
546 igbuio_pci_remove(struct pci_dev *dev)
548 struct rte_uio_pci_dev *udev = pci_get_drvdata(dev);
550 sysfs_remove_group(&dev->dev.kobj, &dev_attr_grp);
551 uio_unregister_device(&udev->info);
552 igbuio_pci_disable_interrupts(udev);
553 igbuio_pci_release_iomem(&udev->info);
554 pci_disable_device(dev);
555 pci_set_drvdata(dev, NULL);
560 igbuio_config_intr_mode(char *intr_str)
563 pr_info("Use MSIX interrupt by default\n");
567 if (!strcmp(intr_str, RTE_INTR_MODE_MSIX_NAME)) {
568 igbuio_intr_mode_preferred = RTE_INTR_MODE_MSIX;
569 pr_info("Use MSIX interrupt\n");
570 } else if (!strcmp(intr_str, RTE_INTR_MODE_MSI_NAME)) {
571 igbuio_intr_mode_preferred = RTE_INTR_MODE_MSI;
572 pr_info("Use MSI interrupt\n");
573 } else if (!strcmp(intr_str, RTE_INTR_MODE_LEGACY_NAME)) {
574 igbuio_intr_mode_preferred = RTE_INTR_MODE_LEGACY;
575 pr_info("Use legacy interrupt\n");
577 pr_info("Error: bad parameter - %s\n", intr_str);
584 static struct pci_driver igbuio_pci_driver = {
587 .probe = igbuio_pci_probe,
588 .remove = igbuio_pci_remove,
592 igbuio_pci_init_module(void)
596 ret = igbuio_config_intr_mode(intr_mode);
600 return pci_register_driver(&igbuio_pci_driver);
604 igbuio_pci_exit_module(void)
606 pci_unregister_driver(&igbuio_pci_driver);
609 module_init(igbuio_pci_init_module);
610 module_exit(igbuio_pci_exit_module);
612 module_param(intr_mode, charp, S_IRUGO);
613 MODULE_PARM_DESC(intr_mode,
614 "igb_uio interrupt mode (default=msix):\n"
615 " " RTE_INTR_MODE_MSIX_NAME " Use MSIX interrupt\n"
616 " " RTE_INTR_MODE_MSI_NAME " Use MSI interrupt\n"
617 " " RTE_INTR_MODE_LEGACY_NAME " Use Legacy interrupt\n"
620 MODULE_DESCRIPTION("UIO driver for Intel IGB PCI cards");
621 MODULE_LICENSE("GPL");
622 MODULE_AUTHOR("Intel Corporation");