lib/librte_eal/linuxapp/kni/ethtool/igb/igb_main.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007-2013 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #include <linux/module.h>
  29 #include <linux/types.h>
  30 #include <linux/init.h>
  31 #include <linux/vmalloc.h>
  32 #include <linux/pagemap.h>
  33 #include <linux/netdevice.h>
  34 #include <linux/tcp.h>
  35 #ifdef NETIF_F_TSO
  36 #include <net/checksum.h>
  37 #ifdef NETIF_F_TSO6
  38 #include <linux/ipv6.h>
  39 #include <net/ip6_checksum.h>
  40 #endif
  41 #endif
  42 #ifdef SIOCGMIIPHY
  43 #include <linux/mii.h>
  44 #endif
  45 #ifdef SIOCETHTOOL
  46 #include <linux/ethtool.h>
  47 #endif
  48 #include <linux/if_vlan.h>
  49 #ifdef CONFIG_PM_RUNTIME
  50 #include <linux/pm_runtime.h>
  51 #endif /* CONFIG_PM_RUNTIME */
  52
  53 #include <linux/if_bridge.h>
  54 #include "igb.h"
  55 #include "igb_vmdq.h"
  56
  57 #include <linux/uio_driver.h>
  58
  59 #if defined(DEBUG) || defined (DEBUG_DUMP) || defined (DEBUG_ICR) || defined(DEBUG_ITR)
  60 #define DRV_DEBUG "_debug"
  61 #else
  62 #define DRV_DEBUG
  63 #endif
  64 #define DRV_HW_PERF
  65 #define VERSION_SUFFIX
  66
  67 #define MAJ 5
  68 #define MIN 0
  69 #define BUILD 6
  70 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." __stringify(BUILD) VERSION_SUFFIX DRV_DEBUG DRV_HW_PERF
  71
  72 char igb_driver_name[] = "igb";
  73 char igb_driver_version[] = DRV_VERSION;
  74 static const char igb_driver_string[] =
  75                                 "Intel(R) Gigabit Ethernet Network Driver";
  76 static const char igb_copyright[] =
  77                                 "Copyright (c) 2007-2013 Intel Corporation.";
  78
  79 static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl) = {
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER) },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER) },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES) },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII) },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS) },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS) },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER) },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER) },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER) },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES) },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII) },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER) },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER) },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER) },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES) },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII) },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL) },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII) },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES) },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE) },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP) },
 104         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576) },
 105         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS) },
 106         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES) },
 107         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER) },
 108         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES) },
 109         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD) },
 110         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2) },
 111         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER) },
 112         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER) },
 113         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES) },
 114         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER) },
 115         /* required last entry */
 116         {0, }
 117 };
 118
 119 //MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 120 static void igb_set_sriov_capability(struct igb_adapter *adapter) __attribute__((__unused__));
 121 void igb_reset(struct igb_adapter *);
 122 static int igb_setup_all_tx_resources(struct igb_adapter *);
 123 static int igb_setup_all_rx_resources(struct igb_adapter *);
 124 static void igb_free_all_tx_resources(struct igb_adapter *);
 125 static void igb_free_all_rx_resources(struct igb_adapter *);
 126 static void igb_setup_mrqc(struct igb_adapter *);
 127 void igb_update_stats(struct igb_adapter *);
 128 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 129 static void __devexit igb_remove(struct pci_dev *pdev);
 130 static int igb_sw_init(struct igb_adapter *);
 131 static int igb_open(struct net_device *);
 132 static int igb_close(struct net_device *);
 133 static void igb_configure(struct igb_adapter *);
 134 static void igb_configure_tx(struct igb_adapter *);
 135 static void igb_configure_rx(struct igb_adapter *);
 136 static void igb_clean_all_tx_rings(struct igb_adapter *);
 137 static void igb_clean_all_rx_rings(struct igb_adapter *);
 138 static void igb_clean_tx_ring(struct igb_ring *);
 139 static void igb_set_rx_mode(struct net_device *);
 140 static void igb_update_phy_info(unsigned long);
 141 static void igb_watchdog(unsigned long);
 142 static void igb_watchdog_task(struct work_struct *);
 143 static void igb_dma_err_task(struct work_struct *);
 144 static void igb_dma_err_timer(unsigned long data);
 145 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 146 static struct net_device_stats *igb_get_stats(struct net_device *);
 147 static int igb_change_mtu(struct net_device *, int);
 148 void igb_full_sync_mac_table(struct igb_adapter *adapter);
 149 static int igb_set_mac(struct net_device *, void *);
 150 static void igb_set_uta(struct igb_adapter *adapter);
 151 static irqreturn_t igb_intr(int irq, void *);
 152 static irqreturn_t igb_intr_msi(int irq, void *);
 153 static irqreturn_t igb_msix_other(int irq, void *);
 154 static irqreturn_t igb_msix_ring(int irq, void *);
 155 #ifdef IGB_DCA
 156 static void igb_update_dca(struct igb_q_vector *);
 157 static void igb_setup_dca(struct igb_adapter *);
 158 #endif /* IGB_DCA */
 159 static int igb_poll(struct napi_struct *, int);
 160 static bool igb_clean_tx_irq(struct igb_q_vector *);
 161 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
 162 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 163 static void igb_tx_timeout(struct net_device *);
 164 static void igb_reset_task(struct work_struct *);
 165 #ifdef HAVE_VLAN_RX_REGISTER
 166 static void igb_vlan_mode(struct net_device *, struct vlan_group *);
 167 #endif
 168 #ifdef HAVE_VLAN_PROTOCOL
 169 static int igb_vlan_rx_add_vid(struct net_device *,
 170                                __be16 proto, u16);
 171 static int igb_vlan_rx_kill_vid(struct net_device *,
 172                                 __be16 proto, u16);
 173 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
 174 #ifdef NETIF_F_HW_VLAN_CTAG_RX
 175 static int igb_vlan_rx_add_vid(struct net_device *,
 176                                __always_unused __be16 proto, u16);
 177 static int igb_vlan_rx_kill_vid(struct net_device *,
 178                                 __always_unused __be16 proto, u16);
 179 #else
 180 static int igb_vlan_rx_add_vid(struct net_device *, u16);
 181 static int igb_vlan_rx_kill_vid(struct net_device *, u16);
 182 #endif
 183 #else
 184 static void igb_vlan_rx_add_vid(struct net_device *, u16);
 185 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
 186 #endif
 187 static void igb_restore_vlan(struct igb_adapter *);
 188 void igb_rar_set(struct igb_adapter *adapter, u32 index);
 189 static void igb_ping_all_vfs(struct igb_adapter *);
 190 static void igb_msg_task(struct igb_adapter *);
 191 static void igb_vmm_control(struct igb_adapter *);
 192 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 193 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 194 static void igb_process_mdd_event(struct igb_adapter *);
 195 #ifdef IFLA_VF_MAX
 196 static int igb_ndo_set_vf_mac( struct net_device *netdev, int vf, u8 *mac);
 197 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 198                                 int vf, u16 vlan, u8 qos);
 199 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
 200 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 201                                 bool setting);
 202 #endif
 203 #ifdef HAVE_VF_MIN_MAX_TXRATE
 204 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
 205 #else /* HAVE_VF_MIN_MAX_TXRATE */
 206 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate);
 207 #endif /* HAVE_VF_MIN_MAX_TXRATE */
 208 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 209                                  struct ifla_vf_info *ivi);
 210 static void igb_check_vf_rate_limit(struct igb_adapter *);
 211 #endif
 212 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 213 #ifdef CONFIG_PM
 214 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
 215 static int igb_suspend(struct device *dev);
 216 static int igb_resume(struct device *dev);
 217 #ifdef CONFIG_PM_RUNTIME
 218 static int igb_runtime_suspend(struct device *dev);
 219 static int igb_runtime_resume(struct device *dev);
 220 static int igb_runtime_idle(struct device *dev);
 221 #endif /* CONFIG_PM_RUNTIME */
 222 static const struct dev_pm_ops igb_pm_ops = {
 223 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
 224         .suspend = igb_suspend,
 225         .resume = igb_resume,
 226         .freeze = igb_suspend,
 227         .thaw = igb_resume,
 228         .poweroff = igb_suspend,
 229         .restore = igb_resume,
 230 #ifdef CONFIG_PM_RUNTIME
 231         .runtime_suspend = igb_runtime_suspend,
 232         .runtime_resume = igb_runtime_resume,
 233         .runtime_idle = igb_runtime_idle,
 234 #endif
 235 #else /* Linux >= 2.6.34 */
 236         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 237 #ifdef CONFIG_PM_RUNTIME
 238         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 239                         igb_runtime_idle)
 240 #endif /* CONFIG_PM_RUNTIME */
 241 #endif /* Linux version */
 242 };
 243 #else
 244 static int igb_suspend(struct pci_dev *pdev, pm_message_t state);
 245 static int igb_resume(struct pci_dev *pdev);
 246 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
 247 #endif /* CONFIG_PM */
 248 #ifndef USE_REBOOT_NOTIFIER
 249 static void igb_shutdown(struct pci_dev *);
 250 #else
 251 static int igb_notify_reboot(struct notifier_block *, unsigned long, void *);
 252 static struct notifier_block igb_notifier_reboot = {
 253         .notifier_call  = igb_notify_reboot,
 254         .next           = NULL,
 255         .priority       = 0
 256 };
 257 #endif
 258 #ifdef IGB_DCA
 259 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 260 static struct notifier_block dca_notifier = {
 261         .notifier_call  = igb_notify_dca,
 262         .next           = NULL,
 263         .priority       = 0
 264 };
 265 #endif
 266 #ifdef CONFIG_NET_POLL_CONTROLLER
 267 /* for netdump / net console */
 268 static void igb_netpoll(struct net_device *);
 269 #endif
 270
 271 #ifdef HAVE_PCI_ERS
 272 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 273                      pci_channel_state_t);
 274 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 275 static void igb_io_resume(struct pci_dev *);
 276
 277 static struct pci_error_handlers igb_err_handler = {
 278         .error_detected = igb_io_error_detected,
 279         .slot_reset = igb_io_slot_reset,
 280         .resume = igb_io_resume,
 281 };
 282 #endif
 283
 284 static void igb_init_fw(struct igb_adapter *adapter);
 285 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 286
 287 static struct pci_driver igb_driver = {
 288         .name     = igb_driver_name,
 289         .id_table = igb_pci_tbl,
 290         .probe    = igb_probe,
 291         .remove   = __devexit_p(igb_remove),
 292 #ifdef CONFIG_PM
 293 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
 294         .driver.pm = &igb_pm_ops,
 295 #else
 296         .suspend  = igb_suspend,
 297         .resume   = igb_resume,
 298 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
 299 #endif /* CONFIG_PM */
 300 #ifndef USE_REBOOT_NOTIFIER
 301         .shutdown = igb_shutdown,
 302 #endif
 303 #ifdef HAVE_PCI_ERS
 304         .err_handler = &igb_err_handler
 305 #endif
 306 };
 307
 308 //MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 309 //MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 310 //MODULE_LICENSE("GPL");
 311 //MODULE_VERSION(DRV_VERSION);
 312
 313 static void igb_vfta_set(struct igb_adapter *adapter, u32 vid, bool add)
 314 {
 315         struct e1000_hw *hw = &adapter->hw;
 316         struct e1000_host_mng_dhcp_cookie *mng_cookie = &hw->mng_cookie;
 317         u32 index = (vid >> E1000_VFTA_ENTRY_SHIFT) & E1000_VFTA_ENTRY_MASK;
 318         u32 mask = 1 << (vid & E1000_VFTA_ENTRY_BIT_SHIFT_MASK);
 319         u32 vfta;
 320
 321         /*
 322          * if this is the management vlan the only option is to add it in so
 323          * that the management pass through will continue to work
 324          */
 325         if ((mng_cookie->status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
 326             (vid == mng_cookie->vlan_id))
 327                 add = TRUE;
 328
 329         vfta = adapter->shadow_vfta[index];
 330
 331         if (add)
 332                 vfta |= mask;
 333         else
 334                 vfta &= ~mask;
 335
 336         e1000_write_vfta(hw, index, vfta);
 337         adapter->shadow_vfta[index] = vfta;
 338 }
 339
 340 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
 341 //module_param(debug, int, 0);
 342 //MODULE_PARM_DESC(debug, "Debug level (0=none, ..., 16=all)");
 343
 344 /**
 345  * igb_init_module - Driver Registration Routine
 346  *
 347  * igb_init_module is the first routine called when the driver is
 348  * loaded. All it does is register with the PCI subsystem.
 349  **/
 350 static int __init igb_init_module(void)
 351 {
 352         int ret;
 353
 354         printk(KERN_INFO "%s - version %s\n",
 355                igb_driver_string, igb_driver_version);
 356
 357         printk(KERN_INFO "%s\n", igb_copyright);
 358 #ifdef IGB_HWMON
 359 /* only use IGB_PROCFS if IGB_HWMON is not defined */
 360 #else
 361 #ifdef IGB_PROCFS
 362         if (igb_procfs_topdir_init())
 363                 printk(KERN_INFO "Procfs failed to initialize topdir\n");
 364 #endif /* IGB_PROCFS */
 365 #endif /* IGB_HWMON  */
 366
 367 #ifdef IGB_DCA
 368         dca_register_notify(&dca_notifier);
 369 #endif
 370         ret = pci_register_driver(&igb_driver);
 371 #ifdef USE_REBOOT_NOTIFIER
 372         if (ret >= 0) {
 373                 register_reboot_notifier(&igb_notifier_reboot);
 374         }
 375 #endif
 376         return ret;
 377 }
 378
 379 #undef module_init
 380 #define module_init(x) static int x(void)  __attribute__((__unused__));
 381 module_init(igb_init_module);
 382
 383 /**
 384  * igb_exit_module - Driver Exit Cleanup Routine
 385  *
 386  * igb_exit_module is called just before the driver is removed
 387  * from memory.
 388  **/
 389 static void __exit igb_exit_module(void)
 390 {
 391 #ifdef IGB_DCA
 392         dca_unregister_notify(&dca_notifier);
 393 #endif
 394 #ifdef USE_REBOOT_NOTIFIER
 395         unregister_reboot_notifier(&igb_notifier_reboot);
 396 #endif
 397         pci_unregister_driver(&igb_driver);
 398
 399 #ifdef IGB_HWMON
 400 /* only compile IGB_PROCFS if IGB_HWMON is not defined */
 401 #else
 402 #ifdef IGB_PROCFS
 403         igb_procfs_topdir_exit();
 404 #endif /* IGB_PROCFS */
 405 #endif /* IGB_HWMON */
 406 }
 407
 408 #undef module_exit
 409 #define module_exit(x) static void x(void)  __attribute__((__unused__));
 410 module_exit(igb_exit_module);
 411
 412 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 413 /**
 414  * igb_cache_ring_register - Descriptor ring to register mapping
 415  * @adapter: board private structure to initialize
 416  *
 417  * Once we know the feature-set enabled for the device, we'll cache
 418  * the register offset the descriptor ring is assigned to.
 419  **/
 420 static void igb_cache_ring_register(struct igb_adapter *adapter)
 421 {
 422         int i = 0, j = 0;
 423         u32 rbase_offset = adapter->vfs_allocated_count;
 424
 425         switch (adapter->hw.mac.type) {
 426         case e1000_82576:
 427                 /* The queues are allocated for virtualization such that VF 0
 428                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 429                  * In order to avoid collision we start at the first free queue
 430                  * and continue consuming queues in the same sequence
 431                  */
 432                 if ((adapter->rss_queues > 1) && adapter->vmdq_pools) {
 433                         for (; i < adapter->rss_queues; i++)
 434                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 435                                                                Q_IDX_82576(i);
 436                 }
 437         case e1000_82575:
 438         case e1000_82580:
 439         case e1000_i350:
 440         case e1000_i354:
 441         case e1000_i210:
 442         case e1000_i211:
 443         default:
 444                 for (; i < adapter->num_rx_queues; i++)
 445                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 446                 for (; j < adapter->num_tx_queues; j++)
 447                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 448                 break;
 449         }
 450 }
 451
 452 static void igb_configure_lli(struct igb_adapter *adapter)
 453 {
 454         struct e1000_hw *hw = &adapter->hw;
 455         u16 port;
 456
 457         /* LLI should only be enabled for MSI-X or MSI interrupts */
 458         if (!adapter->msix_entries && !(adapter->flags & IGB_FLAG_HAS_MSI))
 459                 return;
 460
 461         if (adapter->lli_port) {
 462                 /* use filter 0 for port */
 463                 port = htons((u16)adapter->lli_port);
 464                 E1000_WRITE_REG(hw, E1000_IMIR(0),
 465                         (port | E1000_IMIR_PORT_IM_EN));
 466                 E1000_WRITE_REG(hw, E1000_IMIREXT(0),
 467                         (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP));
 468         }
 469
 470         if (adapter->flags & IGB_FLAG_LLI_PUSH) {
 471                 /* use filter 1 for push flag */
 472                 E1000_WRITE_REG(hw, E1000_IMIR(1),
 473                         (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
 474                 E1000_WRITE_REG(hw, E1000_IMIREXT(1),
 475                         (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_PSH));
 476         }
 477
 478         if (adapter->lli_size) {
 479                 /* use filter 2 for size */
 480                 E1000_WRITE_REG(hw, E1000_IMIR(2),
 481                         (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
 482                 E1000_WRITE_REG(hw, E1000_IMIREXT(2),
 483                         (adapter->lli_size | E1000_IMIREXT_CTRL_BP));
 484         }
 485
 486 }
 487
 488 /**
 489  *  igb_write_ivar - configure ivar for given MSI-X vector
 490  *  @hw: pointer to the HW structure
 491  *  @msix_vector: vector number we are allocating to a given ring
 492  *  @index: row index of IVAR register to write within IVAR table
 493  *  @offset: column offset of in IVAR, should be multiple of 8
 494  *
 495  *  This function is intended to handle the writing of the IVAR register
 496  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 497  *  each containing an cause allocation for an Rx and Tx ring, and a
 498  *  variable number of rows depending on the number of queues supported.
 499  **/
 500 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 501                            int index, int offset)
 502 {
 503         u32 ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index);
 504
 505         /* clear any bits that are currently set */
 506         ivar &= ~((u32)0xFF << offset);
 507
 508         /* write vector and valid bit */
 509         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 510
 511         E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar);
 512 }
 513
 514 #define IGB_N0_QUEUE -1
 515 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 516 {
 517         struct igb_adapter *adapter = q_vector->adapter;
 518         struct e1000_hw *hw = &adapter->hw;
 519         int rx_queue = IGB_N0_QUEUE;
 520         int tx_queue = IGB_N0_QUEUE;
 521         u32 msixbm = 0;
 522
 523         if (q_vector->rx.ring)
 524                 rx_queue = q_vector->rx.ring->reg_idx;
 525         if (q_vector->tx.ring)
 526                 tx_queue = q_vector->tx.ring->reg_idx;
 527
 528         switch (hw->mac.type) {
 529         case e1000_82575:
 530                 /* The 82575 assigns vectors using a bitmask, which matches the
 531                    bitmask for the EICR/EIMS/EIMC registers.  To assign one
 532                    or more queues to a vector, we write the appropriate bits
 533                    into the MSIXBM register for that vector. */
 534                 if (rx_queue > IGB_N0_QUEUE)
 535                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 536                 if (tx_queue > IGB_N0_QUEUE)
 537                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 538                 if (!adapter->msix_entries && msix_vector == 0)
 539                         msixbm |= E1000_EIMS_OTHER;
 540                 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), msix_vector, msixbm);
 541                 q_vector->eims_value = msixbm;
 542                 break;
 543         case e1000_82576:
 544                 /*
 545                  * 82576 uses a table that essentially consists of 2 columns
 546                  * with 8 rows.  The ordering is column-major so we use the
 547                  * lower 3 bits as the row index, and the 4th bit as the
 548                  * column offset.
 549                  */
 550                 if (rx_queue > IGB_N0_QUEUE)
 551                         igb_write_ivar(hw, msix_vector,
 552                                        rx_queue & 0x7,
 553                                        (rx_queue & 0x8) << 1);
 554                 if (tx_queue > IGB_N0_QUEUE)
 555                         igb_write_ivar(hw, msix_vector,
 556                                        tx_queue & 0x7,
 557                                        ((tx_queue & 0x8) << 1) + 8);
 558                 q_vector->eims_value = 1 << msix_vector;
 559                 break;
 560         case e1000_82580:
 561         case e1000_i350:
 562         case e1000_i354:
 563         case e1000_i210:
 564         case e1000_i211:
 565                 /*
 566                  * On 82580 and newer adapters the scheme is similar to 82576
 567                  * however instead of ordering column-major we have things
 568                  * ordered row-major.  So we traverse the table by using
 569                  * bit 0 as the column offset, and the remaining bits as the
 570                  * row index.
 571                  */
 572                 if (rx_queue > IGB_N0_QUEUE)
 573                         igb_write_ivar(hw, msix_vector,
 574                                        rx_queue >> 1,
 575                                        (rx_queue & 0x1) << 4);
 576                 if (tx_queue > IGB_N0_QUEUE)
 577                         igb_write_ivar(hw, msix_vector,
 578                                        tx_queue >> 1,
 579                                        ((tx_queue & 0x1) << 4) + 8);
 580                 q_vector->eims_value = 1 << msix_vector;
 581                 break;
 582         default:
 583                 BUG();
 584                 break;
 585         }
 586
 587         /* add q_vector eims value to global eims_enable_mask */
 588         adapter->eims_enable_mask |= q_vector->eims_value;
 589
 590         /* configure q_vector to set itr on first interrupt */
 591         q_vector->set_itr = 1;
 592 }
 593
 594 /**
 595  * igb_configure_msix - Configure MSI-X hardware
 596  *
 597  * igb_configure_msix sets up the hardware to properly
 598  * generate MSI-X interrupts.
 599  **/
 600 static void igb_configure_msix(struct igb_adapter *adapter)
 601 {
 602         u32 tmp;
 603         int i, vector = 0;
 604         struct e1000_hw *hw = &adapter->hw;
 605
 606         adapter->eims_enable_mask = 0;
 607
 608         /* set vector for other causes, i.e. link changes */
 609         switch (hw->mac.type) {
 610         case e1000_82575:
 611                 tmp = E1000_READ_REG(hw, E1000_CTRL_EXT);
 612                 /* enable MSI-X PBA support*/
 613                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 614
 615                 /* Auto-Mask interrupts upon ICR read. */
 616                 tmp |= E1000_CTRL_EXT_EIAME;
 617                 tmp |= E1000_CTRL_EXT_IRCA;
 618
 619                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, tmp);
 620
 621                 /* enable msix_other interrupt */
 622                 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), vector++,
 623                                       E1000_EIMS_OTHER);
 624                 adapter->eims_other = E1000_EIMS_OTHER;
 625
 626                 break;
 627
 628         case e1000_82576:
 629         case e1000_82580:
 630         case e1000_i350:
 631         case e1000_i354:
 632         case e1000_i210:
 633         case e1000_i211:
 634                 /* Turn on MSI-X capability first, or our settings
 635                  * won't stick.  And it will take days to debug. */
 636                 E1000_WRITE_REG(hw, E1000_GPIE, E1000_GPIE_MSIX_MODE |
 637                                 E1000_GPIE_PBA | E1000_GPIE_EIAME |
 638                                 E1000_GPIE_NSICR);
 639
 640                 /* enable msix_other interrupt */
 641                 adapter->eims_other = 1 << vector;
 642                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 643
 644                 E1000_WRITE_REG(hw, E1000_IVAR_MISC, tmp);
 645                 break;
 646         default:
 647                 /* do nothing, since nothing else supports MSI-X */
 648                 break;
 649         } /* switch (hw->mac.type) */
 650
 651         adapter->eims_enable_mask |= adapter->eims_other;
 652
 653         for (i = 0; i < adapter->num_q_vectors; i++)
 654                 igb_assign_vector(adapter->q_vector[i], vector++);
 655
 656         E1000_WRITE_FLUSH(hw);
 657 }
 658
 659 /**
 660  * igb_request_msix - Initialize MSI-X interrupts
 661  *
 662  * igb_request_msix allocates MSI-X vectors and requests interrupts from the
 663  * kernel.
 664  **/
 665 static int igb_request_msix(struct igb_adapter *adapter)
 666 {
 667         struct net_device *netdev = adapter->netdev;
 668         struct e1000_hw *hw = &adapter->hw;
 669         int i, err = 0, vector = 0, free_vector = 0;
 670
 671         err = request_irq(adapter->msix_entries[vector].vector,
 672                           &igb_msix_other, 0, netdev->name, adapter);
 673         if (err)
 674                 goto err_out;
 675
 676         for (i = 0; i < adapter->num_q_vectors; i++) {
 677                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 678
 679                 vector++;
 680
 681                 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
 682
 683                 if (q_vector->rx.ring && q_vector->tx.ring)
 684                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 685                                 q_vector->rx.ring->queue_index);
 686                 else if (q_vector->tx.ring)
 687                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 688                                 q_vector->tx.ring->queue_index);
 689                 else if (q_vector->rx.ring)
 690                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 691                                 q_vector->rx.ring->queue_index);
 692                 else
 693                         sprintf(q_vector->name, "%s-unused", netdev->name);
 694
 695                 err = request_irq(adapter->msix_entries[vector].vector,
 696                                   igb_msix_ring, 0, q_vector->name,
 697                                   q_vector);
 698                 if (err)
 699                         goto err_free;
 700         }
 701
 702         igb_configure_msix(adapter);
 703         return 0;
 704
 705 err_free:
 706         /* free already assigned IRQs */
 707         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 708
 709         vector--;
 710         for (i = 0; i < vector; i++) {
 711                 free_irq(adapter->msix_entries[free_vector++].vector,
 712                          adapter->q_vector[i]);
 713         }
 714 err_out:
 715         return err;
 716 }
 717
 718 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
 719 {
 720         if (adapter->msix_entries) {
 721                 pci_disable_msix(adapter->pdev);
 722                 kfree(adapter->msix_entries);
 723                 adapter->msix_entries = NULL;
 724         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
 725                 pci_disable_msi(adapter->pdev);
 726         }
 727 }
 728
 729 /**
 730  * igb_free_q_vector - Free memory allocated for specific interrupt vector
 731  * @adapter: board private structure to initialize
 732  * @v_idx: Index of vector to be freed
 733  *
 734  * This function frees the memory allocated to the q_vector.  In addition if
 735  * NAPI is enabled it will delete any references to the NAPI struct prior
 736  * to freeing the q_vector.
 737  **/
 738 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
 739 {
 740         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
 741
 742         if (q_vector->tx.ring)
 743                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
 744
 745         if (q_vector->rx.ring)
 746                 adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL;
 747
 748         adapter->q_vector[v_idx] = NULL;
 749         netif_napi_del(&q_vector->napi);
 750 #ifndef IGB_NO_LRO
 751         __skb_queue_purge(&q_vector->lrolist.active);
 752 #endif
 753         kfree(q_vector);
 754 }
 755
 756 /**
 757  * igb_free_q_vectors - Free memory allocated for interrupt vectors
 758  * @adapter: board private structure to initialize
 759  *
 760  * This function frees the memory allocated to the q_vectors.  In addition if
 761  * NAPI is enabled it will delete any references to the NAPI struct prior
 762  * to freeing the q_vector.
 763  **/
 764 static void igb_free_q_vectors(struct igb_adapter *adapter)
 765 {
 766         int v_idx = adapter->num_q_vectors;
 767
 768         adapter->num_tx_queues = 0;
 769         adapter->num_rx_queues = 0;
 770         adapter->num_q_vectors = 0;
 771
 772         while (v_idx--)
 773                 igb_free_q_vector(adapter, v_idx);
 774 }
 775
 776 /**
 777  * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
 778  *
 779  * This function resets the device so that it has 0 rx queues, tx queues, and
 780  * MSI-X interrupts allocated.
 781  */
 782 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
 783 {
 784         igb_free_q_vectors(adapter);
 785         igb_reset_interrupt_capability(adapter);
 786 }
 787
 788 /**
 789  * igb_process_mdd_event
 790  * @adapter - board private structure
 791  *
 792  * Identify a malicious VF, disable the VF TX/RX queues and log a message.
 793  */
 794 static void igb_process_mdd_event(struct igb_adapter *adapter)
 795 {
 796         struct e1000_hw *hw = &adapter->hw;
 797         u32 lvmmc, vfte, vfre, mdfb;
 798         u8 vf_queue;
 799
 800         lvmmc = E1000_READ_REG(hw, E1000_LVMMC);
 801         vf_queue = lvmmc >> 29;
 802
 803         /* VF index cannot be bigger or equal to VFs allocated */
 804         if (vf_queue >= adapter->vfs_allocated_count)
 805                 return;
 806
 807         netdev_info(adapter->netdev,
 808                     "VF %d misbehaved. VF queues are disabled. "
 809                     "VM misbehavior code is 0x%x\n", vf_queue, lvmmc);
 810
 811         /* Disable VFTE and VFRE related bits */
 812         vfte = E1000_READ_REG(hw, E1000_VFTE);
 813         vfte &= ~(1 << vf_queue);
 814         E1000_WRITE_REG(hw, E1000_VFTE, vfte);
 815
 816         vfre = E1000_READ_REG(hw, E1000_VFRE);
 817         vfre &= ~(1 << vf_queue);
 818         E1000_WRITE_REG(hw, E1000_VFRE, vfre);
 819
 820         /* Disable MDFB related bit. Clear on write */
 821         mdfb = E1000_READ_REG(hw, E1000_MDFB);
 822         mdfb |= (1 << vf_queue);
 823         E1000_WRITE_REG(hw, E1000_MDFB, mdfb);
 824
 825         /* Reset the specific VF */
 826         E1000_WRITE_REG(hw, E1000_VTCTRL(vf_queue), E1000_VTCTRL_RST);
 827 }
 828
 829 /**
 830  * igb_disable_mdd
 831  * @adapter - board private structure
 832  *
 833  * Disable MDD behavior in the HW
 834  **/
 835 static void igb_disable_mdd(struct igb_adapter *adapter)
 836 {
 837         struct e1000_hw *hw = &adapter->hw;
 838         u32 reg;
 839
 840         if ((hw->mac.type != e1000_i350) ||
 841             (hw->mac.type != e1000_i354))
 842                 return;
 843
 844         reg = E1000_READ_REG(hw, E1000_DTXCTL);
 845         reg &= (~E1000_DTXCTL_MDP_EN);
 846         E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
 847 }
 848
 849 /**
 850  * igb_enable_mdd
 851  * @adapter - board private structure
 852  *
 853  * Enable the HW to detect malicious driver and sends an interrupt to
 854  * the driver.
 855  **/
 856 static void igb_enable_mdd(struct igb_adapter *adapter)
 857 {
 858         struct e1000_hw *hw = &adapter->hw;
 859         u32 reg;
 860
 861         /* Only available on i350 device */
 862         if (hw->mac.type != e1000_i350)
 863                 return;
 864
 865         reg = E1000_READ_REG(hw, E1000_DTXCTL);
 866         reg |= E1000_DTXCTL_MDP_EN;
 867         E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
 868 }
 869
 870 /**
 871  * igb_reset_sriov_capability - disable SR-IOV if enabled
 872  *
 873  * Attempt to disable single root IO virtualization capabilites present in the
 874  * kernel.
 875  **/
 876 static void igb_reset_sriov_capability(struct igb_adapter *adapter)
 877 {
 878         struct pci_dev *pdev = adapter->pdev;
 879         struct e1000_hw *hw = &adapter->hw;
 880
 881         /* reclaim resources allocated to VFs */
 882         if (adapter->vf_data) {
 883                 if (!pci_vfs_assigned(pdev)) {
 884                         /*
 885                          * disable iov and allow time for transactions to
 886                          * clear
 887                          */
 888                         pci_disable_sriov(pdev);
 889                         msleep(500);
 890
 891                         dev_info(pci_dev_to_dev(pdev), "IOV Disabled\n");
 892                 } else {
 893                         dev_info(pci_dev_to_dev(pdev), "IOV Not Disabled\n "
 894                                         "VF(s) are assigned to guests!\n");
 895                 }
 896                 /* Disable Malicious Driver Detection */
 897                 igb_disable_mdd(adapter);
 898
 899                 /* free vf data storage */
 900                 kfree(adapter->vf_data);
 901                 adapter->vf_data = NULL;
 902
 903                 /* switch rings back to PF ownership */
 904                 E1000_WRITE_REG(hw, E1000_IOVCTL,
 905                                 E1000_IOVCTL_REUSE_VFQ);
 906                 E1000_WRITE_FLUSH(hw);
 907                 msleep(100);
 908         }
 909
 910         adapter->vfs_allocated_count = 0;
 911 }
 912
 913 /**
 914  * igb_set_sriov_capability - setup SR-IOV if supported
 915  *
 916  * Attempt to enable single root IO virtualization capabilites present in the
 917  * kernel.
 918  **/
 919 static void igb_set_sriov_capability(struct igb_adapter *adapter)
 920 {
 921         struct pci_dev *pdev = adapter->pdev;
 922         int old_vfs = 0;
 923         int i;
 924
 925         old_vfs = pci_num_vf(pdev);
 926         if (old_vfs) {
 927                 dev_info(pci_dev_to_dev(pdev),
 928                                 "%d pre-allocated VFs found - override "
 929                                 "max_vfs setting of %d\n", old_vfs,
 930                                 adapter->vfs_allocated_count);
 931                 adapter->vfs_allocated_count = old_vfs;
 932         }
 933         /* no VFs requested, do nothing */
 934         if (!adapter->vfs_allocated_count)
 935                 return;
 936
 937         /* allocate vf data storage */
 938         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
 939                                    sizeof(struct vf_data_storage),
 940                                    GFP_KERNEL);
 941
 942         if (adapter->vf_data) {
 943                 if (!old_vfs) {
 944                         if (pci_enable_sriov(pdev,
 945                                         adapter->vfs_allocated_count))
 946                                 goto err_out;
 947                 }
 948                 for (i = 0; i < adapter->vfs_allocated_count; i++)
 949                         igb_vf_configure(adapter, i);
 950
 951                 switch (adapter->hw.mac.type) {
 952                 case e1000_82576:
 953                 case e1000_i350:
 954                         /* Enable VM to VM loopback by default */
 955                         adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
 956                         break;
 957                 default:
 958                         /* Currently no other hardware supports loopback */
 959                         break;
 960                 }
 961
 962                 /* DMA Coalescing is not supported in IOV mode. */
 963                 if (adapter->hw.mac.type >= e1000_i350)
 964                 adapter->dmac = IGB_DMAC_DISABLE;
 965                 if (adapter->hw.mac.type < e1000_i350)
 966                 adapter->flags |= IGB_FLAG_DETECT_BAD_DMA;
 967                 return;
 968
 969         }
 970
 971 err_out:
 972         kfree(adapter->vf_data);
 973         adapter->vf_data = NULL;
 974         adapter->vfs_allocated_count = 0;
 975         dev_warn(pci_dev_to_dev(pdev),
 976                         "Failed to initialize SR-IOV virtualization\n");
 977 }
 978
 979 /**
 980  * igb_set_interrupt_capability - set MSI or MSI-X if supported
 981  *
 982  * Attempt to configure interrupts using the best available
 983  * capabilities of the hardware and kernel.
 984  **/
 985 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
 986 {
 987         struct pci_dev *pdev = adapter->pdev;
 988         int err;
 989         int numvecs, i;
 990
 991         if (!msix)
 992                 adapter->int_mode = IGB_INT_MODE_MSI;
 993
 994         /* Number of supported queues. */
 995         adapter->num_rx_queues = adapter->rss_queues;
 996
 997         if (adapter->vmdq_pools > 1)
 998                 adapter->num_rx_queues += adapter->vmdq_pools - 1;
 999
1000 #ifdef HAVE_TX_MQ
1001         if (adapter->vmdq_pools)
1002                 adapter->num_tx_queues = adapter->vmdq_pools;
1003         else
1004                 adapter->num_tx_queues = adapter->num_rx_queues;
1005 #else
1006         adapter->num_tx_queues = max_t(u32, 1, adapter->vmdq_pools);
1007 #endif
1008
1009         switch (adapter->int_mode) {
1010         case IGB_INT_MODE_MSIX:
1011                 /* start with one vector for every rx queue */
1012                 numvecs = adapter->num_rx_queues;
1013
1014                 /* if tx handler is separate add 1 for every tx queue */
1015                 if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1016                         numvecs += adapter->num_tx_queues;
1017
1018                 /* store the number of vectors reserved for queues */
1019                 adapter->num_q_vectors = numvecs;
1020
1021                 /* add 1 vector for link status interrupts */
1022                 numvecs++;
1023                 adapter->msix_entries = kcalloc(numvecs,
1024                                                 sizeof(struct msix_entry),
1025                                                 GFP_KERNEL);
1026                 if (adapter->msix_entries) {
1027                         for (i = 0; i < numvecs; i++)
1028                                 adapter->msix_entries[i].entry = i;
1029
1030                         err = pci_enable_msix(pdev,
1031                                               adapter->msix_entries, numvecs);
1032                         if (err == 0)
1033                                 break;
1034                 }
1035                 /* MSI-X failed, so fall through and try MSI */
1036                 dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI-X interrupts. "
1037                          "Falling back to MSI interrupts.\n");
1038                 igb_reset_interrupt_capability(adapter);
1039         case IGB_INT_MODE_MSI:
1040                 if (!pci_enable_msi(pdev))
1041                         adapter->flags |= IGB_FLAG_HAS_MSI;
1042                 else
1043                         dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI "
1044                                  "interrupts.  Falling back to legacy "
1045                                  "interrupts.\n");
1046                 /* Fall through */
1047         case IGB_INT_MODE_LEGACY:
1048                 /* disable advanced features and set number of queues to 1 */
1049                 igb_reset_sriov_capability(adapter);
1050                 adapter->vmdq_pools = 0;
1051                 adapter->rss_queues = 1;
1052                 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1053                 adapter->num_rx_queues = 1;
1054                 adapter->num_tx_queues = 1;
1055                 adapter->num_q_vectors = 1;
1056                 /* Don't do anything; this is system default */
1057                 break;
1058         }
1059 }
1060
1061 static void igb_add_ring(struct igb_ring *ring,
1062                          struct igb_ring_container *head)
1063 {
1064         head->ring = ring;
1065         head->count++;
1066 }
1067
1068 /**
1069  * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1070  * @adapter: board private structure to initialize
1071  * @v_count: q_vectors allocated on adapter, used for ring interleaving
1072  * @v_idx: index of vector in adapter struct
1073  * @txr_count: total number of Tx rings to allocate
1074  * @txr_idx: index of first Tx ring to allocate
1075  * @rxr_count: total number of Rx rings to allocate
1076  * @rxr_idx: index of first Rx ring to allocate
1077  *
1078  * We allocate one q_vector.  If allocation fails we return -ENOMEM.
1079  **/
1080 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1081                               unsigned int v_count, unsigned int v_idx,
1082                               unsigned int txr_count, unsigned int txr_idx,
1083                               unsigned int rxr_count, unsigned int rxr_idx)
1084 {
1085         struct igb_q_vector *q_vector;
1086         struct igb_ring *ring;
1087         int ring_count, size;
1088
1089         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1090         if (txr_count > 1 || rxr_count > 1)
1091                 return -ENOMEM;
1092
1093         ring_count = txr_count + rxr_count;
1094         size = sizeof(struct igb_q_vector) +
1095                (sizeof(struct igb_ring) * ring_count);
1096
1097         /* allocate q_vector and rings */
1098         q_vector = kzalloc(size, GFP_KERNEL);
1099         if (!q_vector)
1100                 return -ENOMEM;
1101
1102 #ifndef IGB_NO_LRO
1103         /* initialize LRO */
1104         __skb_queue_head_init(&q_vector->lrolist.active);
1105
1106 #endif
1107         /* initialize NAPI */
1108         netif_napi_add(adapter->netdev, &q_vector->napi,
1109                        igb_poll, 64);
1110
1111         /* tie q_vector and adapter together */
1112         adapter->q_vector[v_idx] = q_vector;
1113         q_vector->adapter = adapter;
1114
1115         /* initialize work limits */
1116         q_vector->tx.work_limit = adapter->tx_work_limit;
1117
1118         /* initialize ITR configuration */
1119         q_vector->itr_register = adapter->hw.hw_addr + E1000_EITR(0);
1120         q_vector->itr_val = IGB_START_ITR;
1121
1122         /* initialize pointer to rings */
1123         ring = q_vector->ring;
1124
1125         /* intialize ITR */
1126         if (rxr_count) {
1127                 /* rx or rx/tx vector */
1128                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1129                         q_vector->itr_val = adapter->rx_itr_setting;
1130         } else {
1131                 /* tx only vector */
1132                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1133                         q_vector->itr_val = adapter->tx_itr_setting;
1134         }
1135
1136         if (txr_count) {
1137                 /* assign generic ring traits */
1138                 ring->dev = &adapter->pdev->dev;
1139                 ring->netdev = adapter->netdev;
1140
1141                 /* configure backlink on ring */
1142                 ring->q_vector = q_vector;
1143
1144                 /* update q_vector Tx values */
1145                 igb_add_ring(ring, &q_vector->tx);
1146
1147                 /* For 82575, context index must be unique per ring. */
1148                 if (adapter->hw.mac.type == e1000_82575)
1149                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1150
1151                 /* apply Tx specific ring traits */
1152                 ring->count = adapter->tx_ring_count;
1153                 ring->queue_index = txr_idx;
1154
1155                 /* assign ring to adapter */
1156                 adapter->tx_ring[txr_idx] = ring;
1157
1158                 /* push pointer to next ring */
1159                 ring++;
1160         }
1161
1162         if (rxr_count) {
1163                 /* assign generic ring traits */
1164                 ring->dev = &adapter->pdev->dev;
1165                 ring->netdev = adapter->netdev;
1166
1167                 /* configure backlink on ring */
1168                 ring->q_vector = q_vector;
1169
1170                 /* update q_vector Rx values */
1171                 igb_add_ring(ring, &q_vector->rx);
1172
1173 #ifndef HAVE_NDO_SET_FEATURES
1174                 /* enable rx checksum */
1175                 set_bit(IGB_RING_FLAG_RX_CSUM, &ring->flags);
1176
1177 #endif
1178                 /* set flag indicating ring supports SCTP checksum offload */
1179                 if (adapter->hw.mac.type >= e1000_82576)
1180                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1181
1182                 if ((adapter->hw.mac.type == e1000_i350) ||
1183                     (adapter->hw.mac.type == e1000_i354))
1184                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1185
1186                 /* apply Rx specific ring traits */
1187                 ring->count = adapter->rx_ring_count;
1188                 ring->queue_index = rxr_idx;
1189
1190                 /* assign ring to adapter */
1191                 adapter->rx_ring[rxr_idx] = ring;
1192         }
1193
1194         return 0;
1195 }
1196
1197 /**
1198  * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1199  * @adapter: board private structure to initialize
1200  *
1201  * We allocate one q_vector per queue interrupt.  If allocation fails we
1202  * return -ENOMEM.
1203  **/
1204 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1205 {
1206         int q_vectors = adapter->num_q_vectors;
1207         int rxr_remaining = adapter->num_rx_queues;
1208         int txr_remaining = adapter->num_tx_queues;
1209         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1210         int err;
1211
1212         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1213                 for (; rxr_remaining; v_idx++) {
1214                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1215                                                  0, 0, 1, rxr_idx);
1216
1217                         if (err)
1218                                 goto err_out;
1219
1220                         /* update counts and index */
1221                         rxr_remaining--;
1222                         rxr_idx++;
1223                 }
1224         }
1225
1226         for (; v_idx < q_vectors; v_idx++) {
1227                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1228                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1229                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1230                                          tqpv, txr_idx, rqpv, rxr_idx);
1231
1232                 if (err)
1233                         goto err_out;
1234
1235                 /* update counts and index */
1236                 rxr_remaining -= rqpv;
1237                 txr_remaining -= tqpv;
1238                 rxr_idx++;
1239                 txr_idx++;
1240         }
1241
1242         return 0;
1243
1244 err_out:
1245         adapter->num_tx_queues = 0;
1246         adapter->num_rx_queues = 0;
1247         adapter->num_q_vectors = 0;
1248
1249         while (v_idx--)
1250                 igb_free_q_vector(adapter, v_idx);
1251
1252         return -ENOMEM;
1253 }
1254
1255 /**
1256  * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1257  *
1258  * This function initializes the interrupts and allocates all of the queues.
1259  **/
1260 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1261 {
1262         struct pci_dev *pdev = adapter->pdev;
1263         int err;
1264
1265         igb_set_interrupt_capability(adapter, msix);
1266
1267         err = igb_alloc_q_vectors(adapter);
1268         if (err) {
1269                 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for vectors\n");
1270                 goto err_alloc_q_vectors;
1271         }
1272
1273         igb_cache_ring_register(adapter);
1274
1275         return 0;
1276
1277 err_alloc_q_vectors:
1278         igb_reset_interrupt_capability(adapter);
1279         return err;
1280 }
1281
1282 /**
1283  * igb_request_irq - initialize interrupts
1284  *
1285  * Attempts to configure interrupts using the best available
1286  * capabilities of the hardware and kernel.
1287  **/
1288 static int igb_request_irq(struct igb_adapter *adapter)
1289 {
1290         struct net_device *netdev = adapter->netdev;
1291         struct pci_dev *pdev = adapter->pdev;
1292         int err = 0;
1293
1294         if (adapter->msix_entries) {
1295                 err = igb_request_msix(adapter);
1296                 if (!err)
1297                         goto request_done;
1298                 /* fall back to MSI */
1299                 igb_free_all_tx_resources(adapter);
1300                 igb_free_all_rx_resources(adapter);
1301
1302                 igb_clear_interrupt_scheme(adapter);
1303                 igb_reset_sriov_capability(adapter);
1304                 err = igb_init_interrupt_scheme(adapter, false);
1305                 if (err)
1306                         goto request_done;
1307                 igb_setup_all_tx_resources(adapter);
1308                 igb_setup_all_rx_resources(adapter);
1309                 igb_configure(adapter);
1310         }
1311
1312         igb_assign_vector(adapter->q_vector[0], 0);
1313
1314         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1315                 err = request_irq(pdev->irq, &igb_intr_msi, 0,
1316                                   netdev->name, adapter);
1317                 if (!err)
1318                         goto request_done;
1319
1320                 /* fall back to legacy interrupts */
1321                 igb_reset_interrupt_capability(adapter);
1322                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1323         }
1324
1325         err = request_irq(pdev->irq, &igb_intr, IRQF_SHARED,
1326                           netdev->name, adapter);
1327
1328         if (err)
1329                 dev_err(pci_dev_to_dev(pdev), "Error %d getting interrupt\n",
1330                         err);
1331
1332 request_done:
1333         return err;
1334 }
1335
1336 static void igb_free_irq(struct igb_adapter *adapter)
1337 {
1338         if (adapter->msix_entries) {
1339                 int vector = 0, i;
1340
1341                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1342
1343                 for (i = 0; i < adapter->num_q_vectors; i++)
1344                         free_irq(adapter->msix_entries[vector++].vector,
1345                                  adapter->q_vector[i]);
1346         } else {
1347                 free_irq(adapter->pdev->irq, adapter);
1348         }
1349 }
1350
1351 /**
1352  * igb_irq_disable - Mask off interrupt generation on the NIC
1353  * @adapter: board private structure
1354  **/
1355 static void igb_irq_disable(struct igb_adapter *adapter)
1356 {
1357         struct e1000_hw *hw = &adapter->hw;
1358
1359         /*
1360          * we need to be careful when disabling interrupts.  The VFs are also
1361          * mapped into these registers and so clearing the bits can cause
1362          * issues on the VF drivers so we only need to clear what we set
1363          */
1364         if (adapter->msix_entries) {
1365                 u32 regval = E1000_READ_REG(hw, E1000_EIAM);
1366                 E1000_WRITE_REG(hw, E1000_EIAM, regval & ~adapter->eims_enable_mask);
1367                 E1000_WRITE_REG(hw, E1000_EIMC, adapter->eims_enable_mask);
1368                 regval = E1000_READ_REG(hw, E1000_EIAC);
1369                 E1000_WRITE_REG(hw, E1000_EIAC, regval & ~adapter->eims_enable_mask);
1370         }
1371
1372         E1000_WRITE_REG(hw, E1000_IAM, 0);
1373         E1000_WRITE_REG(hw, E1000_IMC, ~0);
1374         E1000_WRITE_FLUSH(hw);
1375
1376         if (adapter->msix_entries) {
1377                 int vector = 0, i;
1378
1379                 synchronize_irq(adapter->msix_entries[vector++].vector);
1380
1381                 for (i = 0; i < adapter->num_q_vectors; i++)
1382                         synchronize_irq(adapter->msix_entries[vector++].vector);
1383         } else {
1384                 synchronize_irq(adapter->pdev->irq);
1385         }
1386 }
1387
1388 /**
1389  * igb_irq_enable - Enable default interrupt generation settings
1390  * @adapter: board private structure
1391  **/
1392 static void igb_irq_enable(struct igb_adapter *adapter)
1393 {
1394         struct e1000_hw *hw = &adapter->hw;
1395
1396         if (adapter->msix_entries) {
1397                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1398                 u32 regval = E1000_READ_REG(hw, E1000_EIAC);
1399                 E1000_WRITE_REG(hw, E1000_EIAC, regval | adapter->eims_enable_mask);
1400                 regval = E1000_READ_REG(hw, E1000_EIAM);
1401                 E1000_WRITE_REG(hw, E1000_EIAM, regval | adapter->eims_enable_mask);
1402                 E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_enable_mask);
1403                 if (adapter->vfs_allocated_count) {
1404                         E1000_WRITE_REG(hw, E1000_MBVFIMR, 0xFF);
1405                         ims |= E1000_IMS_VMMB;
1406                         if (adapter->mdd)
1407                                 if ((adapter->hw.mac.type == e1000_i350) ||
1408                                     (adapter->hw.mac.type == e1000_i354))
1409                                 ims |= E1000_IMS_MDDET;
1410                 }
1411                 E1000_WRITE_REG(hw, E1000_IMS, ims);
1412         } else {
1413                 E1000_WRITE_REG(hw, E1000_IMS, IMS_ENABLE_MASK |
1414                                 E1000_IMS_DRSTA);
1415                 E1000_WRITE_REG(hw, E1000_IAM, IMS_ENABLE_MASK |
1416                                 E1000_IMS_DRSTA);
1417         }
1418 }
1419
1420 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1421 {
1422         struct e1000_hw *hw = &adapter->hw;
1423         u16 vid = adapter->hw.mng_cookie.vlan_id;
1424         u16 old_vid = adapter->mng_vlan_id;
1425
1426         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1427                 /* add VID to filter table */
1428                 igb_vfta_set(adapter, vid, TRUE);
1429                 adapter->mng_vlan_id = vid;
1430         } else {
1431                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1432         }
1433
1434         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1435             (vid != old_vid) &&
1436 #ifdef HAVE_VLAN_RX_REGISTER
1437             !vlan_group_get_device(adapter->vlgrp, old_vid)) {
1438 #else
1439             !test_bit(old_vid, adapter->active_vlans)) {
1440 #endif
1441                 /* remove VID from filter table */
1442                 igb_vfta_set(adapter, old_vid, FALSE);
1443         }
1444 }
1445
1446 /**
1447  * igb_release_hw_control - release control of the h/w to f/w
1448  * @adapter: address of board private structure
1449  *
1450  * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1451  * For ASF and Pass Through versions of f/w this means that the
1452  * driver is no longer loaded.
1453  *
1454  **/
1455 static void igb_release_hw_control(struct igb_adapter *adapter)
1456 {
1457         struct e1000_hw *hw = &adapter->hw;
1458         u32 ctrl_ext;
1459
1460         /* Let firmware take over control of h/w */
1461         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1462         E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1463                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1464 }
1465
1466 /**
1467  * igb_get_hw_control - get control of the h/w from f/w
1468  * @adapter: address of board private structure
1469  *
1470  * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1471  * For ASF and Pass Through versions of f/w this means that
1472  * the driver is loaded.
1473  *
1474  **/
1475 static void igb_get_hw_control(struct igb_adapter *adapter)
1476 {
1477         struct e1000_hw *hw = &adapter->hw;
1478         u32 ctrl_ext;
1479
1480         /* Let firmware know the driver has taken over */
1481         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1482         E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1483                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1484 }
1485
1486 /**
1487  * igb_configure - configure the hardware for RX and TX
1488  * @adapter: private board structure
1489  **/
1490 static void igb_configure(struct igb_adapter *adapter)
1491 {
1492         struct net_device *netdev = adapter->netdev;
1493         int i;
1494
1495         igb_get_hw_control(adapter);
1496         igb_set_rx_mode(netdev);
1497
1498         igb_restore_vlan(adapter);
1499
1500         igb_setup_tctl(adapter);
1501         igb_setup_mrqc(adapter);
1502         igb_setup_rctl(adapter);
1503
1504         igb_configure_tx(adapter);
1505         igb_configure_rx(adapter);
1506
1507         e1000_rx_fifo_flush_82575(&adapter->hw);
1508 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1509         if (adapter->num_tx_queues > 1)
1510                 netdev->features |= NETIF_F_MULTI_QUEUE;
1511         else
1512                 netdev->features &= ~NETIF_F_MULTI_QUEUE;
1513 #endif
1514
1515         /* call igb_desc_unused which always leaves
1516          * at least 1 descriptor unused to make sure
1517          * next_to_use != next_to_clean */
1518         for (i = 0; i < adapter->num_rx_queues; i++) {
1519                 struct igb_ring *ring = adapter->rx_ring[i];
1520                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1521         }
1522 }
1523
1524 /**
1525  * igb_power_up_link - Power up the phy/serdes link
1526  * @adapter: address of board private structure
1527  **/
1528 void igb_power_up_link(struct igb_adapter *adapter)
1529 {
1530         e1000_phy_hw_reset(&adapter->hw);
1531
1532         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1533                 e1000_power_up_phy(&adapter->hw);
1534         else
1535                 e1000_power_up_fiber_serdes_link(&adapter->hw);
1536 }
1537
1538 /**
1539  * igb_power_down_link - Power down the phy/serdes link
1540  * @adapter: address of board private structure
1541  */
1542 static void igb_power_down_link(struct igb_adapter *adapter)
1543 {
1544         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1545                 e1000_power_down_phy(&adapter->hw);
1546         else
1547                 e1000_shutdown_fiber_serdes_link(&adapter->hw);
1548 }
1549
1550 /* Detect and switch function for Media Auto Sense */
1551 static void igb_check_swap_media(struct igb_adapter *adapter)
1552 {
1553         struct e1000_hw *hw = &adapter->hw;
1554         u32 ctrl_ext, connsw;
1555         bool swap_now = false;
1556         bool link;
1557
1558         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1559         connsw = E1000_READ_REG(hw, E1000_CONNSW);
1560         link = igb_has_link(adapter);
1561
1562         /* need to live swap if current media is copper and we have fiber/serdes
1563          * to go to.
1564          */
1565
1566         if ((hw->phy.media_type == e1000_media_type_copper) &&
1567             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1568                 swap_now = true;
1569         } else if (!(connsw & E1000_CONNSW_SERDESD)) {
1570                 /* copper signal takes time to appear */
1571                 if (adapter->copper_tries < 2) {
1572                         adapter->copper_tries++;
1573                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1574                         E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1575                         return;
1576                 } else {
1577                         adapter->copper_tries = 0;
1578                         if ((connsw & E1000_CONNSW_PHYSD) &&
1579                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
1580                                 swap_now = true;
1581                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1582                                 E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1583                         }
1584                 }
1585         }
1586
1587         if (swap_now) {
1588                 switch (hw->phy.media_type) {
1589                 case e1000_media_type_copper:
1590                         dev_info(pci_dev_to_dev(adapter->pdev),
1591                                  "%s:MAS: changing media to fiber/serdes\n",
1592                         adapter->netdev->name);
1593                         ctrl_ext |=
1594                                 E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1595                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
1596                         adapter->copper_tries = 0;
1597                         break;
1598                 case e1000_media_type_internal_serdes:
1599                 case e1000_media_type_fiber:
1600                         dev_info(pci_dev_to_dev(adapter->pdev),
1601                                  "%s:MAS: changing media to copper\n",
1602                                  adapter->netdev->name);
1603                         ctrl_ext &=
1604                                 ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1605                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
1606                         break;
1607                 default:
1608                         /* shouldn't get here during regular operation */
1609                         dev_err(pci_dev_to_dev(adapter->pdev),
1610                                 "%s:AMS: Invalid media type found, returning\n",
1611                                 adapter->netdev->name);
1612                         break;
1613                 }
1614                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
1615         }
1616 }
1617
1618 #ifdef HAVE_I2C_SUPPORT
1619 /*  igb_get_i2c_data - Reads the I2C SDA data bit
1620  *  @hw: pointer to hardware structure
1621  *  @i2cctl: Current value of I2CCTL register
1622  *
1623  *  Returns the I2C data bit value
1624  */
1625 static int igb_get_i2c_data(void *data)
1626 {
1627         struct igb_adapter *adapter = (struct igb_adapter *)data;
1628         struct e1000_hw *hw = &adapter->hw;
1629         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1630
1631         return ((i2cctl & E1000_I2C_DATA_IN) != 0);
1632 }
1633
1634 /* igb_set_i2c_data - Sets the I2C data bit
1635  *  @data: pointer to hardware structure
1636  *  @state: I2C data value (0 or 1) to set
1637  *
1638  *  Sets the I2C data bit
1639  */
1640 static void igb_set_i2c_data(void *data, int state)
1641 {
1642         struct igb_adapter *adapter = (struct igb_adapter *)data;
1643         struct e1000_hw *hw = &adapter->hw;
1644         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1645
1646         if (state)
1647                 i2cctl |= E1000_I2C_DATA_OUT;
1648         else
1649                 i2cctl &= ~E1000_I2C_DATA_OUT;
1650
1651         i2cctl &= ~E1000_I2C_DATA_OE_N;
1652         i2cctl |= E1000_I2C_CLK_OE_N;
1653
1654         E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1655         E1000_WRITE_FLUSH(hw);
1656
1657 }
1658
1659 /* igb_set_i2c_clk - Sets the I2C SCL clock
1660  *  @data: pointer to hardware structure
1661  *  @state: state to set clock
1662  *
1663  *  Sets the I2C clock line to state
1664  */
1665 static void igb_set_i2c_clk(void *data, int state)
1666 {
1667         struct igb_adapter *adapter = (struct igb_adapter *)data;
1668         struct e1000_hw *hw = &adapter->hw;
1669         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1670
1671         if (state) {
1672                 i2cctl |= E1000_I2C_CLK_OUT;
1673                 i2cctl &= ~E1000_I2C_CLK_OE_N;
1674         } else {
1675                 i2cctl &= ~E1000_I2C_CLK_OUT;
1676                 i2cctl &= ~E1000_I2C_CLK_OE_N;
1677         }
1678         E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1679         E1000_WRITE_FLUSH(hw);
1680 }
1681
1682 /* igb_get_i2c_clk - Gets the I2C SCL clock state
1683  *  @data: pointer to hardware structure
1684  *
1685  *  Gets the I2C clock state
1686  */
1687 static int igb_get_i2c_clk(void *data)
1688 {
1689         struct igb_adapter *adapter = (struct igb_adapter *)data;
1690         struct e1000_hw *hw = &adapter->hw;
1691         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1692
1693         return ((i2cctl & E1000_I2C_CLK_IN) != 0);
1694 }
1695
1696 static const struct i2c_algo_bit_data igb_i2c_algo = {
1697         .setsda         = igb_set_i2c_data,
1698         .setscl         = igb_set_i2c_clk,
1699         .getsda         = igb_get_i2c_data,
1700         .getscl         = igb_get_i2c_clk,
1701         .udelay         = 5,
1702         .timeout        = 20,
1703 };
1704
1705 /*  igb_init_i2c - Init I2C interface
1706  *  @adapter: pointer to adapter structure
1707  *
1708  */
1709 static s32 igb_init_i2c(struct igb_adapter *adapter)
1710 {
1711         s32 status = E1000_SUCCESS;
1712
1713         /* I2C interface supported on i350 devices */
1714         if (adapter->hw.mac.type != e1000_i350)
1715                 return E1000_SUCCESS;
1716
1717         /* Initialize the i2c bus which is controlled by the registers.
1718          * This bus will use the i2c_algo_bit structue that implements
1719          * the protocol through toggling of the 4 bits in the register.
1720          */
1721         adapter->i2c_adap.owner = THIS_MODULE;
1722         adapter->i2c_algo = igb_i2c_algo;
1723         adapter->i2c_algo.data = adapter;
1724         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
1725         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
1726         strlcpy(adapter->i2c_adap.name, "igb BB",
1727                 sizeof(adapter->i2c_adap.name));
1728         status = i2c_bit_add_bus(&adapter->i2c_adap);
1729         return status;
1730 }
1731
1732 #endif /* HAVE_I2C_SUPPORT */
1733 /**
1734  * igb_up - Open the interface and prepare it to handle traffic
1735  * @adapter: board private structure
1736  **/
1737 int igb_up(struct igb_adapter *adapter)
1738 {
1739         struct e1000_hw *hw = &adapter->hw;
1740         int i;
1741
1742         /* hardware has been reset, we need to reload some things */
1743         igb_configure(adapter);
1744
1745         clear_bit(__IGB_DOWN, &adapter->state);
1746
1747         for (i = 0; i < adapter->num_q_vectors; i++)
1748                 napi_enable(&(adapter->q_vector[i]->napi));
1749
1750         if (adapter->msix_entries)
1751                 igb_configure_msix(adapter);
1752         else
1753                 igb_assign_vector(adapter->q_vector[0], 0);
1754
1755         igb_configure_lli(adapter);
1756
1757         /* Clear any pending interrupts. */
1758         E1000_READ_REG(hw, E1000_ICR);
1759         igb_irq_enable(adapter);
1760
1761         /* notify VFs that reset has been completed */
1762         if (adapter->vfs_allocated_count) {
1763                 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
1764                 reg_data |= E1000_CTRL_EXT_PFRSTD;
1765                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
1766         }
1767
1768         netif_tx_start_all_queues(adapter->netdev);
1769
1770         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1771                 schedule_work(&adapter->dma_err_task);
1772         /* start the watchdog. */
1773         hw->mac.get_link_status = 1;
1774         schedule_work(&adapter->watchdog_task);
1775
1776         if ((adapter->flags & IGB_FLAG_EEE) &&
1777             (!hw->dev_spec._82575.eee_disable))
1778                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
1779
1780         return 0;
1781 }
1782
1783 void igb_down(struct igb_adapter *adapter)
1784 {
1785         struct net_device *netdev = adapter->netdev;
1786         struct e1000_hw *hw = &adapter->hw;
1787         u32 tctl, rctl;
1788         int i;
1789
1790         /* signal that we're down so the interrupt handler does not
1791          * reschedule our watchdog timer */
1792         set_bit(__IGB_DOWN, &adapter->state);
1793
1794         /* disable receives in the hardware */
1795         rctl = E1000_READ_REG(hw, E1000_RCTL);
1796         E1000_WRITE_REG(hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
1797         /* flush and sleep below */
1798
1799         netif_tx_stop_all_queues(netdev);
1800
1801         /* disable transmits in the hardware */
1802         tctl = E1000_READ_REG(hw, E1000_TCTL);
1803         tctl &= ~E1000_TCTL_EN;
1804         E1000_WRITE_REG(hw, E1000_TCTL, tctl);
1805         /* flush both disables and wait for them to finish */
1806         E1000_WRITE_FLUSH(hw);
1807         usleep_range(10000, 20000);
1808
1809         for (i = 0; i < adapter->num_q_vectors; i++)
1810                 napi_disable(&(adapter->q_vector[i]->napi));
1811
1812         igb_irq_disable(adapter);
1813
1814         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1815
1816         del_timer_sync(&adapter->watchdog_timer);
1817         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1818                 del_timer_sync(&adapter->dma_err_timer);
1819         del_timer_sync(&adapter->phy_info_timer);
1820
1821         netif_carrier_off(netdev);
1822
1823         /* record the stats before reset*/
1824         igb_update_stats(adapter);
1825
1826         adapter->link_speed = 0;
1827         adapter->link_duplex = 0;
1828
1829 #ifdef HAVE_PCI_ERS
1830         if (!pci_channel_offline(adapter->pdev))
1831                 igb_reset(adapter);
1832 #else
1833         igb_reset(adapter);
1834 #endif
1835         igb_clean_all_tx_rings(adapter);
1836         igb_clean_all_rx_rings(adapter);
1837 #ifdef IGB_DCA
1838         /* since we reset the hardware DCA settings were cleared */
1839         igb_setup_dca(adapter);
1840 #endif
1841 }
1842
1843 void igb_reinit_locked(struct igb_adapter *adapter)
1844 {
1845         WARN_ON(in_interrupt());
1846         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1847                 usleep_range(1000, 2000);
1848         igb_down(adapter);
1849         igb_up(adapter);
1850         clear_bit(__IGB_RESETTING, &adapter->state);
1851 }
1852
1853 /**
1854  * igb_enable_mas - Media Autosense re-enable after swap
1855  *
1856  * @adapter: adapter struct
1857  **/
1858 static s32  igb_enable_mas(struct igb_adapter *adapter)
1859 {
1860         struct e1000_hw *hw = &adapter->hw;
1861         u32 connsw;
1862         s32 ret_val = E1000_SUCCESS;
1863
1864         connsw = E1000_READ_REG(hw, E1000_CONNSW);
1865         if (hw->phy.media_type == e1000_media_type_copper) {
1866                 /* configure for SerDes media detect */
1867                 if (!(connsw & E1000_CONNSW_SERDESD)) {
1868                         connsw |= E1000_CONNSW_ENRGSRC;
1869                         connsw |= E1000_CONNSW_AUTOSENSE_EN;
1870                         E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1871                         E1000_WRITE_FLUSH(hw);
1872                 } else if (connsw & E1000_CONNSW_SERDESD) {
1873                         /* already SerDes, no need to enable anything */
1874                         return ret_val;
1875                 } else {
1876                         dev_info(pci_dev_to_dev(adapter->pdev),
1877                         "%s:MAS: Unable to configure feature, disabling..\n",
1878                         adapter->netdev->name);
1879                         adapter->flags &= ~IGB_FLAG_MAS_ENABLE;
1880                 }
1881         }
1882         return ret_val;
1883 }
1884
1885 void igb_reset(struct igb_adapter *adapter)
1886 {
1887         struct pci_dev *pdev = adapter->pdev;
1888         struct e1000_hw *hw = &adapter->hw;
1889         struct e1000_mac_info *mac = &hw->mac;
1890         struct e1000_fc_info *fc = &hw->fc;
1891         u32 pba = 0, tx_space, min_tx_space, min_rx_space, hwm;
1892
1893         /* Repartition Pba for greater than 9k mtu
1894          * To take effect CTRL.RST is required.
1895          */
1896         switch (mac->type) {
1897         case e1000_i350:
1898         case e1000_82580:
1899         case e1000_i354:
1900                 pba = E1000_READ_REG(hw, E1000_RXPBS);
1901                 pba = e1000_rxpbs_adjust_82580(pba);
1902                 break;
1903         case e1000_82576:
1904                 pba = E1000_READ_REG(hw, E1000_RXPBS);
1905                 pba &= E1000_RXPBS_SIZE_MASK_82576;
1906                 break;
1907         case e1000_82575:
1908         case e1000_i210:
1909         case e1000_i211:
1910         default:
1911                 pba = E1000_PBA_34K;
1912                 break;
1913         }
1914
1915         if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1916             (mac->type < e1000_82576)) {
1917                 /* adjust PBA for jumbo frames */
1918                 E1000_WRITE_REG(hw, E1000_PBA, pba);
1919
1920                 /* To maintain wire speed transmits, the Tx FIFO should be
1921                  * large enough to accommodate two full transmit packets,
1922                  * rounded up to the next 1KB and expressed in KB.  Likewise,
1923                  * the Rx FIFO should be large enough to accommodate at least
1924                  * one full receive packet and is similarly rounded up and
1925                  * expressed in KB. */
1926                 pba = E1000_READ_REG(hw, E1000_PBA);
1927                 /* upper 16 bits has Tx packet buffer allocation size in KB */
1928                 tx_space = pba >> 16;
1929                 /* lower 16 bits has Rx packet buffer allocation size in KB */
1930                 pba &= 0xffff;
1931                 /* the tx fifo also stores 16 bytes of information about the tx
1932                  * but don't include ethernet FCS because hardware appends it */
1933                 min_tx_space = (adapter->max_frame_size +
1934                                 sizeof(union e1000_adv_tx_desc) -
1935                                 ETH_FCS_LEN) * 2;
1936                 min_tx_space = ALIGN(min_tx_space, 1024);
1937                 min_tx_space >>= 10;
1938                 /* software strips receive CRC, so leave room for it */
1939                 min_rx_space = adapter->max_frame_size;
1940                 min_rx_space = ALIGN(min_rx_space, 1024);
1941                 min_rx_space >>= 10;
1942
1943                 /* If current Tx allocation is less than the min Tx FIFO size,
1944                  * and the min Tx FIFO size is less than the current Rx FIFO
1945                  * allocation, take space away from current Rx allocation */
1946                 if (tx_space < min_tx_space &&
1947                     ((min_tx_space - tx_space) < pba)) {
1948                         pba = pba - (min_tx_space - tx_space);
1949
1950                         /* if short on rx space, rx wins and must trump tx
1951                          * adjustment */
1952                         if (pba < min_rx_space)
1953                                 pba = min_rx_space;
1954                 }
1955                 E1000_WRITE_REG(hw, E1000_PBA, pba);
1956         }
1957
1958         /* flow control settings */
1959         /* The high water mark must be low enough to fit one full frame
1960          * (or the size used for early receive) above it in the Rx FIFO.
1961          * Set it to the lower of:
1962          * - 90% of the Rx FIFO size, or
1963          * - the full Rx FIFO size minus one full frame */
1964         hwm = min(((pba << 10) * 9 / 10),
1965                         ((pba << 10) - 2 * adapter->max_frame_size));
1966
1967         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
1968         fc->low_water = fc->high_water - 16;
1969         fc->pause_time = 0xFFFF;
1970         fc->send_xon = 1;
1971         fc->current_mode = fc->requested_mode;
1972
1973         /* disable receive for all VFs and wait one second */
1974         if (adapter->vfs_allocated_count) {
1975                 int i;
1976                 /*
1977                  * Clear all flags except indication that the PF has set
1978                  * the VF MAC addresses administratively
1979                  */
1980                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1981                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1982
1983                 /* ping all the active vfs to let them know we are going down */
1984                 igb_ping_all_vfs(adapter);
1985
1986                 /* disable transmits and receives */
1987                 E1000_WRITE_REG(hw, E1000_VFRE, 0);
1988                 E1000_WRITE_REG(hw, E1000_VFTE, 0);
1989         }
1990
1991         /* Allow time for pending master requests to run */
1992         e1000_reset_hw(hw);
1993         E1000_WRITE_REG(hw, E1000_WUC, 0);
1994
1995         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
1996                 e1000_setup_init_funcs(hw, TRUE);
1997                 igb_check_options(adapter);
1998                 e1000_get_bus_info(hw);
1999                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
2000         }
2001         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
2002                 if (igb_enable_mas(adapter))
2003                         dev_err(pci_dev_to_dev(pdev),
2004                                 "Error enabling Media Auto Sense\n");
2005         }
2006         if (e1000_init_hw(hw))
2007                 dev_err(pci_dev_to_dev(pdev), "Hardware Error\n");
2008
2009         /*
2010          * Flow control settings reset on hardware reset, so guarantee flow
2011          * control is off when forcing speed.
2012          */
2013         if (!hw->mac.autoneg)
2014                 e1000_force_mac_fc(hw);
2015
2016         igb_init_dmac(adapter, pba);
2017         /* Re-initialize the thermal sensor on i350 devices. */
2018         if (mac->type == e1000_i350 && hw->bus.func == 0) {
2019                 /*
2020                  * If present, re-initialize the external thermal sensor
2021                  * interface.
2022                  */
2023                 if (adapter->ets)
2024                         e1000_set_i2c_bb(hw);
2025                 e1000_init_thermal_sensor_thresh(hw);
2026         }
2027
2028         /*Re-establish EEE setting */
2029         if (hw->phy.media_type == e1000_media_type_copper) {
2030                 switch (mac->type) {
2031                 case e1000_i350:
2032                 case e1000_i210:
2033                 case e1000_i211:
2034                         e1000_set_eee_i350(hw);
2035                         break;
2036                 case e1000_i354:
2037                         e1000_set_eee_i354(hw);
2038                         break;
2039                 default:
2040                         break;
2041                 }
2042         }
2043
2044         if (!netif_running(adapter->netdev))
2045                 igb_power_down_link(adapter);
2046
2047         igb_update_mng_vlan(adapter);
2048
2049         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2050         E1000_WRITE_REG(hw, E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2051
2052
2053 #ifdef HAVE_PTP_1588_CLOCK
2054         /* Re-enable PTP, where applicable. */
2055         igb_ptp_reset(adapter);
2056 #endif /* HAVE_PTP_1588_CLOCK */
2057
2058         e1000_get_phy_info(hw);
2059
2060         adapter->devrc++;
2061 }
2062
2063 #ifdef HAVE_NDO_SET_FEATURES
2064 static kni_netdev_features_t igb_fix_features(struct net_device *netdev,
2065                                               kni_netdev_features_t features)
2066 {
2067         /*
2068          * Since there is no support for separate tx vlan accel
2069          * enabled make sure tx flag is cleared if rx is.
2070          */
2071 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2072         if (!(features & NETIF_F_HW_VLAN_CTAG_RX))
2073                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2074 #else
2075         if (!(features & NETIF_F_HW_VLAN_RX))
2076                 features &= ~NETIF_F_HW_VLAN_TX;
2077 #endif
2078
2079         /* If Rx checksum is disabled, then LRO should also be disabled */
2080         if (!(features & NETIF_F_RXCSUM))
2081                 features &= ~NETIF_F_LRO;
2082
2083         return features;
2084 }
2085
2086 static int igb_set_features(struct net_device *netdev,
2087                             kni_netdev_features_t features)
2088 {
2089         u32 changed = netdev->features ^ features;
2090
2091 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2092         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2093 #else
2094         if (changed & NETIF_F_HW_VLAN_RX)
2095 #endif
2096                 igb_vlan_mode(netdev, features);
2097
2098         return 0;
2099 }
2100
2101 #ifdef NTF_SELF
2102 #ifdef USE_CONST_DEV_UC_CHAR
2103 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2104                            struct net_device *dev,
2105                            const unsigned char *addr,
2106 #ifdef HAVE_NDO_FDB_ADD_VID
2107                            u16 vid,
2108 #endif
2109                            u16 flags)
2110 #else
2111 static int igb_ndo_fdb_add(struct ndmsg *ndm,
2112                            struct net_device *dev,
2113                            unsigned char *addr,
2114                            u16 flags)
2115 #endif
2116 {
2117         struct igb_adapter *adapter = netdev_priv(dev);
2118         struct e1000_hw *hw = &adapter->hw;
2119         int err;
2120
2121         if (!(adapter->vfs_allocated_count))
2122                 return -EOPNOTSUPP;
2123
2124         /* Hardware does not support aging addresses so if a
2125          * ndm_state is given only allow permanent addresses
2126          */
2127         if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
2128                 pr_info("%s: FDB only supports static addresses\n",
2129                         igb_driver_name);
2130                 return -EINVAL;
2131         }
2132
2133         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2134                 u32 rar_uc_entries = hw->mac.rar_entry_count -
2135                                         (adapter->vfs_allocated_count + 1);
2136
2137                 if (netdev_uc_count(dev) < rar_uc_entries)
2138                         err = dev_uc_add_excl(dev, addr);
2139                 else
2140                         err = -ENOMEM;
2141         } else if (is_multicast_ether_addr(addr)) {
2142                 err = dev_mc_add_excl(dev, addr);
2143         } else {
2144                 err = -EINVAL;
2145         }
2146
2147         /* Only return duplicate errors if NLM_F_EXCL is set */
2148         if (err == -EEXIST && !(flags & NLM_F_EXCL))
2149                 err = 0;
2150
2151         return err;
2152 }
2153
2154 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2155 #ifdef USE_CONST_DEV_UC_CHAR
2156 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2157                            struct net_device *dev,
2158                            const unsigned char *addr)
2159 #else
2160 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2161                            struct net_device *dev,
2162                            unsigned char *addr)
2163 #endif
2164 {
2165         struct igb_adapter *adapter = netdev_priv(dev);
2166         int err = -EOPNOTSUPP;
2167
2168         if (ndm->ndm_state & NUD_PERMANENT) {
2169                 pr_info("%s: FDB only supports static addresses\n",
2170                         igb_driver_name);
2171                 return -EINVAL;
2172         }
2173
2174         if (adapter->vfs_allocated_count) {
2175                 if (is_unicast_ether_addr(addr))
2176                         err = dev_uc_del(dev, addr);
2177                 else if (is_multicast_ether_addr(addr))
2178                         err = dev_mc_del(dev, addr);
2179                 else
2180                         err = -EINVAL;
2181         }
2182
2183         return err;
2184 }
2185
2186 static int igb_ndo_fdb_dump(struct sk_buff *skb,
2187                             struct netlink_callback *cb,
2188                             struct net_device *dev,
2189                             int idx)
2190 {
2191         struct igb_adapter *adapter = netdev_priv(dev);
2192
2193         if (adapter->vfs_allocated_count)
2194                 idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
2195
2196         return idx;
2197 }
2198 #endif /* USE_DEFAULT_FDB_DEL_DUMP */
2199
2200 #ifdef HAVE_BRIDGE_ATTRIBS
2201 #ifdef HAVE_NDO_BRIDGE_SET_DEL_LINK_FLAGS
2202 static int igb_ndo_bridge_setlink(struct net_device *dev,
2203                                   struct nlmsghdr *nlh,
2204                                   u16 flags)
2205 #else
2206 static int igb_ndo_bridge_setlink(struct net_device *dev,
2207                                   struct nlmsghdr *nlh)
2208 #endif /* HAVE_NDO_BRIDGE_SET_DEL_LINK_FLAGS */
2209 {
2210         struct igb_adapter *adapter = netdev_priv(dev);
2211         struct e1000_hw *hw = &adapter->hw;
2212         struct nlattr *attr, *br_spec;
2213         int rem;
2214
2215         if (!(adapter->vfs_allocated_count))
2216                 return -EOPNOTSUPP;
2217
2218         switch (adapter->hw.mac.type) {
2219         case e1000_82576:
2220         case e1000_i350:
2221         case e1000_i354:
2222                 break;
2223         default:
2224                 return -EOPNOTSUPP;
2225         }
2226
2227         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
2228
2229         nla_for_each_nested(attr, br_spec, rem) {
2230                 __u16 mode;
2231
2232                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
2233                         continue;
2234
2235                 mode = nla_get_u16(attr);
2236                 if (mode == BRIDGE_MODE_VEPA) {
2237                         e1000_vmdq_set_loopback_pf(hw, 0);
2238                         adapter->flags &= ~IGB_FLAG_LOOPBACK_ENABLE;
2239                 } else if (mode == BRIDGE_MODE_VEB) {
2240                         e1000_vmdq_set_loopback_pf(hw, 1);
2241                         adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
2242                 } else
2243                         return -EINVAL;
2244
2245                 netdev_info(adapter->netdev, "enabling bridge mode: %s\n",
2246                             mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
2247         }
2248
2249         return 0;
2250 }
2251
2252 #ifdef HAVE_BRIDGE_FILTER
2253 #ifdef HAVE_NDO_BRIDGE_GETLINK_NLFLAGS
2254 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2255                                   struct net_device *dev, u32 filter_mask,
2256                                   int nlflags)
2257 #else
2258 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2259                                   struct net_device *dev, u32 filter_mask)
2260 #endif /* HAVE_NDO_BRIDGE_GETLINK_NLFLAGS */
2261 #else
2262 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2263                                   struct net_device *dev)
2264 #endif
2265 {
2266         struct igb_adapter *adapter = netdev_priv(dev);
2267         u16 mode;
2268
2269         if (!(adapter->vfs_allocated_count))
2270                 return -EOPNOTSUPP;
2271
2272         if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE)
2273                 mode = BRIDGE_MODE_VEB;
2274         else
2275                 mode = BRIDGE_MODE_VEPA;
2276
2277 #ifdef HAVE_NDO_FDB_ADD_VID
2278 #ifdef HAVE_NDO_BRIDGE_GETLINK_NLFLAGS
2279         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0, nlflags);
2280 #else
2281         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0);
2282 #endif /* HAVE_NDO_BRIDGE_GETLINK_NLFLAGS */
2283 #else
2284         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode);
2285 #endif /* HAVE_NDO_FDB_ADD_VID */
2286 }
2287 #endif /* HAVE_BRIDGE_ATTRIBS */
2288 #endif /* NTF_SELF */
2289
2290 #endif /* HAVE_NDO_SET_FEATURES */
2291 #ifdef HAVE_NET_DEVICE_OPS
2292 static const struct net_device_ops igb_netdev_ops = {
2293         .ndo_open               = igb_open,
2294         .ndo_stop               = igb_close,
2295         .ndo_start_xmit         = igb_xmit_frame,
2296         .ndo_get_stats          = igb_get_stats,
2297         .ndo_set_rx_mode        = igb_set_rx_mode,
2298         .ndo_set_mac_address    = igb_set_mac,
2299         .ndo_change_mtu         = igb_change_mtu,
2300         .ndo_do_ioctl           = igb_ioctl,
2301         .ndo_tx_timeout         = igb_tx_timeout,
2302         .ndo_validate_addr      = eth_validate_addr,
2303         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2304         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2305 #ifdef IFLA_VF_MAX
2306         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
2307         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
2308 #ifdef HAVE_VF_MIN_MAX_TXRATE
2309         .ndo_set_vf_rate        = igb_ndo_set_vf_bw,
2310 #else /* HAVE_VF_MIN_MAX_TXRATE */
2311         .ndo_set_vf_tx_rate     = igb_ndo_set_vf_bw,
2312 #endif /* HAVE_VF_MIN_MAX_TXRATE */
2313         .ndo_get_vf_config      = igb_ndo_get_vf_config,
2314 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
2315         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
2316 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
2317 #endif /* IFLA_VF_MAX */
2318 #ifdef CONFIG_NET_POLL_CONTROLLER
2319         .ndo_poll_controller    = igb_netpoll,
2320 #endif
2321 #ifdef HAVE_NDO_SET_FEATURES
2322         .ndo_fix_features       = igb_fix_features,
2323         .ndo_set_features       = igb_set_features,
2324 #endif
2325 #ifdef HAVE_VLAN_RX_REGISTER
2326         .ndo_vlan_rx_register   = igb_vlan_mode,
2327 #endif
2328 #ifndef HAVE_RHEL6_NETDEV_OPS_EXT_FDB
2329 #ifdef NTF_SELF
2330         .ndo_fdb_add            = igb_ndo_fdb_add,
2331 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2332         .ndo_fdb_del            = igb_ndo_fdb_del,
2333         .ndo_fdb_dump           = igb_ndo_fdb_dump,
2334 #endif
2335 #endif /* ! HAVE_RHEL6_NETDEV_OPS_EXT_FDB */
2336 #ifdef HAVE_BRIDGE_ATTRIBS
2337         .ndo_bridge_setlink     = igb_ndo_bridge_setlink,
2338         .ndo_bridge_getlink     = igb_ndo_bridge_getlink,
2339 #endif /* HAVE_BRIDGE_ATTRIBS */
2340 #endif
2341 };
2342
2343 #ifdef CONFIG_IGB_VMDQ_NETDEV
2344 static const struct net_device_ops igb_vmdq_ops = {
2345         .ndo_open               = &igb_vmdq_open,
2346         .ndo_stop               = &igb_vmdq_close,
2347         .ndo_start_xmit         = &igb_vmdq_xmit_frame,
2348         .ndo_get_stats          = &igb_vmdq_get_stats,
2349         .ndo_set_rx_mode        = &igb_vmdq_set_rx_mode,
2350         .ndo_validate_addr      = eth_validate_addr,
2351         .ndo_set_mac_address    = &igb_vmdq_set_mac,
2352         .ndo_change_mtu         = &igb_vmdq_change_mtu,
2353         .ndo_tx_timeout         = &igb_vmdq_tx_timeout,
2354         .ndo_vlan_rx_register   = &igb_vmdq_vlan_rx_register,
2355         .ndo_vlan_rx_add_vid    = &igb_vmdq_vlan_rx_add_vid,
2356         .ndo_vlan_rx_kill_vid   = &igb_vmdq_vlan_rx_kill_vid,
2357 };
2358
2359 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2360 #endif /* HAVE_NET_DEVICE_OPS */
2361 #ifdef CONFIG_IGB_VMDQ_NETDEV
2362 void igb_assign_vmdq_netdev_ops(struct net_device *vnetdev)
2363 {
2364 #ifdef HAVE_NET_DEVICE_OPS
2365         vnetdev->netdev_ops = &igb_vmdq_ops;
2366 #else
2367         dev->open = &igb_vmdq_open;
2368         dev->stop = &igb_vmdq_close;
2369         dev->hard_start_xmit = &igb_vmdq_xmit_frame;
2370         dev->get_stats = &igb_vmdq_get_stats;
2371 #ifdef HAVE_SET_RX_MODE
2372         dev->set_rx_mode = &igb_vmdq_set_rx_mode;
2373 #endif
2374         dev->set_multicast_list = &igb_vmdq_set_rx_mode;
2375         dev->set_mac_address = &igb_vmdq_set_mac;
2376         dev->change_mtu = &igb_vmdq_change_mtu;
2377 #ifdef HAVE_TX_TIMEOUT
2378         dev->tx_timeout = &igb_vmdq_tx_timeout;
2379 #endif
2380 #if defined(NETIF_F_HW_VLAN_TX) || defined(NETIF_F_HW_VLAN_CTAG_TX)
2381         dev->vlan_rx_register = &igb_vmdq_vlan_rx_register;
2382         dev->vlan_rx_add_vid = &igb_vmdq_vlan_rx_add_vid;
2383         dev->vlan_rx_kill_vid = &igb_vmdq_vlan_rx_kill_vid;
2384 #endif
2385 #endif
2386         igb_vmdq_set_ethtool_ops(vnetdev);
2387         vnetdev->watchdog_timeo = 5 * HZ;
2388
2389 }
2390
2391 int igb_init_vmdq_netdevs(struct igb_adapter *adapter)
2392 {
2393         int pool, err = 0, base_queue;
2394         struct net_device *vnetdev;
2395         struct igb_vmdq_adapter *vmdq_adapter;
2396
2397         for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2398                 int qpp = (!adapter->rss_queues ? 1 : adapter->rss_queues);
2399                 base_queue = pool * qpp;
2400                 vnetdev = alloc_etherdev(sizeof(struct igb_vmdq_adapter));
2401                 if (!vnetdev) {
2402                         err = -ENOMEM;
2403                         break;
2404                 }
2405                 vmdq_adapter = netdev_priv(vnetdev);
2406                 vmdq_adapter->vnetdev = vnetdev;
2407                 vmdq_adapter->real_adapter = adapter;
2408                 vmdq_adapter->rx_ring = adapter->rx_ring[base_queue];
2409                 vmdq_adapter->tx_ring = adapter->tx_ring[base_queue];
2410                 igb_assign_vmdq_netdev_ops(vnetdev);
2411                 snprintf(vnetdev->name, IFNAMSIZ, "%sv%d",
2412                          adapter->netdev->name, pool);
2413                 vnetdev->features = adapter->netdev->features;
2414 #ifdef HAVE_NETDEV_VLAN_FEATURES
2415                 vnetdev->vlan_features = adapter->netdev->vlan_features;
2416 #endif
2417                 adapter->vmdq_netdev[pool-1] = vnetdev;
2418                 err = register_netdev(vnetdev);
2419                 if (err)
2420                         break;
2421         }
2422         return err;
2423 }
2424
2425 int igb_remove_vmdq_netdevs(struct igb_adapter *adapter)
2426 {
2427         int pool, err = 0;
2428
2429         for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2430                 unregister_netdev(adapter->vmdq_netdev[pool-1]);
2431                 free_netdev(adapter->vmdq_netdev[pool-1]);
2432                 adapter->vmdq_netdev[pool-1] = NULL;
2433         }
2434         return err;
2435 }
2436 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2437
2438 /**
2439  * igb_set_fw_version - Configure version string for ethtool
2440  * @adapter: adapter struct
2441  *
2442  **/
2443 static void igb_set_fw_version(struct igb_adapter *adapter)
2444 {
2445         struct e1000_hw *hw = &adapter->hw;
2446         struct e1000_fw_version fw;
2447
2448         e1000_get_fw_version(hw, &fw);
2449
2450         switch (hw->mac.type) {
2451         case e1000_i210:
2452         case e1000_i211:
2453                 if (!(e1000_get_flash_presence_i210(hw))) {
2454                         snprintf(adapter->fw_version,
2455                             sizeof(adapter->fw_version),
2456                             "%2d.%2d-%d",
2457                             fw.invm_major, fw.invm_minor, fw.invm_img_type);
2458                         break;
2459                 }
2460                 /* fall through */
2461         default:
2462                 /* if option rom is valid, display its version too*/
2463                 if (fw.or_valid) {
2464                         snprintf(adapter->fw_version,
2465                             sizeof(adapter->fw_version),
2466                             "%d.%d, 0x%08x, %d.%d.%d",
2467                             fw.eep_major, fw.eep_minor, fw.etrack_id,
2468                             fw.or_major, fw.or_build, fw.or_patch);
2469                 /* no option rom */
2470                 } else {
2471                         if (fw.etrack_id != 0X0000) {
2472                         snprintf(adapter->fw_version,
2473                             sizeof(adapter->fw_version),
2474                             "%d.%d, 0x%08x",
2475                             fw.eep_major, fw.eep_minor, fw.etrack_id);
2476                         } else {
2477                         snprintf(adapter->fw_version,
2478                             sizeof(adapter->fw_version),
2479                             "%d.%d.%d",
2480                             fw.eep_major, fw.eep_minor, fw.eep_build);
2481                         }
2482                 }
2483                 break;
2484         }
2485
2486         return;
2487 }
2488
2489 /**
2490  * igb_init_mas - init Media Autosense feature if enabled in the NVM
2491  *
2492  * @adapter: adapter struct
2493  **/
2494 static void igb_init_mas(struct igb_adapter *adapter)
2495 {
2496         struct e1000_hw *hw = &adapter->hw;
2497         u16 eeprom_data;
2498
2499         e1000_read_nvm(hw, NVM_COMPAT, 1, &eeprom_data);
2500         switch (hw->bus.func) {
2501         case E1000_FUNC_0:
2502                 if (eeprom_data & IGB_MAS_ENABLE_0)
2503                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2504                 break;
2505         case E1000_FUNC_1:
2506                 if (eeprom_data & IGB_MAS_ENABLE_1)
2507                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2508                 break;
2509         case E1000_FUNC_2:
2510                 if (eeprom_data & IGB_MAS_ENABLE_2)
2511                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2512                 break;
2513         case E1000_FUNC_3:
2514                 if (eeprom_data & IGB_MAS_ENABLE_3)
2515                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2516                 break;
2517         default:
2518                 /* Shouldn't get here */
2519                 dev_err(pci_dev_to_dev(adapter->pdev),
2520                         "%s:AMS: Invalid port configuration, returning\n",
2521                         adapter->netdev->name);
2522                 break;
2523         }
2524 }
2525
2526 /**
2527  * igb_probe - Device Initialization Routine
2528  * @pdev: PCI device information struct
2529  * @ent: entry in igb_pci_tbl
2530  *
2531  * Returns 0 on success, negative on failure
2532  *
2533  * igb_probe initializes an adapter identified by a pci_dev structure.
2534  * The OS initialization, configuring of the adapter private structure,
2535  * and a hardware reset occur.
2536  **/
2537 static int __devinit igb_probe(struct pci_dev *pdev,
2538                                const struct pci_device_id *ent)
2539 {
2540         struct net_device *netdev;
2541         struct igb_adapter *adapter;
2542         struct e1000_hw *hw;
2543         u16 eeprom_data = 0;
2544         u8 pba_str[E1000_PBANUM_LENGTH];
2545         s32 ret_val;
2546         static int global_quad_port_a; /* global quad port a indication */
2547         int i, err, pci_using_dac;
2548         static int cards_found;
2549
2550         err = pci_enable_device_mem(pdev);
2551         if (err)
2552                 return err;
2553
2554         pci_using_dac = 0;
2555         err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2556         if (!err) {
2557                 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2558                 if (!err)
2559                         pci_using_dac = 1;
2560         } else {
2561                 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2562                 if (err) {
2563                         err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2564                         if (err) {
2565                                 IGB_ERR("No usable DMA configuration, "
2566                                         "aborting\n");
2567                                 goto err_dma;
2568                         }
2569                 }
2570         }
2571
2572 #ifndef HAVE_ASPM_QUIRKS
2573         /* 82575 requires that the pci-e link partner disable the L0s state */
2574         switch (pdev->device) {
2575         case E1000_DEV_ID_82575EB_COPPER:
2576         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2577         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2578                 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
2579         default:
2580                 break;
2581         }
2582
2583 #endif /* HAVE_ASPM_QUIRKS */
2584         err = pci_request_selected_regions(pdev,
2585                                            pci_select_bars(pdev,
2586                                                            IORESOURCE_MEM),
2587                                            igb_driver_name);
2588         if (err)
2589                 goto err_pci_reg;
2590
2591         pci_enable_pcie_error_reporting(pdev);
2592
2593         pci_set_master(pdev);
2594
2595         err = -ENOMEM;
2596 #ifdef HAVE_TX_MQ
2597         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2598                                    IGB_MAX_TX_QUEUES);
2599 #else
2600         netdev = alloc_etherdev(sizeof(struct igb_adapter));
2601 #endif /* HAVE_TX_MQ */
2602         if (!netdev)
2603                 goto err_alloc_etherdev;
2604
2605         SET_MODULE_OWNER(netdev);
2606         SET_NETDEV_DEV(netdev, &pdev->dev);
2607
2608         pci_set_drvdata(pdev, netdev);
2609         adapter = netdev_priv(netdev);
2610         adapter->netdev = netdev;
2611         adapter->pdev = pdev;
2612         hw = &adapter->hw;
2613         hw->back = adapter;
2614         adapter->port_num = hw->bus.func;
2615         adapter->msg_enable = (1 << debug) - 1;
2616
2617 #ifdef HAVE_PCI_ERS
2618         err = pci_save_state(pdev);
2619         if (err)
2620                 goto err_ioremap;
2621 #endif
2622         err = -EIO;
2623         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
2624                               pci_resource_len(pdev, 0));
2625         if (!hw->hw_addr)
2626                 goto err_ioremap;
2627
2628 #ifdef HAVE_NET_DEVICE_OPS
2629         netdev->netdev_ops = &igb_netdev_ops;
2630 #else /* HAVE_NET_DEVICE_OPS */
2631         netdev->open = &igb_open;
2632         netdev->stop = &igb_close;
2633         netdev->get_stats = &igb_get_stats;
2634 #ifdef HAVE_SET_RX_MODE
2635         netdev->set_rx_mode = &igb_set_rx_mode;
2636 #endif
2637         netdev->set_multicast_list = &igb_set_rx_mode;
2638         netdev->set_mac_address = &igb_set_mac;
2639         netdev->change_mtu = &igb_change_mtu;
2640         netdev->do_ioctl = &igb_ioctl;
2641 #ifdef HAVE_TX_TIMEOUT
2642         netdev->tx_timeout = &igb_tx_timeout;
2643 #endif
2644         netdev->vlan_rx_register = igb_vlan_mode;
2645         netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
2646         netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
2647 #ifdef CONFIG_NET_POLL_CONTROLLER
2648         netdev->poll_controller = igb_netpoll;
2649 #endif
2650         netdev->hard_start_xmit = &igb_xmit_frame;
2651 #endif /* HAVE_NET_DEVICE_OPS */
2652         igb_set_ethtool_ops(netdev);
2653 #ifdef HAVE_TX_TIMEOUT
2654         netdev->watchdog_timeo = 5 * HZ;
2655 #endif
2656
2657         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2658
2659         adapter->bd_number = cards_found;
2660
2661         /* setup the private structure */
2662         err = igb_sw_init(adapter);
2663         if (err)
2664                 goto err_sw_init;
2665
2666         e1000_get_bus_info(hw);
2667
2668         hw->phy.autoneg_wait_to_complete = FALSE;
2669         hw->mac.adaptive_ifs = FALSE;
2670
2671         /* Copper options */
2672         if (hw->phy.media_type == e1000_media_type_copper) {
2673                 hw->phy.mdix = AUTO_ALL_MODES;
2674                 hw->phy.disable_polarity_correction = FALSE;
2675                 hw->phy.ms_type = e1000_ms_hw_default;
2676         }
2677
2678         if (e1000_check_reset_block(hw))
2679                 dev_info(pci_dev_to_dev(pdev),
2680                         "PHY reset is blocked due to SOL/IDER session.\n");
2681
2682         /*
2683          * features is initialized to 0 in allocation, it might have bits
2684          * set by igb_sw_init so we should use an or instead of an
2685          * assignment.
2686          */
2687         netdev->features |= NETIF_F_SG |
2688                             NETIF_F_IP_CSUM |
2689 #ifdef NETIF_F_IPV6_CSUM
2690                             NETIF_F_IPV6_CSUM |
2691 #endif
2692 #ifdef NETIF_F_TSO
2693                             NETIF_F_TSO |
2694 #ifdef NETIF_F_TSO6
2695                             NETIF_F_TSO6 |
2696 #endif
2697 #endif /* NETIF_F_TSO */
2698 #ifdef NETIF_F_RXHASH
2699                             NETIF_F_RXHASH |
2700 #endif
2701                             NETIF_F_RXCSUM |
2702 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2703                             NETIF_F_HW_VLAN_CTAG_RX |
2704                             NETIF_F_HW_VLAN_CTAG_TX;
2705 #else
2706                             NETIF_F_HW_VLAN_RX |
2707                             NETIF_F_HW_VLAN_TX;
2708 #endif
2709
2710         if (hw->mac.type >= e1000_82576)
2711                 netdev->features |= NETIF_F_SCTP_CSUM;
2712
2713 #ifdef HAVE_NDO_SET_FEATURES
2714         /* copy netdev features into list of user selectable features */
2715         netdev->hw_features |= netdev->features;
2716 #ifndef IGB_NO_LRO
2717
2718         /* give us the option of enabling LRO later */
2719         netdev->hw_features |= NETIF_F_LRO;
2720 #endif
2721 #else
2722 #ifdef NETIF_F_GRO
2723
2724         /* this is only needed on kernels prior to 2.6.39 */
2725         netdev->features |= NETIF_F_GRO;
2726 #endif
2727 #endif
2728
2729         /* set this bit last since it cannot be part of hw_features */
2730 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
2731         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2732 #else
2733         netdev->features |= NETIF_F_HW_VLAN_FILTER;
2734 #endif
2735
2736 #ifdef HAVE_NETDEV_VLAN_FEATURES
2737         netdev->vlan_features |= NETIF_F_TSO |
2738                                  NETIF_F_TSO6 |
2739                                  NETIF_F_IP_CSUM |
2740                                  NETIF_F_IPV6_CSUM |
2741                                  NETIF_F_SG;
2742
2743 #endif
2744         if (pci_using_dac)
2745                 netdev->features |= NETIF_F_HIGHDMA;
2746
2747         adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2748 #ifdef DEBUG
2749         if (adapter->dmac != IGB_DMAC_DISABLE)
2750                 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
2751 #endif
2752
2753         /* before reading the NVM, reset the controller to put the device in a
2754          * known good starting state */
2755         e1000_reset_hw(hw);
2756
2757         /* make sure the NVM is good */
2758         if (e1000_validate_nvm_checksum(hw) < 0) {
2759                 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
2760                         " Valid\n");
2761                 err = -EIO;
2762                 goto err_eeprom;
2763         }
2764
2765         /* copy the MAC address out of the NVM */
2766         if (e1000_read_mac_addr(hw))
2767                 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
2768         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2769 #ifdef ETHTOOL_GPERMADDR
2770         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
2771
2772         if (!is_valid_ether_addr(netdev->perm_addr)) {
2773 #else
2774         if (!is_valid_ether_addr(netdev->dev_addr)) {
2775 #endif
2776                 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
2777                 err = -EIO;
2778                 goto err_eeprom;
2779         }
2780
2781         memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
2782         adapter->mac_table[0].queue = adapter->vfs_allocated_count;
2783         adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
2784         igb_rar_set(adapter, 0);
2785
2786         /* get firmware version for ethtool -i */
2787         igb_set_fw_version(adapter);
2788
2789         /* Check if Media Autosense is enabled */
2790         if (hw->mac.type == e1000_82580)
2791                 igb_init_mas(adapter);
2792         setup_timer(&adapter->watchdog_timer, &igb_watchdog,
2793                     (unsigned long) adapter);
2794         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2795                 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
2796                             (unsigned long) adapter);
2797         setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
2798                     (unsigned long) adapter);
2799
2800         INIT_WORK(&adapter->reset_task, igb_reset_task);
2801         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2802         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2803                 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
2804
2805         /* Initialize link properties that are user-changeable */
2806         adapter->fc_autoneg = true;
2807         hw->mac.autoneg = true;
2808         hw->phy.autoneg_advertised = 0x2f;
2809
2810         hw->fc.requested_mode = e1000_fc_default;
2811         hw->fc.current_mode = e1000_fc_default;
2812
2813         e1000_validate_mdi_setting(hw);
2814
2815         /* By default, support wake on port A */
2816         if (hw->bus.func == 0)
2817                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2818
2819         /* Check the NVM for wake support for non-port A ports */
2820         if (hw->mac.type >= e1000_82580)
2821                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2822                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2823                                  &eeprom_data);
2824         else if (hw->bus.func == 1)
2825                 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2826
2827         if (eeprom_data & IGB_EEPROM_APME)
2828                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2829
2830         /* now that we have the eeprom settings, apply the special cases where
2831          * the eeprom may be wrong or the board simply won't support wake on
2832          * lan on a particular port */
2833         switch (pdev->device) {
2834         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2835                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2836                 break;
2837         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2838         case E1000_DEV_ID_82576_FIBER:
2839         case E1000_DEV_ID_82576_SERDES:
2840                 /* Wake events only supported on port A for dual fiber
2841                  * regardless of eeprom setting */
2842                 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
2843                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2844                 break;
2845         case E1000_DEV_ID_82576_QUAD_COPPER:
2846         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2847                 /* if quad port adapter, disable WoL on all but port A */
2848                 if (global_quad_port_a != 0)
2849                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2850                 else
2851                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2852                 /* Reset for multiple quad port adapters */
2853                 if (++global_quad_port_a == 4)
2854                         global_quad_port_a = 0;
2855                 break;
2856         default:
2857                 /* If the device can't wake, don't set software support */
2858                 if (!device_can_wakeup(&adapter->pdev->dev))
2859                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2860                 break;
2861         }
2862
2863         /* initialize the wol settings based on the eeprom settings */
2864         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2865                 adapter->wol |= E1000_WUFC_MAG;
2866
2867         /* Some vendors want WoL disabled by default, but still supported */
2868         if ((hw->mac.type == e1000_i350) &&
2869             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2870                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2871                 adapter->wol = 0;
2872         }
2873
2874         device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
2875                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2876
2877         /* reset the hardware with the new settings */
2878         igb_reset(adapter);
2879         adapter->devrc = 0;
2880
2881 #ifdef HAVE_I2C_SUPPORT
2882         /* Init the I2C interface */
2883         err = igb_init_i2c(adapter);
2884         if (err) {
2885                 dev_err(&pdev->dev, "failed to init i2c interface\n");
2886                 goto err_eeprom;
2887         }
2888 #endif /* HAVE_I2C_SUPPORT */
2889
2890         /* let the f/w know that the h/w is now under the control of the
2891          * driver. */
2892         igb_get_hw_control(adapter);
2893
2894         strncpy(netdev->name, "eth%d", IFNAMSIZ);
2895         err = register_netdev(netdev);
2896         if (err)
2897                 goto err_register;
2898
2899 #ifdef CONFIG_IGB_VMDQ_NETDEV
2900         err = igb_init_vmdq_netdevs(adapter);
2901         if (err)
2902                 goto err_register;
2903 #endif
2904         /* carrier off reporting is important to ethtool even BEFORE open */
2905         netif_carrier_off(netdev);
2906
2907 #ifdef IGB_DCA
2908         if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
2909                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2910                 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
2911                 igb_setup_dca(adapter);
2912         }
2913
2914 #endif
2915 #ifdef HAVE_PTP_1588_CLOCK
2916         /* do hw tstamp init after resetting */
2917         igb_ptp_init(adapter);
2918 #endif /* HAVE_PTP_1588_CLOCK */
2919
2920         dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
2921         /* print bus type/speed/width info */
2922         dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
2923                  netdev->name,
2924                  ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
2925                   (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
2926                   (hw->mac.type == e1000_i354) ? "integrated" :
2927                                                             "unknown"),
2928                  ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
2929                   (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
2930                   (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
2931                   (hw->mac.type == e1000_i354) ? "integrated" :
2932                    "unknown"));
2933         dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
2934         for (i = 0; i < 6; i++)
2935                 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
2936
2937         ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
2938         if (ret_val)
2939                 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
2940         dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
2941                  pba_str);
2942
2943
2944         /* Initialize the thermal sensor on i350 devices. */
2945         if (hw->mac.type == e1000_i350) {
2946                 if (hw->bus.func == 0) {
2947                         u16 ets_word;
2948
2949                         /*
2950                          * Read the NVM to determine if this i350 device
2951                          * supports an external thermal sensor.
2952                          */
2953                         e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
2954                         if (ets_word != 0x0000 && ets_word != 0xFFFF)
2955                                 adapter->ets = true;
2956                         else
2957                                 adapter->ets = false;
2958                 }
2959 #ifdef IGB_HWMON
2960
2961                 igb_sysfs_init(adapter);
2962 #else
2963 #ifdef IGB_PROCFS
2964
2965                 igb_procfs_init(adapter);
2966 #endif /* IGB_PROCFS */
2967 #endif /* IGB_HWMON */
2968         } else {
2969                 adapter->ets = false;
2970         }
2971
2972         if (hw->phy.media_type == e1000_media_type_copper) {
2973                 switch (hw->mac.type) {
2974                 case e1000_i350:
2975                 case e1000_i210:
2976                 case e1000_i211:
2977                         /* Enable EEE for internal copper PHY devices */
2978                         err = e1000_set_eee_i350(hw);
2979                         if ((!err) &&
2980                             (adapter->flags & IGB_FLAG_EEE))
2981                                 adapter->eee_advert =
2982                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
2983                         break;
2984                 case e1000_i354:
2985                         if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
2986                             (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
2987                                 err = e1000_set_eee_i354(hw);
2988                                 if ((!err) &&
2989                                     (adapter->flags & IGB_FLAG_EEE))
2990                                         adapter->eee_advert =
2991                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
2992                         }
2993                         break;
2994                 default:
2995                         break;
2996                 }
2997         }
2998
2999         /* send driver version info to firmware */
3000         if (hw->mac.type >= e1000_i350)
3001                 igb_init_fw(adapter);
3002
3003 #ifndef IGB_NO_LRO
3004         if (netdev->features & NETIF_F_LRO)
3005                 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
3006         else
3007                 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
3008 #endif
3009         dev_info(pci_dev_to_dev(pdev),
3010                  "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
3011                  adapter->msix_entries ? "MSI-X" :
3012                  (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
3013                  adapter->num_rx_queues, adapter->num_tx_queues);
3014
3015         cards_found++;
3016
3017         pm_runtime_put_noidle(&pdev->dev);
3018         return 0;
3019
3020 err_register:
3021         igb_release_hw_control(adapter);
3022 #ifdef HAVE_I2C_SUPPORT
3023         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
3024 #endif /* HAVE_I2C_SUPPORT */
3025 err_eeprom:
3026         if (!e1000_check_reset_block(hw))
3027                 e1000_phy_hw_reset(hw);
3028
3029         if (hw->flash_address)
3030                 iounmap(hw->flash_address);
3031 err_sw_init:
3032         igb_clear_interrupt_scheme(adapter);
3033         igb_reset_sriov_capability(adapter);
3034         iounmap(hw->hw_addr);
3035 err_ioremap:
3036         free_netdev(netdev);
3037 err_alloc_etherdev:
3038         pci_release_selected_regions(pdev,
3039                                      pci_select_bars(pdev, IORESOURCE_MEM));
3040 err_pci_reg:
3041 err_dma:
3042         pci_disable_device(pdev);
3043         return err;
3044 }
3045 #ifdef HAVE_I2C_SUPPORT
3046 /*
3047  *  igb_remove_i2c - Cleanup  I2C interface
3048  *  @adapter: pointer to adapter structure
3049  *
3050  */
3051 static void igb_remove_i2c(struct igb_adapter *adapter)
3052 {
3053
3054         /* free the adapter bus structure */
3055         i2c_del_adapter(&adapter->i2c_adap);
3056 }
3057 #endif /* HAVE_I2C_SUPPORT */
3058
3059 /**
3060  * igb_remove - Device Removal Routine
3061  * @pdev: PCI device information struct
3062  *
3063  * igb_remove is called by the PCI subsystem to alert the driver
3064  * that it should release a PCI device.  The could be caused by a
3065  * Hot-Plug event, or because the driver is going to be removed from
3066  * memory.
3067  **/
3068 static void __devexit igb_remove(struct pci_dev *pdev)
3069 {
3070         struct net_device *netdev = pci_get_drvdata(pdev);
3071         struct igb_adapter *adapter = netdev_priv(netdev);
3072         struct e1000_hw *hw = &adapter->hw;
3073
3074         pm_runtime_get_noresume(&pdev->dev);
3075 #ifdef HAVE_I2C_SUPPORT
3076         igb_remove_i2c(adapter);
3077 #endif /* HAVE_I2C_SUPPORT */
3078 #ifdef HAVE_PTP_1588_CLOCK
3079         igb_ptp_stop(adapter);
3080 #endif /* HAVE_PTP_1588_CLOCK */
3081
3082         /* flush_scheduled work may reschedule our watchdog task, so
3083          * explicitly disable watchdog tasks from being rescheduled  */
3084         set_bit(__IGB_DOWN, &adapter->state);
3085         del_timer_sync(&adapter->watchdog_timer);
3086         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3087                 del_timer_sync(&adapter->dma_err_timer);
3088         del_timer_sync(&adapter->phy_info_timer);
3089
3090         flush_scheduled_work();
3091
3092 #ifdef IGB_DCA
3093         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3094                 dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
3095                 dca_remove_requester(&pdev->dev);
3096                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3097                 E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
3098         }
3099 #endif
3100
3101         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
3102          * would have already happened in close and is redundant. */
3103         igb_release_hw_control(adapter);
3104
3105         unregister_netdev(netdev);
3106 #ifdef CONFIG_IGB_VMDQ_NETDEV
3107         igb_remove_vmdq_netdevs(adapter);
3108 #endif
3109
3110         igb_clear_interrupt_scheme(adapter);
3111         igb_reset_sriov_capability(adapter);
3112
3113         iounmap(hw->hw_addr);
3114         if (hw->flash_address)
3115                 iounmap(hw->flash_address);
3116         pci_release_selected_regions(pdev,
3117                                      pci_select_bars(pdev, IORESOURCE_MEM));
3118
3119 #ifdef IGB_HWMON
3120         igb_sysfs_exit(adapter);
3121 #else
3122 #ifdef IGB_PROCFS
3123         igb_procfs_exit(adapter);
3124 #endif /* IGB_PROCFS */
3125 #endif /* IGB_HWMON */
3126         kfree(adapter->mac_table);
3127         kfree(adapter->shadow_vfta);
3128         free_netdev(netdev);
3129
3130         pci_disable_pcie_error_reporting(pdev);
3131
3132         pci_disable_device(pdev);
3133 }
3134
3135 /**
3136  * igb_sw_init - Initialize general software structures (struct igb_adapter)
3137  * @adapter: board private structure to initialize
3138  *
3139  * igb_sw_init initializes the Adapter private data structure.
3140  * Fields are initialized based on PCI device information and
3141  * OS network device settings (MTU size).
3142  **/
3143 static int igb_sw_init(struct igb_adapter *adapter)
3144 {
3145         struct e1000_hw *hw = &adapter->hw;
3146         struct net_device *netdev = adapter->netdev;
3147         struct pci_dev *pdev = adapter->pdev;
3148
3149         /* PCI config space info */
3150
3151         hw->vendor_id = pdev->vendor;
3152         hw->device_id = pdev->device;
3153         hw->subsystem_vendor_id = pdev->subsystem_vendor;
3154         hw->subsystem_device_id = pdev->subsystem_device;
3155
3156         pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
3157
3158         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3159
3160         /* set default ring sizes */
3161         adapter->tx_ring_count = IGB_DEFAULT_TXD;
3162         adapter->rx_ring_count = IGB_DEFAULT_RXD;
3163
3164         /* set default work limits */
3165         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3166
3167         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
3168                                               VLAN_HLEN;
3169
3170         /* Initialize the hardware-specific values */
3171         if (e1000_setup_init_funcs(hw, TRUE)) {
3172                 dev_err(pci_dev_to_dev(pdev), "Hardware Initialization Failure\n");
3173                 return -EIO;
3174         }
3175
3176         adapter->mac_table = kzalloc(sizeof(struct igb_mac_addr) *
3177                                      hw->mac.rar_entry_count,
3178                                      GFP_ATOMIC);
3179
3180         /* Setup and initialize a copy of the hw vlan table array */
3181         adapter->shadow_vfta = kzalloc(sizeof(u32) * E1000_VFTA_ENTRIES,
3182                                        GFP_ATOMIC);
3183 #ifdef NO_KNI
3184         /* These calls may decrease the number of queues */
3185         if (hw->mac.type < e1000_i210) {
3186                 igb_set_sriov_capability(adapter);
3187         }
3188
3189         if (igb_init_interrupt_scheme(adapter, true)) {
3190                 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
3191                 return -ENOMEM;
3192         }
3193
3194         /* Explicitly disable IRQ since the NIC can be in any state. */
3195         igb_irq_disable(adapter);
3196
3197         set_bit(__IGB_DOWN, &adapter->state);
3198 #endif
3199         return 0;
3200 }
3201
3202 /**
3203  * igb_open - Called when a network interface is made active
3204  * @netdev: network interface device structure
3205  *
3206  * Returns 0 on success, negative value on failure
3207  *
3208  * The open entry point is called when a network interface is made
3209  * active by the system (IFF_UP).  At this point all resources needed
3210  * for transmit and receive operations are allocated, the interrupt
3211  * handler is registered with the OS, the watchdog timer is started,
3212  * and the stack is notified that the interface is ready.
3213  **/
3214 static int __igb_open(struct net_device *netdev, bool resuming)
3215 {
3216         struct igb_adapter *adapter = netdev_priv(netdev);
3217         struct e1000_hw *hw = &adapter->hw;
3218 #ifdef CONFIG_PM_RUNTIME
3219         struct pci_dev *pdev = adapter->pdev;
3220 #endif /* CONFIG_PM_RUNTIME */
3221         int err;
3222         int i;
3223
3224         /* disallow open during test */
3225         if (test_bit(__IGB_TESTING, &adapter->state)) {
3226                 WARN_ON(resuming);
3227                 return -EBUSY;
3228         }
3229
3230 #ifdef CONFIG_PM_RUNTIME
3231         if (!resuming)
3232                 pm_runtime_get_sync(&pdev->dev);
3233 #endif /* CONFIG_PM_RUNTIME */
3234
3235         netif_carrier_off(netdev);
3236
3237         /* allocate transmit descriptors */
3238         err = igb_setup_all_tx_resources(adapter);
3239         if (err)
3240                 goto err_setup_tx;
3241
3242         /* allocate receive descriptors */
3243         err = igb_setup_all_rx_resources(adapter);
3244         if (err)
3245                 goto err_setup_rx;
3246
3247         igb_power_up_link(adapter);
3248
3249         /* before we allocate an interrupt, we must be ready to handle it.
3250          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3251          * as soon as we call pci_request_irq, so we have to setup our
3252          * clean_rx handler before we do so.  */
3253         igb_configure(adapter);
3254
3255         err = igb_request_irq(adapter);
3256         if (err)
3257                 goto err_req_irq;
3258
3259         /* Notify the stack of the actual queue counts. */
3260         netif_set_real_num_tx_queues(netdev,
3261                                      adapter->vmdq_pools ? 1 :
3262                                      adapter->num_tx_queues);
3263
3264         err = netif_set_real_num_rx_queues(netdev,
3265                                            adapter->vmdq_pools ? 1 :
3266                                            adapter->num_rx_queues);
3267         if (err)
3268                 goto err_set_queues;
3269
3270         /* From here on the code is the same as igb_up() */
3271         clear_bit(__IGB_DOWN, &adapter->state);
3272
3273         for (i = 0; i < adapter->num_q_vectors; i++)
3274                 napi_enable(&(adapter->q_vector[i]->napi));
3275         igb_configure_lli(adapter);
3276
3277         /* Clear any pending interrupts. */
3278         E1000_READ_REG(hw, E1000_ICR);
3279
3280         igb_irq_enable(adapter);
3281
3282         /* notify VFs that reset has been completed */
3283         if (adapter->vfs_allocated_count) {
3284                 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
3285                 reg_data |= E1000_CTRL_EXT_PFRSTD;
3286                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
3287         }
3288
3289         netif_tx_start_all_queues(netdev);
3290
3291         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3292                 schedule_work(&adapter->dma_err_task);
3293
3294         /* start the watchdog. */
3295         hw->mac.get_link_status = 1;
3296         schedule_work(&adapter->watchdog_task);
3297
3298         return E1000_SUCCESS;
3299
3300 err_set_queues:
3301         igb_free_irq(adapter);
3302 err_req_irq:
3303         igb_release_hw_control(adapter);
3304         igb_power_down_link(adapter);
3305         igb_free_all_rx_resources(adapter);
3306 err_setup_rx:
3307         igb_free_all_tx_resources(adapter);
3308 err_setup_tx:
3309         igb_reset(adapter);
3310
3311 #ifdef CONFIG_PM_RUNTIME
3312         if (!resuming)
3313                 pm_runtime_put(&pdev->dev);
3314 #endif /* CONFIG_PM_RUNTIME */
3315
3316         return err;
3317 }
3318
3319 static int igb_open(struct net_device *netdev)
3320 {
3321         return __igb_open(netdev, false);
3322 }
3323
3324 /**
3325  * igb_close - Disables a network interface
3326  * @netdev: network interface device structure
3327  *
3328  * Returns 0, this is not allowed to fail
3329  *
3330  * The close entry point is called when an interface is de-activated
3331  * by the OS.  The hardware is still under the driver's control, but
3332  * needs to be disabled.  A global MAC reset is issued to stop the
3333  * hardware, and all transmit and receive resources are freed.
3334  **/
3335 static int __igb_close(struct net_device *netdev, bool suspending)
3336 {
3337         struct igb_adapter *adapter = netdev_priv(netdev);
3338 #ifdef CONFIG_PM_RUNTIME
3339         struct pci_dev *pdev = adapter->pdev;
3340 #endif /* CONFIG_PM_RUNTIME */
3341
3342         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3343
3344 #ifdef CONFIG_PM_RUNTIME
3345         if (!suspending)
3346                 pm_runtime_get_sync(&pdev->dev);
3347 #endif /* CONFIG_PM_RUNTIME */
3348
3349         igb_down(adapter);
3350
3351         igb_release_hw_control(adapter);
3352
3353         igb_free_irq(adapter);
3354
3355         igb_free_all_tx_resources(adapter);
3356         igb_free_all_rx_resources(adapter);
3357
3358 #ifdef CONFIG_PM_RUNTIME
3359         if (!suspending)
3360                 pm_runtime_put_sync(&pdev->dev);
3361 #endif /* CONFIG_PM_RUNTIME */
3362
3363         return 0;
3364 }
3365
3366 static int igb_close(struct net_device *netdev)
3367 {
3368         return __igb_close(netdev, false);
3369 }
3370
3371 /**
3372  * igb_setup_tx_resources - allocate Tx resources (Descriptors)
3373  * @tx_ring: tx descriptor ring (for a specific queue) to setup
3374  *
3375  * Return 0 on success, negative on failure
3376  **/
3377 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3378 {
3379         struct device *dev = tx_ring->dev;
3380         int size;
3381
3382         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3383         tx_ring->tx_buffer_info = vzalloc(size);
3384         if (!tx_ring->tx_buffer_info)
3385                 goto err;
3386
3387         /* round up to nearest 4K */
3388         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3389         tx_ring->size = ALIGN(tx_ring->size, 4096);
3390
3391         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3392                                            &tx_ring->dma, GFP_KERNEL);
3393
3394         if (!tx_ring->desc)
3395                 goto err;
3396
3397         tx_ring->next_to_use = 0;
3398         tx_ring->next_to_clean = 0;
3399
3400         return 0;
3401
3402 err:
3403         vfree(tx_ring->tx_buffer_info);
3404         dev_err(dev,
3405                 "Unable to allocate memory for the transmit descriptor ring\n");
3406         return -ENOMEM;
3407 }
3408
3409 /**
3410  * igb_setup_all_tx_resources - wrapper to allocate Tx resources
3411  *                                (Descriptors) for all queues
3412  * @adapter: board private structure
3413  *
3414  * Return 0 on success, negative on failure
3415  **/
3416 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3417 {
3418         struct pci_dev *pdev = adapter->pdev;
3419         int i, err = 0;
3420
3421         for (i = 0; i < adapter->num_tx_queues; i++) {
3422                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3423                 if (err) {
3424                         dev_err(pci_dev_to_dev(pdev),
3425                                 "Allocation for Tx Queue %u failed\n", i);
3426                         for (i--; i >= 0; i--)
3427                                 igb_free_tx_resources(adapter->tx_ring[i]);
3428                         break;
3429                 }
3430         }
3431
3432         return err;
3433 }
3434
3435 /**
3436  * igb_setup_tctl - configure the transmit control registers
3437  * @adapter: Board private structure
3438  **/
3439 void igb_setup_tctl(struct igb_adapter *adapter)
3440 {
3441         struct e1000_hw *hw = &adapter->hw;
3442         u32 tctl;
3443
3444         /* disable queue 0 which is enabled by default on 82575 and 82576 */
3445         E1000_WRITE_REG(hw, E1000_TXDCTL(0), 0);
3446
3447         /* Program the Transmit Control Register */
3448         tctl = E1000_READ_REG(hw, E1000_TCTL);
3449         tctl &= ~E1000_TCTL_CT;
3450         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3451                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3452
3453         e1000_config_collision_dist(hw);
3454
3455         /* Enable transmits */
3456         tctl |= E1000_TCTL_EN;
3457
3458         E1000_WRITE_REG(hw, E1000_TCTL, tctl);
3459 }
3460
3461 static u32 igb_tx_wthresh(struct igb_adapter *adapter)
3462 {
3463         struct e1000_hw *hw = &adapter->hw;
3464         switch (hw->mac.type) {
3465         case e1000_i354:
3466                 return 4;
3467         case e1000_82576:
3468                 if (adapter->msix_entries)
3469                         return 1;
3470         default:
3471                 break;
3472         }
3473
3474         return 16;
3475 }
3476
3477 /**
3478  * igb_configure_tx_ring - Configure transmit ring after Reset
3479  * @adapter: board private structure
3480  * @ring: tx ring to configure
3481  *
3482  * Configure a transmit ring after a reset.
3483  **/
3484 void igb_configure_tx_ring(struct igb_adapter *adapter,
3485                            struct igb_ring *ring)
3486 {
3487         struct e1000_hw *hw = &adapter->hw;
3488         u32 txdctl = 0;
3489         u64 tdba = ring->dma;
3490         int reg_idx = ring->reg_idx;
3491
3492         /* disable the queue */
3493         E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), 0);
3494         E1000_WRITE_FLUSH(hw);
3495         mdelay(10);
3496
3497         E1000_WRITE_REG(hw, E1000_TDLEN(reg_idx),
3498                         ring->count * sizeof(union e1000_adv_tx_desc));
3499         E1000_WRITE_REG(hw, E1000_TDBAL(reg_idx),
3500                         tdba & 0x00000000ffffffffULL);
3501         E1000_WRITE_REG(hw, E1000_TDBAH(reg_idx), tdba >> 32);
3502
3503         ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
3504         E1000_WRITE_REG(hw, E1000_TDH(reg_idx), 0);
3505         writel(0, ring->tail);
3506
3507         txdctl |= IGB_TX_PTHRESH;
3508         txdctl |= IGB_TX_HTHRESH << 8;
3509         txdctl |= igb_tx_wthresh(adapter) << 16;
3510
3511         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3512         E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), txdctl);
3513 }
3514
3515 /**
3516  * igb_configure_tx - Configure transmit Unit after Reset
3517  * @adapter: board private structure
3518  *
3519  * Configure the Tx unit of the MAC after a reset.
3520  **/
3521 static void igb_configure_tx(struct igb_adapter *adapter)
3522 {
3523         int i;
3524
3525         for (i = 0; i < adapter->num_tx_queues; i++)
3526                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3527 }
3528
3529 /**
3530  * igb_setup_rx_resources - allocate Rx resources (Descriptors)
3531  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
3532  *
3533  * Returns 0 on success, negative on failure
3534  **/
3535 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3536 {
3537         struct device *dev = rx_ring->dev;
3538         int size, desc_len;
3539
3540         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3541         rx_ring->rx_buffer_info = vzalloc(size);
3542         if (!rx_ring->rx_buffer_info)
3543                 goto err;
3544
3545         desc_len = sizeof(union e1000_adv_rx_desc);
3546
3547         /* Round up to nearest 4K */
3548         rx_ring->size = rx_ring->count * desc_len;
3549         rx_ring->size = ALIGN(rx_ring->size, 4096);
3550
3551         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3552                                            &rx_ring->dma, GFP_KERNEL);
3553
3554         if (!rx_ring->desc)
3555                 goto err;
3556
3557         rx_ring->next_to_alloc = 0;
3558         rx_ring->next_to_clean = 0;
3559         rx_ring->next_to_use = 0;
3560
3561         return 0;
3562
3563 err:
3564         vfree(rx_ring->rx_buffer_info);
3565         rx_ring->rx_buffer_info = NULL;
3566         dev_err(dev, "Unable to allocate memory for the receive descriptor"
3567                 " ring\n");
3568         return -ENOMEM;
3569 }
3570
3571 /**
3572  * igb_setup_all_rx_resources - wrapper to allocate Rx resources
3573  *                                (Descriptors) for all queues
3574  * @adapter: board private structure
3575  *
3576  * Return 0 on success, negative on failure
3577  **/
3578 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3579 {
3580         struct pci_dev *pdev = adapter->pdev;
3581         int i, err = 0;
3582
3583         for (i = 0; i < adapter->num_rx_queues; i++) {
3584                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3585                 if (err) {
3586                         dev_err(pci_dev_to_dev(pdev),
3587                                 "Allocation for Rx Queue %u failed\n", i);
3588                         for (i--; i >= 0; i--)
3589                                 igb_free_rx_resources(adapter->rx_ring[i]);
3590                         break;
3591                 }
3592         }
3593
3594         return err;
3595 }
3596
3597 /**
3598  * igb_setup_mrqc - configure the multiple receive queue control registers
3599  * @adapter: Board private structure
3600  **/
3601 static void igb_setup_mrqc(struct igb_adapter *adapter)
3602 {
3603         struct e1000_hw *hw = &adapter->hw;
3604         u32 mrqc, rxcsum;
3605         u32 j, num_rx_queues, shift = 0, shift2 = 0;
3606         static const u32 rsskey[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3607                                         0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3608                                         0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3609                                         0xFA01ACBE };
3610
3611         /* Fill out hash function seeds */
3612         for (j = 0; j < 10; j++)
3613                 E1000_WRITE_REG(hw, E1000_RSSRK(j), rsskey[j]);
3614
3615         num_rx_queues = adapter->rss_queues;
3616
3617         /* 82575 and 82576 supports 2 RSS queues for VMDq */
3618         switch (hw->mac.type) {
3619         case e1000_82575:
3620                 if (adapter->vmdq_pools) {
3621                         shift = 2;
3622                         shift2 = 6;
3623                         break;
3624                 }
3625                 shift = 6;
3626                 break;
3627         case e1000_82576:
3628                 /* 82576 supports 2 RSS queues for SR-IOV */
3629                 if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3630                         shift = 3;
3631                         num_rx_queues = 2;
3632                 }
3633                 break;
3634         default:
3635                 break;
3636         }
3637
3638         /*
3639          * Populate the redirection table 4 entries at a time.  To do this
3640          * we are generating the results for n and n+2 and then interleaving
3641          * those with the results with n+1 and n+3.
3642          */
3643         for (j = 0; j < 32; j++) {
3644                 /* first pass generates n and n+2 */
3645                 u32 base = ((j * 0x00040004) + 0x00020000) * num_rx_queues;
3646                 u32 reta = (base & 0x07800780) >> (7 - shift);
3647
3648                 /* second pass generates n+1 and n+3 */
3649                 base += 0x00010001 * num_rx_queues;
3650                 reta |= (base & 0x07800780) << (1 + shift);
3651
3652                 /* generate 2nd table for 82575 based parts */
3653                 if (shift2)
3654                         reta |= (0x01010101 * num_rx_queues) << shift2;
3655
3656                 E1000_WRITE_REG(hw, E1000_RETA(j), reta);
3657         }
3658
3659         /*
3660          * Disable raw packet checksumming so that RSS hash is placed in
3661          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
3662          * offloads as they are enabled by default
3663          */
3664         rxcsum = E1000_READ_REG(hw, E1000_RXCSUM);
3665         rxcsum |= E1000_RXCSUM_PCSD;
3666
3667         if (adapter->hw.mac.type >= e1000_82576)
3668                 /* Enable Receive Checksum Offload for SCTP */
3669                 rxcsum |= E1000_RXCSUM_CRCOFL;
3670
3671         /* Don't need to set TUOFL or IPOFL, they default to 1 */
3672         E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum);
3673
3674         /* Generate RSS hash based on packet types, TCP/UDP
3675          * port numbers and/or IPv4/v6 src and dst addresses
3676          */
3677         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3678                E1000_MRQC_RSS_FIELD_IPV4_TCP |
3679                E1000_MRQC_RSS_FIELD_IPV6 |
3680                E1000_MRQC_RSS_FIELD_IPV6_TCP |
3681                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3682
3683         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3684                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3685         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3686                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3687
3688         /* If VMDq is enabled then we set the appropriate mode for that, else
3689          * we default to RSS so that an RSS hash is calculated per packet even
3690          * if we are only using one queue */
3691         if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3692                 if (hw->mac.type > e1000_82575) {
3693                         /* Set the default pool for the PF's first queue */
3694                         u32 vtctl = E1000_READ_REG(hw, E1000_VT_CTL);
3695                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3696                                    E1000_VT_CTL_DISABLE_DEF_POOL);
3697                         vtctl |= adapter->vfs_allocated_count <<
3698                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3699                         E1000_WRITE_REG(hw, E1000_VT_CTL, vtctl);
3700                 } else if (adapter->rss_queues > 1) {
3701                         /* set default queue for pool 1 to queue 2 */
3702                         E1000_WRITE_REG(hw, E1000_VT_CTL,
3703                                         adapter->rss_queues << 7);
3704                 }
3705                 if (adapter->rss_queues > 1)
3706                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
3707                 else
3708                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
3709         } else {
3710                 mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
3711         }
3712         igb_vmm_control(adapter);
3713
3714         E1000_WRITE_REG(hw, E1000_MRQC, mrqc);
3715 }
3716
3717 /**
3718  * igb_setup_rctl - configure the receive control registers
3719  * @adapter: Board private structure
3720  **/
3721 void igb_setup_rctl(struct igb_adapter *adapter)
3722 {
3723         struct e1000_hw *hw = &adapter->hw;
3724         u32 rctl;
3725
3726         rctl = E1000_READ_REG(hw, E1000_RCTL);
3727
3728         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3729         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3730
3731         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3732                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3733
3734         /*
3735          * enable stripping of CRC. It's unlikely this will break BMC
3736          * redirection as it did with e1000. Newer features require
3737          * that the HW strips the CRC.
3738          */
3739         rctl |= E1000_RCTL_SECRC;
3740
3741         /* disable store bad packets and clear size bits. */
3742         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3743
3744         /* enable LPE to prevent packets larger than max_frame_size */
3745         rctl |= E1000_RCTL_LPE;
3746
3747         /* disable queue 0 to prevent tail write w/o re-config */
3748         E1000_WRITE_REG(hw, E1000_RXDCTL(0), 0);
3749
3750         /* Attention!!!  For SR-IOV PF driver operations you must enable
3751          * queue drop for all VF and PF queues to prevent head of line blocking
3752          * if an un-trusted VF does not provide descriptors to hardware.
3753          */
3754         if (adapter->vfs_allocated_count) {
3755                 /* set all queue drop enable bits */
3756                 E1000_WRITE_REG(hw, E1000_QDE, ALL_QUEUES);
3757         }
3758
3759         E1000_WRITE_REG(hw, E1000_RCTL, rctl);
3760 }
3761
3762 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3763                                    int vfn)
3764 {
3765         struct e1000_hw *hw = &adapter->hw;
3766         u32 vmolr;
3767
3768         /* if it isn't the PF check to see if VFs are enabled and
3769          * increase the size to support vlan tags */
3770         if (vfn < adapter->vfs_allocated_count &&
3771             adapter->vf_data[vfn].vlans_enabled)
3772                 size += VLAN_HLEN;
3773
3774 #ifdef CONFIG_IGB_VMDQ_NETDEV
3775         if (vfn >= adapter->vfs_allocated_count) {
3776                 int queue = vfn - adapter->vfs_allocated_count;
3777                 struct igb_vmdq_adapter *vadapter;
3778
3779                 vadapter = netdev_priv(adapter->vmdq_netdev[queue-1]);
3780                 if (vadapter->vlgrp)
3781                         size += VLAN_HLEN;
3782         }
3783 #endif
3784         vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3785         vmolr &= ~E1000_VMOLR_RLPML_MASK;
3786         vmolr |= size | E1000_VMOLR_LPE;
3787         E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3788
3789         return 0;
3790 }
3791
3792 /**
3793  * igb_rlpml_set - set maximum receive packet size
3794  * @adapter: board private structure
3795  *
3796  * Configure maximum receivable packet size.
3797  **/
3798 static void igb_rlpml_set(struct igb_adapter *adapter)
3799 {
3800         u32 max_frame_size = adapter->max_frame_size;
3801         struct e1000_hw *hw = &adapter->hw;
3802         u16 pf_id = adapter->vfs_allocated_count;
3803
3804         if (adapter->vmdq_pools && hw->mac.type != e1000_82575) {
3805                 int i;
3806                 for (i = 0; i < adapter->vmdq_pools; i++)
3807                         igb_set_vf_rlpml(adapter, max_frame_size, pf_id + i);
3808                 /*
3809                  * If we're in VMDQ or SR-IOV mode, then set global RLPML
3810                  * to our max jumbo frame size, in case we need to enable
3811                  * jumbo frames on one of the rings later.
3812                  * This will not pass over-length frames into the default
3813                  * queue because it's gated by the VMOLR.RLPML.
3814                  */
3815                 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3816         }
3817         /* Set VF RLPML for the PF device. */
3818         if (adapter->vfs_allocated_count)
3819                 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3820
3821         E1000_WRITE_REG(hw, E1000_RLPML, max_frame_size);
3822 }
3823
3824 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
3825                                         int vfn, bool enable)
3826 {
3827         struct e1000_hw *hw = &adapter->hw;
3828         u32 val;
3829         void __iomem *reg;
3830
3831         if (hw->mac.type < e1000_82576)
3832                 return;
3833
3834         if (hw->mac.type == e1000_i350)
3835                 reg = hw->hw_addr + E1000_DVMOLR(vfn);
3836         else
3837                 reg = hw->hw_addr + E1000_VMOLR(vfn);
3838
3839         val = readl(reg);
3840         if (enable)
3841                 val |= E1000_VMOLR_STRVLAN;
3842         else
3843                 val &= ~(E1000_VMOLR_STRVLAN);
3844         writel(val, reg);
3845 }
3846 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3847                                  int vfn, bool aupe)
3848 {
3849         struct e1000_hw *hw = &adapter->hw;
3850         u32 vmolr;
3851
3852         /*
3853          * This register exists only on 82576 and newer so if we are older then
3854          * we should exit and do nothing
3855          */
3856         if (hw->mac.type < e1000_82576)
3857                 return;
3858
3859         vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3860
3861         if (aupe)
3862                 vmolr |= E1000_VMOLR_AUPE;        /* Accept untagged packets */
3863         else
3864                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3865
3866         /* clear all bits that might not be set */
3867         vmolr &= ~E1000_VMOLR_RSSE;
3868
3869         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3870                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3871
3872         vmolr |= E1000_VMOLR_BAM;          /* Accept broadcast */
3873         vmolr |= E1000_VMOLR_LPE;          /* Accept long packets */
3874
3875         E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3876 }
3877
3878 /**
3879  * igb_configure_rx_ring - Configure a receive ring after Reset
3880  * @adapter: board private structure
3881  * @ring: receive ring to be configured
3882  *
3883  * Configure the Rx unit of the MAC after a reset.
3884  **/
3885 void igb_configure_rx_ring(struct igb_adapter *adapter,
3886                            struct igb_ring *ring)
3887 {
3888         struct e1000_hw *hw = &adapter->hw;
3889         u64 rdba = ring->dma;
3890         int reg_idx = ring->reg_idx;
3891         u32 srrctl = 0, rxdctl = 0;
3892
3893 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
3894         /*
3895          * RLPML prevents us from receiving a frame larger than max_frame so
3896          * it is safe to just set the rx_buffer_len to max_frame without the
3897          * risk of an skb over panic.
3898          */
3899         ring->rx_buffer_len = max_t(u32, adapter->max_frame_size,
3900                                     MAXIMUM_ETHERNET_VLAN_SIZE);
3901
3902 #endif
3903         /* disable the queue */
3904         E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), 0);
3905
3906         /* Set DMA base address registers */
3907         E1000_WRITE_REG(hw, E1000_RDBAL(reg_idx),
3908                         rdba & 0x00000000ffffffffULL);
3909         E1000_WRITE_REG(hw, E1000_RDBAH(reg_idx), rdba >> 32);
3910         E1000_WRITE_REG(hw, E1000_RDLEN(reg_idx),
3911                        ring->count * sizeof(union e1000_adv_rx_desc));
3912
3913         /* initialize head and tail */
3914         ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3915         E1000_WRITE_REG(hw, E1000_RDH(reg_idx), 0);
3916         writel(0, ring->tail);
3917
3918         /* reset next-to- use/clean to place SW in sync with hardwdare */
3919         ring->next_to_clean = 0;
3920         ring->next_to_use = 0;
3921 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3922         ring->next_to_alloc = 0;
3923
3924 #endif
3925         /* set descriptor configuration */
3926 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3927         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3928         srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3929 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3930         srrctl = ALIGN(ring->rx_buffer_len, 1024) >>
3931                  E1000_SRRCTL_BSIZEPKT_SHIFT;
3932 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3933         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3934 #ifdef HAVE_PTP_1588_CLOCK
3935         if (hw->mac.type >= e1000_82580)
3936                 srrctl |= E1000_SRRCTL_TIMESTAMP;
3937 #endif /* HAVE_PTP_1588_CLOCK */
3938         /*
3939          * We should set the drop enable bit if:
3940          *  SR-IOV is enabled
3941          *   or
3942          *  Flow Control is disabled and number of RX queues > 1
3943          *
3944          *  This allows us to avoid head of line blocking for security
3945          *  and performance reasons.
3946          */
3947         if (adapter->vfs_allocated_count ||
3948             (adapter->num_rx_queues > 1 &&
3949              (hw->fc.requested_mode == e1000_fc_none ||
3950               hw->fc.requested_mode == e1000_fc_rx_pause)))
3951                 srrctl |= E1000_SRRCTL_DROP_EN;
3952
3953         E1000_WRITE_REG(hw, E1000_SRRCTL(reg_idx), srrctl);
3954
3955         /* set filtering for VMDQ pools */
3956         igb_set_vmolr(adapter, reg_idx & 0x7, true);
3957
3958         rxdctl |= IGB_RX_PTHRESH;
3959         rxdctl |= IGB_RX_HTHRESH << 8;
3960         rxdctl |= IGB_RX_WTHRESH << 16;
3961
3962         /* enable receive descriptor fetching */
3963         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3964         E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), rxdctl);
3965 }
3966
3967 /**
3968  * igb_configure_rx - Configure receive Unit after Reset
3969  * @adapter: board private structure
3970  *
3971  * Configure the Rx unit of the MAC after a reset.
3972  **/
3973 static void igb_configure_rx(struct igb_adapter *adapter)
3974 {
3975         int i;
3976
3977         /* set UTA to appropriate mode */
3978         igb_set_uta(adapter);
3979
3980         igb_full_sync_mac_table(adapter);
3981         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3982          * the Base and Length of the Rx Descriptor Ring */
3983         for (i = 0; i < adapter->num_rx_queues; i++)
3984                 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3985 }
3986
3987 /**
3988  * igb_free_tx_resources - Free Tx Resources per Queue
3989  * @tx_ring: Tx descriptor ring for a specific queue
3990  *
3991  * Free all transmit software resources
3992  **/
3993 void igb_free_tx_resources(struct igb_ring *tx_ring)
3994 {
3995         igb_clean_tx_ring(tx_ring);
3996
3997         vfree(tx_ring->tx_buffer_info);
3998         tx_ring->tx_buffer_info = NULL;
3999
4000         /* if not set, then don't free */
4001         if (!tx_ring->desc)
4002                 return;
4003
4004         dma_free_coherent(tx_ring->dev, tx_ring->size,
4005                           tx_ring->desc, tx_ring->dma);
4006
4007         tx_ring->desc = NULL;
4008 }
4009
4010 /**
4011  * igb_free_all_tx_resources - Free Tx Resources for All Queues
4012  * @adapter: board private structure
4013  *
4014  * Free all transmit software resources
4015  **/
4016 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
4017 {
4018         int i;
4019
4020         for (i = 0; i < adapter->num_tx_queues; i++)
4021                 igb_free_tx_resources(adapter->tx_ring[i]);
4022 }
4023
4024 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
4025                                     struct igb_tx_buffer *tx_buffer)
4026 {
4027         if (tx_buffer->skb) {
4028                 dev_kfree_skb_any(tx_buffer->skb);
4029                 if (dma_unmap_len(tx_buffer, len))
4030                         dma_unmap_single(ring->dev,
4031                                          dma_unmap_addr(tx_buffer, dma),
4032                                          dma_unmap_len(tx_buffer, len),
4033                                          DMA_TO_DEVICE);
4034         } else if (dma_unmap_len(tx_buffer, len)) {
4035                 dma_unmap_page(ring->dev,
4036                                dma_unmap_addr(tx_buffer, dma),
4037                                dma_unmap_len(tx_buffer, len),
4038                                DMA_TO_DEVICE);
4039         }
4040         tx_buffer->next_to_watch = NULL;
4041         tx_buffer->skb = NULL;
4042         dma_unmap_len_set(tx_buffer, len, 0);
4043         /* buffer_info must be completely set up in the transmit path */
4044 }
4045
4046 /**
4047  * igb_clean_tx_ring - Free Tx Buffers
4048  * @tx_ring: ring to be cleaned
4049  **/
4050 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
4051 {
4052         struct igb_tx_buffer *buffer_info;
4053         unsigned long size;
4054         u16 i;
4055
4056         if (!tx_ring->tx_buffer_info)
4057                 return;
4058         /* Free all the Tx ring sk_buffs */
4059
4060         for (i = 0; i < tx_ring->count; i++) {
4061                 buffer_info = &tx_ring->tx_buffer_info[i];
4062                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
4063         }
4064
4065         netdev_tx_reset_queue(txring_txq(tx_ring));
4066
4067         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
4068         memset(tx_ring->tx_buffer_info, 0, size);
4069
4070         /* Zero out the descriptor ring */
4071         memset(tx_ring->desc, 0, tx_ring->size);
4072
4073         tx_ring->next_to_use = 0;
4074         tx_ring->next_to_clean = 0;
4075 }
4076
4077 /**
4078  * igb_clean_all_tx_rings - Free Tx Buffers for all queues
4079  * @adapter: board private structure
4080  **/
4081 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
4082 {
4083         int i;
4084
4085         for (i = 0; i < adapter->num_tx_queues; i++)
4086                 igb_clean_tx_ring(adapter->tx_ring[i]);
4087 }
4088
4089 /**
4090  * igb_free_rx_resources - Free Rx Resources
4091  * @rx_ring: ring to clean the resources from
4092  *
4093  * Free all receive software resources
4094  **/
4095 void igb_free_rx_resources(struct igb_ring *rx_ring)
4096 {
4097         igb_clean_rx_ring(rx_ring);
4098
4099         vfree(rx_ring->rx_buffer_info);
4100         rx_ring->rx_buffer_info = NULL;
4101
4102         /* if not set, then don't free */
4103         if (!rx_ring->desc)
4104                 return;
4105
4106         dma_free_coherent(rx_ring->dev, rx_ring->size,
4107                           rx_ring->desc, rx_ring->dma);
4108
4109         rx_ring->desc = NULL;
4110 }
4111
4112 /**
4113  * igb_free_all_rx_resources - Free Rx Resources for All Queues
4114  * @adapter: board private structure
4115  *
4116  * Free all receive software resources
4117  **/
4118 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
4119 {
4120         int i;
4121
4122         for (i = 0; i < adapter->num_rx_queues; i++)
4123                 igb_free_rx_resources(adapter->rx_ring[i]);
4124 }
4125
4126 /**
4127  * igb_clean_rx_ring - Free Rx Buffers per Queue
4128  * @rx_ring: ring to free buffers from
4129  **/
4130 void igb_clean_rx_ring(struct igb_ring *rx_ring)
4131 {
4132         unsigned long size;
4133         u16 i;
4134
4135         if (!rx_ring->rx_buffer_info)
4136                 return;
4137
4138 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
4139         if (rx_ring->skb)
4140                 dev_kfree_skb(rx_ring->skb);
4141         rx_ring->skb = NULL;
4142
4143 #endif
4144         /* Free all the Rx ring sk_buffs */
4145         for (i = 0; i < rx_ring->count; i++) {
4146                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
4147 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
4148                 if (buffer_info->dma) {
4149                         dma_unmap_single(rx_ring->dev,
4150                                          buffer_info->dma,
4151                                          rx_ring->rx_buffer_len,
4152                                          DMA_FROM_DEVICE);
4153                         buffer_info->dma = 0;
4154                 }
4155
4156                 if (buffer_info->skb) {
4157                         dev_kfree_skb(buffer_info->skb);
4158                         buffer_info->skb = NULL;
4159                 }
4160 #else
4161                 if (!buffer_info->page)
4162                         continue;
4163
4164                 dma_unmap_page(rx_ring->dev,
4165                                buffer_info->dma,
4166                                PAGE_SIZE,
4167                                DMA_FROM_DEVICE);
4168                 __free_page(buffer_info->page);
4169
4170                 buffer_info->page = NULL;
4171 #endif
4172         }
4173
4174         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
4175         memset(rx_ring->rx_buffer_info, 0, size);
4176
4177         /* Zero out the descriptor ring */
4178         memset(rx_ring->desc, 0, rx_ring->size);
4179
4180         rx_ring->next_to_alloc = 0;
4181         rx_ring->next_to_clean = 0;
4182         rx_ring->next_to_use = 0;
4183 }
4184
4185 /**
4186  * igb_clean_all_rx_rings - Free Rx Buffers for all queues
4187  * @adapter: board private structure
4188  **/
4189 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
4190 {
4191         int i;
4192
4193         for (i = 0; i < adapter->num_rx_queues; i++)
4194                 igb_clean_rx_ring(adapter->rx_ring[i]);
4195 }
4196
4197 /**
4198  * igb_set_mac - Change the Ethernet Address of the NIC
4199  * @netdev: network interface device structure
4200  * @p: pointer to an address structure
4201  *
4202  * Returns 0 on success, negative on failure
4203  **/
4204 static int igb_set_mac(struct net_device *netdev, void *p)
4205 {
4206         struct igb_adapter *adapter = netdev_priv(netdev);
4207         struct e1000_hw *hw = &adapter->hw;
4208         struct sockaddr *addr = p;
4209
4210         if (!is_valid_ether_addr(addr->sa_data))
4211                 return -EADDRNOTAVAIL;
4212
4213         igb_del_mac_filter(adapter, hw->mac.addr,
4214                            adapter->vfs_allocated_count);
4215         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4216         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
4217
4218         /* set the correct pool for the new PF MAC address in entry 0 */
4219         return igb_add_mac_filter(adapter, hw->mac.addr,
4220                            adapter->vfs_allocated_count);
4221 }
4222
4223 /**
4224  * igb_write_mc_addr_list - write multicast addresses to MTA
4225  * @netdev: network interface device structure
4226  *
4227  * Writes multicast address list to the MTA hash table.
4228  * Returns: -ENOMEM on failure
4229  *                0 on no addresses written
4230  *                X on writing X addresses to MTA
4231  **/
4232 int igb_write_mc_addr_list(struct net_device *netdev)
4233 {
4234         struct igb_adapter *adapter = netdev_priv(netdev);
4235         struct e1000_hw *hw = &adapter->hw;
4236 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4237         struct netdev_hw_addr *ha;
4238 #else
4239         struct dev_mc_list *ha;
4240 #endif
4241         u8  *mta_list;
4242         int i, count;
4243 #ifdef CONFIG_IGB_VMDQ_NETDEV
4244         int vm;
4245 #endif
4246         count = netdev_mc_count(netdev);
4247 #ifdef CONFIG_IGB_VMDQ_NETDEV
4248         for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4249                 if (!adapter->vmdq_netdev[vm])
4250                         break;
4251                 if (!netif_running(adapter->vmdq_netdev[vm]))
4252                         continue;
4253                 count += netdev_mc_count(adapter->vmdq_netdev[vm]);
4254         }
4255 #endif
4256
4257         if (!count) {
4258                 e1000_update_mc_addr_list(hw, NULL, 0);
4259                 return 0;
4260         }
4261         mta_list = kzalloc(count * 6, GFP_ATOMIC);
4262         if (!mta_list)
4263                 return -ENOMEM;
4264
4265         /* The shared function expects a packed array of only addresses. */
4266         i = 0;
4267         netdev_for_each_mc_addr(ha, netdev)
4268 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4269                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
4270 #else
4271                 memcpy(mta_list + (i++ * ETH_ALEN), ha->dmi_addr, ETH_ALEN);
4272 #endif
4273 #ifdef CONFIG_IGB_VMDQ_NETDEV
4274         for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4275                 if (!adapter->vmdq_netdev[vm])
4276                         break;
4277                 if (!netif_running(adapter->vmdq_netdev[vm]) ||
4278                     !netdev_mc_count(adapter->vmdq_netdev[vm]))
4279                         continue;
4280                 netdev_for_each_mc_addr(ha, adapter->vmdq_netdev[vm])
4281 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4282                         memcpy(mta_list + (i++ * ETH_ALEN),
4283                                ha->addr, ETH_ALEN);
4284 #else
4285                         memcpy(mta_list + (i++ * ETH_ALEN),
4286                                ha->dmi_addr, ETH_ALEN);
4287 #endif
4288         }
4289 #endif
4290         e1000_update_mc_addr_list(hw, mta_list, i);
4291         kfree(mta_list);
4292
4293         return count;
4294 }
4295
4296 void igb_rar_set(struct igb_adapter *adapter, u32 index)
4297 {
4298         u32 rar_low, rar_high;
4299         struct e1000_hw *hw = &adapter->hw;
4300         u8 *addr = adapter->mac_table[index].addr;
4301         /* HW expects these in little endian so we reverse the byte order
4302          * from network order (big endian) to little endian
4303          */
4304         rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
4305                   ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
4306         rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
4307
4308         /* Indicate to hardware the Address is Valid. */
4309         if (adapter->mac_table[index].state & IGB_MAC_STATE_IN_USE)
4310                 rar_high |= E1000_RAH_AV;
4311
4312         if (hw->mac.type == e1000_82575)
4313                 rar_high |= E1000_RAH_POOL_1 * adapter->mac_table[index].queue;
4314         else
4315                 rar_high |= E1000_RAH_POOL_1 << adapter->mac_table[index].queue;
4316
4317         E1000_WRITE_REG(hw, E1000_RAL(index), rar_low);
4318         E1000_WRITE_FLUSH(hw);
4319         E1000_WRITE_REG(hw, E1000_RAH(index), rar_high);
4320         E1000_WRITE_FLUSH(hw);
4321 }
4322
4323 void igb_full_sync_mac_table(struct igb_adapter *adapter)
4324 {
4325         struct e1000_hw *hw = &adapter->hw;
4326         int i;
4327         for (i = 0; i < hw->mac.rar_entry_count; i++) {
4328                         igb_rar_set(adapter, i);
4329         }
4330 }
4331
4332 void igb_sync_mac_table(struct igb_adapter *adapter)
4333 {
4334         struct e1000_hw *hw = &adapter->hw;
4335         int i;
4336         for (i = 0; i < hw->mac.rar_entry_count; i++) {
4337                 if (adapter->mac_table[i].state & IGB_MAC_STATE_MODIFIED)
4338                         igb_rar_set(adapter, i);
4339                 adapter->mac_table[i].state &= ~(IGB_MAC_STATE_MODIFIED);
4340         }
4341 }
4342
4343 int igb_available_rars(struct igb_adapter *adapter)
4344 {
4345         struct e1000_hw *hw = &adapter->hw;
4346         int i, count = 0;
4347
4348         for (i = 0; i < hw->mac.rar_entry_count; i++) {
4349                 if (adapter->mac_table[i].state == 0)
4350                         count++;
4351         }
4352         return count;
4353 }
4354
4355 #ifdef HAVE_SET_RX_MODE
4356 /**
4357  * igb_write_uc_addr_list - write unicast addresses to RAR table
4358  * @netdev: network interface device structure
4359  *
4360  * Writes unicast address list to the RAR table.
4361  * Returns: -ENOMEM on failure/insufficient address space
4362  *                0 on no addresses written
4363  *                X on writing X addresses to the RAR table
4364  **/
4365 static int igb_write_uc_addr_list(struct net_device *netdev)
4366 {
4367         struct igb_adapter *adapter = netdev_priv(netdev);
4368         unsigned int vfn = adapter->vfs_allocated_count;
4369         int count = 0;
4370
4371         /* return ENOMEM indicating insufficient memory for addresses */
4372         if (netdev_uc_count(netdev) > igb_available_rars(adapter))
4373                 return -ENOMEM;
4374         if (!netdev_uc_empty(netdev)) {
4375 #ifdef NETDEV_HW_ADDR_T_UNICAST
4376                 struct netdev_hw_addr *ha;
4377 #else
4378                 struct dev_mc_list *ha;
4379 #endif
4380                 netdev_for_each_uc_addr(ha, netdev) {
4381 #ifdef NETDEV_HW_ADDR_T_UNICAST
4382                         igb_del_mac_filter(adapter, ha->addr, vfn);
4383                         igb_add_mac_filter(adapter, ha->addr, vfn);
4384 #else
4385                         igb_del_mac_filter(adapter, ha->da_addr, vfn);
4386                         igb_add_mac_filter(adapter, ha->da_addr, vfn);
4387 #endif
4388                         count++;
4389                 }
4390         }
4391         return count;
4392 }
4393
4394 #endif /* HAVE_SET_RX_MODE */
4395 /**
4396  * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
4397  * @netdev: network interface device structure
4398  *
4399  * The set_rx_mode entry point is called whenever the unicast or multicast
4400  * address lists or the network interface flags are updated.  This routine is
4401  * responsible for configuring the hardware for proper unicast, multicast,
4402  * promiscuous mode, and all-multi behavior.
4403  **/
4404 static void igb_set_rx_mode(struct net_device *netdev)
4405 {
4406         struct igb_adapter *adapter = netdev_priv(netdev);
4407         struct e1000_hw *hw = &adapter->hw;
4408         unsigned int vfn = adapter->vfs_allocated_count;
4409         u32 rctl, vmolr = 0;
4410         int count;
4411
4412         /* Check for Promiscuous and All Multicast modes */
4413         rctl = E1000_READ_REG(hw, E1000_RCTL);
4414
4415         /* clear the effected bits */
4416         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
4417
4418         if (netdev->flags & IFF_PROMISC) {
4419                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
4420                 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
4421                 /* retain VLAN HW filtering if in VT mode */
4422                 if (adapter->vfs_allocated_count || adapter->vmdq_pools)
4423                         rctl |= E1000_RCTL_VFE;
4424         } else {
4425                 if (netdev->flags & IFF_ALLMULTI) {
4426                         rctl |= E1000_RCTL_MPE;
4427                         vmolr |= E1000_VMOLR_MPME;
4428                 } else {
4429                         /*
4430                          * Write addresses to the MTA, if the attempt fails
4431                          * then we should just turn on promiscuous mode so
4432                          * that we can at least receive multicast traffic
4433                          */
4434                         count = igb_write_mc_addr_list(netdev);
4435                         if (count < 0) {
4436                                 rctl |= E1000_RCTL_MPE;
4437                                 vmolr |= E1000_VMOLR_MPME;
4438                         } else if (count) {
4439                                 vmolr |= E1000_VMOLR_ROMPE;
4440                         }
4441                 }
4442 #ifdef HAVE_SET_RX_MODE
4443                 /*
4444                  * Write addresses to available RAR registers, if there is not
4445                  * sufficient space to store all the addresses then enable
4446                  * unicast promiscuous mode
4447                  */
4448                 count = igb_write_uc_addr_list(netdev);
4449                 if (count < 0) {
4450                         rctl |= E1000_RCTL_UPE;
4451                         vmolr |= E1000_VMOLR_ROPE;
4452                 }
4453 #endif /* HAVE_SET_RX_MODE */
4454                 rctl |= E1000_RCTL_VFE;
4455         }
4456         E1000_WRITE_REG(hw, E1000_RCTL, rctl);
4457
4458         /*
4459          * In order to support SR-IOV and eventually VMDq it is necessary to set
4460          * the VMOLR to enable the appropriate modes.  Without this workaround
4461          * we will have issues with VLAN tag stripping not being done for frames
4462          * that are only arriving because we are the default pool
4463          */
4464         if (hw->mac.type < e1000_82576)
4465                 return;
4466
4467         vmolr |= E1000_READ_REG(hw, E1000_VMOLR(vfn)) &
4468                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
4469         E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
4470         igb_restore_vf_multicasts(adapter);
4471 }
4472
4473 static void igb_check_wvbr(struct igb_adapter *adapter)
4474 {
4475         struct e1000_hw *hw = &adapter->hw;
4476         u32 wvbr = 0;
4477
4478         switch (hw->mac.type) {
4479         case e1000_82576:
4480         case e1000_i350:
4481                 if (!(wvbr = E1000_READ_REG(hw, E1000_WVBR)))
4482                         return;
4483                 break;
4484         default:
4485                 break;
4486         }
4487
4488         adapter->wvbr |= wvbr;
4489 }
4490
4491 #define IGB_STAGGERED_QUEUE_OFFSET 8
4492
4493 static void igb_spoof_check(struct igb_adapter *adapter)
4494 {
4495         int j;
4496
4497         if (!adapter->wvbr)
4498                 return;
4499
4500         switch (adapter->hw.mac.type) {
4501         case e1000_82576:
4502                 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4503                         if (adapter->wvbr & (1 << j) ||
4504                             adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
4505                                 DPRINTK(DRV, WARNING,
4506                                         "Spoof event(s) detected on VF %d\n", j);
4507                                 adapter->wvbr &=
4508                                         ~((1 << j) |
4509                                           (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
4510                         }
4511                 }
4512                 break;
4513         case e1000_i350:
4514                 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4515                         if (adapter->wvbr & (1 << j)) {
4516                                 DPRINTK(DRV, WARNING,
4517                                         "Spoof event(s) detected on VF %d\n", j);
4518                                 adapter->wvbr &= ~(1 << j);
4519                         }
4520                 }
4521                 break;
4522         default:
4523                 break;
4524         }
4525 }
4526
4527 /* Need to wait a few seconds after link up to get diagnostic information from
4528  * the phy */
4529 static void igb_update_phy_info(unsigned long data)
4530 {
4531         struct igb_adapter *adapter = (struct igb_adapter *) data;
4532         e1000_get_phy_info(&adapter->hw);
4533 }
4534
4535 /**
4536  * igb_has_link - check shared code for link and determine up/down
4537  * @adapter: pointer to driver private info
4538  **/
4539 bool igb_has_link(struct igb_adapter *adapter)
4540 {
4541         struct e1000_hw *hw = &adapter->hw;
4542         bool link_active = FALSE;
4543
4544         /* get_link_status is set on LSC (link status) interrupt or
4545          * rx sequence error interrupt.  get_link_status will stay
4546          * false until the e1000_check_for_link establishes link
4547          * for copper adapters ONLY
4548          */
4549         switch (hw->phy.media_type) {
4550         case e1000_media_type_copper:
4551                 if (!hw->mac.get_link_status)
4552                         return true;
4553         case e1000_media_type_internal_serdes:
4554                 e1000_check_for_link(hw);
4555                 link_active = !hw->mac.get_link_status;
4556                 break;
4557         case e1000_media_type_unknown:
4558         default:
4559                 break;
4560         }
4561
4562         if (((hw->mac.type == e1000_i210) ||
4563              (hw->mac.type == e1000_i211)) &&
4564              (hw->phy.id == I210_I_PHY_ID)) {
4565                 if (!netif_carrier_ok(adapter->netdev)) {
4566                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4567                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4568                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4569                         adapter->link_check_timeout = jiffies;
4570                 }
4571         }
4572
4573         return link_active;
4574 }
4575
4576 /**
4577  * igb_watchdog - Timer Call-back
4578  * @data: pointer to adapter cast into an unsigned long
4579  **/
4580 static void igb_watchdog(unsigned long data)
4581 {
4582         struct igb_adapter *adapter = (struct igb_adapter *)data;
4583         /* Do the rest outside of interrupt context */
4584         schedule_work(&adapter->watchdog_task);
4585 }
4586
4587 static void igb_watchdog_task(struct work_struct *work)
4588 {
4589         struct igb_adapter *adapter = container_of(work,
4590                                                    struct igb_adapter,
4591                                                    watchdog_task);
4592         struct e1000_hw *hw = &adapter->hw;
4593         struct net_device *netdev = adapter->netdev;
4594         u32 link;
4595         int i;
4596         u32 thstat, ctrl_ext;
4597         u32 connsw;
4598
4599         link = igb_has_link(adapter);
4600         /* Force link down if we have fiber to swap to */
4601         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4602                 if (hw->phy.media_type == e1000_media_type_copper) {
4603                         connsw = E1000_READ_REG(hw, E1000_CONNSW);
4604                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4605                                 link = 0;
4606                 }
4607         }
4608
4609         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4610                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4611                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4612                 else
4613                         link = FALSE;
4614         }
4615
4616         if (link) {
4617                 /* Perform a reset if the media type changed. */
4618                 if (hw->dev_spec._82575.media_changed) {
4619                         hw->dev_spec._82575.media_changed = false;
4620                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
4621                         igb_reset(adapter);
4622                 }
4623
4624                 /* Cancel scheduled suspend requests. */
4625                 pm_runtime_resume(netdev->dev.parent);
4626
4627                 if (!netif_carrier_ok(netdev)) {
4628                         u32 ctrl;
4629                         e1000_get_speed_and_duplex(hw,
4630                                                    &adapter->link_speed,
4631                                                    &adapter->link_duplex);
4632
4633                         ctrl = E1000_READ_REG(hw, E1000_CTRL);
4634                         /* Links status message must follow this format */
4635                         printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s, "
4636                                  "Flow Control: %s\n",
4637                                netdev->name,
4638                                adapter->link_speed,
4639                                adapter->link_duplex == FULL_DUPLEX ?
4640                                  "Full Duplex" : "Half Duplex",
4641                                ((ctrl & E1000_CTRL_TFCE) &&
4642                                 (ctrl & E1000_CTRL_RFCE)) ? "RX/TX":
4643                                ((ctrl & E1000_CTRL_RFCE) ?  "RX" :
4644                                ((ctrl & E1000_CTRL_TFCE) ?  "TX" : "None")));
4645                         /* adjust timeout factor according to speed/duplex */
4646                         adapter->tx_timeout_factor = 1;
4647                         switch (adapter->link_speed) {
4648                         case SPEED_10:
4649                                 adapter->tx_timeout_factor = 14;
4650                                 break;
4651                         case SPEED_100:
4652                                 /* maybe add some timeout factor ? */
4653                                 break;
4654                         default:
4655                                 break;
4656                         }
4657
4658                         netif_carrier_on(netdev);
4659                         netif_tx_wake_all_queues(netdev);
4660
4661                         igb_ping_all_vfs(adapter);
4662 #ifdef IFLA_VF_MAX
4663                         igb_check_vf_rate_limit(adapter);
4664 #endif /* IFLA_VF_MAX */
4665
4666                         /* link state has changed, schedule phy info update */
4667                         if (!test_bit(__IGB_DOWN, &adapter->state))
4668                                 mod_timer(&adapter->phy_info_timer,
4669                                           round_jiffies(jiffies + 2 * HZ));
4670                 }
4671         } else {
4672                 if (netif_carrier_ok(netdev)) {
4673                         adapter->link_speed = 0;
4674                         adapter->link_duplex = 0;
4675                         /* check for thermal sensor event on i350 */
4676                         if (hw->mac.type == e1000_i350) {
4677                                 thstat = E1000_READ_REG(hw, E1000_THSTAT);
4678                                 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
4679                                 if ((hw->phy.media_type ==
4680                                         e1000_media_type_copper) &&
4681                                         !(ctrl_ext &
4682                                         E1000_CTRL_EXT_LINK_MODE_SGMII)) {
4683                                         if (thstat & E1000_THSTAT_PWR_DOWN) {
4684                                                 printk(KERN_ERR "igb: %s The "
4685                                                 "network adapter was stopped "
4686                                                 "because it overheated.\n",
4687                                                 netdev->name);
4688                                         }
4689                                         if (thstat & E1000_THSTAT_LINK_THROTTLE) {
4690                                                 printk(KERN_INFO
4691                                                         "igb: %s The network "
4692                                                         "adapter supported "
4693                                                         "link speed "
4694                                                         "was downshifted "
4695                                                         "because it "
4696                                                         "overheated.\n",
4697                                                         netdev->name);
4698                                         }
4699                                 }
4700                         }
4701
4702                         /* Links status message must follow this format */
4703                         printk(KERN_INFO "igb: %s NIC Link is Down\n",
4704                                netdev->name);
4705                         netif_carrier_off(netdev);
4706                         netif_tx_stop_all_queues(netdev);
4707
4708                         igb_ping_all_vfs(adapter);
4709
4710                         /* link state has changed, schedule phy info update */
4711                         if (!test_bit(__IGB_DOWN, &adapter->state))
4712                                 mod_timer(&adapter->phy_info_timer,
4713                                           round_jiffies(jiffies + 2 * HZ));
4714                         /* link is down, time to check for alternate media */
4715                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4716                                 igb_check_swap_media(adapter);
4717                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4718                                         schedule_work(&adapter->reset_task);
4719                                         /* return immediately */
4720                                         return;
4721                                 }
4722                         }
4723                         pm_schedule_suspend(netdev->dev.parent,
4724                                             MSEC_PER_SEC * 5);
4725
4726                 /* also check for alternate media here */
4727                 } else if (!netif_carrier_ok(netdev) &&
4728                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4729                         hw->mac.ops.power_up_serdes(hw);
4730                         igb_check_swap_media(adapter);
4731                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4732                                 schedule_work(&adapter->reset_task);
4733                                 /* return immediately */
4734                                 return;
4735                         }
4736                 }
4737         }
4738
4739         igb_update_stats(adapter);
4740
4741         for (i = 0; i < adapter->num_tx_queues; i++) {
4742                 struct igb_ring *tx_ring = adapter->tx_ring[i];
4743                 if (!netif_carrier_ok(netdev)) {
4744                         /* We've lost link, so the controller stops DMA,
4745                          * but we've got queued Tx work that's never going
4746                          * to get done, so reset controller to flush Tx.
4747                          * (Do the reset outside of interrupt context). */
4748                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4749                                 adapter->tx_timeout_count++;
4750                                 schedule_work(&adapter->reset_task);
4751                                 /* return immediately since reset is imminent */
4752                                 return;
4753                         }
4754                 }
4755
4756                 /* Force detection of hung controller every watchdog period */
4757                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4758         }
4759
4760         /* Cause software interrupt to ensure rx ring is cleaned */
4761         if (adapter->msix_entries) {
4762                 u32 eics = 0;
4763                 for (i = 0; i < adapter->num_q_vectors; i++)
4764                         eics |= adapter->q_vector[i]->eims_value;
4765                 E1000_WRITE_REG(hw, E1000_EICS, eics);
4766         } else {
4767                 E1000_WRITE_REG(hw, E1000_ICS, E1000_ICS_RXDMT0);
4768         }
4769
4770         igb_spoof_check(adapter);
4771
4772         /* Reset the timer */
4773         if (!test_bit(__IGB_DOWN, &adapter->state)) {
4774                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4775                         mod_timer(&adapter->watchdog_timer,
4776                                   round_jiffies(jiffies +  HZ));
4777                 else
4778                         mod_timer(&adapter->watchdog_timer,
4779                                   round_jiffies(jiffies + 2 * HZ));
4780         }
4781 }
4782
4783 static void igb_dma_err_task(struct work_struct *work)
4784 {
4785         struct igb_adapter *adapter = container_of(work,
4786                                                    struct igb_adapter,
4787                                                    dma_err_task);
4788         int vf;
4789         struct e1000_hw *hw = &adapter->hw;
4790         struct net_device *netdev = adapter->netdev;
4791         u32 hgptc;
4792         u32 ciaa, ciad;
4793
4794         hgptc = E1000_READ_REG(hw, E1000_HGPTC);
4795         if (hgptc) /* If incrementing then no need for the check below */
4796                 goto dma_timer_reset;
4797         /*
4798          * Check to see if a bad DMA write target from an errant or
4799          * malicious VF has caused a PCIe error.  If so then we can
4800          * issue a VFLR to the offending VF(s) and then resume without
4801          * requesting a full slot reset.
4802          */
4803
4804         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
4805                 ciaa = (vf << 16) | 0x80000000;
4806                 /* 32 bit read so align, we really want status at offset 6 */
4807                 ciaa |= PCI_COMMAND;
4808                 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4809                 ciad = E1000_READ_REG(hw, E1000_CIAD);
4810                 ciaa &= 0x7FFFFFFF;
4811                 /* disable debug mode asap after reading data */
4812                 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4813                 /* Get the upper 16 bits which will be the PCI status reg */
4814                 ciad >>= 16;
4815                 if (ciad & (PCI_STATUS_REC_MASTER_ABORT |
4816                             PCI_STATUS_REC_TARGET_ABORT |
4817                             PCI_STATUS_SIG_SYSTEM_ERROR)) {
4818                         netdev_err(netdev, "VF %d suffered error\n", vf);
4819                         /* Issue VFLR */
4820                         ciaa = (vf << 16) | 0x80000000;
4821                         ciaa |= 0xA8;
4822                         E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4823                         ciad = 0x00008000;  /* VFLR */
4824                         E1000_WRITE_REG(hw, E1000_CIAD, ciad);
4825                         ciaa &= 0x7FFFFFFF;
4826                         E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4827                 }
4828         }
4829 dma_timer_reset:
4830         /* Reset the timer */
4831         if (!test_bit(__IGB_DOWN, &adapter->state))
4832                 mod_timer(&adapter->dma_err_timer,
4833                           round_jiffies(jiffies + HZ / 10));
4834 }
4835
4836 /**
4837  * igb_dma_err_timer - Timer Call-back
4838  * @data: pointer to adapter cast into an unsigned long
4839  **/
4840 static void igb_dma_err_timer(unsigned long data)
4841 {
4842         struct igb_adapter *adapter = (struct igb_adapter *)data;
4843         /* Do the rest outside of interrupt context */
4844         schedule_work(&adapter->dma_err_task);
4845 }
4846
4847 enum latency_range {
4848         lowest_latency = 0,
4849         low_latency = 1,
4850         bulk_latency = 2,
4851         latency_invalid = 255
4852 };
4853
4854 /**
4855  * igb_update_ring_itr - update the dynamic ITR value based on packet size
4856  *
4857  *      Stores a new ITR value based on strictly on packet size.  This
4858  *      algorithm is less sophisticated than that used in igb_update_itr,
4859  *      due to the difficulty of synchronizing statistics across multiple
4860  *      receive rings.  The divisors and thresholds used by this function
4861  *      were determined based on theoretical maximum wire speed and testing
4862  *      data, in order to minimize response time while increasing bulk
4863  *      throughput.
4864  *      This functionality is controlled by the InterruptThrottleRate module
4865  *      parameter (see igb_param.c)
4866  *      NOTE:  This function is called only when operating in a multiqueue
4867  *             receive environment.
4868  * @q_vector: pointer to q_vector
4869  **/
4870 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4871 {
4872         int new_val = q_vector->itr_val;
4873         int avg_wire_size = 0;
4874         struct igb_adapter *adapter = q_vector->adapter;
4875         unsigned int packets;
4876
4877         /* For non-gigabit speeds, just fix the interrupt rate at 4000
4878          * ints/sec - ITR timer value of 120 ticks.
4879          */
4880         switch (adapter->link_speed) {
4881         case SPEED_10:
4882         case SPEED_100:
4883                 new_val = IGB_4K_ITR;
4884                 goto set_itr_val;
4885         default:
4886                 break;
4887         }
4888
4889         packets = q_vector->rx.total_packets;
4890         if (packets)
4891                 avg_wire_size = q_vector->rx.total_bytes / packets;
4892
4893         packets = q_vector->tx.total_packets;
4894         if (packets)
4895                 avg_wire_size = max_t(u32, avg_wire_size,
4896                                       q_vector->tx.total_bytes / packets);
4897
4898         /* if avg_wire_size isn't set no work was done */
4899         if (!avg_wire_size)
4900                 goto clear_counts;
4901
4902         /* Add 24 bytes to size to account for CRC, preamble, and gap */
4903         avg_wire_size += 24;
4904
4905         /* Don't starve jumbo frames */
4906         avg_wire_size = min(avg_wire_size, 3000);
4907
4908         /* Give a little boost to mid-size frames */
4909         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4910                 new_val = avg_wire_size / 3;
4911         else
4912                 new_val = avg_wire_size / 2;
4913
4914         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4915         if (new_val < IGB_20K_ITR &&
4916             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4917              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4918                 new_val = IGB_20K_ITR;
4919
4920 set_itr_val:
4921         if (new_val != q_vector->itr_val) {
4922                 q_vector->itr_val = new_val;
4923                 q_vector->set_itr = 1;
4924         }
4925 clear_counts:
4926         q_vector->rx.total_bytes = 0;
4927         q_vector->rx.total_packets = 0;
4928         q_vector->tx.total_bytes = 0;
4929         q_vector->tx.total_packets = 0;
4930 }
4931
4932 /**
4933  * igb_update_itr - update the dynamic ITR value based on statistics
4934  *      Stores a new ITR value based on packets and byte
4935  *      counts during the last interrupt.  The advantage of per interrupt
4936  *      computation is faster updates and more accurate ITR for the current
4937  *      traffic pattern.  Constants in this function were computed
4938  *      based on theoretical maximum wire speed and thresholds were set based
4939  *      on testing data as well as attempting to minimize response time
4940  *      while increasing bulk throughput.
4941  *      this functionality is controlled by the InterruptThrottleRate module
4942  *      parameter (see igb_param.c)
4943  *      NOTE:  These calculations are only valid when operating in a single-
4944  *             queue environment.
4945  * @q_vector: pointer to q_vector
4946  * @ring_container: ring info to update the itr for
4947  **/
4948 static void igb_update_itr(struct igb_q_vector *q_vector,
4949                            struct igb_ring_container *ring_container)
4950 {
4951         unsigned int packets = ring_container->total_packets;
4952         unsigned int bytes = ring_container->total_bytes;
4953         u8 itrval = ring_container->itr;
4954
4955         /* no packets, exit with status unchanged */
4956         if (packets == 0)
4957                 return;
4958
4959         switch (itrval) {
4960         case lowest_latency:
4961                 /* handle TSO and jumbo frames */
4962                 if (bytes/packets > 8000)
4963                         itrval = bulk_latency;
4964                 else if ((packets < 5) && (bytes > 512))
4965                         itrval = low_latency;
4966                 break;
4967         case low_latency:  /* 50 usec aka 20000 ints/s */
4968                 if (bytes > 10000) {
4969                         /* this if handles the TSO accounting */
4970                         if (bytes/packets > 8000) {
4971                                 itrval = bulk_latency;
4972                         } else if ((packets < 10) || ((bytes/packets) > 1200)) {
4973                                 itrval = bulk_latency;
4974                         } else if ((packets > 35)) {
4975                                 itrval = lowest_latency;
4976                         }
4977                 } else if (bytes/packets > 2000) {
4978                         itrval = bulk_latency;
4979                 } else if (packets <= 2 && bytes < 512) {
4980                         itrval = lowest_latency;
4981                 }
4982                 break;
4983         case bulk_latency: /* 250 usec aka 4000 ints/s */
4984                 if (bytes > 25000) {
4985                         if (packets > 35)
4986                                 itrval = low_latency;
4987                 } else if (bytes < 1500) {
4988                         itrval = low_latency;
4989                 }
4990                 break;
4991         }
4992
4993         /* clear work counters since we have the values we need */
4994         ring_container->total_bytes = 0;
4995         ring_container->total_packets = 0;
4996
4997         /* write updated itr to ring container */
4998         ring_container->itr = itrval;
4999 }
5000
5001 static void igb_set_itr(struct igb_q_vector *q_vector)
5002 {
5003         struct igb_adapter *adapter = q_vector->adapter;
5004         u32 new_itr = q_vector->itr_val;
5005         u8 current_itr = 0;
5006
5007         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
5008         switch (adapter->link_speed) {
5009         case SPEED_10:
5010         case SPEED_100:
5011                 current_itr = 0;
5012                 new_itr = IGB_4K_ITR;
5013                 goto set_itr_now;
5014         default:
5015                 break;
5016         }
5017
5018         igb_update_itr(q_vector, &q_vector->tx);
5019         igb_update_itr(q_vector, &q_vector->rx);
5020
5021         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
5022
5023         /* conservative mode (itr 3) eliminates the lowest_latency setting */
5024         if (current_itr == lowest_latency &&
5025             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5026              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5027                 current_itr = low_latency;
5028
5029         switch (current_itr) {
5030         /* counts and packets in update_itr are dependent on these numbers */
5031         case lowest_latency:
5032                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
5033                 break;
5034         case low_latency:
5035                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
5036                 break;
5037         case bulk_latency:
5038                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
5039                 break;
5040         default:
5041                 break;
5042         }
5043
5044 set_itr_now:
5045         if (new_itr != q_vector->itr_val) {
5046                 /* this attempts to bias the interrupt rate towards Bulk
5047                  * by adding intermediate steps when interrupt rate is
5048                  * increasing */
5049                 new_itr = new_itr > q_vector->itr_val ?
5050                              max((new_itr * q_vector->itr_val) /
5051                                  (new_itr + (q_vector->itr_val >> 2)),
5052                                  new_itr) :
5053                              new_itr;
5054                 /* Don't write the value here; it resets the adapter's
5055                  * internal timer, and causes us to delay far longer than
5056                  * we should between interrupts.  Instead, we write the ITR
5057                  * value at the beginning of the next interrupt so the timing
5058                  * ends up being correct.
5059                  */
5060                 q_vector->itr_val = new_itr;
5061                 q_vector->set_itr = 1;
5062         }
5063 }
5064
5065 void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
5066                      u32 type_tucmd, u32 mss_l4len_idx)
5067 {
5068         struct e1000_adv_tx_context_desc *context_desc;
5069         u16 i = tx_ring->next_to_use;
5070
5071         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
5072
5073         i++;
5074         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
5075
5076         /* set bits to identify this as an advanced context descriptor */
5077         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
5078
5079         /* For 82575, context index must be unique per ring. */
5080         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5081                 mss_l4len_idx |= tx_ring->reg_idx << 4;
5082
5083         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
5084         context_desc->seqnum_seed       = 0;
5085         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
5086         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
5087 }
5088
5089 static int igb_tso(struct igb_ring *tx_ring,
5090                    struct igb_tx_buffer *first,
5091                    u8 *hdr_len)
5092 {
5093 #ifdef NETIF_F_TSO
5094         struct sk_buff *skb = first->skb;
5095         u32 vlan_macip_lens, type_tucmd;
5096         u32 mss_l4len_idx, l4len;
5097
5098         if (skb->ip_summed != CHECKSUM_PARTIAL)
5099                 return 0;
5100
5101         if (!skb_is_gso(skb))
5102 #endif /* NETIF_F_TSO */
5103                 return 0;
5104 #ifdef NETIF_F_TSO
5105
5106         if (skb_header_cloned(skb)) {
5107                 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
5108                 if (err)
5109                         return err;
5110         }
5111
5112         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5113         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5114
5115         if (first->protocol == __constant_htons(ETH_P_IP)) {
5116                 struct iphdr *iph = ip_hdr(skb);
5117                 iph->tot_len = 0;
5118                 iph->check = 0;
5119                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
5120                                                          iph->daddr, 0,
5121                                                          IPPROTO_TCP,
5122                                                          0);
5123                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5124                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5125                                    IGB_TX_FLAGS_CSUM |
5126                                    IGB_TX_FLAGS_IPV4;
5127 #ifdef NETIF_F_TSO6
5128         } else if (skb_is_gso_v6(skb)) {
5129                 ipv6_hdr(skb)->payload_len = 0;
5130                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5131                                                        &ipv6_hdr(skb)->daddr,
5132                                                        0, IPPROTO_TCP, 0);
5133                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5134                                    IGB_TX_FLAGS_CSUM;
5135 #endif
5136         }
5137
5138         /* compute header lengths */
5139         l4len = tcp_hdrlen(skb);
5140         *hdr_len = skb_transport_offset(skb) + l4len;
5141
5142         /* update gso size and bytecount with header size */
5143         first->gso_segs = skb_shinfo(skb)->gso_segs;
5144         first->bytecount += (first->gso_segs - 1) * *hdr_len;
5145
5146         /* MSS L4LEN IDX */
5147         mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
5148         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
5149
5150         /* VLAN MACLEN IPLEN */
5151         vlan_macip_lens = skb_network_header_len(skb);
5152         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5153         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5154
5155         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5156
5157         return 1;
5158 #endif  /* NETIF_F_TSO */
5159 }
5160
5161 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
5162 {
5163         struct sk_buff *skb = first->skb;
5164         u32 vlan_macip_lens = 0;
5165         u32 mss_l4len_idx = 0;
5166         u32 type_tucmd = 0;
5167
5168         if (skb->ip_summed != CHECKSUM_PARTIAL) {
5169                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
5170                         return;
5171         } else {
5172                 u8 nexthdr = 0;
5173                 switch (first->protocol) {
5174                 case __constant_htons(ETH_P_IP):
5175                         vlan_macip_lens |= skb_network_header_len(skb);
5176                         type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5177                         nexthdr = ip_hdr(skb)->protocol;
5178                         break;
5179 #ifdef NETIF_F_IPV6_CSUM
5180                 case __constant_htons(ETH_P_IPV6):
5181                         vlan_macip_lens |= skb_network_header_len(skb);
5182                         nexthdr = ipv6_hdr(skb)->nexthdr;
5183                         break;
5184 #endif
5185                 default:
5186                         if (unlikely(net_ratelimit())) {
5187                                 dev_warn(tx_ring->dev,
5188                                  "partial checksum but proto=%x!\n",
5189                                  first->protocol);
5190                         }
5191                         break;
5192                 }
5193
5194                 switch (nexthdr) {
5195                 case IPPROTO_TCP:
5196                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
5197                         mss_l4len_idx = tcp_hdrlen(skb) <<
5198                                         E1000_ADVTXD_L4LEN_SHIFT;
5199                         break;
5200 #ifdef HAVE_SCTP
5201                 case IPPROTO_SCTP:
5202                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
5203                         mss_l4len_idx = sizeof(struct sctphdr) <<
5204                                         E1000_ADVTXD_L4LEN_SHIFT;
5205                         break;
5206 #endif
5207                 case IPPROTO_UDP:
5208                         mss_l4len_idx = sizeof(struct udphdr) <<
5209                                         E1000_ADVTXD_L4LEN_SHIFT;
5210                         break;
5211                 default:
5212                         if (unlikely(net_ratelimit())) {
5213                                 dev_warn(tx_ring->dev,
5214                                  "partial checksum but l4 proto=%x!\n",
5215                                  nexthdr);
5216                         }
5217                         break;
5218                 }
5219
5220                 /* update TX checksum flag */
5221                 first->tx_flags |= IGB_TX_FLAGS_CSUM;
5222         }
5223
5224         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5225         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5226
5227         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5228 }
5229
5230 #define IGB_SET_FLAG(_input, _flag, _result) \
5231         ((_flag <= _result) ? \
5232          ((u32)(_input & _flag) * (_result / _flag)) : \
5233          ((u32)(_input & _flag) / (_flag / _result)))
5234
5235 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
5236 {
5237         /* set type for advanced descriptor with frame checksum insertion */
5238         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
5239                        E1000_ADVTXD_DCMD_DEXT |
5240                        E1000_ADVTXD_DCMD_IFCS;
5241
5242         /* set HW vlan bit if vlan is present */
5243         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
5244                                  (E1000_ADVTXD_DCMD_VLE));
5245
5246         /* set segmentation bits for TSO */
5247         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
5248                                  (E1000_ADVTXD_DCMD_TSE));
5249
5250         /* set timestamp bit if present */
5251         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
5252                                  (E1000_ADVTXD_MAC_TSTAMP));
5253
5254         return cmd_type;
5255 }
5256
5257 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
5258                                  union e1000_adv_tx_desc *tx_desc,
5259                                  u32 tx_flags, unsigned int paylen)
5260 {
5261         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
5262
5263         /* 82575 requires a unique index per ring */
5264         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5265                 olinfo_status |= tx_ring->reg_idx << 4;
5266
5267         /* insert L4 checksum */
5268         olinfo_status |= IGB_SET_FLAG(tx_flags,
5269                                       IGB_TX_FLAGS_CSUM,
5270                                       (E1000_TXD_POPTS_TXSM << 8));
5271
5272         /* insert IPv4 checksum */
5273         olinfo_status |= IGB_SET_FLAG(tx_flags,
5274                                       IGB_TX_FLAGS_IPV4,
5275                                       (E1000_TXD_POPTS_IXSM << 8));
5276
5277         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
5278 }
5279
5280 static void igb_tx_map(struct igb_ring *tx_ring,
5281                        struct igb_tx_buffer *first,
5282                        const u8 hdr_len)
5283 {
5284         struct sk_buff *skb = first->skb;
5285         struct igb_tx_buffer *tx_buffer;
5286         union e1000_adv_tx_desc *tx_desc;
5287         struct skb_frag_struct *frag;
5288         dma_addr_t dma;
5289         unsigned int data_len, size;
5290         u32 tx_flags = first->tx_flags;
5291         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
5292         u16 i = tx_ring->next_to_use;
5293
5294         tx_desc = IGB_TX_DESC(tx_ring, i);
5295
5296         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
5297
5298         size = skb_headlen(skb);
5299         data_len = skb->data_len;
5300
5301         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
5302
5303         tx_buffer = first;
5304
5305         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
5306                 if (dma_mapping_error(tx_ring->dev, dma))
5307                         goto dma_error;
5308
5309                 /* record length, and DMA address */
5310                 dma_unmap_len_set(tx_buffer, len, size);
5311                 dma_unmap_addr_set(tx_buffer, dma, dma);
5312
5313                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5314
5315                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
5316                         tx_desc->read.cmd_type_len =
5317                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
5318
5319                         i++;
5320                         tx_desc++;
5321                         if (i == tx_ring->count) {
5322                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
5323                                 i = 0;
5324                         }
5325                         tx_desc->read.olinfo_status = 0;
5326
5327                         dma += IGB_MAX_DATA_PER_TXD;
5328                         size -= IGB_MAX_DATA_PER_TXD;
5329
5330                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
5331                 }
5332
5333                 if (likely(!data_len))
5334                         break;
5335
5336                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
5337
5338                 i++;
5339                 tx_desc++;
5340                 if (i == tx_ring->count) {
5341                         tx_desc = IGB_TX_DESC(tx_ring, 0);
5342                         i = 0;
5343                 }
5344                 tx_desc->read.olinfo_status = 0;
5345
5346                 size = skb_frag_size(frag);
5347                 data_len -= size;
5348
5349                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
5350                                        size, DMA_TO_DEVICE);
5351
5352                 tx_buffer = &tx_ring->tx_buffer_info[i];
5353         }
5354
5355         /* write last descriptor with RS and EOP bits */
5356         cmd_type |= size | IGB_TXD_DCMD;
5357         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
5358
5359         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
5360         /* set the timestamp */
5361         first->time_stamp = jiffies;
5362
5363         /*
5364          * Force memory writes to complete before letting h/w know there
5365          * are new descriptors to fetch.  (Only applicable for weak-ordered
5366          * memory model archs, such as IA-64).
5367          *
5368          * We also need this memory barrier to make certain all of the
5369          * status bits have been updated before next_to_watch is written.
5370          */
5371         wmb();
5372
5373         /* set next_to_watch value indicating a packet is present */
5374         first->next_to_watch = tx_desc;
5375
5376         i++;
5377         if (i == tx_ring->count)
5378                 i = 0;
5379
5380         tx_ring->next_to_use = i;
5381
5382         writel(i, tx_ring->tail);
5383
5384         /* we need this if more than one processor can write to our tail
5385          * at a time, it syncronizes IO on IA64/Altix systems */
5386         mmiowb();
5387
5388         return;
5389
5390 dma_error:
5391         dev_err(tx_ring->dev, "TX DMA map failed\n");
5392
5393         /* clear dma mappings for failed tx_buffer_info map */
5394         for (;;) {
5395                 tx_buffer = &tx_ring->tx_buffer_info[i];
5396                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
5397                 if (tx_buffer == first)
5398                         break;
5399                 if (i == 0)
5400                         i = tx_ring->count;
5401                 i--;
5402         }
5403
5404         tx_ring->next_to_use = i;
5405 }
5406
5407 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5408 {
5409         struct net_device *netdev = netdev_ring(tx_ring);
5410
5411         if (netif_is_multiqueue(netdev))
5412                 netif_stop_subqueue(netdev, ring_queue_index(tx_ring));
5413         else
5414                 netif_stop_queue(netdev);
5415
5416         /* Herbert's original patch had:
5417          *  smp_mb__after_netif_stop_queue();
5418          * but since that doesn't exist yet, just open code it. */
5419         smp_mb();
5420
5421         /* We need to check again in a case another CPU has just
5422          * made room available. */
5423         if (igb_desc_unused(tx_ring) < size)
5424                 return -EBUSY;
5425
5426         /* A reprieve! */
5427         if (netif_is_multiqueue(netdev))
5428                 netif_wake_subqueue(netdev, ring_queue_index(tx_ring));
5429         else
5430                 netif_wake_queue(netdev);
5431
5432         tx_ring->tx_stats.restart_queue++;
5433
5434         return 0;
5435 }
5436
5437 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5438 {
5439         if (igb_desc_unused(tx_ring) >= size)
5440                 return 0;
5441         return __igb_maybe_stop_tx(tx_ring, size);
5442 }
5443
5444 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
5445                                 struct igb_ring *tx_ring)
5446 {
5447         struct igb_tx_buffer *first;
5448         int tso;
5449         u32 tx_flags = 0;
5450 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5451         unsigned short f;
5452 #endif
5453         u16 count = TXD_USE_COUNT(skb_headlen(skb));
5454         __be16 protocol = vlan_get_protocol(skb);
5455         u8 hdr_len = 0;
5456
5457         /*
5458          * need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
5459          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
5460          *       + 2 desc gap to keep tail from touching head,
5461          *       + 1 desc for context descriptor,
5462          * otherwise try next time
5463          */
5464 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5465         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
5466                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
5467 #else
5468         count += skb_shinfo(skb)->nr_frags;
5469 #endif
5470         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
5471                 /* this is a hard error */
5472                 return NETDEV_TX_BUSY;
5473         }
5474
5475         /* record the location of the first descriptor for this packet */
5476         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
5477         first->skb = skb;
5478         first->bytecount = skb->len;
5479         first->gso_segs = 1;
5480
5481         skb_tx_timestamp(skb);
5482
5483 #ifdef HAVE_PTP_1588_CLOCK
5484         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
5485                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5486                 if (!adapter->ptp_tx_skb) {
5487                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5488                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
5489
5490                         adapter->ptp_tx_skb = skb_get(skb);
5491                         adapter->ptp_tx_start = jiffies;
5492                         if (adapter->hw.mac.type == e1000_82576)
5493                                 schedule_work(&adapter->ptp_tx_work);
5494                 }
5495         }
5496 #endif /* HAVE_PTP_1588_CLOCK */
5497
5498         if (vlan_tx_tag_present(skb)) {
5499                 tx_flags |= IGB_TX_FLAGS_VLAN;
5500                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
5501         }
5502
5503         /* record initial flags and protocol */
5504         first->tx_flags = tx_flags;
5505         first->protocol = protocol;
5506
5507         tso = igb_tso(tx_ring, first, &hdr_len);
5508         if (tso < 0)
5509                 goto out_drop;
5510         else if (!tso)
5511                 igb_tx_csum(tx_ring, first);
5512
5513         igb_tx_map(tx_ring, first, hdr_len);
5514
5515 #ifndef HAVE_TRANS_START_IN_QUEUE
5516         netdev_ring(tx_ring)->trans_start = jiffies;
5517
5518 #endif
5519         /* Make sure there is space in the ring for the next send. */
5520         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
5521
5522         return NETDEV_TX_OK;
5523
5524 out_drop:
5525         igb_unmap_and_free_tx_resource(tx_ring, first);
5526
5527         return NETDEV_TX_OK;
5528 }
5529
5530 #ifdef HAVE_TX_MQ
5531 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
5532                                                     struct sk_buff *skb)
5533 {
5534         unsigned int r_idx = skb->queue_mapping;
5535
5536         if (r_idx >= adapter->num_tx_queues)
5537                 r_idx = r_idx % adapter->num_tx_queues;
5538
5539         return adapter->tx_ring[r_idx];
5540 }
5541 #else
5542 #define igb_tx_queue_mapping(_adapter, _skb) (_adapter)->tx_ring[0]
5543 #endif
5544
5545 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
5546                                   struct net_device *netdev)
5547 {
5548         struct igb_adapter *adapter = netdev_priv(netdev);
5549
5550         if (test_bit(__IGB_DOWN, &adapter->state)) {
5551                 dev_kfree_skb_any(skb);
5552                 return NETDEV_TX_OK;
5553         }
5554
5555         if (skb->len <= 0) {
5556                 dev_kfree_skb_any(skb);
5557                 return NETDEV_TX_OK;
5558         }
5559
5560         /*
5561          * The minimum packet size with TCTL.PSP set is 17 so pad the skb
5562          * in order to meet this minimum size requirement.
5563          */
5564         if (skb->len < 17) {
5565                 if (skb_padto(skb, 17))
5566                         return NETDEV_TX_OK;
5567                 skb->len = 17;
5568         }
5569
5570         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
5571 }
5572
5573 /**
5574  * igb_tx_timeout - Respond to a Tx Hang
5575  * @netdev: network interface device structure
5576  **/
5577 static void igb_tx_timeout(struct net_device *netdev)
5578 {
5579         struct igb_adapter *adapter = netdev_priv(netdev);
5580         struct e1000_hw *hw = &adapter->hw;
5581
5582         /* Do the reset outside of interrupt context */
5583         adapter->tx_timeout_count++;
5584
5585         if (hw->mac.type >= e1000_82580)
5586                 hw->dev_spec._82575.global_device_reset = true;
5587
5588         schedule_work(&adapter->reset_task);
5589         E1000_WRITE_REG(hw, E1000_EICS,
5590                         (adapter->eims_enable_mask & ~adapter->eims_other));
5591 }
5592
5593 static void igb_reset_task(struct work_struct *work)
5594 {
5595         struct igb_adapter *adapter;
5596         adapter = container_of(work, struct igb_adapter, reset_task);
5597
5598         igb_reinit_locked(adapter);
5599 }
5600
5601 /**
5602  * igb_get_stats - Get System Network Statistics
5603  * @netdev: network interface device structure
5604  *
5605  * Returns the address of the device statistics structure.
5606  * The statistics are updated here and also from the timer callback.
5607  **/
5608 static struct net_device_stats *igb_get_stats(struct net_device *netdev)
5609 {
5610         struct igb_adapter *adapter = netdev_priv(netdev);
5611
5612         if (!test_bit(__IGB_RESETTING, &adapter->state))
5613                 igb_update_stats(adapter);
5614
5615 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5616         /* only return the current stats */
5617         return &netdev->stats;
5618 #else
5619         /* only return the current stats */
5620         return &adapter->net_stats;
5621 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5622 }
5623
5624 /**
5625  * igb_change_mtu - Change the Maximum Transfer Unit
5626  * @netdev: network interface device structure
5627  * @new_mtu: new value for maximum frame size
5628  *
5629  * Returns 0 on success, negative on failure
5630  **/
5631 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5632 {
5633         struct igb_adapter *adapter = netdev_priv(netdev);
5634         struct e1000_hw *hw = &adapter->hw;
5635         struct pci_dev *pdev = adapter->pdev;
5636         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5637
5638         if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
5639                 dev_err(pci_dev_to_dev(pdev), "Invalid MTU setting\n");
5640                 return -EINVAL;
5641         }
5642
5643 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5644         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
5645                 dev_err(pci_dev_to_dev(pdev), "MTU > 9216 not supported.\n");
5646                 return -EINVAL;
5647         }
5648
5649         /* adjust max frame to be at least the size of a standard frame */
5650         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5651                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5652
5653         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5654                 usleep_range(1000, 2000);
5655
5656         /* igb_down has a dependency on max_frame_size */
5657         adapter->max_frame_size = max_frame;
5658
5659         if (netif_running(netdev))
5660                 igb_down(adapter);
5661
5662         dev_info(pci_dev_to_dev(pdev), "changing MTU from %d to %d\n",
5663                 netdev->mtu, new_mtu);
5664         netdev->mtu = new_mtu;
5665         hw->dev_spec._82575.mtu = new_mtu;
5666
5667         if (netif_running(netdev))
5668                 igb_up(adapter);
5669         else
5670                 igb_reset(adapter);
5671
5672         clear_bit(__IGB_RESETTING, &adapter->state);
5673
5674         return 0;
5675 }
5676
5677 /**
5678  * igb_update_stats - Update the board statistics counters
5679  * @adapter: board private structure
5680  **/
5681
5682 void igb_update_stats(struct igb_adapter *adapter)
5683 {
5684 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5685         struct net_device_stats *net_stats = &adapter->netdev->stats;
5686 #else
5687         struct net_device_stats *net_stats = &adapter->net_stats;
5688 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5689         struct e1000_hw *hw = &adapter->hw;
5690 #ifdef HAVE_PCI_ERS
5691         struct pci_dev *pdev = adapter->pdev;
5692 #endif
5693         u32 reg, mpc;
5694         u16 phy_tmp;
5695         int i;
5696         u64 bytes, packets;
5697 #ifndef IGB_NO_LRO
5698         u32 flushed = 0, coal = 0;
5699         struct igb_q_vector *q_vector;
5700 #endif
5701
5702 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
5703
5704         /*
5705          * Prevent stats update while adapter is being reset, or if the pci
5706          * connection is down.
5707          */
5708         if (adapter->link_speed == 0)
5709                 return;
5710 #ifdef HAVE_PCI_ERS
5711         if (pci_channel_offline(pdev))
5712                 return;
5713
5714 #endif
5715 #ifndef IGB_NO_LRO
5716         for (i = 0; i < adapter->num_q_vectors; i++) {
5717                 q_vector = adapter->q_vector[i];
5718                 if (!q_vector)
5719                         continue;
5720                 flushed += q_vector->lrolist.stats.flushed;
5721                 coal += q_vector->lrolist.stats.coal;
5722         }
5723         adapter->lro_stats.flushed = flushed;
5724         adapter->lro_stats.coal = coal;
5725
5726 #endif
5727         bytes = 0;
5728         packets = 0;
5729         for (i = 0; i < adapter->num_rx_queues; i++) {
5730                 u32 rqdpc_tmp = E1000_READ_REG(hw, E1000_RQDPC(i)) & 0x0FFF;
5731                 struct igb_ring *ring = adapter->rx_ring[i];
5732                 ring->rx_stats.drops += rqdpc_tmp;
5733                 net_stats->rx_fifo_errors += rqdpc_tmp;
5734 #ifdef CONFIG_IGB_VMDQ_NETDEV
5735                 if (!ring->vmdq_netdev) {
5736                         bytes += ring->rx_stats.bytes;
5737                         packets += ring->rx_stats.packets;
5738                 }
5739 #else
5740                 bytes += ring->rx_stats.bytes;
5741                 packets += ring->rx_stats.packets;
5742 #endif
5743         }
5744
5745         net_stats->rx_bytes = bytes;
5746         net_stats->rx_packets = packets;
5747
5748         bytes = 0;
5749         packets = 0;
5750         for (i = 0; i < adapter->num_tx_queues; i++) {
5751                 struct igb_ring *ring = adapter->tx_ring[i];
5752 #ifdef CONFIG_IGB_VMDQ_NETDEV
5753                 if (!ring->vmdq_netdev) {
5754                         bytes += ring->tx_stats.bytes;
5755                         packets += ring->tx_stats.packets;
5756                 }
5757 #else
5758                 bytes += ring->tx_stats.bytes;
5759                 packets += ring->tx_stats.packets;
5760 #endif
5761         }
5762         net_stats->tx_bytes = bytes;
5763         net_stats->tx_packets = packets;
5764
5765         /* read stats registers */
5766         adapter->stats.crcerrs += E1000_READ_REG(hw, E1000_CRCERRS);
5767         adapter->stats.gprc += E1000_READ_REG(hw, E1000_GPRC);
5768         adapter->stats.gorc += E1000_READ_REG(hw, E1000_GORCL);
5769         E1000_READ_REG(hw, E1000_GORCH); /* clear GORCL */
5770         adapter->stats.bprc += E1000_READ_REG(hw, E1000_BPRC);
5771         adapter->stats.mprc += E1000_READ_REG(hw, E1000_MPRC);
5772         adapter->stats.roc += E1000_READ_REG(hw, E1000_ROC);
5773
5774         adapter->stats.prc64 += E1000_READ_REG(hw, E1000_PRC64);
5775         adapter->stats.prc127 += E1000_READ_REG(hw, E1000_PRC127);
5776         adapter->stats.prc255 += E1000_READ_REG(hw, E1000_PRC255);
5777         adapter->stats.prc511 += E1000_READ_REG(hw, E1000_PRC511);
5778         adapter->stats.prc1023 += E1000_READ_REG(hw, E1000_PRC1023);
5779         adapter->stats.prc1522 += E1000_READ_REG(hw, E1000_PRC1522);
5780         adapter->stats.symerrs += E1000_READ_REG(hw, E1000_SYMERRS);
5781         adapter->stats.sec += E1000_READ_REG(hw, E1000_SEC);
5782
5783         mpc = E1000_READ_REG(hw, E1000_MPC);
5784         adapter->stats.mpc += mpc;
5785         net_stats->rx_fifo_errors += mpc;
5786         adapter->stats.scc += E1000_READ_REG(hw, E1000_SCC);
5787         adapter->stats.ecol += E1000_READ_REG(hw, E1000_ECOL);
5788         adapter->stats.mcc += E1000_READ_REG(hw, E1000_MCC);
5789         adapter->stats.latecol += E1000_READ_REG(hw, E1000_LATECOL);
5790         adapter->stats.dc += E1000_READ_REG(hw, E1000_DC);
5791         adapter->stats.rlec += E1000_READ_REG(hw, E1000_RLEC);
5792         adapter->stats.xonrxc += E1000_READ_REG(hw, E1000_XONRXC);
5793         adapter->stats.xontxc += E1000_READ_REG(hw, E1000_XONTXC);
5794         adapter->stats.xoffrxc += E1000_READ_REG(hw, E1000_XOFFRXC);
5795         adapter->stats.xofftxc += E1000_READ_REG(hw, E1000_XOFFTXC);
5796         adapter->stats.fcruc += E1000_READ_REG(hw, E1000_FCRUC);
5797         adapter->stats.gptc += E1000_READ_REG(hw, E1000_GPTC);
5798         adapter->stats.gotc += E1000_READ_REG(hw, E1000_GOTCL);
5799         E1000_READ_REG(hw, E1000_GOTCH); /* clear GOTCL */
5800         adapter->stats.rnbc += E1000_READ_REG(hw, E1000_RNBC);
5801         adapter->stats.ruc += E1000_READ_REG(hw, E1000_RUC);
5802         adapter->stats.rfc += E1000_READ_REG(hw, E1000_RFC);
5803         adapter->stats.rjc += E1000_READ_REG(hw, E1000_RJC);
5804         adapter->stats.tor += E1000_READ_REG(hw, E1000_TORH);
5805         adapter->stats.tot += E1000_READ_REG(hw, E1000_TOTH);
5806         adapter->stats.tpr += E1000_READ_REG(hw, E1000_TPR);
5807
5808         adapter->stats.ptc64 += E1000_READ_REG(hw, E1000_PTC64);
5809         adapter->stats.ptc127 += E1000_READ_REG(hw, E1000_PTC127);
5810         adapter->stats.ptc255 += E1000_READ_REG(hw, E1000_PTC255);
5811         adapter->stats.ptc511 += E1000_READ_REG(hw, E1000_PTC511);
5812         adapter->stats.ptc1023 += E1000_READ_REG(hw, E1000_PTC1023);
5813         adapter->stats.ptc1522 += E1000_READ_REG(hw, E1000_PTC1522);
5814
5815         adapter->stats.mptc += E1000_READ_REG(hw, E1000_MPTC);
5816         adapter->stats.bptc += E1000_READ_REG(hw, E1000_BPTC);
5817
5818         adapter->stats.tpt += E1000_READ_REG(hw, E1000_TPT);
5819         adapter->stats.colc += E1000_READ_REG(hw, E1000_COLC);
5820
5821         adapter->stats.algnerrc += E1000_READ_REG(hw, E1000_ALGNERRC);
5822         /* read internal phy sepecific stats */
5823         reg = E1000_READ_REG(hw, E1000_CTRL_EXT);
5824         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5825                 adapter->stats.rxerrc += E1000_READ_REG(hw, E1000_RXERRC);
5826
5827                 /* this stat has invalid values on i210/i211 */
5828                 if ((hw->mac.type != e1000_i210) &&
5829                     (hw->mac.type != e1000_i211))
5830                         adapter->stats.tncrs += E1000_READ_REG(hw, E1000_TNCRS);
5831         }
5832         adapter->stats.tsctc += E1000_READ_REG(hw, E1000_TSCTC);
5833         adapter->stats.tsctfc += E1000_READ_REG(hw, E1000_TSCTFC);
5834
5835         adapter->stats.iac += E1000_READ_REG(hw, E1000_IAC);
5836         adapter->stats.icrxoc += E1000_READ_REG(hw, E1000_ICRXOC);
5837         adapter->stats.icrxptc += E1000_READ_REG(hw, E1000_ICRXPTC);
5838         adapter->stats.icrxatc += E1000_READ_REG(hw, E1000_ICRXATC);
5839         adapter->stats.ictxptc += E1000_READ_REG(hw, E1000_ICTXPTC);
5840         adapter->stats.ictxatc += E1000_READ_REG(hw, E1000_ICTXATC);
5841         adapter->stats.ictxqec += E1000_READ_REG(hw, E1000_ICTXQEC);
5842         adapter->stats.ictxqmtc += E1000_READ_REG(hw, E1000_ICTXQMTC);
5843         adapter->stats.icrxdmtc += E1000_READ_REG(hw, E1000_ICRXDMTC);
5844
5845         /* Fill out the OS statistics structure */
5846         net_stats->multicast = adapter->stats.mprc;
5847         net_stats->collisions = adapter->stats.colc;
5848
5849         /* Rx Errors */
5850
5851         /* RLEC on some newer hardware can be incorrect so build
5852          * our own version based on RUC and ROC */
5853         net_stats->rx_errors = adapter->stats.rxerrc +
5854                 adapter->stats.crcerrs + adapter->stats.algnerrc +
5855                 adapter->stats.ruc + adapter->stats.roc +
5856                 adapter->stats.cexterr;
5857         net_stats->rx_length_errors = adapter->stats.ruc +
5858                                       adapter->stats.roc;
5859         net_stats->rx_crc_errors = adapter->stats.crcerrs;
5860         net_stats->rx_frame_errors = adapter->stats.algnerrc;
5861         net_stats->rx_missed_errors = adapter->stats.mpc;
5862
5863         /* Tx Errors */
5864         net_stats->tx_errors = adapter->stats.ecol +
5865                                adapter->stats.latecol;
5866         net_stats->tx_aborted_errors = adapter->stats.ecol;
5867         net_stats->tx_window_errors = adapter->stats.latecol;
5868         net_stats->tx_carrier_errors = adapter->stats.tncrs;
5869
5870         /* Tx Dropped needs to be maintained elsewhere */
5871
5872         /* Phy Stats */
5873         if (hw->phy.media_type == e1000_media_type_copper) {
5874                 if ((adapter->link_speed == SPEED_1000) &&
5875                    (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
5876                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
5877                         adapter->phy_stats.idle_errors += phy_tmp;
5878                 }
5879         }
5880
5881         /* Management Stats */
5882         adapter->stats.mgptc += E1000_READ_REG(hw, E1000_MGTPTC);
5883         adapter->stats.mgprc += E1000_READ_REG(hw, E1000_MGTPRC);
5884         if (hw->mac.type > e1000_82580) {
5885                 adapter->stats.o2bgptc += E1000_READ_REG(hw, E1000_O2BGPTC);
5886                 adapter->stats.o2bspc += E1000_READ_REG(hw, E1000_O2BSPC);
5887                 adapter->stats.b2ospc += E1000_READ_REG(hw, E1000_B2OSPC);
5888                 adapter->stats.b2ogprc += E1000_READ_REG(hw, E1000_B2OGPRC);
5889         }
5890 }
5891
5892 static irqreturn_t igb_msix_other(int irq, void *data)
5893 {
5894         struct igb_adapter *adapter = data;
5895         struct e1000_hw *hw = &adapter->hw;
5896         u32 icr = E1000_READ_REG(hw, E1000_ICR);
5897         /* reading ICR causes bit 31 of EICR to be cleared */
5898
5899         if (icr & E1000_ICR_DRSTA)
5900                 schedule_work(&adapter->reset_task);
5901
5902         if (icr & E1000_ICR_DOUTSYNC) {
5903                 /* HW is reporting DMA is out of sync */
5904                 adapter->stats.doosync++;
5905                 /* The DMA Out of Sync is also indication of a spoof event
5906                  * in IOV mode. Check the Wrong VM Behavior register to
5907                  * see if it is really a spoof event. */
5908                 igb_check_wvbr(adapter);
5909         }
5910
5911         /* Check for a mailbox event */
5912         if (icr & E1000_ICR_VMMB)
5913                 igb_msg_task(adapter);
5914
5915         if (icr & E1000_ICR_LSC) {
5916                 hw->mac.get_link_status = 1;
5917                 /* guard against interrupt when we're going down */
5918                 if (!test_bit(__IGB_DOWN, &adapter->state))
5919                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5920         }
5921
5922 #ifdef HAVE_PTP_1588_CLOCK
5923         if (icr & E1000_ICR_TS) {
5924                 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
5925
5926                 if (tsicr & E1000_TSICR_TXTS) {
5927                         /* acknowledge the interrupt */
5928                         E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
5929                         /* retrieve hardware timestamp */
5930                         schedule_work(&adapter->ptp_tx_work);
5931                 }
5932         }
5933 #endif /* HAVE_PTP_1588_CLOCK */
5934
5935         /* Check for MDD event */
5936         if (icr & E1000_ICR_MDDET)
5937                 igb_process_mdd_event(adapter);
5938
5939         E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_other);
5940
5941         return IRQ_HANDLED;
5942 }
5943
5944 static void igb_write_itr(struct igb_q_vector *q_vector)
5945 {
5946         struct igb_adapter *adapter = q_vector->adapter;
5947         u32 itr_val = q_vector->itr_val & 0x7FFC;
5948
5949         if (!q_vector->set_itr)
5950                 return;
5951
5952         if (!itr_val)
5953                 itr_val = 0x4;
5954
5955         if (adapter->hw.mac.type == e1000_82575)
5956                 itr_val |= itr_val << 16;
5957         else
5958                 itr_val |= E1000_EITR_CNT_IGNR;
5959
5960         writel(itr_val, q_vector->itr_register);
5961         q_vector->set_itr = 0;
5962 }
5963
5964 static irqreturn_t igb_msix_ring(int irq, void *data)
5965 {
5966         struct igb_q_vector *q_vector = data;
5967
5968         /* Write the ITR value calculated from the previous interrupt. */
5969         igb_write_itr(q_vector);
5970
5971         napi_schedule(&q_vector->napi);
5972
5973         return IRQ_HANDLED;
5974 }
5975
5976 #ifdef IGB_DCA
5977 static void igb_update_tx_dca(struct igb_adapter *adapter,
5978                               struct igb_ring *tx_ring,
5979                               int cpu)
5980 {
5981         struct e1000_hw *hw = &adapter->hw;
5982         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5983
5984         if (hw->mac.type != e1000_82575)
5985                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT_82576;
5986
5987         /*
5988          * We can enable relaxed ordering for reads, but not writes when
5989          * DCA is enabled.  This is due to a known issue in some chipsets
5990          * which will cause the DCA tag to be cleared.
5991          */
5992         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5993                   E1000_DCA_TXCTRL_DATA_RRO_EN |
5994                   E1000_DCA_TXCTRL_DESC_DCA_EN;
5995
5996         E1000_WRITE_REG(hw, E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
5997 }
5998
5999 static void igb_update_rx_dca(struct igb_adapter *adapter,
6000                               struct igb_ring *rx_ring,
6001                               int cpu)
6002 {
6003         struct e1000_hw *hw = &adapter->hw;
6004         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
6005
6006         if (hw->mac.type != e1000_82575)
6007                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT_82576;
6008
6009         /*
6010          * We can enable relaxed ordering for reads, but not writes when
6011          * DCA is enabled.  This is due to a known issue in some chipsets
6012          * which will cause the DCA tag to be cleared.
6013          */
6014         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
6015                   E1000_DCA_RXCTRL_DESC_DCA_EN;
6016
6017         E1000_WRITE_REG(hw, E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
6018 }
6019
6020 static void igb_update_dca(struct igb_q_vector *q_vector)
6021 {
6022         struct igb_adapter *adapter = q_vector->adapter;
6023         int cpu = get_cpu();
6024
6025         if (q_vector->cpu == cpu)
6026                 goto out_no_update;
6027
6028         if (q_vector->tx.ring)
6029                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
6030
6031         if (q_vector->rx.ring)
6032                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
6033
6034         q_vector->cpu = cpu;
6035 out_no_update:
6036         put_cpu();
6037 }
6038
6039 static void igb_setup_dca(struct igb_adapter *adapter)
6040 {
6041         struct e1000_hw *hw = &adapter->hw;
6042         int i;
6043
6044         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
6045                 return;
6046
6047         /* Always use CB2 mode, difference is masked in the CB driver. */
6048         E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
6049
6050         for (i = 0; i < adapter->num_q_vectors; i++) {
6051                 adapter->q_vector[i]->cpu = -1;
6052                 igb_update_dca(adapter->q_vector[i]);
6053         }
6054 }
6055
6056 static int __igb_notify_dca(struct device *dev, void *data)
6057 {
6058         struct net_device *netdev = dev_get_drvdata(dev);
6059         struct igb_adapter *adapter = netdev_priv(netdev);
6060         struct pci_dev *pdev = adapter->pdev;
6061         struct e1000_hw *hw = &adapter->hw;
6062         unsigned long event = *(unsigned long *)data;
6063
6064         switch (event) {
6065         case DCA_PROVIDER_ADD:
6066                 /* if already enabled, don't do it again */
6067                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
6068                         break;
6069                 if (dca_add_requester(dev) == E1000_SUCCESS) {
6070                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
6071                         dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
6072                         igb_setup_dca(adapter);
6073                         break;
6074                 }
6075                 /* Fall Through since DCA is disabled. */
6076         case DCA_PROVIDER_REMOVE:
6077                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
6078                         /* without this a class_device is left
6079                          * hanging around in the sysfs model */
6080                         dca_remove_requester(dev);
6081                         dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
6082                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
6083                         E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
6084                 }
6085                 break;
6086         }
6087
6088         return E1000_SUCCESS;
6089 }
6090
6091 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
6092                           void *p)
6093 {
6094         int ret_val;
6095
6096         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
6097                                          __igb_notify_dca);
6098
6099         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
6100 }
6101 #endif /* IGB_DCA */
6102
6103 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
6104 {
6105         unsigned char mac_addr[ETH_ALEN];
6106
6107         random_ether_addr(mac_addr);
6108         igb_set_vf_mac(adapter, vf, mac_addr);
6109
6110 #ifdef IFLA_VF_MAX
6111 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6112         /* By default spoof check is enabled for all VFs */
6113         adapter->vf_data[vf].spoofchk_enabled = true;
6114 #endif
6115 #endif
6116
6117         return true;
6118 }
6119
6120 static void igb_ping_all_vfs(struct igb_adapter *adapter)
6121 {
6122         struct e1000_hw *hw = &adapter->hw;
6123         u32 ping;
6124         int i;
6125
6126         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
6127                 ping = E1000_PF_CONTROL_MSG;
6128                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
6129                         ping |= E1000_VT_MSGTYPE_CTS;
6130                 e1000_write_mbx(hw, &ping, 1, i);
6131         }
6132 }
6133
6134 /**
6135  *  igb_mta_set_ - Set multicast filter table address
6136  *  @adapter: pointer to the adapter structure
6137  *  @hash_value: determines the MTA register and bit to set
6138  *
6139  *  The multicast table address is a register array of 32-bit registers.
6140  *  The hash_value is used to determine what register the bit is in, the
6141  *  current value is read, the new bit is OR'd in and the new value is
6142  *  written back into the register.
6143  **/
6144 void igb_mta_set(struct igb_adapter *adapter, u32 hash_value)
6145 {
6146         struct e1000_hw *hw = &adapter->hw;
6147         u32 hash_bit, hash_reg, mta;
6148
6149         /*
6150          * The MTA is a register array of 32-bit registers. It is
6151          * treated like an array of (32*mta_reg_count) bits.  We want to
6152          * set bit BitArray[hash_value]. So we figure out what register
6153          * the bit is in, read it, OR in the new bit, then write
6154          * back the new value.  The (hw->mac.mta_reg_count - 1) serves as a
6155          * mask to bits 31:5 of the hash value which gives us the
6156          * register we're modifying.  The hash bit within that register
6157          * is determined by the lower 5 bits of the hash value.
6158          */
6159         hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1);
6160         hash_bit = hash_value & 0x1F;
6161
6162         mta = E1000_READ_REG_ARRAY(hw, E1000_MTA, hash_reg);
6163
6164         mta |= (1 << hash_bit);
6165
6166         E1000_WRITE_REG_ARRAY(hw, E1000_MTA, hash_reg, mta);
6167         E1000_WRITE_FLUSH(hw);
6168 }
6169
6170 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6171 {
6172
6173         struct e1000_hw *hw = &adapter->hw;
6174         u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(vf));
6175         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6176
6177         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
6178                             IGB_VF_FLAG_MULTI_PROMISC);
6179         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6180
6181 #ifdef IGB_ENABLE_VF_PROMISC
6182         if (*msgbuf & E1000_VF_SET_PROMISC_UNICAST) {
6183                 vmolr |= E1000_VMOLR_ROPE;
6184                 vf_data->flags |= IGB_VF_FLAG_UNI_PROMISC;
6185                 *msgbuf &= ~E1000_VF_SET_PROMISC_UNICAST;
6186         }
6187 #endif
6188         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
6189                 vmolr |= E1000_VMOLR_MPME;
6190                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
6191                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
6192         } else {
6193                 /*
6194                  * if we have hashes and we are clearing a multicast promisc
6195                  * flag we need to write the hashes to the MTA as this step
6196                  * was previously skipped
6197                  */
6198                 if (vf_data->num_vf_mc_hashes > 30) {
6199                         vmolr |= E1000_VMOLR_MPME;
6200                 } else if (vf_data->num_vf_mc_hashes) {
6201                         int j;
6202                         vmolr |= E1000_VMOLR_ROMPE;
6203                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6204                                 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6205                 }
6206         }
6207
6208         E1000_WRITE_REG(hw, E1000_VMOLR(vf), vmolr);
6209
6210         /* there are flags left unprocessed, likely not supported */
6211         if (*msgbuf & E1000_VT_MSGINFO_MASK)
6212                 return -EINVAL;
6213
6214         return 0;
6215
6216 }
6217
6218 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
6219                                   u32 *msgbuf, u32 vf)
6220 {
6221         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6222         u16 *hash_list = (u16 *)&msgbuf[1];
6223         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6224         int i;
6225
6226         /* salt away the number of multicast addresses assigned
6227          * to this VF for later use to restore when the PF multi cast
6228          * list changes
6229          */
6230         vf_data->num_vf_mc_hashes = n;
6231
6232         /* only up to 30 hash values supported */
6233         if (n > 30)
6234                 n = 30;
6235
6236         /* store the hashes for later use */
6237         for (i = 0; i < n; i++)
6238                 vf_data->vf_mc_hashes[i] = hash_list[i];
6239
6240         /* Flush and reset the mta with the new values */
6241         igb_set_rx_mode(adapter->netdev);
6242
6243         return 0;
6244 }
6245
6246 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
6247 {
6248         struct e1000_hw *hw = &adapter->hw;
6249         struct vf_data_storage *vf_data;
6250         int i, j;
6251
6252         for (i = 0; i < adapter->vfs_allocated_count; i++) {
6253                 u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(i));
6254                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6255
6256                 vf_data = &adapter->vf_data[i];
6257
6258                 if ((vf_data->num_vf_mc_hashes > 30) ||
6259                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
6260                         vmolr |= E1000_VMOLR_MPME;
6261                 } else if (vf_data->num_vf_mc_hashes) {
6262                         vmolr |= E1000_VMOLR_ROMPE;
6263                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6264                                 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6265                 }
6266                 E1000_WRITE_REG(hw, E1000_VMOLR(i), vmolr);
6267         }
6268 }
6269
6270 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
6271 {
6272         struct e1000_hw *hw = &adapter->hw;
6273         u32 pool_mask, reg, vid;
6274         u16 vlan_default;
6275         int i;
6276
6277         pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6278
6279         /* Find the vlan filter for this id */
6280         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6281                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6282
6283                 /* remove the vf from the pool */
6284                 reg &= ~pool_mask;
6285
6286                 /* if pool is empty then remove entry from vfta */
6287                 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
6288                     (reg & E1000_VLVF_VLANID_ENABLE)) {
6289                         reg = 0;
6290                         vid = reg & E1000_VLVF_VLANID_MASK;
6291                         igb_vfta_set(adapter, vid, FALSE);
6292                 }
6293
6294                 E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6295         }
6296
6297         adapter->vf_data[vf].vlans_enabled = 0;
6298
6299         vlan_default = adapter->vf_data[vf].default_vf_vlan_id;
6300         if (vlan_default)
6301                 igb_vlvf_set(adapter, vlan_default, true, vf);
6302 }
6303
6304 s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
6305 {
6306         struct e1000_hw *hw = &adapter->hw;
6307         u32 reg, i;
6308
6309         /* The vlvf table only exists on 82576 hardware and newer */
6310         if (hw->mac.type < e1000_82576)
6311                 return -1;
6312
6313         /* we only need to do this if VMDq is enabled */
6314         if (!adapter->vmdq_pools)
6315                 return -1;
6316
6317         /* Find the vlan filter for this id */
6318         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6319                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6320                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6321                     vid == (reg & E1000_VLVF_VLANID_MASK))
6322                         break;
6323         }
6324
6325         if (add) {
6326                 if (i == E1000_VLVF_ARRAY_SIZE) {
6327                         /* Did not find a matching VLAN ID entry that was
6328                          * enabled.  Search for a free filter entry, i.e.
6329                          * one without the enable bit set
6330                          */
6331                         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6332                                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6333                                 if (!(reg & E1000_VLVF_VLANID_ENABLE))
6334                                         break;
6335                         }
6336                 }
6337                 if (i < E1000_VLVF_ARRAY_SIZE) {
6338                         /* Found an enabled/available entry */
6339                         reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6340
6341                         /* if !enabled we need to set this up in vfta */
6342                         if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
6343                                 /* add VID to filter table */
6344                                 igb_vfta_set(adapter, vid, TRUE);
6345                                 reg |= E1000_VLVF_VLANID_ENABLE;
6346                         }
6347                         reg &= ~E1000_VLVF_VLANID_MASK;
6348                         reg |= vid;
6349                         E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6350
6351                         /* do not modify RLPML for PF devices */
6352                         if (vf >= adapter->vfs_allocated_count)
6353                                 return E1000_SUCCESS;
6354
6355                         if (!adapter->vf_data[vf].vlans_enabled) {
6356                                 u32 size;
6357                                 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6358                                 size = reg & E1000_VMOLR_RLPML_MASK;
6359                                 size += 4;
6360                                 reg &= ~E1000_VMOLR_RLPML_MASK;
6361                                 reg |= size;
6362                                 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6363                         }
6364
6365                         adapter->vf_data[vf].vlans_enabled++;
6366                 }
6367         } else {
6368                 if (i < E1000_VLVF_ARRAY_SIZE) {
6369                         /* remove vf from the pool */
6370                         reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
6371                         /* if pool is empty then remove entry from vfta */
6372                         if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
6373                                 reg = 0;
6374                                 igb_vfta_set(adapter, vid, FALSE);
6375                         }
6376                         E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6377
6378                         /* do not modify RLPML for PF devices */
6379                         if (vf >= adapter->vfs_allocated_count)
6380                                 return E1000_SUCCESS;
6381
6382                         adapter->vf_data[vf].vlans_enabled--;
6383                         if (!adapter->vf_data[vf].vlans_enabled) {
6384                                 u32 size;
6385                                 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6386                                 size = reg & E1000_VMOLR_RLPML_MASK;
6387                                 size -= 4;
6388                                 reg &= ~E1000_VMOLR_RLPML_MASK;
6389                                 reg |= size;
6390                                 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6391                         }
6392                 }
6393         }
6394         return E1000_SUCCESS;
6395 }
6396
6397 #ifdef IFLA_VF_MAX
6398 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
6399 {
6400         struct e1000_hw *hw = &adapter->hw;
6401
6402         if (vid)
6403                 E1000_WRITE_REG(hw, E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
6404         else
6405                 E1000_WRITE_REG(hw, E1000_VMVIR(vf), 0);
6406 }
6407
6408 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
6409                                int vf, u16 vlan, u8 qos)
6410 {
6411         int err = 0;
6412         struct igb_adapter *adapter = netdev_priv(netdev);
6413
6414         /* VLAN IDs accepted range 0-4094 */
6415         if ((vf >= adapter->vfs_allocated_count) || (vlan > VLAN_VID_MASK-1) || (qos > 7))
6416                 return -EINVAL;
6417         if (vlan || qos) {
6418                 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
6419                 if (err)
6420                         goto out;
6421                 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
6422                 igb_set_vmolr(adapter, vf, !vlan);
6423                 adapter->vf_data[vf].pf_vlan = vlan;
6424                 adapter->vf_data[vf].pf_qos = qos;
6425                 igb_set_vf_vlan_strip(adapter, vf, true);
6426                 dev_info(&adapter->pdev->dev,
6427                          "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
6428                 if (test_bit(__IGB_DOWN, &adapter->state)) {
6429                         dev_warn(&adapter->pdev->dev,
6430                                  "The VF VLAN has been set,"
6431                                  " but the PF device is not up.\n");
6432                         dev_warn(&adapter->pdev->dev,
6433                                  "Bring the PF device up before"
6434                                  " attempting to use the VF device.\n");
6435                 }
6436         } else {
6437                 if (adapter->vf_data[vf].pf_vlan)
6438                         dev_info(&adapter->pdev->dev,
6439                                  "Clearing VLAN on VF %d\n", vf);
6440                 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
6441                                    false, vf);
6442                 igb_set_vmvir(adapter, vlan, vf);
6443                 igb_set_vmolr(adapter, vf, true);
6444                 igb_set_vf_vlan_strip(adapter, vf, false);
6445                 adapter->vf_data[vf].pf_vlan = 0;
6446                 adapter->vf_data[vf].pf_qos = 0;
6447        }
6448 out:
6449        return err;
6450 }
6451
6452 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6453 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
6454                                 bool setting)
6455 {
6456         struct igb_adapter *adapter = netdev_priv(netdev);
6457         struct e1000_hw *hw = &adapter->hw;
6458         u32 dtxswc, reg_offset;
6459
6460         if (!adapter->vfs_allocated_count)
6461                 return -EOPNOTSUPP;
6462
6463         if (vf >= adapter->vfs_allocated_count)
6464                 return -EINVAL;
6465
6466         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
6467         dtxswc = E1000_READ_REG(hw, reg_offset);
6468         if (setting)
6469                 dtxswc |= ((1 << vf) |
6470                            (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6471         else
6472                 dtxswc &= ~((1 << vf) |
6473                             (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6474         E1000_WRITE_REG(hw, reg_offset, dtxswc);
6475
6476         adapter->vf_data[vf].spoofchk_enabled = setting;
6477         return E1000_SUCCESS;
6478 }
6479 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
6480 #endif /* IFLA_VF_MAX */
6481
6482 static int igb_find_vlvf_entry(struct igb_adapter *adapter, int vid)
6483 {
6484         struct e1000_hw *hw = &adapter->hw;
6485         int i;
6486         u32 reg;
6487
6488         /* Find the vlan filter for this id */
6489         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6490                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6491                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6492                     vid == (reg & E1000_VLVF_VLANID_MASK))
6493                         break;
6494         }
6495
6496         if (i >= E1000_VLVF_ARRAY_SIZE)
6497                 i = -1;
6498
6499         return i;
6500 }
6501
6502 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6503 {
6504         struct e1000_hw *hw = &adapter->hw;
6505         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6506         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
6507         int err = 0;
6508
6509         if (vid)
6510                 igb_set_vf_vlan_strip(adapter, vf, true);
6511         else
6512                 igb_set_vf_vlan_strip(adapter, vf, false);
6513
6514         /* If in promiscuous mode we need to make sure the PF also has
6515          * the VLAN filter set.
6516          */
6517         if (add && (adapter->netdev->flags & IFF_PROMISC))
6518                 err = igb_vlvf_set(adapter, vid, add,
6519                                    adapter->vfs_allocated_count);
6520         if (err)
6521                 goto out;
6522
6523         err = igb_vlvf_set(adapter, vid, add, vf);
6524
6525         if (err)
6526                 goto out;
6527
6528         /* Go through all the checks to see if the VLAN filter should
6529          * be wiped completely.
6530          */
6531         if (!add && (adapter->netdev->flags & IFF_PROMISC)) {
6532                 u32 vlvf, bits;
6533
6534                 int regndx = igb_find_vlvf_entry(adapter, vid);
6535                 if (regndx < 0)
6536                         goto out;
6537                 /* See if any other pools are set for this VLAN filter
6538                  * entry other than the PF.
6539                  */
6540                 vlvf = bits = E1000_READ_REG(hw, E1000_VLVF(regndx));
6541                 bits &= 1 << (E1000_VLVF_POOLSEL_SHIFT +
6542                               adapter->vfs_allocated_count);
6543                 /* If the filter was removed then ensure PF pool bit
6544                  * is cleared if the PF only added itself to the pool
6545                  * because the PF is in promiscuous mode.
6546                  */
6547                 if ((vlvf & VLAN_VID_MASK) == vid &&
6548 #ifndef HAVE_VLAN_RX_REGISTER
6549                     !test_bit(vid, adapter->active_vlans) &&
6550 #endif
6551                     !bits)
6552                         igb_vlvf_set(adapter, vid, add,
6553                                      adapter->vfs_allocated_count);
6554         }
6555
6556 out:
6557         return err;
6558 }
6559
6560 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
6561 {
6562         struct e1000_hw *hw = &adapter->hw;
6563
6564         /* clear flags except flag that the PF has set the MAC */
6565         adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
6566         adapter->vf_data[vf].last_nack = jiffies;
6567
6568         /* reset offloads to defaults */
6569         igb_set_vmolr(adapter, vf, true);
6570
6571         /* reset vlans for device */
6572         igb_clear_vf_vfta(adapter, vf);
6573 #ifdef IFLA_VF_MAX
6574         if (adapter->vf_data[vf].pf_vlan)
6575                 igb_ndo_set_vf_vlan(adapter->netdev, vf,
6576                                     adapter->vf_data[vf].pf_vlan,
6577                                     adapter->vf_data[vf].pf_qos);
6578         else
6579                 igb_clear_vf_vfta(adapter, vf);
6580 #endif
6581
6582         /* reset multicast table array for vf */
6583         adapter->vf_data[vf].num_vf_mc_hashes = 0;
6584
6585         /* Flush and reset the mta with the new values */
6586         igb_set_rx_mode(adapter->netdev);
6587
6588         /*
6589          * Reset the VFs TDWBAL and TDWBAH registers which are not
6590          * cleared by a VFLR
6591          */
6592         E1000_WRITE_REG(hw, E1000_TDWBAH(vf), 0);
6593         E1000_WRITE_REG(hw, E1000_TDWBAL(vf), 0);
6594         if (hw->mac.type == e1000_82576) {
6595                 E1000_WRITE_REG(hw, E1000_TDWBAH(IGB_MAX_VF_FUNCTIONS + vf), 0);
6596                 E1000_WRITE_REG(hw, E1000_TDWBAL(IGB_MAX_VF_FUNCTIONS + vf), 0);
6597         }
6598 }
6599
6600 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
6601 {
6602         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6603
6604         /* generate a new mac address as we were hotplug removed/added */
6605         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
6606                 random_ether_addr(vf_mac);
6607
6608         /* process remaining reset events */
6609         igb_vf_reset(adapter, vf);
6610 }
6611
6612 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
6613 {
6614         struct e1000_hw *hw = &adapter->hw;
6615         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6616         u32 reg, msgbuf[3];
6617         u8 *addr = (u8 *)(&msgbuf[1]);
6618
6619         /* process all the same items cleared in a function level reset */
6620         igb_vf_reset(adapter, vf);
6621
6622         /* set vf mac address */
6623         igb_del_mac_filter(adapter, vf_mac, vf);
6624         igb_add_mac_filter(adapter, vf_mac, vf);
6625
6626         /* enable transmit and receive for vf */
6627         reg = E1000_READ_REG(hw, E1000_VFTE);
6628         E1000_WRITE_REG(hw, E1000_VFTE, reg | (1 << vf));
6629         reg = E1000_READ_REG(hw, E1000_VFRE);
6630         E1000_WRITE_REG(hw, E1000_VFRE, reg | (1 << vf));
6631
6632         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
6633
6634         /* reply to reset with ack and vf mac address */
6635         msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
6636         memcpy(addr, vf_mac, 6);
6637         e1000_write_mbx(hw, msgbuf, 3, vf);
6638 }
6639
6640 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
6641 {
6642         /*
6643          * The VF MAC Address is stored in a packed array of bytes
6644          * starting at the second 32 bit word of the msg array
6645          */
6646         unsigned char *addr = (unsigned char *)&msg[1];
6647         int err = -1;
6648
6649         if (is_valid_ether_addr(addr))
6650                 err = igb_set_vf_mac(adapter, vf, addr);
6651
6652         return err;
6653 }
6654
6655 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
6656 {
6657         struct e1000_hw *hw = &adapter->hw;
6658         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6659         u32 msg = E1000_VT_MSGTYPE_NACK;
6660
6661         /* if device isn't clear to send it shouldn't be reading either */
6662         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
6663             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6664                 e1000_write_mbx(hw, &msg, 1, vf);
6665                 vf_data->last_nack = jiffies;
6666         }
6667 }
6668
6669 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
6670 {
6671         struct pci_dev *pdev = adapter->pdev;
6672         u32 msgbuf[E1000_VFMAILBOX_SIZE];
6673         struct e1000_hw *hw = &adapter->hw;
6674         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6675         s32 retval;
6676
6677         retval = e1000_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
6678
6679         if (retval) {
6680                 dev_err(pci_dev_to_dev(pdev), "Error receiving message from VF\n");
6681                 return;
6682         }
6683
6684         /* this is a message we already processed, do nothing */
6685         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
6686                 return;
6687
6688         /*
6689          * until the vf completes a reset it should not be
6690          * allowed to start any configuration.
6691          */
6692
6693         if (msgbuf[0] == E1000_VF_RESET) {
6694                 igb_vf_reset_msg(adapter, vf);
6695                 return;
6696         }
6697
6698         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
6699                 msgbuf[0] = E1000_VT_MSGTYPE_NACK;
6700                 if (time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6701                         e1000_write_mbx(hw, msgbuf, 1, vf);
6702                         vf_data->last_nack = jiffies;
6703                 }
6704                 return;
6705         }
6706
6707         switch ((msgbuf[0] & 0xFFFF)) {
6708         case E1000_VF_SET_MAC_ADDR:
6709                 retval = -EINVAL;
6710 #ifndef IGB_DISABLE_VF_MAC_SET
6711                 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
6712                         retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
6713                 else
6714                         DPRINTK(DRV, INFO,
6715                                 "VF %d attempted to override administratively "
6716                                 "set MAC address\nReload the VF driver to "
6717                                 "resume operations\n", vf);
6718 #endif
6719                 break;
6720         case E1000_VF_SET_PROMISC:
6721                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
6722                 break;
6723         case E1000_VF_SET_MULTICAST:
6724                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
6725                 break;
6726         case E1000_VF_SET_LPE:
6727                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
6728                 break;
6729         case E1000_VF_SET_VLAN:
6730                 retval = -1;
6731 #ifdef IFLA_VF_MAX
6732                 if (vf_data->pf_vlan)
6733                         DPRINTK(DRV, INFO,
6734                                 "VF %d attempted to override administratively "
6735                                 "set VLAN tag\nReload the VF driver to "
6736                                 "resume operations\n", vf);
6737                 else
6738 #endif
6739                         retval = igb_set_vf_vlan(adapter, msgbuf, vf);
6740                 break;
6741         default:
6742                 dev_err(pci_dev_to_dev(pdev), "Unhandled Msg %08x\n", msgbuf[0]);
6743                 retval = -E1000_ERR_MBX;
6744                 break;
6745         }
6746
6747         /* notify the VF of the results of what it sent us */
6748         if (retval)
6749                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6750         else
6751                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6752
6753         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6754
6755         e1000_write_mbx(hw, msgbuf, 1, vf);
6756 }
6757
6758 static void igb_msg_task(struct igb_adapter *adapter)
6759 {
6760         struct e1000_hw *hw = &adapter->hw;
6761         u32 vf;
6762
6763         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6764                 /* process any reset requests */
6765                 if (!e1000_check_for_rst(hw, vf))
6766                         igb_vf_reset_event(adapter, vf);
6767
6768                 /* process any messages pending */
6769                 if (!e1000_check_for_msg(hw, vf))
6770                         igb_rcv_msg_from_vf(adapter, vf);
6771
6772                 /* process any acks */
6773                 if (!e1000_check_for_ack(hw, vf))
6774                         igb_rcv_ack_from_vf(adapter, vf);
6775         }
6776 }
6777
6778 /**
6779  *  igb_set_uta - Set unicast filter table address
6780  *  @adapter: board private structure
6781  *
6782  *  The unicast table address is a register array of 32-bit registers.
6783  *  The table is meant to be used in a way similar to how the MTA is used
6784  *  however due to certain limitations in the hardware it is necessary to
6785  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6786  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
6787  **/
6788 static void igb_set_uta(struct igb_adapter *adapter)
6789 {
6790         struct e1000_hw *hw = &adapter->hw;
6791         int i;
6792
6793         /* The UTA table only exists on 82576 hardware and newer */
6794         if (hw->mac.type < e1000_82576)
6795                 return;
6796
6797         /* we only need to do this if VMDq is enabled */
6798         if (!adapter->vmdq_pools)
6799                 return;
6800
6801         for (i = 0; i < hw->mac.uta_reg_count; i++)
6802                 E1000_WRITE_REG_ARRAY(hw, E1000_UTA, i, ~0);
6803 }
6804
6805 /**
6806  * igb_intr_msi - Interrupt Handler
6807  * @irq: interrupt number
6808  * @data: pointer to a network interface device structure
6809  **/
6810 static irqreturn_t igb_intr_msi(int irq, void *data)
6811 {
6812         struct igb_adapter *adapter = data;
6813         struct igb_q_vector *q_vector = adapter->q_vector[0];
6814         struct e1000_hw *hw = &adapter->hw;
6815         /* read ICR disables interrupts using IAM */
6816         u32 icr = E1000_READ_REG(hw, E1000_ICR);
6817
6818         igb_write_itr(q_vector);
6819
6820         if (icr & E1000_ICR_DRSTA)
6821                 schedule_work(&adapter->reset_task);
6822
6823         if (icr & E1000_ICR_DOUTSYNC) {
6824                 /* HW is reporting DMA is out of sync */
6825                 adapter->stats.doosync++;
6826         }
6827
6828         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6829                 hw->mac.get_link_status = 1;
6830                 if (!test_bit(__IGB_DOWN, &adapter->state))
6831                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6832         }
6833
6834 #ifdef HAVE_PTP_1588_CLOCK
6835         if (icr & E1000_ICR_TS) {
6836                 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6837
6838                 if (tsicr & E1000_TSICR_TXTS) {
6839                         /* acknowledge the interrupt */
6840                         E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6841                         /* retrieve hardware timestamp */
6842                         schedule_work(&adapter->ptp_tx_work);
6843                 }
6844         }
6845 #endif /* HAVE_PTP_1588_CLOCK */
6846
6847         napi_schedule(&q_vector->napi);
6848
6849         return IRQ_HANDLED;
6850 }
6851
6852 /**
6853  * igb_intr - Legacy Interrupt Handler
6854  * @irq: interrupt number
6855  * @data: pointer to a network interface device structure
6856  **/
6857 static irqreturn_t igb_intr(int irq, void *data)
6858 {
6859         struct igb_adapter *adapter = data;
6860         struct igb_q_vector *q_vector = adapter->q_vector[0];
6861         struct e1000_hw *hw = &adapter->hw;
6862         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
6863          * need for the IMC write */
6864         u32 icr = E1000_READ_REG(hw, E1000_ICR);
6865
6866         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6867          * not set, then the adapter didn't send an interrupt */
6868         if (!(icr & E1000_ICR_INT_ASSERTED))
6869                 return IRQ_NONE;
6870
6871         igb_write_itr(q_vector);
6872
6873         if (icr & E1000_ICR_DRSTA)
6874                 schedule_work(&adapter->reset_task);
6875
6876         if (icr & E1000_ICR_DOUTSYNC) {
6877                 /* HW is reporting DMA is out of sync */
6878                 adapter->stats.doosync++;
6879         }
6880
6881         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6882                 hw->mac.get_link_status = 1;
6883                 /* guard against interrupt when we're going down */
6884                 if (!test_bit(__IGB_DOWN, &adapter->state))
6885                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6886         }
6887
6888 #ifdef HAVE_PTP_1588_CLOCK
6889         if (icr & E1000_ICR_TS) {
6890                 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6891
6892                 if (tsicr & E1000_TSICR_TXTS) {
6893                         /* acknowledge the interrupt */
6894                         E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6895                         /* retrieve hardware timestamp */
6896                         schedule_work(&adapter->ptp_tx_work);
6897                 }
6898         }
6899 #endif /* HAVE_PTP_1588_CLOCK */
6900
6901         napi_schedule(&q_vector->napi);
6902
6903         return IRQ_HANDLED;
6904 }
6905
6906 void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6907 {
6908         struct igb_adapter *adapter = q_vector->adapter;
6909         struct e1000_hw *hw = &adapter->hw;
6910
6911         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6912             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6913                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6914                         igb_set_itr(q_vector);
6915                 else
6916                         igb_update_ring_itr(q_vector);
6917         }
6918
6919         if (!test_bit(__IGB_DOWN, &adapter->state)) {
6920                 if (adapter->msix_entries)
6921                         E1000_WRITE_REG(hw, E1000_EIMS, q_vector->eims_value);
6922                 else
6923                         igb_irq_enable(adapter);
6924         }
6925 }
6926
6927 /**
6928  * igb_poll - NAPI Rx polling callback
6929  * @napi: napi polling structure
6930  * @budget: count of how many packets we should handle
6931  **/
6932 static int igb_poll(struct napi_struct *napi, int budget)
6933 {
6934         struct igb_q_vector *q_vector = container_of(napi, struct igb_q_vector, napi);
6935         bool clean_complete = true;
6936
6937 #ifdef IGB_DCA
6938         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6939                 igb_update_dca(q_vector);
6940 #endif
6941         if (q_vector->tx.ring)
6942                 clean_complete = igb_clean_tx_irq(q_vector);
6943
6944         if (q_vector->rx.ring)
6945                 clean_complete &= igb_clean_rx_irq(q_vector, budget);
6946
6947 #ifndef HAVE_NETDEV_NAPI_LIST
6948         /* if netdev is disabled we need to stop polling */
6949         if (!netif_running(q_vector->adapter->netdev))
6950                 clean_complete = true;
6951
6952 #endif
6953         /* If all work not completed, return budget and keep polling */
6954         if (!clean_complete)
6955                 return budget;
6956
6957         /* If not enough Rx work done, exit the polling mode */
6958         napi_complete(napi);
6959         igb_ring_irq_enable(q_vector);
6960
6961         return 0;
6962 }
6963
6964 /**
6965  * igb_clean_tx_irq - Reclaim resources after transmit completes
6966  * @q_vector: pointer to q_vector containing needed info
6967  * returns TRUE if ring is completely cleaned
6968  **/
6969 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
6970 {
6971         struct igb_adapter *adapter = q_vector->adapter;
6972         struct igb_ring *tx_ring = q_vector->tx.ring;
6973         struct igb_tx_buffer *tx_buffer;
6974         union e1000_adv_tx_desc *tx_desc;
6975         unsigned int total_bytes = 0, total_packets = 0;
6976         unsigned int budget = q_vector->tx.work_limit;
6977         unsigned int i = tx_ring->next_to_clean;
6978
6979         if (test_bit(__IGB_DOWN, &adapter->state))
6980                 return true;
6981
6982         tx_buffer = &tx_ring->tx_buffer_info[i];
6983         tx_desc = IGB_TX_DESC(tx_ring, i);
6984         i -= tx_ring->count;
6985
6986         do {
6987                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
6988
6989                 /* if next_to_watch is not set then there is no work pending */
6990                 if (!eop_desc)
6991                         break;
6992
6993                 /* prevent any other reads prior to eop_desc */
6994                 read_barrier_depends();
6995
6996                 /* if DD is not set pending work has not been completed */
6997                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
6998                         break;
6999
7000                 /* clear next_to_watch to prevent false hangs */
7001                 tx_buffer->next_to_watch = NULL;
7002
7003                 /* update the statistics for this packet */
7004                 total_bytes += tx_buffer->bytecount;
7005                 total_packets += tx_buffer->gso_segs;
7006
7007                 /* free the skb */
7008                 dev_kfree_skb_any(tx_buffer->skb);
7009
7010                 /* unmap skb header data */
7011                 dma_unmap_single(tx_ring->dev,
7012                                  dma_unmap_addr(tx_buffer, dma),
7013                                  dma_unmap_len(tx_buffer, len),
7014                                  DMA_TO_DEVICE);
7015
7016                 /* clear tx_buffer data */
7017                 tx_buffer->skb = NULL;
7018                 dma_unmap_len_set(tx_buffer, len, 0);
7019
7020                 /* clear last DMA location and unmap remaining buffers */
7021                 while (tx_desc != eop_desc) {
7022                         tx_buffer++;
7023                         tx_desc++;
7024                         i++;
7025                         if (unlikely(!i)) {
7026                                 i -= tx_ring->count;
7027                                 tx_buffer = tx_ring->tx_buffer_info;
7028                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
7029                         }
7030
7031                         /* unmap any remaining paged data */
7032                         if (dma_unmap_len(tx_buffer, len)) {
7033                                 dma_unmap_page(tx_ring->dev,
7034                                                dma_unmap_addr(tx_buffer, dma),
7035                                                dma_unmap_len(tx_buffer, len),
7036                                                DMA_TO_DEVICE);
7037                                 dma_unmap_len_set(tx_buffer, len, 0);
7038                         }
7039                 }
7040
7041                 /* move us one more past the eop_desc for start of next pkt */
7042                 tx_buffer++;
7043                 tx_desc++;
7044                 i++;
7045                 if (unlikely(!i)) {
7046                         i -= tx_ring->count;
7047                         tx_buffer = tx_ring->tx_buffer_info;
7048                         tx_desc = IGB_TX_DESC(tx_ring, 0);
7049                 }
7050
7051                 /* issue prefetch for next Tx descriptor */
7052                 prefetch(tx_desc);
7053
7054                 /* update budget accounting */
7055                 budget--;
7056         } while (likely(budget));
7057
7058         netdev_tx_completed_queue(txring_txq(tx_ring),
7059                                   total_packets, total_bytes);
7060
7061         i += tx_ring->count;
7062         tx_ring->next_to_clean = i;
7063         tx_ring->tx_stats.bytes += total_bytes;
7064         tx_ring->tx_stats.packets += total_packets;
7065         q_vector->tx.total_bytes += total_bytes;
7066         q_vector->tx.total_packets += total_packets;
7067
7068 #ifdef DEBUG
7069         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags) &&
7070             !(adapter->disable_hw_reset && adapter->tx_hang_detected)) {
7071 #else
7072         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
7073 #endif
7074                 struct e1000_hw *hw = &adapter->hw;
7075
7076                 /* Detect a transmit hang in hardware, this serializes the
7077                  * check with the clearing of time_stamp and movement of i */
7078                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
7079                 if (tx_buffer->next_to_watch &&
7080                     time_after(jiffies, tx_buffer->time_stamp +
7081                                (adapter->tx_timeout_factor * HZ))
7082                     && !(E1000_READ_REG(hw, E1000_STATUS) &
7083                          E1000_STATUS_TXOFF)) {
7084
7085                         /* detected Tx unit hang */
7086 #ifdef DEBUG
7087                         adapter->tx_hang_detected = TRUE;
7088                         if (adapter->disable_hw_reset) {
7089                                 DPRINTK(DRV, WARNING,
7090                                         "Deactivating netdev watchdog timer\n");
7091                                 if (del_timer(&netdev_ring(tx_ring)->watchdog_timer))
7092                                         dev_put(netdev_ring(tx_ring));
7093 #ifndef HAVE_NET_DEVICE_OPS
7094                                 netdev_ring(tx_ring)->tx_timeout = NULL;
7095 #endif
7096                         }
7097 #endif /* DEBUG */
7098                         dev_err(tx_ring->dev,
7099                                 "Detected Tx Unit Hang\n"
7100                                 "  Tx Queue             <%d>\n"
7101                                 "  TDH                  <%x>\n"
7102                                 "  TDT                  <%x>\n"
7103                                 "  next_to_use          <%x>\n"
7104                                 "  next_to_clean        <%x>\n"
7105                                 "buffer_info[next_to_clean]\n"
7106                                 "  time_stamp           <%lx>\n"
7107                                 "  next_to_watch        <%p>\n"
7108                                 "  jiffies              <%lx>\n"
7109                                 "  desc.status          <%x>\n",
7110                                 tx_ring->queue_index,
7111                                 E1000_READ_REG(hw, E1000_TDH(tx_ring->reg_idx)),
7112                                 readl(tx_ring->tail),
7113                                 tx_ring->next_to_use,
7114                                 tx_ring->next_to_clean,
7115                                 tx_buffer->time_stamp,
7116                                 tx_buffer->next_to_watch,
7117                                 jiffies,
7118                                 tx_buffer->next_to_watch->wb.status);
7119                         if (netif_is_multiqueue(netdev_ring(tx_ring)))
7120                                 netif_stop_subqueue(netdev_ring(tx_ring),
7121                                                     ring_queue_index(tx_ring));
7122                         else
7123                                 netif_stop_queue(netdev_ring(tx_ring));
7124
7125                         /* we are about to reset, no point in enabling stuff */
7126                         return true;
7127                 }
7128         }
7129
7130 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7131         if (unlikely(total_packets &&
7132                      netif_carrier_ok(netdev_ring(tx_ring)) &&
7133                      igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
7134                 /* Make sure that anybody stopping the queue after this
7135                  * sees the new next_to_clean.
7136                  */
7137                 smp_mb();
7138                 if (netif_is_multiqueue(netdev_ring(tx_ring))) {
7139                         if (__netif_subqueue_stopped(netdev_ring(tx_ring),
7140                                                      ring_queue_index(tx_ring)) &&
7141                             !(test_bit(__IGB_DOWN, &adapter->state))) {
7142                                 netif_wake_subqueue(netdev_ring(tx_ring),
7143                                                     ring_queue_index(tx_ring));
7144                                 tx_ring->tx_stats.restart_queue++;
7145                         }
7146                 } else {
7147                         if (netif_queue_stopped(netdev_ring(tx_ring)) &&
7148                             !(test_bit(__IGB_DOWN, &adapter->state))) {
7149                                 netif_wake_queue(netdev_ring(tx_ring));
7150                                 tx_ring->tx_stats.restart_queue++;
7151                         }
7152                 }
7153         }
7154
7155         return !!budget;
7156 }
7157
7158 #ifdef HAVE_VLAN_RX_REGISTER
7159 /**
7160  * igb_receive_skb - helper function to handle rx indications
7161  * @q_vector: structure containing interrupt and ring information
7162  * @skb: packet to send up
7163  **/
7164 static void igb_receive_skb(struct igb_q_vector *q_vector,
7165                             struct sk_buff *skb)
7166 {
7167         struct vlan_group **vlgrp = netdev_priv(skb->dev);
7168
7169         if (IGB_CB(skb)->vid) {
7170                 if (*vlgrp) {
7171                         vlan_gro_receive(&q_vector->napi, *vlgrp,
7172                                          IGB_CB(skb)->vid, skb);
7173                 } else {
7174                         dev_kfree_skb_any(skb);
7175                 }
7176         } else {
7177                 napi_gro_receive(&q_vector->napi, skb);
7178         }
7179 }
7180
7181 #endif /* HAVE_VLAN_RX_REGISTER */
7182 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7183 /**
7184  * igb_reuse_rx_page - page flip buffer and store it back on the ring
7185  * @rx_ring: rx descriptor ring to store buffers on
7186  * @old_buff: donor buffer to have page reused
7187  *
7188  * Synchronizes page for reuse by the adapter
7189  **/
7190 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
7191                               struct igb_rx_buffer *old_buff)
7192 {
7193         struct igb_rx_buffer *new_buff;
7194         u16 nta = rx_ring->next_to_alloc;
7195
7196         new_buff = &rx_ring->rx_buffer_info[nta];
7197
7198         /* update, and store next to alloc */
7199         nta++;
7200         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
7201
7202         /* transfer page from old buffer to new buffer */
7203         memcpy(new_buff, old_buff, sizeof(struct igb_rx_buffer));
7204
7205         /* sync the buffer for use by the device */
7206         dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
7207                                          old_buff->page_offset,
7208                                          IGB_RX_BUFSZ,
7209                                          DMA_FROM_DEVICE);
7210 }
7211
7212 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
7213                                   struct page *page,
7214                                   unsigned int truesize)
7215 {
7216         /* avoid re-using remote pages */
7217         if (unlikely(page_to_nid(page) != numa_node_id()))
7218                 return false;
7219
7220 #if (PAGE_SIZE < 8192)
7221         /* if we are only owner of page we can reuse it */
7222         if (unlikely(page_count(page) != 1))
7223                 return false;
7224
7225         /* flip page offset to other buffer */
7226         rx_buffer->page_offset ^= IGB_RX_BUFSZ;
7227
7228 #else
7229         /* move offset up to the next cache line */
7230         rx_buffer->page_offset += truesize;
7231
7232         if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
7233                 return false;
7234 #endif
7235
7236         /* bump ref count on page before it is given to the stack */
7237         get_page(page);
7238
7239         return true;
7240 }
7241
7242 /**
7243  * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
7244  * @rx_ring: rx descriptor ring to transact packets on
7245  * @rx_buffer: buffer containing page to add
7246  * @rx_desc: descriptor containing length of buffer written by hardware
7247  * @skb: sk_buff to place the data into
7248  *
7249  * This function will add the data contained in rx_buffer->page to the skb.
7250  * This is done either through a direct copy if the data in the buffer is
7251  * less than the skb header size, otherwise it will just attach the page as
7252  * a frag to the skb.
7253  *
7254  * The function will then update the page offset if necessary and return
7255  * true if the buffer can be reused by the adapter.
7256  **/
7257 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
7258                             struct igb_rx_buffer *rx_buffer,
7259                             union e1000_adv_rx_desc *rx_desc,
7260                             struct sk_buff *skb)
7261 {
7262         struct page *page = rx_buffer->page;
7263         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
7264 #if (PAGE_SIZE < 8192)
7265         unsigned int truesize = IGB_RX_BUFSZ;
7266 #else
7267         unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
7268 #endif
7269
7270         if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
7271                 unsigned char *va = page_address(page) + rx_buffer->page_offset;
7272
7273 #ifdef HAVE_PTP_1588_CLOCK
7274                 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
7275                         igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
7276                         va += IGB_TS_HDR_LEN;
7277                         size -= IGB_TS_HDR_LEN;
7278                 }
7279 #endif /* HAVE_PTP_1588_CLOCK */
7280
7281                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
7282
7283                 /* we can reuse buffer as-is, just make sure it is local */
7284                 if (likely(page_to_nid(page) == numa_node_id()))
7285                         return true;
7286
7287                 /* this page cannot be reused so discard it */
7288                 put_page(page);
7289                 return false;
7290         }
7291
7292         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
7293                         rx_buffer->page_offset, size, truesize);
7294
7295         return igb_can_reuse_rx_page(rx_buffer, page, truesize);
7296 }
7297
7298 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
7299                                            union e1000_adv_rx_desc *rx_desc,
7300                                            struct sk_buff *skb)
7301 {
7302         struct igb_rx_buffer *rx_buffer;
7303         struct page *page;
7304
7305         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
7306
7307         page = rx_buffer->page;
7308         prefetchw(page);
7309
7310         if (likely(!skb)) {
7311                 void *page_addr = page_address(page) +
7312                                   rx_buffer->page_offset;
7313
7314                 /* prefetch first cache line of first page */
7315                 prefetch(page_addr);
7316 #if L1_CACHE_BYTES < 128
7317                 prefetch(page_addr + L1_CACHE_BYTES);
7318 #endif
7319
7320                 /* allocate a skb to store the frags */
7321                 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
7322                                                 IGB_RX_HDR_LEN);
7323                 if (unlikely(!skb)) {
7324                         rx_ring->rx_stats.alloc_failed++;
7325                         return NULL;
7326                 }
7327
7328                 /*
7329                  * we will be copying header into skb->data in
7330                  * pskb_may_pull so it is in our interest to prefetch
7331                  * it now to avoid a possible cache miss
7332                  */
7333                 prefetchw(skb->data);
7334         }
7335
7336         /* we are reusing so sync this buffer for CPU use */
7337         dma_sync_single_range_for_cpu(rx_ring->dev,
7338                                       rx_buffer->dma,
7339                                       rx_buffer->page_offset,
7340                                       IGB_RX_BUFSZ,
7341                                       DMA_FROM_DEVICE);
7342
7343         /* pull page into skb */
7344         if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
7345                 /* hand second half of page back to the ring */
7346                 igb_reuse_rx_page(rx_ring, rx_buffer);
7347         } else {
7348                 /* we are not reusing the buffer so unmap it */
7349                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
7350                                PAGE_SIZE, DMA_FROM_DEVICE);
7351         }
7352
7353         /* clear contents of rx_buffer */
7354         rx_buffer->page = NULL;
7355
7356         return skb;
7357 }
7358
7359 #endif
7360 static inline void igb_rx_checksum(struct igb_ring *ring,
7361                                    union e1000_adv_rx_desc *rx_desc,
7362                                    struct sk_buff *skb)
7363 {
7364         skb_checksum_none_assert(skb);
7365
7366         /* Ignore Checksum bit is set */
7367         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
7368                 return;
7369
7370         /* Rx checksum disabled via ethtool */
7371         if (!(netdev_ring(ring)->features & NETIF_F_RXCSUM))
7372                 return;
7373
7374         /* TCP/UDP checksum error bit is set */
7375         if (igb_test_staterr(rx_desc,
7376                              E1000_RXDEXT_STATERR_TCPE |
7377                              E1000_RXDEXT_STATERR_IPE)) {
7378                 /*
7379                  * work around errata with sctp packets where the TCPE aka
7380                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
7381                  * packets, (aka let the stack check the crc32c)
7382                  */
7383                 if (!((skb->len == 60) &&
7384                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags)))
7385                         ring->rx_stats.csum_err++;
7386
7387                 /* let the stack verify checksum errors */
7388                 return;
7389         }
7390         /* It must be a TCP or UDP packet with a valid checksum */
7391         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
7392                                       E1000_RXD_STAT_UDPCS))
7393                 skb->ip_summed = CHECKSUM_UNNECESSARY;
7394 }
7395
7396 #ifdef NETIF_F_RXHASH
7397 static inline void igb_rx_hash(struct igb_ring *ring,
7398                                union e1000_adv_rx_desc *rx_desc,
7399                                struct sk_buff *skb)
7400 {
7401         if (netdev_ring(ring)->features & NETIF_F_RXHASH)
7402                 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
7403                              PKT_HASH_TYPE_L3);
7404 }
7405
7406 #endif
7407 #ifndef IGB_NO_LRO
7408 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7409 /**
7410  * igb_merge_active_tail - merge active tail into lro skb
7411  * @tail: pointer to active tail in frag_list
7412  *
7413  * This function merges the length and data of an active tail into the
7414  * skb containing the frag_list.  It resets the tail's pointer to the head,
7415  * but it leaves the heads pointer to tail intact.
7416  **/
7417 static inline struct sk_buff *igb_merge_active_tail(struct sk_buff *tail)
7418 {
7419         struct sk_buff *head = IGB_CB(tail)->head;
7420
7421         if (!head)
7422                 return tail;
7423
7424         head->len += tail->len;
7425         head->data_len += tail->len;
7426         head->truesize += tail->len;
7427
7428         IGB_CB(tail)->head = NULL;
7429
7430         return head;
7431 }
7432
7433 /**
7434  * igb_add_active_tail - adds an active tail into the skb frag_list
7435  * @head: pointer to the start of the skb
7436  * @tail: pointer to active tail to add to frag_list
7437  *
7438  * This function adds an active tail to the end of the frag list.  This tail
7439  * will still be receiving data so we cannot yet ad it's stats to the main
7440  * skb.  That is done via igb_merge_active_tail.
7441  **/
7442 static inline void igb_add_active_tail(struct sk_buff *head, struct sk_buff *tail)
7443 {
7444         struct sk_buff *old_tail = IGB_CB(head)->tail;
7445
7446         if (old_tail) {
7447                 igb_merge_active_tail(old_tail);
7448                 old_tail->next = tail;
7449         } else {
7450                 skb_shinfo(head)->frag_list = tail;
7451         }
7452
7453         IGB_CB(tail)->head = head;
7454         IGB_CB(head)->tail = tail;
7455
7456         IGB_CB(head)->append_cnt++;
7457 }
7458
7459 /**
7460  * igb_close_active_frag_list - cleanup pointers on a frag_list skb
7461  * @head: pointer to head of an active frag list
7462  *
7463  * This function will clear the frag_tail_tracker pointer on an active
7464  * frag_list and returns true if the pointer was actually set
7465  **/
7466 static inline bool igb_close_active_frag_list(struct sk_buff *head)
7467 {
7468         struct sk_buff *tail = IGB_CB(head)->tail;
7469
7470         if (!tail)
7471                 return false;
7472
7473         igb_merge_active_tail(tail);
7474
7475         IGB_CB(head)->tail = NULL;
7476
7477         return true;
7478 }
7479
7480 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7481 /**
7482  * igb_can_lro - returns true if packet is TCP/IPV4 and LRO is enabled
7483  * @adapter: board private structure
7484  * @rx_desc: pointer to the rx descriptor
7485  * @skb: pointer to the skb to be merged
7486  *
7487  **/
7488 static inline bool igb_can_lro(struct igb_ring *rx_ring,
7489                                union e1000_adv_rx_desc *rx_desc,
7490                                struct sk_buff *skb)
7491 {
7492         struct iphdr *iph = (struct iphdr *)skb->data;
7493         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7494
7495         /* verify hardware indicates this is IPv4/TCP */
7496         if((!(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP)) ||
7497             !(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))))
7498                 return false;
7499
7500         /* .. and LRO is enabled */
7501         if (!(netdev_ring(rx_ring)->features & NETIF_F_LRO))
7502                 return false;
7503
7504         /* .. and we are not in promiscuous mode */
7505         if (netdev_ring(rx_ring)->flags & IFF_PROMISC)
7506                 return false;
7507
7508         /* .. and the header is large enough for us to read IP/TCP fields */
7509         if (!pskb_may_pull(skb, sizeof(struct igb_lrohdr)))
7510                 return false;
7511
7512         /* .. and there are no VLANs on packet */
7513         if (skb->protocol != __constant_htons(ETH_P_IP))
7514                 return false;
7515
7516         /* .. and we are version 4 with no options */
7517         if (*(u8 *)iph != 0x45)
7518                 return false;
7519
7520         /* .. and the packet is not fragmented */
7521         if (iph->frag_off & htons(IP_MF | IP_OFFSET))
7522                 return false;
7523
7524         /* .. and that next header is TCP */
7525         if (iph->protocol != IPPROTO_TCP)
7526                 return false;
7527
7528         return true;
7529 }
7530
7531 static inline struct igb_lrohdr *igb_lro_hdr(struct sk_buff *skb)
7532 {
7533         return (struct igb_lrohdr *)skb->data;
7534 }
7535
7536 /**
7537  * igb_lro_flush - Indicate packets to upper layer.
7538  *
7539  * Update IP and TCP header part of head skb if more than one
7540  * skb's chained and indicate packets to upper layer.
7541  **/
7542 static void igb_lro_flush(struct igb_q_vector *q_vector,
7543                           struct sk_buff *skb)
7544 {
7545         struct igb_lro_list *lrolist = &q_vector->lrolist;
7546
7547         __skb_unlink(skb, &lrolist->active);
7548
7549         if (IGB_CB(skb)->append_cnt) {
7550                 struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7551
7552 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7553                 /* close any active lro contexts */
7554                 igb_close_active_frag_list(skb);
7555
7556 #endif
7557                 /* incorporate ip header and re-calculate checksum */
7558                 lroh->iph.tot_len = ntohs(skb->len);
7559                 lroh->iph.check = 0;
7560
7561                 /* header length is 5 since we know no options exist */
7562                 lroh->iph.check = ip_fast_csum((u8 *)lroh, 5);
7563
7564                 /* clear TCP checksum to indicate we are an LRO frame */
7565                 lroh->th.check = 0;
7566
7567                 /* incorporate latest timestamp into the tcp header */
7568                 if (IGB_CB(skb)->tsecr) {
7569                         lroh->ts[2] = IGB_CB(skb)->tsecr;
7570                         lroh->ts[1] = htonl(IGB_CB(skb)->tsval);
7571                 }
7572 #ifdef NETIF_F_GSO
7573
7574                 skb_shinfo(skb)->gso_size = IGB_CB(skb)->mss;
7575                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
7576 #endif
7577         }
7578
7579 #ifdef HAVE_VLAN_RX_REGISTER
7580         igb_receive_skb(q_vector, skb);
7581 #else
7582         napi_gro_receive(&q_vector->napi, skb);
7583 #endif
7584         lrolist->stats.flushed++;
7585 }
7586
7587 static void igb_lro_flush_all(struct igb_q_vector *q_vector)
7588 {
7589         struct igb_lro_list *lrolist = &q_vector->lrolist;
7590         struct sk_buff *skb, *tmp;
7591
7592         skb_queue_reverse_walk_safe(&lrolist->active, skb, tmp)
7593                 igb_lro_flush(q_vector, skb);
7594 }
7595
7596 /*
7597  * igb_lro_header_ok - Main LRO function.
7598  **/
7599 static void igb_lro_header_ok(struct sk_buff *skb)
7600 {
7601         struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7602         u16 opt_bytes, data_len;
7603
7604 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7605         IGB_CB(skb)->tail = NULL;
7606 #endif
7607         IGB_CB(skb)->tsecr = 0;
7608         IGB_CB(skb)->append_cnt = 0;
7609         IGB_CB(skb)->mss = 0;
7610
7611         /* ensure that the checksum is valid */
7612         if (skb->ip_summed != CHECKSUM_UNNECESSARY)
7613                 return;
7614
7615         /* If we see CE codepoint in IP header, packet is not mergeable */
7616         if (INET_ECN_is_ce(ipv4_get_dsfield(&lroh->iph)))
7617                 return;
7618
7619         /* ensure no bits set besides ack or psh */
7620         if (lroh->th.fin || lroh->th.syn || lroh->th.rst ||
7621             lroh->th.urg || lroh->th.ece || lroh->th.cwr ||
7622             !lroh->th.ack)
7623                 return;
7624
7625         /* store the total packet length */
7626         data_len = ntohs(lroh->iph.tot_len);
7627
7628         /* remove any padding from the end of the skb */
7629         __pskb_trim(skb, data_len);
7630
7631         /* remove header length from data length */
7632         data_len -= sizeof(struct igb_lrohdr);
7633
7634         /*
7635          * check for timestamps. Since the only option we handle are timestamps,
7636          * we only have to handle the simple case of aligned timestamps
7637          */
7638         opt_bytes = (lroh->th.doff << 2) - sizeof(struct tcphdr);
7639         if (opt_bytes != 0) {
7640                 if ((opt_bytes != TCPOLEN_TSTAMP_ALIGNED) ||
7641                     !pskb_may_pull(skb, sizeof(struct igb_lrohdr) +
7642                                         TCPOLEN_TSTAMP_ALIGNED) ||
7643                     (lroh->ts[0] != htonl((TCPOPT_NOP << 24) |
7644                                              (TCPOPT_NOP << 16) |
7645                                              (TCPOPT_TIMESTAMP << 8) |
7646                                               TCPOLEN_TIMESTAMP)) ||
7647                     (lroh->ts[2] == 0)) {
7648                         return;
7649                 }
7650
7651                 IGB_CB(skb)->tsval = ntohl(lroh->ts[1]);
7652                 IGB_CB(skb)->tsecr = lroh->ts[2];
7653
7654                 data_len -= TCPOLEN_TSTAMP_ALIGNED;
7655         }
7656
7657         /* record data_len as mss for the packet */
7658         IGB_CB(skb)->mss = data_len;
7659         IGB_CB(skb)->next_seq = ntohl(lroh->th.seq);
7660 }
7661
7662 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7663 static void igb_merge_frags(struct sk_buff *lro_skb, struct sk_buff *new_skb)
7664 {
7665         struct skb_shared_info *sh_info;
7666         struct skb_shared_info *new_skb_info;
7667         unsigned int data_len;
7668
7669         sh_info = skb_shinfo(lro_skb);
7670         new_skb_info = skb_shinfo(new_skb);
7671
7672         /* copy frags into the last skb */
7673         memcpy(sh_info->frags + sh_info->nr_frags,
7674                new_skb_info->frags,
7675                new_skb_info->nr_frags * sizeof(skb_frag_t));
7676
7677         /* copy size data over */
7678         sh_info->nr_frags += new_skb_info->nr_frags;
7679         data_len = IGB_CB(new_skb)->mss;
7680         lro_skb->len += data_len;
7681         lro_skb->data_len += data_len;
7682         lro_skb->truesize += data_len;
7683
7684         /* wipe record of data from new_skb */
7685         new_skb_info->nr_frags = 0;
7686         new_skb->len = new_skb->data_len = 0;
7687         dev_kfree_skb_any(new_skb);
7688 }
7689
7690 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7691 /**
7692  * igb_lro_receive - if able, queue skb into lro chain
7693  * @q_vector: structure containing interrupt and ring information
7694  * @new_skb: pointer to current skb being checked
7695  *
7696  * Checks whether the skb given is eligible for LRO and if that's
7697  * fine chains it to the existing lro_skb based on flowid. If an LRO for
7698  * the flow doesn't exist create one.
7699  **/
7700 static void igb_lro_receive(struct igb_q_vector *q_vector,
7701                             struct sk_buff *new_skb)
7702 {
7703         struct sk_buff *lro_skb;
7704         struct igb_lro_list *lrolist = &q_vector->lrolist;
7705         struct igb_lrohdr *lroh = igb_lro_hdr(new_skb);
7706         __be32 saddr = lroh->iph.saddr;
7707         __be32 daddr = lroh->iph.daddr;
7708         __be32 tcp_ports = *(__be32 *)&lroh->th;
7709         u16 data_len;
7710 #ifdef HAVE_VLAN_RX_REGISTER
7711         u16 vid = IGB_CB(new_skb)->vid;
7712 #else
7713         u16 vid = new_skb->vlan_tci;
7714 #endif
7715
7716         igb_lro_header_ok(new_skb);
7717
7718         /*
7719          * we have a packet that might be eligible for LRO,
7720          * so see if it matches anything we might expect
7721          */
7722         skb_queue_walk(&lrolist->active, lro_skb) {
7723                 if (*(__be32 *)&igb_lro_hdr(lro_skb)->th != tcp_ports ||
7724                     igb_lro_hdr(lro_skb)->iph.saddr != saddr ||
7725                     igb_lro_hdr(lro_skb)->iph.daddr != daddr)
7726                         continue;
7727
7728 #ifdef HAVE_VLAN_RX_REGISTER
7729                 if (IGB_CB(lro_skb)->vid != vid)
7730 #else
7731                 if (lro_skb->vlan_tci != vid)
7732 #endif
7733                         continue;
7734
7735                 /* out of order packet */
7736                 if (IGB_CB(lro_skb)->next_seq != IGB_CB(new_skb)->next_seq) {
7737                         igb_lro_flush(q_vector, lro_skb);
7738                         IGB_CB(new_skb)->mss = 0;
7739                         break;
7740                 }
7741
7742                 /* TCP timestamp options have changed */
7743                 if (!IGB_CB(lro_skb)->tsecr != !IGB_CB(new_skb)->tsecr) {
7744                         igb_lro_flush(q_vector, lro_skb);
7745                         break;
7746                 }
7747
7748                 /* make sure timestamp values are increasing */
7749                 if (IGB_CB(lro_skb)->tsecr &&
7750                     IGB_CB(lro_skb)->tsval > IGB_CB(new_skb)->tsval) {
7751                         igb_lro_flush(q_vector, lro_skb);
7752                         IGB_CB(new_skb)->mss = 0;
7753                         break;
7754                 }
7755
7756                 data_len = IGB_CB(new_skb)->mss;
7757
7758                 /* Check for all of the above below
7759                  *   malformed header
7760                  *   no tcp data
7761                  *   resultant packet would be too large
7762                  *   new skb is larger than our current mss
7763                  *   data would remain in header
7764                  *   we would consume more frags then the sk_buff contains
7765                  *   ack sequence numbers changed
7766                  *   window size has changed
7767                  */
7768                 if (data_len == 0 ||
7769                     data_len > IGB_CB(lro_skb)->mss ||
7770                     data_len > IGB_CB(lro_skb)->free ||
7771 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7772                     data_len != new_skb->data_len ||
7773                     skb_shinfo(new_skb)->nr_frags >=
7774                     (MAX_SKB_FRAGS - skb_shinfo(lro_skb)->nr_frags) ||
7775 #endif
7776                     igb_lro_hdr(lro_skb)->th.ack_seq != lroh->th.ack_seq ||
7777                     igb_lro_hdr(lro_skb)->th.window != lroh->th.window) {
7778                         igb_lro_flush(q_vector, lro_skb);
7779                         break;
7780                 }
7781
7782                 /* Remove IP and TCP header*/
7783                 skb_pull(new_skb, new_skb->len - data_len);
7784
7785                 /* update timestamp and timestamp echo response */
7786                 IGB_CB(lro_skb)->tsval = IGB_CB(new_skb)->tsval;
7787                 IGB_CB(lro_skb)->tsecr = IGB_CB(new_skb)->tsecr;
7788
7789                 /* update sequence and free space */
7790                 IGB_CB(lro_skb)->next_seq += data_len;
7791                 IGB_CB(lro_skb)->free -= data_len;
7792
7793                 /* update append_cnt */
7794                 IGB_CB(lro_skb)->append_cnt++;
7795
7796 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7797                 /* if header is empty pull pages into current skb */
7798                 igb_merge_frags(lro_skb, new_skb);
7799 #else
7800                 /* chain this new skb in frag_list */
7801                 igb_add_active_tail(lro_skb, new_skb);
7802 #endif
7803
7804                 if ((data_len < IGB_CB(lro_skb)->mss) || lroh->th.psh ||
7805                     skb_shinfo(lro_skb)->nr_frags == MAX_SKB_FRAGS) {
7806                         igb_lro_hdr(lro_skb)->th.psh |= lroh->th.psh;
7807                         igb_lro_flush(q_vector, lro_skb);
7808                 }
7809
7810                 lrolist->stats.coal++;
7811                 return;
7812         }
7813
7814         if (IGB_CB(new_skb)->mss && !lroh->th.psh) {
7815                 /* if we are at capacity flush the tail */
7816                 if (skb_queue_len(&lrolist->active) >= IGB_LRO_MAX) {
7817                         lro_skb = skb_peek_tail(&lrolist->active);
7818                         if (lro_skb)
7819                                 igb_lro_flush(q_vector, lro_skb);
7820                 }
7821
7822                 /* update sequence and free space */
7823                 IGB_CB(new_skb)->next_seq += IGB_CB(new_skb)->mss;
7824                 IGB_CB(new_skb)->free = 65521 - new_skb->len;
7825
7826                 /* .. and insert at the front of the active list */
7827                 __skb_queue_head(&lrolist->active, new_skb);
7828
7829                 lrolist->stats.coal++;
7830                 return;
7831         }
7832
7833         /* packet not handled by any of the above, pass it to the stack */
7834 #ifdef HAVE_VLAN_RX_REGISTER
7835         igb_receive_skb(q_vector, new_skb);
7836 #else
7837         napi_gro_receive(&q_vector->napi, new_skb);
7838 #endif
7839 }
7840
7841 #endif /* IGB_NO_LRO */
7842 /**
7843  * igb_process_skb_fields - Populate skb header fields from Rx descriptor
7844  * @rx_ring: rx descriptor ring packet is being transacted on
7845  * @rx_desc: pointer to the EOP Rx descriptor
7846  * @skb: pointer to current skb being populated
7847  *
7848  * This function checks the ring, descriptor, and packet information in
7849  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
7850  * other fields within the skb.
7851  **/
7852 static void igb_process_skb_fields(struct igb_ring *rx_ring,
7853                                    union e1000_adv_rx_desc *rx_desc,
7854                                    struct sk_buff *skb)
7855 {
7856         struct net_device *dev = rx_ring->netdev;
7857         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7858
7859 #ifdef NETIF_F_RXHASH
7860         igb_rx_hash(rx_ring, rx_desc, skb);
7861
7862 #endif
7863         igb_rx_checksum(rx_ring, rx_desc, skb);
7864
7865     /* update packet type stats */
7866         if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))
7867                 rx_ring->rx_stats.ipv4_packets++;
7868         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4_EX))
7869                 rx_ring->rx_stats.ipv4e_packets++;
7870         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6))
7871                 rx_ring->rx_stats.ipv6_packets++;
7872         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6_EX))
7873                 rx_ring->rx_stats.ipv6e_packets++;
7874         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP))
7875                 rx_ring->rx_stats.tcp_packets++;
7876         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_UDP))
7877                 rx_ring->rx_stats.udp_packets++;
7878         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_SCTP))
7879                 rx_ring->rx_stats.sctp_packets++;
7880         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_NFS))
7881                 rx_ring->rx_stats.nfs_packets++;
7882
7883 #ifdef HAVE_PTP_1588_CLOCK
7884         igb_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
7885 #endif /* HAVE_PTP_1588_CLOCK */
7886
7887 #ifdef NETIF_F_HW_VLAN_CTAG_RX
7888         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
7889 #else
7890         if ((dev->features & NETIF_F_HW_VLAN_RX) &&
7891 #endif
7892             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
7893                 u16 vid = 0;
7894                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
7895                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
7896                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
7897                 else
7898                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
7899 #ifdef HAVE_VLAN_RX_REGISTER
7900                 IGB_CB(skb)->vid = vid;
7901         } else {
7902                 IGB_CB(skb)->vid = 0;
7903 #else
7904
7905 #ifdef HAVE_VLAN_PROTOCOL
7906                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7907 #else
7908                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7909 #endif
7910
7911
7912 #endif
7913         }
7914
7915         skb_record_rx_queue(skb, rx_ring->queue_index);
7916
7917         skb->protocol = eth_type_trans(skb, dev);
7918 }
7919
7920 /**
7921  * igb_is_non_eop - process handling of non-EOP buffers
7922  * @rx_ring: Rx ring being processed
7923  * @rx_desc: Rx descriptor for current buffer
7924  *
7925  * This function updates next to clean.  If the buffer is an EOP buffer
7926  * this function exits returning false, otherwise it will place the
7927  * sk_buff in the next buffer to be chained and return true indicating
7928  * that this is in fact a non-EOP buffer.
7929  **/
7930 static bool igb_is_non_eop(struct igb_ring *rx_ring,
7931                            union e1000_adv_rx_desc *rx_desc)
7932 {
7933         u32 ntc = rx_ring->next_to_clean + 1;
7934
7935         /* fetch, update, and store next to clean */
7936         ntc = (ntc < rx_ring->count) ? ntc : 0;
7937         rx_ring->next_to_clean = ntc;
7938
7939         prefetch(IGB_RX_DESC(rx_ring, ntc));
7940
7941         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
7942                 return false;
7943
7944         return true;
7945 }
7946
7947 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7948 /* igb_clean_rx_irq -- * legacy */
7949 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
7950 {
7951         struct igb_ring *rx_ring = q_vector->rx.ring;
7952         unsigned int total_bytes = 0, total_packets = 0;
7953         u16 cleaned_count = igb_desc_unused(rx_ring);
7954
7955         do {
7956                 struct igb_rx_buffer *rx_buffer;
7957                 union e1000_adv_rx_desc *rx_desc;
7958                 struct sk_buff *skb;
7959                 u16 ntc;
7960
7961                 /* return some buffers to hardware, one at a time is too slow */
7962                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
7963                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
7964                         cleaned_count = 0;
7965                 }
7966
7967                 ntc = rx_ring->next_to_clean;
7968                 rx_desc = IGB_RX_DESC(rx_ring, ntc);
7969                 rx_buffer = &rx_ring->rx_buffer_info[ntc];
7970
7971                 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
7972                         break;
7973
7974                 /*
7975                  * This memory barrier is needed to keep us from reading
7976                  * any other fields out of the rx_desc until we know the
7977                  * RXD_STAT_DD bit is set
7978                  */
7979                 rmb();
7980
7981                 skb = rx_buffer->skb;
7982
7983                 prefetch(skb->data);
7984
7985                 /* pull the header of the skb in */
7986                 __skb_put(skb, le16_to_cpu(rx_desc->wb.upper.length));
7987
7988                 /* clear skb reference in buffer info structure */
7989                 rx_buffer->skb = NULL;
7990
7991                 cleaned_count++;
7992
7993                 BUG_ON(igb_is_non_eop(rx_ring, rx_desc));
7994
7995                 dma_unmap_single(rx_ring->dev, rx_buffer->dma,
7996                                  rx_ring->rx_buffer_len,
7997                                  DMA_FROM_DEVICE);
7998                 rx_buffer->dma = 0;
7999
8000                 if (igb_test_staterr(rx_desc,
8001                                      E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
8002                         dev_kfree_skb_any(skb);
8003                         continue;
8004                 }
8005
8006                 total_bytes += skb->len;
8007
8008                 /* populate checksum, timestamp, VLAN, and protocol */
8009                 igb_process_skb_fields(rx_ring, rx_desc, skb);
8010
8011 #ifndef IGB_NO_LRO
8012                 if (igb_can_lro(rx_ring, rx_desc, skb))
8013                         igb_lro_receive(q_vector, skb);
8014                 else
8015 #endif
8016 #ifdef HAVE_VLAN_RX_REGISTER
8017                         igb_receive_skb(q_vector, skb);
8018 #else
8019                         napi_gro_receive(&q_vector->napi, skb);
8020 #endif
8021
8022 #ifndef NETIF_F_GRO
8023                 netdev_ring(rx_ring)->last_rx = jiffies;
8024
8025 #endif
8026                 /* update budget accounting */
8027                 total_packets++;
8028         } while (likely(total_packets < budget));
8029
8030         rx_ring->rx_stats.packets += total_packets;
8031         rx_ring->rx_stats.bytes += total_bytes;
8032         q_vector->rx.total_packets += total_packets;
8033         q_vector->rx.total_bytes += total_bytes;
8034
8035         if (cleaned_count)
8036                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8037
8038 #ifndef IGB_NO_LRO
8039         igb_lro_flush_all(q_vector);
8040
8041 #endif /* IGB_NO_LRO */
8042         return (total_packets < budget);
8043 }
8044 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8045 /**
8046  * igb_get_headlen - determine size of header for LRO/GRO
8047  * @data: pointer to the start of the headers
8048  * @max_len: total length of section to find headers in
8049  *
8050  * This function is meant to determine the length of headers that will
8051  * be recognized by hardware for LRO, and GRO offloads.  The main
8052  * motivation of doing this is to only perform one pull for IPv4 TCP
8053  * packets so that we can do basic things like calculating the gso_size
8054  * based on the average data per packet.
8055  **/
8056 static unsigned int igb_get_headlen(unsigned char *data,
8057                                     unsigned int max_len)
8058 {
8059         union {
8060                 unsigned char *network;
8061                 /* l2 headers */
8062                 struct ethhdr *eth;
8063                 struct vlan_hdr *vlan;
8064                 /* l3 headers */
8065                 struct iphdr *ipv4;
8066                 struct ipv6hdr *ipv6;
8067         } hdr;
8068         __be16 protocol;
8069         u8 nexthdr = 0; /* default to not TCP */
8070         u8 hlen;
8071
8072         /* this should never happen, but better safe than sorry */
8073         if (max_len < ETH_HLEN)
8074                 return max_len;
8075
8076         /* initialize network frame pointer */
8077         hdr.network = data;
8078
8079         /* set first protocol and move network header forward */
8080         protocol = hdr.eth->h_proto;
8081         hdr.network += ETH_HLEN;
8082
8083         /* handle any vlan tag if present */
8084         if (protocol == __constant_htons(ETH_P_8021Q)) {
8085                 if ((hdr.network - data) > (max_len - VLAN_HLEN))
8086                         return max_len;
8087
8088                 protocol = hdr.vlan->h_vlan_encapsulated_proto;
8089                 hdr.network += VLAN_HLEN;
8090         }
8091
8092         /* handle L3 protocols */
8093         if (protocol == __constant_htons(ETH_P_IP)) {
8094                 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
8095                         return max_len;
8096
8097                 /* access ihl as a u8 to avoid unaligned access on ia64 */
8098                 hlen = (hdr.network[0] & 0x0F) << 2;
8099
8100                 /* verify hlen meets minimum size requirements */
8101                 if (hlen < sizeof(struct iphdr))
8102                         return hdr.network - data;
8103
8104                 /* record next protocol if header is present */
8105                 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
8106                         nexthdr = hdr.ipv4->protocol;
8107 #ifdef NETIF_F_TSO6
8108         } else if (protocol == __constant_htons(ETH_P_IPV6)) {
8109                 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
8110                         return max_len;
8111
8112                 /* record next protocol */
8113                 nexthdr = hdr.ipv6->nexthdr;
8114                 hlen = sizeof(struct ipv6hdr);
8115 #endif /* NETIF_F_TSO6 */
8116         } else {
8117                 return hdr.network - data;
8118         }
8119
8120         /* relocate pointer to start of L4 header */
8121         hdr.network += hlen;
8122
8123         /* finally sort out TCP */
8124         if (nexthdr == IPPROTO_TCP) {
8125                 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
8126                         return max_len;
8127
8128                 /* access doff as a u8 to avoid unaligned access on ia64 */
8129                 hlen = (hdr.network[12] & 0xF0) >> 2;
8130
8131                 /* verify hlen meets minimum size requirements */
8132                 if (hlen < sizeof(struct tcphdr))
8133                         return hdr.network - data;
8134
8135                 hdr.network += hlen;
8136         } else if (nexthdr == IPPROTO_UDP) {
8137                 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
8138                         return max_len;
8139
8140                 hdr.network += sizeof(struct udphdr);
8141         }
8142
8143         /*
8144          * If everything has gone correctly hdr.network should be the
8145          * data section of the packet and will be the end of the header.
8146          * If not then it probably represents the end of the last recognized
8147          * header.
8148          */
8149         if ((hdr.network - data) < max_len)
8150                 return hdr.network - data;
8151         else
8152                 return max_len;
8153 }
8154
8155 /**
8156  * igb_pull_tail - igb specific version of skb_pull_tail
8157  * @rx_ring: rx descriptor ring packet is being transacted on
8158  * @rx_desc: pointer to the EOP Rx descriptor
8159  * @skb: pointer to current skb being adjusted
8160  *
8161  * This function is an igb specific version of __pskb_pull_tail.  The
8162  * main difference between this version and the original function is that
8163  * this function can make several assumptions about the state of things
8164  * that allow for significant optimizations versus the standard function.
8165  * As a result we can do things like drop a frag and maintain an accurate
8166  * truesize for the skb.
8167  */
8168 static void igb_pull_tail(struct igb_ring *rx_ring,
8169                           union e1000_adv_rx_desc *rx_desc,
8170                           struct sk_buff *skb)
8171 {
8172         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
8173         unsigned char *va;
8174         unsigned int pull_len;
8175
8176         /*
8177          * it is valid to use page_address instead of kmap since we are
8178          * working with pages allocated out of the lomem pool per
8179          * alloc_page(GFP_ATOMIC)
8180          */
8181         va = skb_frag_address(frag);
8182
8183 #ifdef HAVE_PTP_1588_CLOCK
8184         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
8185                 /* retrieve timestamp from buffer */
8186                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
8187
8188                 /* update pointers to remove timestamp header */
8189                 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
8190                 frag->page_offset += IGB_TS_HDR_LEN;
8191                 skb->data_len -= IGB_TS_HDR_LEN;
8192                 skb->len -= IGB_TS_HDR_LEN;
8193
8194                 /* move va to start of packet data */
8195                 va += IGB_TS_HDR_LEN;
8196         }
8197 #endif /* HAVE_PTP_1588_CLOCK */
8198
8199         /*
8200          * we need the header to contain the greater of either ETH_HLEN or
8201          * 60 bytes if the skb->len is less than 60 for skb_pad.
8202          */
8203         pull_len = igb_get_headlen(va, IGB_RX_HDR_LEN);
8204
8205         /* align pull length to size of long to optimize memcpy performance */
8206         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
8207
8208         /* update all of the pointers */
8209         skb_frag_size_sub(frag, pull_len);
8210         frag->page_offset += pull_len;
8211         skb->data_len -= pull_len;
8212         skb->tail += pull_len;
8213 }
8214
8215 /**
8216  * igb_cleanup_headers - Correct corrupted or empty headers
8217  * @rx_ring: rx descriptor ring packet is being transacted on
8218  * @rx_desc: pointer to the EOP Rx descriptor
8219  * @skb: pointer to current skb being fixed
8220  *
8221  * Address the case where we are pulling data in on pages only
8222  * and as such no data is present in the skb header.
8223  *
8224  * In addition if skb is not at least 60 bytes we need to pad it so that
8225  * it is large enough to qualify as a valid Ethernet frame.
8226  *
8227  * Returns true if an error was encountered and skb was freed.
8228  **/
8229 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
8230                                 union e1000_adv_rx_desc *rx_desc,
8231                                 struct sk_buff *skb)
8232 {
8233
8234         if (unlikely((igb_test_staterr(rx_desc,
8235                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
8236                 struct net_device *netdev = rx_ring->netdev;
8237                 if (!(netdev->features & NETIF_F_RXALL)) {
8238                         dev_kfree_skb_any(skb);
8239                         return true;
8240                 }
8241         }
8242
8243         /* place header in linear portion of buffer */
8244         if (skb_is_nonlinear(skb))
8245                 igb_pull_tail(rx_ring, rx_desc, skb);
8246
8247         /* if skb_pad returns an error the skb was freed */
8248         if (unlikely(skb->len < 60)) {
8249                 int pad_len = 60 - skb->len;
8250
8251                 if (skb_pad(skb, pad_len))
8252                         return true;
8253                 __skb_put(skb, pad_len);
8254         }
8255
8256         return false;
8257 }
8258
8259 /* igb_clean_rx_irq -- * packet split */
8260 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
8261 {
8262         struct igb_ring *rx_ring = q_vector->rx.ring;
8263         struct sk_buff *skb = rx_ring->skb;
8264         unsigned int total_bytes = 0, total_packets = 0;
8265         u16 cleaned_count = igb_desc_unused(rx_ring);
8266
8267         do {
8268                 union e1000_adv_rx_desc *rx_desc;
8269
8270                 /* return some buffers to hardware, one at a time is too slow */
8271                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
8272                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
8273                         cleaned_count = 0;
8274                 }
8275
8276                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
8277
8278                 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
8279                         break;
8280
8281                 /*
8282                  * This memory barrier is needed to keep us from reading
8283                  * any other fields out of the rx_desc until we know the
8284                  * RXD_STAT_DD bit is set
8285                  */
8286                 rmb();
8287
8288                 /* retrieve a buffer from the ring */
8289                 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
8290
8291                 /* exit if we failed to retrieve a buffer */
8292                 if (!skb)
8293                         break;
8294
8295                 cleaned_count++;
8296
8297                 /* fetch next buffer in frame if non-eop */
8298                 if (igb_is_non_eop(rx_ring, rx_desc))
8299                         continue;
8300
8301                 /* verify the packet layout is correct */
8302                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
8303                         skb = NULL;
8304                         continue;
8305                 }
8306
8307                 /* probably a little skewed due to removing CRC */
8308                 total_bytes += skb->len;
8309
8310                 /* populate checksum, timestamp, VLAN, and protocol */
8311                 igb_process_skb_fields(rx_ring, rx_desc, skb);
8312
8313 #ifndef IGB_NO_LRO
8314                 if (igb_can_lro(rx_ring, rx_desc, skb))
8315                         igb_lro_receive(q_vector, skb);
8316                 else
8317 #endif
8318 #ifdef HAVE_VLAN_RX_REGISTER
8319                         igb_receive_skb(q_vector, skb);
8320 #else
8321                         napi_gro_receive(&q_vector->napi, skb);
8322 #endif
8323 #ifndef NETIF_F_GRO
8324
8325                 netdev_ring(rx_ring)->last_rx = jiffies;
8326 #endif
8327
8328                 /* reset skb pointer */
8329                 skb = NULL;
8330
8331                 /* update budget accounting */
8332                 total_packets++;
8333         } while (likely(total_packets < budget));
8334
8335         /* place incomplete frames back on ring for completion */
8336         rx_ring->skb = skb;
8337
8338         rx_ring->rx_stats.packets += total_packets;
8339         rx_ring->rx_stats.bytes += total_bytes;
8340         q_vector->rx.total_packets += total_packets;
8341         q_vector->rx.total_bytes += total_bytes;
8342
8343         if (cleaned_count)
8344                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8345
8346 #ifndef IGB_NO_LRO
8347         igb_lro_flush_all(q_vector);
8348
8349 #endif /* IGB_NO_LRO */
8350         return (total_packets < budget);
8351 }
8352 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8353
8354 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8355 static bool igb_alloc_mapped_skb(struct igb_ring *rx_ring,
8356                                  struct igb_rx_buffer *bi)
8357 {
8358         struct sk_buff *skb = bi->skb;
8359         dma_addr_t dma = bi->dma;
8360
8361         if (dma)
8362                 return true;
8363
8364         if (likely(!skb)) {
8365                 skb = netdev_alloc_skb_ip_align(netdev_ring(rx_ring),
8366                                                 rx_ring->rx_buffer_len);
8367                 bi->skb = skb;
8368                 if (!skb) {
8369                         rx_ring->rx_stats.alloc_failed++;
8370                         return false;
8371                 }
8372
8373                 /* initialize skb for ring */
8374                 skb_record_rx_queue(skb, ring_queue_index(rx_ring));
8375         }
8376
8377         dma = dma_map_single(rx_ring->dev, skb->data,
8378                              rx_ring->rx_buffer_len, DMA_FROM_DEVICE);
8379
8380         /* if mapping failed free memory back to system since
8381          * there isn't much point in holding memory we can't use
8382          */
8383         if (dma_mapping_error(rx_ring->dev, dma)) {
8384                 dev_kfree_skb_any(skb);
8385                 bi->skb = NULL;
8386
8387                 rx_ring->rx_stats.alloc_failed++;
8388                 return false;
8389         }
8390
8391         bi->dma = dma;
8392         return true;
8393 }
8394
8395 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8396 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
8397                                   struct igb_rx_buffer *bi)
8398 {
8399         struct page *page = bi->page;
8400         dma_addr_t dma;
8401
8402         /* since we are recycling buffers we should seldom need to alloc */
8403         if (likely(page))
8404                 return true;
8405
8406         /* alloc new page for storage */
8407         page = alloc_page(GFP_ATOMIC | __GFP_COLD);
8408         if (unlikely(!page)) {
8409                 rx_ring->rx_stats.alloc_failed++;
8410                 return false;
8411         }
8412
8413         /* map page for use */
8414         dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
8415
8416         /*
8417          * if mapping failed free memory back to system since
8418          * there isn't much point in holding memory we can't use
8419          */
8420         if (dma_mapping_error(rx_ring->dev, dma)) {
8421                 __free_page(page);
8422
8423                 rx_ring->rx_stats.alloc_failed++;
8424                 return false;
8425         }
8426
8427         bi->dma = dma;
8428         bi->page = page;
8429         bi->page_offset = 0;
8430
8431         return true;
8432 }
8433
8434 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8435 /**
8436  * igb_alloc_rx_buffers - Replace used receive buffers; packet split
8437  * @adapter: address of board private structure
8438  **/
8439 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
8440 {
8441         union e1000_adv_rx_desc *rx_desc;
8442         struct igb_rx_buffer *bi;
8443         u16 i = rx_ring->next_to_use;
8444
8445         /* nothing to do */
8446         if (!cleaned_count)
8447                 return;
8448
8449         rx_desc = IGB_RX_DESC(rx_ring, i);
8450         bi = &rx_ring->rx_buffer_info[i];
8451         i -= rx_ring->count;
8452
8453         do {
8454 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8455                 if (!igb_alloc_mapped_skb(rx_ring, bi))
8456 #else
8457                 if (!igb_alloc_mapped_page(rx_ring, bi))
8458 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8459                         break;
8460
8461                 /*
8462                  * Refresh the desc even if buffer_addrs didn't change
8463                  * because each write-back erases this info.
8464                  */
8465 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8466                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
8467 #else
8468                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
8469 #endif
8470
8471                 rx_desc++;
8472                 bi++;
8473                 i++;
8474                 if (unlikely(!i)) {
8475                         rx_desc = IGB_RX_DESC(rx_ring, 0);
8476                         bi = rx_ring->rx_buffer_info;
8477                         i -= rx_ring->count;
8478                 }
8479
8480                 /* clear the hdr_addr for the next_to_use descriptor */
8481                 rx_desc->read.hdr_addr = 0;
8482
8483                 cleaned_count--;
8484         } while (cleaned_count);
8485
8486         i += rx_ring->count;
8487
8488         if (rx_ring->next_to_use != i) {
8489                 /* record the next descriptor to use */
8490                 rx_ring->next_to_use = i;
8491
8492 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
8493                 /* update next to alloc since we have filled the ring */
8494                 rx_ring->next_to_alloc = i;
8495
8496 #endif
8497                 /*
8498                  * Force memory writes to complete before letting h/w
8499                  * know there are new descriptors to fetch.  (Only
8500                  * applicable for weak-ordered memory model archs,
8501                  * such as IA-64).
8502                  */
8503                 wmb();
8504                 writel(i, rx_ring->tail);
8505         }
8506 }
8507
8508 #ifdef SIOCGMIIPHY
8509 /**
8510  * igb_mii_ioctl -
8511  * @netdev:
8512  * @ifreq:
8513  * @cmd:
8514  **/
8515 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8516 {
8517         struct igb_adapter *adapter = netdev_priv(netdev);
8518         struct mii_ioctl_data *data = if_mii(ifr);
8519
8520         if (adapter->hw.phy.media_type != e1000_media_type_copper)
8521                 return -EOPNOTSUPP;
8522
8523         switch (cmd) {
8524         case SIOCGMIIPHY:
8525                 data->phy_id = adapter->hw.phy.addr;
8526                 break;
8527         case SIOCGMIIREG:
8528                 if (!capable(CAP_NET_ADMIN))
8529                         return -EPERM;
8530                 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
8531                                    &data->val_out))
8532                         return -EIO;
8533                 break;
8534         case SIOCSMIIREG:
8535         default:
8536                 return -EOPNOTSUPP;
8537         }
8538         return E1000_SUCCESS;
8539 }
8540
8541 #endif
8542 /**
8543  * igb_ioctl -
8544  * @netdev:
8545  * @ifreq:
8546  * @cmd:
8547  **/
8548 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8549 {
8550         switch (cmd) {
8551 #ifdef SIOCGMIIPHY
8552         case SIOCGMIIPHY:
8553         case SIOCGMIIREG:
8554         case SIOCSMIIREG:
8555                 return igb_mii_ioctl(netdev, ifr, cmd);
8556 #endif
8557 #ifdef HAVE_PTP_1588_CLOCK
8558         case SIOCSHWTSTAMP:
8559                 return igb_ptp_hwtstamp_ioctl(netdev, ifr, cmd);
8560 #endif /* HAVE_PTP_1588_CLOCK */
8561 #ifdef ETHTOOL_OPS_COMPAT
8562         case SIOCETHTOOL:
8563                 return ethtool_ioctl(ifr);
8564 #endif
8565         default:
8566                 return -EOPNOTSUPP;
8567         }
8568 }
8569
8570 s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8571 {
8572         struct igb_adapter *adapter = hw->back;
8573         u16 cap_offset;
8574
8575         cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8576         if (!cap_offset)
8577                 return -E1000_ERR_CONFIG;
8578
8579         pci_read_config_word(adapter->pdev, cap_offset + reg, value);
8580
8581         return E1000_SUCCESS;
8582 }
8583
8584 s32 e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8585 {
8586         struct igb_adapter *adapter = hw->back;
8587         u16 cap_offset;
8588
8589         cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8590         if (!cap_offset)
8591                 return -E1000_ERR_CONFIG;
8592
8593         pci_write_config_word(adapter->pdev, cap_offset + reg, *value);
8594
8595         return E1000_SUCCESS;
8596 }
8597
8598 #ifdef HAVE_VLAN_RX_REGISTER
8599 static void igb_vlan_mode(struct net_device *netdev, struct vlan_group *vlgrp)
8600 #else
8601 void igb_vlan_mode(struct net_device *netdev, u32 features)
8602 #endif
8603 {
8604         struct igb_adapter *adapter = netdev_priv(netdev);
8605         struct e1000_hw *hw = &adapter->hw;
8606         u32 ctrl, rctl;
8607         int i;
8608 #ifdef HAVE_VLAN_RX_REGISTER
8609         bool enable = !!vlgrp;
8610
8611         igb_irq_disable(adapter);
8612
8613         adapter->vlgrp = vlgrp;
8614
8615         if (!test_bit(__IGB_DOWN, &adapter->state))
8616                 igb_irq_enable(adapter);
8617 #else
8618 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8619         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
8620 #else
8621         bool enable = !!(features & NETIF_F_HW_VLAN_RX);
8622 #endif
8623 #endif
8624
8625         if (enable) {
8626                 /* enable VLAN tag insert/strip */
8627                 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8628                 ctrl |= E1000_CTRL_VME;
8629                 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8630
8631                 /* Disable CFI check */
8632                 rctl = E1000_READ_REG(hw, E1000_RCTL);
8633                 rctl &= ~E1000_RCTL_CFIEN;
8634                 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8635         } else {
8636                 /* disable VLAN tag insert/strip */
8637                 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8638                 ctrl &= ~E1000_CTRL_VME;
8639                 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8640         }
8641
8642 #ifndef CONFIG_IGB_VMDQ_NETDEV
8643         for (i = 0; i < adapter->vmdq_pools; i++) {
8644                 igb_set_vf_vlan_strip(adapter,
8645                                       adapter->vfs_allocated_count + i,
8646                                       enable);
8647         }
8648
8649 #else
8650         igb_set_vf_vlan_strip(adapter,
8651                               adapter->vfs_allocated_count,
8652                               enable);
8653
8654         for (i = 1; i < adapter->vmdq_pools; i++) {
8655 #ifdef HAVE_VLAN_RX_REGISTER
8656                 struct igb_vmdq_adapter *vadapter;
8657                 vadapter = netdev_priv(adapter->vmdq_netdev[i-1]);
8658                 enable = !!vadapter->vlgrp;
8659 #else
8660                 struct net_device *vnetdev;
8661                 vnetdev = adapter->vmdq_netdev[i-1];
8662 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8663                 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_CTAG_RX);
8664 #else
8665                 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_RX);
8666 #endif
8667 #endif
8668                 igb_set_vf_vlan_strip(adapter,
8669                                       adapter->vfs_allocated_count + i,
8670                                       enable);
8671         }
8672
8673 #endif
8674         igb_rlpml_set(adapter);
8675 }
8676
8677 #ifdef HAVE_VLAN_PROTOCOL
8678 static int igb_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid)
8679 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8680 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8681 static int igb_vlan_rx_add_vid(struct net_device *netdev,
8682                                __always_unused __be16 proto, u16 vid)
8683 #else
8684 static int igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8685 #endif
8686 #else
8687 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8688 #endif
8689 {
8690         struct igb_adapter *adapter = netdev_priv(netdev);
8691         int pf_id = adapter->vfs_allocated_count;
8692
8693         /* attempt to add filter to vlvf array */
8694         igb_vlvf_set(adapter, vid, TRUE, pf_id);
8695
8696         /* add the filter since PF can receive vlans w/o entry in vlvf */
8697         igb_vfta_set(adapter, vid, TRUE);
8698 #ifndef HAVE_NETDEV_VLAN_FEATURES
8699
8700         /* Copy feature flags from netdev to the vlan netdev for this vid.
8701          * This allows things like TSO to bubble down to our vlan device.
8702          * There is no need to update netdev for vlan 0 (DCB), since it
8703          * wouldn't has v_netdev.
8704          */
8705         if (adapter->vlgrp) {
8706                 struct vlan_group *vlgrp = adapter->vlgrp;
8707                 struct net_device *v_netdev = vlan_group_get_device(vlgrp, vid);
8708                 if (v_netdev) {
8709                         v_netdev->features |= netdev->features;
8710                         vlan_group_set_device(vlgrp, vid, v_netdev);
8711                 }
8712         }
8713 #endif
8714 #ifndef HAVE_VLAN_RX_REGISTER
8715
8716         set_bit(vid, adapter->active_vlans);
8717 #endif
8718 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8719         return 0;
8720 #endif
8721 }
8722
8723 #ifdef HAVE_VLAN_PROTOCOL
8724 static int igb_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid)
8725 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8726 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8727 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
8728                                 __always_unused __be16 proto, u16 vid)
8729 #else
8730 static int igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8731 #endif
8732 #else
8733 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8734 #endif
8735 {
8736         struct igb_adapter *adapter = netdev_priv(netdev);
8737         int pf_id = adapter->vfs_allocated_count;
8738         s32 err;
8739
8740 #ifdef HAVE_VLAN_RX_REGISTER
8741         igb_irq_disable(adapter);
8742
8743         vlan_group_set_device(adapter->vlgrp, vid, NULL);
8744
8745         if (!test_bit(__IGB_DOWN, &adapter->state))
8746                 igb_irq_enable(adapter);
8747
8748 #endif /* HAVE_VLAN_RX_REGISTER */
8749         /* remove vlan from VLVF table array */
8750         err = igb_vlvf_set(adapter, vid, FALSE, pf_id);
8751
8752         /* if vid was not present in VLVF just remove it from table */
8753         if (err)
8754                 igb_vfta_set(adapter, vid, FALSE);
8755 #ifndef HAVE_VLAN_RX_REGISTER
8756
8757         clear_bit(vid, adapter->active_vlans);
8758 #endif
8759 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8760         return 0;
8761 #endif
8762 }
8763
8764 static void igb_restore_vlan(struct igb_adapter *adapter)
8765 {
8766 #ifdef HAVE_VLAN_RX_REGISTER
8767         igb_vlan_mode(adapter->netdev, adapter->vlgrp);
8768
8769         if (adapter->vlgrp) {
8770                 u16 vid;
8771                 for (vid = 0; vid < VLAN_N_VID; vid++) {
8772                         if (!vlan_group_get_device(adapter->vlgrp, vid))
8773                                 continue;
8774 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8775                         igb_vlan_rx_add_vid(adapter->netdev,
8776                                             htons(ETH_P_8021Q), vid);
8777 #else
8778                         igb_vlan_rx_add_vid(adapter->netdev, vid);
8779 #endif
8780                 }
8781         }
8782 #else
8783         u16 vid;
8784
8785         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
8786
8787         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
8788 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8789                 igb_vlan_rx_add_vid(adapter->netdev,
8790                                     htons(ETH_P_8021Q), vid);
8791 #else
8792                 igb_vlan_rx_add_vid(adapter->netdev, vid);
8793 #endif
8794 #endif
8795 }
8796
8797 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
8798 {
8799         struct pci_dev *pdev = adapter->pdev;
8800         struct e1000_mac_info *mac = &adapter->hw.mac;
8801
8802         mac->autoneg = 0;
8803
8804         /* SerDes device's does not support 10Mbps Full/duplex
8805          * and 100Mbps Half duplex
8806          */
8807         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
8808                 switch (spddplx) {
8809                 case SPEED_10 + DUPLEX_HALF:
8810                 case SPEED_10 + DUPLEX_FULL:
8811                 case SPEED_100 + DUPLEX_HALF:
8812                         dev_err(pci_dev_to_dev(pdev),
8813                                 "Unsupported Speed/Duplex configuration\n");
8814                         return -EINVAL;
8815                 default:
8816                         break;
8817                 }
8818         }
8819
8820         switch (spddplx) {
8821         case SPEED_10 + DUPLEX_HALF:
8822                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
8823                 break;
8824         case SPEED_10 + DUPLEX_FULL:
8825                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
8826                 break;
8827         case SPEED_100 + DUPLEX_HALF:
8828                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
8829                 break;
8830         case SPEED_100 + DUPLEX_FULL:
8831                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
8832                 break;
8833         case SPEED_1000 + DUPLEX_FULL:
8834                 mac->autoneg = 1;
8835                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
8836                 break;
8837         case SPEED_1000 + DUPLEX_HALF: /* not supported */
8838         default:
8839                 dev_err(pci_dev_to_dev(pdev), "Unsupported Speed/Duplex configuration\n");
8840                 return -EINVAL;
8841         }
8842
8843         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
8844         adapter->hw.phy.mdix = AUTO_ALL_MODES;
8845
8846         return 0;
8847 }
8848
8849 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
8850                           bool runtime)
8851 {
8852         struct net_device *netdev = pci_get_drvdata(pdev);
8853         struct igb_adapter *adapter = netdev_priv(netdev);
8854         struct e1000_hw *hw = &adapter->hw;
8855         u32 ctrl, rctl, status;
8856         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
8857 #ifdef CONFIG_PM
8858         int retval = 0;
8859 #endif
8860
8861         netif_device_detach(netdev);
8862
8863         status = E1000_READ_REG(hw, E1000_STATUS);
8864         if (status & E1000_STATUS_LU)
8865                 wufc &= ~E1000_WUFC_LNKC;
8866
8867         if (netif_running(netdev))
8868                 __igb_close(netdev, true);
8869
8870         igb_clear_interrupt_scheme(adapter);
8871
8872 #ifdef CONFIG_PM
8873         retval = pci_save_state(pdev);
8874         if (retval)
8875                 return retval;
8876 #endif
8877
8878         if (wufc) {
8879                 igb_setup_rctl(adapter);
8880                 igb_set_rx_mode(netdev);
8881
8882                 /* turn on all-multi mode if wake on multicast is enabled */
8883                 if (wufc & E1000_WUFC_MC) {
8884                         rctl = E1000_READ_REG(hw, E1000_RCTL);
8885                         rctl |= E1000_RCTL_MPE;
8886                         E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8887                 }
8888
8889                 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8890                 /* phy power management enable */
8891                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
8892                 ctrl |= E1000_CTRL_ADVD3WUC;
8893                 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8894
8895                 /* Allow time for pending master requests to run */
8896                 e1000_disable_pcie_master(hw);
8897
8898                 E1000_WRITE_REG(hw, E1000_WUC, E1000_WUC_PME_EN);
8899                 E1000_WRITE_REG(hw, E1000_WUFC, wufc);
8900         } else {
8901                 E1000_WRITE_REG(hw, E1000_WUC, 0);
8902                 E1000_WRITE_REG(hw, E1000_WUFC, 0);
8903         }
8904
8905         *enable_wake = wufc || adapter->en_mng_pt;
8906         if (!*enable_wake)
8907                 igb_power_down_link(adapter);
8908         else
8909                 igb_power_up_link(adapter);
8910
8911         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
8912          * would have already happened in close and is redundant. */
8913         igb_release_hw_control(adapter);
8914
8915         pci_disable_device(pdev);
8916
8917         return 0;
8918 }
8919
8920 #ifdef CONFIG_PM
8921 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8922 static int igb_suspend(struct device *dev)
8923 #else
8924 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
8925 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8926 {
8927 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8928         struct pci_dev *pdev = to_pci_dev(dev);
8929 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8930         int retval;
8931         bool wake;
8932
8933         retval = __igb_shutdown(pdev, &wake, 0);
8934         if (retval)
8935                 return retval;
8936
8937         if (wake) {
8938                 pci_prepare_to_sleep(pdev);
8939         } else {
8940                 pci_wake_from_d3(pdev, false);
8941                 pci_set_power_state(pdev, PCI_D3hot);
8942         }
8943
8944         return 0;
8945 }
8946
8947 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8948 static int igb_resume(struct device *dev)
8949 #else
8950 static int igb_resume(struct pci_dev *pdev)
8951 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8952 {
8953 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8954         struct pci_dev *pdev = to_pci_dev(dev);
8955 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8956         struct net_device *netdev = pci_get_drvdata(pdev);
8957         struct igb_adapter *adapter = netdev_priv(netdev);
8958         struct e1000_hw *hw = &adapter->hw;
8959         u32 err;
8960
8961         pci_set_power_state(pdev, PCI_D0);
8962         pci_restore_state(pdev);
8963         pci_save_state(pdev);
8964
8965         err = pci_enable_device_mem(pdev);
8966         if (err) {
8967                 dev_err(pci_dev_to_dev(pdev),
8968                         "igb: Cannot enable PCI device from suspend\n");
8969                 return err;
8970         }
8971         pci_set_master(pdev);
8972
8973         pci_enable_wake(pdev, PCI_D3hot, 0);
8974         pci_enable_wake(pdev, PCI_D3cold, 0);
8975
8976         if (igb_init_interrupt_scheme(adapter, true)) {
8977                 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
8978                 return -ENOMEM;
8979         }
8980
8981         igb_reset(adapter);
8982
8983         /* let the f/w know that the h/w is now under the control of the
8984          * driver. */
8985         igb_get_hw_control(adapter);
8986
8987         E1000_WRITE_REG(hw, E1000_WUS, ~0);
8988
8989         if (netdev->flags & IFF_UP) {
8990                 rtnl_lock();
8991                 err = __igb_open(netdev, true);
8992                 rtnl_unlock();
8993                 if (err)
8994                         return err;
8995         }
8996
8997         netif_device_attach(netdev);
8998
8999         return 0;
9000 }
9001
9002 #ifdef CONFIG_PM_RUNTIME
9003 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
9004 static int igb_runtime_idle(struct device *dev)
9005 {
9006         struct pci_dev *pdev = to_pci_dev(dev);
9007         struct net_device *netdev = pci_get_drvdata(pdev);
9008         struct igb_adapter *adapter = netdev_priv(netdev);
9009
9010         if (!igb_has_link(adapter))
9011                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
9012
9013         return -EBUSY;
9014 }
9015
9016 static int igb_runtime_suspend(struct device *dev)
9017 {
9018         struct pci_dev *pdev = to_pci_dev(dev);
9019         int retval;
9020         bool wake;
9021
9022         retval = __igb_shutdown(pdev, &wake, 1);
9023         if (retval)
9024                 return retval;
9025
9026         if (wake) {
9027                 pci_prepare_to_sleep(pdev);
9028         } else {
9029                 pci_wake_from_d3(pdev, false);
9030                 pci_set_power_state(pdev, PCI_D3hot);
9031         }
9032
9033         return 0;
9034 }
9035
9036 static int igb_runtime_resume(struct device *dev)
9037 {
9038         return igb_resume(dev);
9039 }
9040 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
9041 #endif /* CONFIG_PM_RUNTIME */
9042 #endif /* CONFIG_PM */
9043
9044 #ifdef USE_REBOOT_NOTIFIER
9045 /* only want to do this for 2.4 kernels? */
9046 static int igb_notify_reboot(struct notifier_block *nb, unsigned long event,
9047                              void *p)
9048 {
9049         struct pci_dev *pdev = NULL;
9050         bool wake;
9051
9052         switch (event) {
9053         case SYS_DOWN:
9054         case SYS_HALT:
9055         case SYS_POWER_OFF:
9056                 while ((pdev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pdev))) {
9057                         if (pci_dev_driver(pdev) == &igb_driver) {
9058                                 __igb_shutdown(pdev, &wake, 0);
9059                                 if (event == SYS_POWER_OFF) {
9060                                         pci_wake_from_d3(pdev, wake);
9061                                         pci_set_power_state(pdev, PCI_D3hot);
9062                                 }
9063                         }
9064                 }
9065         }
9066         return NOTIFY_DONE;
9067 }
9068 #else
9069 static void igb_shutdown(struct pci_dev *pdev)
9070 {
9071         bool wake = false;
9072
9073         __igb_shutdown(pdev, &wake, 0);
9074
9075         if (system_state == SYSTEM_POWER_OFF) {
9076                 pci_wake_from_d3(pdev, wake);
9077                 pci_set_power_state(pdev, PCI_D3hot);
9078         }
9079 }
9080 #endif /* USE_REBOOT_NOTIFIER */
9081
9082 #ifdef CONFIG_NET_POLL_CONTROLLER
9083 /*
9084  * Polling 'interrupt' - used by things like netconsole to send skbs
9085  * without having to re-enable interrupts. It's not called while
9086  * the interrupt routine is executing.
9087  */
9088 static void igb_netpoll(struct net_device *netdev)
9089 {
9090         struct igb_adapter *adapter = netdev_priv(netdev);
9091         struct e1000_hw *hw = &adapter->hw;
9092         struct igb_q_vector *q_vector;
9093         int i;
9094
9095         for (i = 0; i < adapter->num_q_vectors; i++) {
9096                 q_vector = adapter->q_vector[i];
9097                 if (adapter->msix_entries)
9098                         E1000_WRITE_REG(hw, E1000_EIMC, q_vector->eims_value);
9099                 else
9100                         igb_irq_disable(adapter);
9101                 napi_schedule(&q_vector->napi);
9102         }
9103 }
9104 #endif /* CONFIG_NET_POLL_CONTROLLER */
9105
9106 #ifdef HAVE_PCI_ERS
9107 #define E1000_DEV_ID_82576_VF 0x10CA
9108 /**
9109  * igb_io_error_detected - called when PCI error is detected
9110  * @pdev: Pointer to PCI device
9111  * @state: The current pci connection state
9112  *
9113  * This function is called after a PCI bus error affecting
9114  * this device has been detected.
9115  */
9116 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
9117                                               pci_channel_state_t state)
9118 {
9119         struct net_device *netdev = pci_get_drvdata(pdev);
9120         struct igb_adapter *adapter = netdev_priv(netdev);
9121
9122 #ifdef CONFIG_PCI_IOV__UNUSED
9123         struct pci_dev *bdev, *vfdev;
9124         u32 dw0, dw1, dw2, dw3;
9125         int vf, pos;
9126         u16 req_id, pf_func;
9127
9128         if (!(adapter->flags & IGB_FLAG_DETECT_BAD_DMA))
9129                 goto skip_bad_vf_detection;
9130
9131         bdev = pdev->bus->self;
9132         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
9133                 bdev = bdev->bus->self;
9134
9135         if (!bdev)
9136                 goto skip_bad_vf_detection;
9137
9138         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
9139         if (!pos)
9140                 goto skip_bad_vf_detection;
9141
9142         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG, &dw0);
9143         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 4, &dw1);
9144         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 8, &dw2);
9145         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 12, &dw3);
9146
9147         req_id = dw1 >> 16;
9148         /* On the 82576 if bit 7 of the requestor ID is set then it's a VF */
9149         if (!(req_id & 0x0080))
9150                 goto skip_bad_vf_detection;
9151
9152         pf_func = req_id & 0x01;
9153         if ((pf_func & 1) == (pdev->devfn & 1)) {
9154
9155                 vf = (req_id & 0x7F) >> 1;
9156                 dev_err(pci_dev_to_dev(pdev),
9157                         "VF %d has caused a PCIe error\n", vf);
9158                 dev_err(pci_dev_to_dev(pdev),
9159                         "TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9160                         "%8.8x\tdw3: %8.8x\n",
9161                         dw0, dw1, dw2, dw3);
9162
9163                 /* Find the pci device of the offending VF */
9164                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9165                                        E1000_DEV_ID_82576_VF, NULL);
9166                 while (vfdev) {
9167                         if (vfdev->devfn == (req_id & 0xFF))
9168                                 break;
9169                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9170                                                E1000_DEV_ID_82576_VF, vfdev);
9171                 }
9172                 /*
9173                  * There's a slim chance the VF could have been hot plugged,
9174                  * so if it is no longer present we don't need to issue the
9175                  * VFLR.  Just clean up the AER in that case.
9176                  */
9177                 if (vfdev) {
9178                         dev_err(pci_dev_to_dev(pdev),
9179                                 "Issuing VFLR to VF %d\n", vf);
9180                         pci_write_config_dword(vfdev, 0xA8, 0x00008000);
9181                 }
9182
9183                 pci_cleanup_aer_uncorrect_error_status(pdev);
9184         }
9185
9186         /*
9187          * Even though the error may have occurred on the other port
9188          * we still need to increment the vf error reference count for
9189          * both ports because the I/O resume function will be called
9190          * for both of them.
9191          */
9192         adapter->vferr_refcount++;
9193
9194         return PCI_ERS_RESULT_RECOVERED;
9195
9196 skip_bad_vf_detection:
9197 #endif /* CONFIG_PCI_IOV */
9198
9199         netif_device_detach(netdev);
9200
9201         if (state == pci_channel_io_perm_failure)
9202                 return PCI_ERS_RESULT_DISCONNECT;
9203
9204         if (netif_running(netdev))
9205                 igb_down(adapter);
9206         pci_disable_device(pdev);
9207
9208         /* Request a slot slot reset. */
9209         return PCI_ERS_RESULT_NEED_RESET;
9210 }
9211
9212 /**
9213  * igb_io_slot_reset - called after the pci bus has been reset.
9214  * @pdev: Pointer to PCI device
9215  *
9216  * Restart the card from scratch, as if from a cold-boot. Implementation
9217  * resembles the first-half of the igb_resume routine.
9218  */
9219 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
9220 {
9221         struct net_device *netdev = pci_get_drvdata(pdev);
9222         struct igb_adapter *adapter = netdev_priv(netdev);
9223         struct e1000_hw *hw = &adapter->hw;
9224         pci_ers_result_t result;
9225
9226         if (pci_enable_device_mem(pdev)) {
9227                 dev_err(pci_dev_to_dev(pdev),
9228                         "Cannot re-enable PCI device after reset.\n");
9229                 result = PCI_ERS_RESULT_DISCONNECT;
9230         } else {
9231                 pci_set_master(pdev);
9232                 pci_restore_state(pdev);
9233                 pci_save_state(pdev);
9234
9235                 pci_enable_wake(pdev, PCI_D3hot, 0);
9236                 pci_enable_wake(pdev, PCI_D3cold, 0);
9237
9238                 schedule_work(&adapter->reset_task);
9239                 E1000_WRITE_REG(hw, E1000_WUS, ~0);
9240                 result = PCI_ERS_RESULT_RECOVERED;
9241         }
9242
9243         pci_cleanup_aer_uncorrect_error_status(pdev);
9244
9245         return result;
9246 }
9247
9248 /**
9249  * igb_io_resume - called when traffic can start flowing again.
9250  * @pdev: Pointer to PCI device
9251  *
9252  * This callback is called when the error recovery driver tells us that
9253  * its OK to resume normal operation. Implementation resembles the
9254  * second-half of the igb_resume routine.
9255  */
9256 static void igb_io_resume(struct pci_dev *pdev)
9257 {
9258         struct net_device *netdev = pci_get_drvdata(pdev);
9259         struct igb_adapter *adapter = netdev_priv(netdev);
9260
9261         if (adapter->vferr_refcount) {
9262                 dev_info(pci_dev_to_dev(pdev), "Resuming after VF err\n");
9263                 adapter->vferr_refcount--;
9264                 return;
9265         }
9266
9267         if (netif_running(netdev)) {
9268                 if (igb_up(adapter)) {
9269                         dev_err(pci_dev_to_dev(pdev), "igb_up failed after reset\n");
9270                         return;
9271                 }
9272         }
9273
9274         netif_device_attach(netdev);
9275
9276         /* let the f/w know that the h/w is now under the control of the
9277          * driver. */
9278         igb_get_hw_control(adapter);
9279 }
9280
9281 #endif /* HAVE_PCI_ERS */
9282
9283 int igb_add_mac_filter(struct igb_adapter *adapter, u8 *addr, u16 queue)
9284 {
9285         struct e1000_hw *hw = &adapter->hw;
9286         int i;
9287
9288         if (is_zero_ether_addr(addr))
9289                 return 0;
9290
9291         for (i = 0; i < hw->mac.rar_entry_count; i++) {
9292                 if (adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE)
9293                         continue;
9294                 adapter->mac_table[i].state = (IGB_MAC_STATE_MODIFIED |
9295                                                    IGB_MAC_STATE_IN_USE);
9296                 memcpy(adapter->mac_table[i].addr, addr, ETH_ALEN);
9297                 adapter->mac_table[i].queue = queue;
9298                 igb_sync_mac_table(adapter);
9299                 return 0;
9300         }
9301         return -ENOMEM;
9302 }
9303 int igb_del_mac_filter(struct igb_adapter *adapter, u8* addr, u16 queue)
9304 {
9305         /* search table for addr, if found, set to 0 and sync */
9306         int i;
9307         struct e1000_hw *hw = &adapter->hw;
9308
9309         if (is_zero_ether_addr(addr))
9310                 return 0;
9311         for (i = 0; i < hw->mac.rar_entry_count; i++) {
9312                 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
9313                     adapter->mac_table[i].queue == queue) {
9314                         adapter->mac_table[i].state = IGB_MAC_STATE_MODIFIED;
9315                         memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
9316                         adapter->mac_table[i].queue = 0;
9317                         igb_sync_mac_table(adapter);
9318                         return 0;
9319                 }
9320         }
9321         return -ENOMEM;
9322 }
9323 static int igb_set_vf_mac(struct igb_adapter *adapter,
9324                           int vf, unsigned char *mac_addr)
9325 {
9326         igb_del_mac_filter(adapter, adapter->vf_data[vf].vf_mac_addresses, vf);
9327         memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
9328
9329         igb_add_mac_filter(adapter, mac_addr, vf);
9330
9331         return 0;
9332 }
9333
9334 #ifdef IFLA_VF_MAX
9335 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
9336 {
9337         struct igb_adapter *adapter = netdev_priv(netdev);
9338         if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
9339                 return -EINVAL;
9340         adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
9341         dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
9342         dev_info(&adapter->pdev->dev, "Reload the VF driver to make this"
9343                                       " change effective.\n");
9344         if (test_bit(__IGB_DOWN, &adapter->state)) {
9345                 dev_warn(&adapter->pdev->dev, "The VF MAC address has been set,"
9346                          " but the PF device is not up.\n");
9347                 dev_warn(&adapter->pdev->dev, "Bring the PF device up before"
9348                          " attempting to use the VF device.\n");
9349         }
9350         return igb_set_vf_mac(adapter, vf, mac);
9351 }
9352
9353 static int igb_link_mbps(int internal_link_speed)
9354 {
9355         switch (internal_link_speed) {
9356         case SPEED_100:
9357                 return 100;
9358         case SPEED_1000:
9359                 return 1000;
9360         case SPEED_2500:
9361                 return 2500;
9362         default:
9363                 return 0;
9364         }
9365 }
9366
9367 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
9368                         int link_speed)
9369 {
9370         int rf_dec, rf_int;
9371         u32 bcnrc_val;
9372
9373         if (tx_rate != 0) {
9374                 /* Calculate the rate factor values to set */
9375                 rf_int = link_speed / tx_rate;
9376                 rf_dec = (link_speed - (rf_int * tx_rate));
9377                 rf_dec = (rf_dec * (1<<E1000_RTTBCNRC_RF_INT_SHIFT)) / tx_rate;
9378
9379                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
9380                 bcnrc_val |= ((rf_int<<E1000_RTTBCNRC_RF_INT_SHIFT) &
9381                                 E1000_RTTBCNRC_RF_INT_MASK);
9382                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
9383         } else {
9384                 bcnrc_val = 0;
9385         }
9386
9387         E1000_WRITE_REG(hw, E1000_RTTDQSEL, vf); /* vf X uses queue X */
9388         /*
9389          * Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
9390          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
9391          */
9392         E1000_WRITE_REG(hw, E1000_RTTBCNRM(0), 0x14);
9393         E1000_WRITE_REG(hw, E1000_RTTBCNRC, bcnrc_val);
9394 }
9395
9396 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
9397 {
9398         int actual_link_speed, i;
9399         bool reset_rate = false;
9400
9401         /* VF TX rate limit was not set */
9402         if ((adapter->vf_rate_link_speed == 0) ||
9403                 (adapter->hw.mac.type != e1000_82576))
9404                 return;
9405
9406         actual_link_speed = igb_link_mbps(adapter->link_speed);
9407         if (actual_link_speed != adapter->vf_rate_link_speed) {
9408                 reset_rate = true;
9409                 adapter->vf_rate_link_speed = 0;
9410                 dev_info(&adapter->pdev->dev,
9411                 "Link speed has been changed. VF Transmit rate is disabled\n");
9412         }
9413
9414         for (i = 0; i < adapter->vfs_allocated_count; i++) {
9415                 if (reset_rate)
9416                         adapter->vf_data[i].tx_rate = 0;
9417
9418                 igb_set_vf_rate_limit(&adapter->hw, i,
9419                         adapter->vf_data[i].tx_rate, actual_link_speed);
9420         }
9421 }
9422
9423 #ifdef HAVE_VF_MIN_MAX_TXRATE
9424 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int min_tx_rate,
9425                              int tx_rate)
9426 #else /* HAVE_VF_MIN_MAX_TXRATE */
9427 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate)
9428 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9429 {
9430         struct igb_adapter *adapter = netdev_priv(netdev);
9431         struct e1000_hw *hw = &adapter->hw;
9432         int actual_link_speed;
9433
9434         if (hw->mac.type != e1000_82576)
9435                 return -EOPNOTSUPP;
9436
9437 #ifdef HAVE_VF_MIN_MAX_TXRATE
9438         if (min_tx_rate)
9439                 return -EINVAL;
9440 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9441
9442         actual_link_speed = igb_link_mbps(adapter->link_speed);
9443         if ((vf >= adapter->vfs_allocated_count) ||
9444                 (!(E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU)) ||
9445                 (tx_rate < 0) || (tx_rate > actual_link_speed))
9446                 return -EINVAL;
9447
9448         adapter->vf_rate_link_speed = actual_link_speed;
9449         adapter->vf_data[vf].tx_rate = (u16)tx_rate;
9450         igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed);
9451
9452         return 0;
9453 }
9454
9455 static int igb_ndo_get_vf_config(struct net_device *netdev,
9456                                  int vf, struct ifla_vf_info *ivi)
9457 {
9458         struct igb_adapter *adapter = netdev_priv(netdev);
9459         if (vf >= adapter->vfs_allocated_count)
9460                 return -EINVAL;
9461         ivi->vf = vf;
9462         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
9463 #ifdef HAVE_VF_MIN_MAX_TXRATE
9464         ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
9465         ivi->min_tx_rate = 0;
9466 #else /* HAVE_VF_MIN_MAX_TXRATE */
9467         ivi->tx_rate = adapter->vf_data[vf].tx_rate;
9468 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9469         ivi->vlan = adapter->vf_data[vf].pf_vlan;
9470         ivi->qos = adapter->vf_data[vf].pf_qos;
9471 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
9472         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
9473 #endif
9474         return 0;
9475 }
9476 #endif
9477 static void igb_vmm_control(struct igb_adapter *adapter)
9478 {
9479         struct e1000_hw *hw = &adapter->hw;
9480         int count;
9481         u32 reg;
9482
9483         switch (hw->mac.type) {
9484         case e1000_82575:
9485         default:
9486                 /* replication is not supported for 82575 */
9487                 return;
9488         case e1000_82576:
9489                 /* notify HW that the MAC is adding vlan tags */
9490                 reg = E1000_READ_REG(hw, E1000_DTXCTL);
9491                 reg |= (E1000_DTXCTL_VLAN_ADDED |
9492                         E1000_DTXCTL_SPOOF_INT);
9493                 E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
9494         case e1000_82580:
9495                 /* enable replication vlan tag stripping */
9496                 reg = E1000_READ_REG(hw, E1000_RPLOLR);
9497                 reg |= E1000_RPLOLR_STRVLAN;
9498                 E1000_WRITE_REG(hw, E1000_RPLOLR, reg);
9499         case e1000_i350:
9500         case e1000_i354:
9501                 /* none of the above registers are supported by i350 */
9502                 break;
9503         }
9504
9505         /* Enable Malicious Driver Detection */
9506         if ((adapter->vfs_allocated_count) &&
9507             (adapter->mdd)) {
9508                 if (hw->mac.type == e1000_i350)
9509                         igb_enable_mdd(adapter);
9510         }
9511
9512                 /* enable replication and loopback support */
9513                 count = adapter->vfs_allocated_count || adapter->vmdq_pools;
9514                 if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE && count)
9515                         e1000_vmdq_set_loopback_pf(hw, 1);
9516                 e1000_vmdq_set_anti_spoofing_pf(hw,
9517                         adapter->vfs_allocated_count || adapter->vmdq_pools,
9518                         adapter->vfs_allocated_count);
9519         e1000_vmdq_set_replication_pf(hw, adapter->vfs_allocated_count ||
9520                                       adapter->vmdq_pools);
9521 }
9522
9523 static void igb_init_fw(struct igb_adapter *adapter)
9524 {
9525         struct e1000_fw_drv_info fw_cmd;
9526         struct e1000_hw *hw = &adapter->hw;
9527         int i;
9528         u16 mask;
9529
9530         if (hw->mac.type == e1000_i210)
9531                 mask = E1000_SWFW_EEP_SM;
9532         else
9533                 mask = E1000_SWFW_PHY0_SM;
9534         /* i211 parts do not support this feature */
9535         if (hw->mac.type == e1000_i211)
9536                 hw->mac.arc_subsystem_valid = false;
9537
9538         if (!hw->mac.ops.acquire_swfw_sync(hw, mask)) {
9539                 for (i = 0; i <= FW_MAX_RETRIES; i++) {
9540                         E1000_WRITE_REG(hw, E1000_FWSTS, E1000_FWSTS_FWRI);
9541                         fw_cmd.hdr.cmd = FW_CMD_DRV_INFO;
9542                         fw_cmd.hdr.buf_len = FW_CMD_DRV_INFO_LEN;
9543                         fw_cmd.hdr.cmd_or_resp.cmd_resv = FW_CMD_RESERVED;
9544                         fw_cmd.port_num = hw->bus.func;
9545                         fw_cmd.drv_version = FW_FAMILY_DRV_VER;
9546                         fw_cmd.hdr.checksum = 0;
9547                         fw_cmd.hdr.checksum = e1000_calculate_checksum((u8 *)&fw_cmd,
9548                                                                    (FW_HDR_LEN +
9549                                                                     fw_cmd.hdr.buf_len));
9550                          e1000_host_interface_command(hw, (u8*)&fw_cmd,
9551                                                      sizeof(fw_cmd));
9552                         if (fw_cmd.hdr.cmd_or_resp.ret_status == FW_STATUS_SUCCESS)
9553                                 break;
9554                 }
9555         } else
9556                 dev_warn(pci_dev_to_dev(adapter->pdev),
9557                          "Unable to get semaphore, firmware init failed.\n");
9558         hw->mac.ops.release_swfw_sync(hw, mask);
9559 }
9560
9561 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
9562 {
9563         struct e1000_hw *hw = &adapter->hw;
9564         u32 dmac_thr;
9565         u16 hwm;
9566         u32 status;
9567
9568         if (hw->mac.type == e1000_i211)
9569                 return;
9570
9571         if (hw->mac.type > e1000_82580) {
9572                 if (adapter->dmac != IGB_DMAC_DISABLE) {
9573                         u32 reg;
9574
9575                         /* force threshold to 0.  */
9576                         E1000_WRITE_REG(hw, E1000_DMCTXTH, 0);
9577
9578                         /*
9579                          * DMA Coalescing high water mark needs to be greater
9580                          * than the Rx threshold. Set hwm to PBA - max frame
9581                          * size in 16B units, capping it at PBA - 6KB.
9582                          */
9583                         hwm = 64 * pba - adapter->max_frame_size / 16;
9584                         if (hwm < 64 * (pba - 6))
9585                                 hwm = 64 * (pba - 6);
9586                         reg = E1000_READ_REG(hw, E1000_FCRTC);
9587                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
9588                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
9589                                 & E1000_FCRTC_RTH_COAL_MASK);
9590                         E1000_WRITE_REG(hw, E1000_FCRTC, reg);
9591
9592                         /*
9593                          * Set the DMA Coalescing Rx threshold to PBA - 2 * max
9594                          * frame size, capping it at PBA - 10KB.
9595                          */
9596                         dmac_thr = pba - adapter->max_frame_size / 512;
9597                         if (dmac_thr < pba - 10)
9598                                 dmac_thr = pba - 10;
9599                         reg = E1000_READ_REG(hw, E1000_DMACR);
9600                         reg &= ~E1000_DMACR_DMACTHR_MASK;
9601                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
9602                                 & E1000_DMACR_DMACTHR_MASK);
9603
9604                         /* transition to L0x or L1 if available..*/
9605                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
9606
9607                         /* Check if status is 2.5Gb backplane connection
9608                          * before configuration of watchdog timer, which is
9609                          * in msec values in 12.8usec intervals
9610                          * watchdog timer= msec values in 32usec intervals
9611                          * for non 2.5Gb connection
9612                          */
9613                         if (hw->mac.type == e1000_i354) {
9614                                 status = E1000_READ_REG(hw, E1000_STATUS);
9615                                 if ((status & E1000_STATUS_2P5_SKU) &&
9616                                     (!(status & E1000_STATUS_2P5_SKU_OVER)))
9617                                         reg |= ((adapter->dmac * 5) >> 6);
9618                                 else
9619                                         reg |= ((adapter->dmac) >> 5);
9620                         } else {
9621                                 reg |= ((adapter->dmac) >> 5);
9622                         }
9623
9624                         /*
9625                          * Disable BMC-to-OS Watchdog enable
9626                          * on devices that support OS-to-BMC
9627                          */
9628                         if (hw->mac.type != e1000_i354)
9629                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
9630                         E1000_WRITE_REG(hw, E1000_DMACR, reg);
9631
9632                         /* no lower threshold to disable coalescing(smart fifb)-UTRESH=0*/
9633                         E1000_WRITE_REG(hw, E1000_DMCRTRH, 0);
9634
9635                         /* This sets the time to wait before requesting
9636                          * transition to low power state to number of usecs
9637                          * needed to receive 1 512 byte frame at gigabit
9638                          * line rate. On i350 device, time to make transition
9639                          * to Lx state is delayed by 4 usec with flush disable
9640                          * bit set to avoid losing mailbox interrupts
9641                          */
9642                         reg = E1000_READ_REG(hw, E1000_DMCTLX);
9643                         if (hw->mac.type == e1000_i350)
9644                                 reg |= IGB_DMCTLX_DCFLUSH_DIS;
9645
9646                         /* in 2.5Gb connection, TTLX unit is 0.4 usec
9647                          * which is 0x4*2 = 0xA. But delay is still 4 usec
9648                          */
9649                         if (hw->mac.type == e1000_i354) {
9650                                 status = E1000_READ_REG(hw, E1000_STATUS);
9651                                 if ((status & E1000_STATUS_2P5_SKU) &&
9652                                     (!(status & E1000_STATUS_2P5_SKU_OVER)))
9653                                         reg |= 0xA;
9654                                 else
9655                                         reg |= 0x4;
9656                         } else {
9657                                 reg |= 0x4;
9658                         }
9659                         E1000_WRITE_REG(hw, E1000_DMCTLX, reg);
9660
9661                         /* free space in tx packet buffer to wake from DMA coal */
9662                         E1000_WRITE_REG(hw, E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
9663                                 (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
9664
9665                         /* make low power state decision controlled by DMA coal */
9666                         reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9667                         reg &= ~E1000_PCIEMISC_LX_DECISION;
9668                         E1000_WRITE_REG(hw, E1000_PCIEMISC, reg);
9669                 } /* endif adapter->dmac is not disabled */
9670         } else if (hw->mac.type == e1000_82580) {
9671                 u32 reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9672                 E1000_WRITE_REG(hw, E1000_PCIEMISC,
9673                                 reg & ~E1000_PCIEMISC_LX_DECISION);
9674                 E1000_WRITE_REG(hw, E1000_DMACR, 0);
9675         }
9676 }
9677
9678 #ifdef HAVE_I2C_SUPPORT
9679 /*  igb_read_i2c_byte - Reads 8 bit word over I2C
9680  *  @hw: pointer to hardware structure
9681  *  @byte_offset: byte offset to read
9682  *  @dev_addr: device address
9683  *  @data: value read
9684  *
9685  *  Performs byte read operation over I2C interface at
9686  *  a specified device address.
9687  */
9688 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9689                                 u8 dev_addr, u8 *data)
9690 {
9691         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9692         struct i2c_client *this_client = adapter->i2c_client;
9693         s32 status;
9694         u16 swfw_mask = 0;
9695
9696         if (!this_client)
9697                 return E1000_ERR_I2C;
9698
9699         swfw_mask = E1000_SWFW_PHY0_SM;
9700
9701         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)
9702             != E1000_SUCCESS)
9703                 return E1000_ERR_SWFW_SYNC;
9704
9705         status = i2c_smbus_read_byte_data(this_client, byte_offset);
9706         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9707
9708         if (status < 0)
9709                 return E1000_ERR_I2C;
9710         else {
9711                 *data = status;
9712                 return E1000_SUCCESS;
9713         }
9714 }
9715
9716 /*  igb_write_i2c_byte - Writes 8 bit word over I2C
9717  *  @hw: pointer to hardware structure
9718  *  @byte_offset: byte offset to write
9719  *  @dev_addr: device address
9720  *  @data: value to write
9721  *
9722  *  Performs byte write operation over I2C interface at
9723  *  a specified device address.
9724  */
9725 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9726                                  u8 dev_addr, u8 data)
9727 {
9728         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9729         struct i2c_client *this_client = adapter->i2c_client;
9730         s32 status;
9731         u16 swfw_mask = E1000_SWFW_PHY0_SM;
9732
9733         if (!this_client)
9734                 return E1000_ERR_I2C;
9735
9736         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != E1000_SUCCESS)
9737                 return E1000_ERR_SWFW_SYNC;
9738         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
9739         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9740
9741         if (status)
9742                 return E1000_ERR_I2C;
9743         else
9744                 return E1000_SUCCESS;
9745 }
9746 #endif /*  HAVE_I2C_SUPPORT */
9747 /* igb_main.c */
9748
9749
9750 /**
9751  * igb_probe - Device Initialization Routine
9752  * @pdev: PCI device information struct
9753  * @ent: entry in igb_pci_tbl
9754  *
9755  * Returns 0 on success, negative on failure
9756  *
9757  * igb_probe initializes an adapter identified by a pci_dev structure.
9758  * The OS initialization, configuring of the adapter private structure,
9759  * and a hardware reset occur.
9760  **/
9761 int igb_kni_probe(struct pci_dev *pdev,
9762                                struct net_device **lad_dev)
9763 {
9764         struct net_device *netdev;
9765         struct igb_adapter *adapter;
9766         struct e1000_hw *hw;
9767         u16 eeprom_data = 0;
9768         u8 pba_str[E1000_PBANUM_LENGTH];
9769         s32 ret_val;
9770         static int global_quad_port_a; /* global quad port a indication */
9771         int i, err, pci_using_dac = 0;
9772         static int cards_found;
9773
9774         err = pci_enable_device_mem(pdev);
9775         if (err)
9776                 return err;
9777
9778 #ifdef NO_KNI
9779         pci_using_dac = 0;
9780         err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9781         if (!err) {
9782                 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9783                 if (!err)
9784                         pci_using_dac = 1;
9785         } else {
9786                 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9787                 if (err) {
9788                         err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9789                         if (err) {
9790                                 IGB_ERR("No usable DMA configuration, "
9791                                         "aborting\n");
9792                                 goto err_dma;
9793                         }
9794                 }
9795         }
9796
9797 #ifndef HAVE_ASPM_QUIRKS
9798         /* 82575 requires that the pci-e link partner disable the L0s state */
9799         switch (pdev->device) {
9800         case E1000_DEV_ID_82575EB_COPPER:
9801         case E1000_DEV_ID_82575EB_FIBER_SERDES:
9802         case E1000_DEV_ID_82575GB_QUAD_COPPER:
9803                 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
9804         default:
9805                 break;
9806         }
9807
9808 #endif /* HAVE_ASPM_QUIRKS */
9809         err = pci_request_selected_regions(pdev,
9810                                            pci_select_bars(pdev,
9811                                                            IORESOURCE_MEM),
9812                                            igb_driver_name);
9813         if (err)
9814                 goto err_pci_reg;
9815
9816         pci_enable_pcie_error_reporting(pdev);
9817
9818         pci_set_master(pdev);
9819
9820         err = -ENOMEM;
9821 #endif /* NO_KNI */
9822 #ifdef HAVE_TX_MQ
9823         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
9824                                    IGB_MAX_TX_QUEUES);
9825 #else
9826         netdev = alloc_etherdev(sizeof(struct igb_adapter));
9827 #endif /* HAVE_TX_MQ */
9828         if (!netdev)
9829                 goto err_alloc_etherdev;
9830
9831         SET_MODULE_OWNER(netdev);
9832         SET_NETDEV_DEV(netdev, &pdev->dev);
9833
9834         //pci_set_drvdata(pdev, netdev);
9835         adapter = netdev_priv(netdev);
9836         adapter->netdev = netdev;
9837         adapter->pdev = pdev;
9838         hw = &adapter->hw;
9839         hw->back = adapter;
9840         adapter->port_num = hw->bus.func;
9841         adapter->msg_enable = (1 << debug) - 1;
9842
9843 #ifdef HAVE_PCI_ERS
9844         err = pci_save_state(pdev);
9845         if (err)
9846                 goto err_ioremap;
9847 #endif
9848         err = -EIO;
9849         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
9850                               pci_resource_len(pdev, 0));
9851         if (!hw->hw_addr)
9852                 goto err_ioremap;
9853
9854 #ifdef HAVE_NET_DEVICE_OPS
9855         netdev->netdev_ops = &igb_netdev_ops;
9856 #else /* HAVE_NET_DEVICE_OPS */
9857         netdev->open = &igb_open;
9858         netdev->stop = &igb_close;
9859         netdev->get_stats = &igb_get_stats;
9860 #ifdef HAVE_SET_RX_MODE
9861         netdev->set_rx_mode = &igb_set_rx_mode;
9862 #endif
9863         netdev->set_multicast_list = &igb_set_rx_mode;
9864         netdev->set_mac_address = &igb_set_mac;
9865         netdev->change_mtu = &igb_change_mtu;
9866         netdev->do_ioctl = &igb_ioctl;
9867 #ifdef HAVE_TX_TIMEOUT
9868         netdev->tx_timeout = &igb_tx_timeout;
9869 #endif
9870         netdev->vlan_rx_register = igb_vlan_mode;
9871         netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
9872         netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
9873 #ifdef CONFIG_NET_POLL_CONTROLLER
9874         netdev->poll_controller = igb_netpoll;
9875 #endif
9876         netdev->hard_start_xmit = &igb_xmit_frame;
9877 #endif /* HAVE_NET_DEVICE_OPS */
9878         igb_set_ethtool_ops(netdev);
9879 #ifdef HAVE_TX_TIMEOUT
9880         netdev->watchdog_timeo = 5 * HZ;
9881 #endif
9882
9883         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
9884
9885         adapter->bd_number = cards_found;
9886
9887         /* setup the private structure */
9888         err = igb_sw_init(adapter);
9889         if (err)
9890                 goto err_sw_init;
9891
9892         e1000_get_bus_info(hw);
9893
9894         hw->phy.autoneg_wait_to_complete = FALSE;
9895         hw->mac.adaptive_ifs = FALSE;
9896
9897         /* Copper options */
9898         if (hw->phy.media_type == e1000_media_type_copper) {
9899                 hw->phy.mdix = AUTO_ALL_MODES;
9900                 hw->phy.disable_polarity_correction = FALSE;
9901                 hw->phy.ms_type = e1000_ms_hw_default;
9902         }
9903
9904         if (e1000_check_reset_block(hw))
9905                 dev_info(pci_dev_to_dev(pdev),
9906                         "PHY reset is blocked due to SOL/IDER session.\n");
9907
9908         /*
9909          * features is initialized to 0 in allocation, it might have bits
9910          * set by igb_sw_init so we should use an or instead of an
9911          * assignment.
9912          */
9913         netdev->features |= NETIF_F_SG |
9914                             NETIF_F_IP_CSUM |
9915 #ifdef NETIF_F_IPV6_CSUM
9916                             NETIF_F_IPV6_CSUM |
9917 #endif
9918 #ifdef NETIF_F_TSO
9919                             NETIF_F_TSO |
9920 #ifdef NETIF_F_TSO6
9921                             NETIF_F_TSO6 |
9922 #endif
9923 #endif /* NETIF_F_TSO */
9924 #ifdef NETIF_F_RXHASH
9925                             NETIF_F_RXHASH |
9926 #endif
9927                             NETIF_F_RXCSUM |
9928 #ifdef NETIF_F_HW_VLAN_CTAG_RX
9929                             NETIF_F_HW_VLAN_CTAG_RX |
9930                             NETIF_F_HW_VLAN_CTAG_TX;
9931 #else
9932                             NETIF_F_HW_VLAN_RX |
9933                             NETIF_F_HW_VLAN_TX;
9934 #endif
9935
9936         if (hw->mac.type >= e1000_82576)
9937                 netdev->features |= NETIF_F_SCTP_CSUM;
9938
9939 #ifdef HAVE_NDO_SET_FEATURES
9940         /* copy netdev features into list of user selectable features */
9941         netdev->hw_features |= netdev->features;
9942 #ifndef IGB_NO_LRO
9943
9944         /* give us the option of enabling LRO later */
9945         netdev->hw_features |= NETIF_F_LRO;
9946 #endif
9947 #else
9948 #ifdef NETIF_F_GRO
9949
9950         /* this is only needed on kernels prior to 2.6.39 */
9951         netdev->features |= NETIF_F_GRO;
9952 #endif
9953 #endif
9954
9955         /* set this bit last since it cannot be part of hw_features */
9956 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
9957         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
9958 #else
9959         netdev->features |= NETIF_F_HW_VLAN_FILTER;
9960 #endif
9961
9962 #ifdef HAVE_NETDEV_VLAN_FEATURES
9963         netdev->vlan_features |= NETIF_F_TSO |
9964                                  NETIF_F_TSO6 |
9965                                  NETIF_F_IP_CSUM |
9966                                  NETIF_F_IPV6_CSUM |
9967                                  NETIF_F_SG;
9968
9969 #endif
9970         if (pci_using_dac)
9971                 netdev->features |= NETIF_F_HIGHDMA;
9972
9973 #ifdef NO_KNI
9974         adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
9975 #ifdef DEBUG
9976         if (adapter->dmac != IGB_DMAC_DISABLE)
9977                 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
9978 #endif
9979
9980         /* before reading the NVM, reset the controller to put the device in a
9981          * known good starting state */
9982         e1000_reset_hw(hw);
9983 #endif /* NO_KNI */
9984
9985         /* make sure the NVM is good */
9986         if (e1000_validate_nvm_checksum(hw) < 0) {
9987                 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
9988                         " Valid\n");
9989                 err = -EIO;
9990                 goto err_eeprom;
9991         }
9992
9993         /* copy the MAC address out of the NVM */
9994         if (e1000_read_mac_addr(hw))
9995                 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
9996         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
9997 #ifdef ETHTOOL_GPERMADDR
9998         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
9999
10000         if (!is_valid_ether_addr(netdev->perm_addr)) {
10001 #else
10002         if (!is_valid_ether_addr(netdev->dev_addr)) {
10003 #endif
10004                 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
10005                 err = -EIO;
10006                 goto err_eeprom;
10007         }
10008
10009         memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
10010         adapter->mac_table[0].queue = adapter->vfs_allocated_count;
10011         adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
10012         igb_rar_set(adapter, 0);
10013
10014         /* get firmware version for ethtool -i */
10015         igb_set_fw_version(adapter);
10016
10017         /* Check if Media Autosense is enabled */
10018         if (hw->mac.type == e1000_82580)
10019                 igb_init_mas(adapter);
10020
10021 #ifdef NO_KNI
10022         setup_timer(&adapter->watchdog_timer, &igb_watchdog,
10023                     (unsigned long) adapter);
10024         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10025                 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
10026                             (unsigned long) adapter);
10027         setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
10028                     (unsigned long) adapter);
10029
10030         INIT_WORK(&adapter->reset_task, igb_reset_task);
10031         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
10032         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10033                 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
10034 #endif
10035
10036         /* Initialize link properties that are user-changeable */
10037         adapter->fc_autoneg = true;
10038         hw->mac.autoneg = true;
10039         hw->phy.autoneg_advertised = 0x2f;
10040
10041         hw->fc.requested_mode = e1000_fc_default;
10042         hw->fc.current_mode = e1000_fc_default;
10043
10044         e1000_validate_mdi_setting(hw);
10045
10046         /* By default, support wake on port A */
10047         if (hw->bus.func == 0)
10048                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10049
10050         /* Check the NVM for wake support for non-port A ports */
10051         if (hw->mac.type >= e1000_82580)
10052                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
10053                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
10054                                  &eeprom_data);
10055         else if (hw->bus.func == 1)
10056                 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
10057
10058         if (eeprom_data & IGB_EEPROM_APME)
10059                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10060
10061         /* now that we have the eeprom settings, apply the special cases where
10062          * the eeprom may be wrong or the board simply won't support wake on
10063          * lan on a particular port */
10064         switch (pdev->device) {
10065         case E1000_DEV_ID_82575GB_QUAD_COPPER:
10066                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10067                 break;
10068         case E1000_DEV_ID_82575EB_FIBER_SERDES:
10069         case E1000_DEV_ID_82576_FIBER:
10070         case E1000_DEV_ID_82576_SERDES:
10071                 /* Wake events only supported on port A for dual fiber
10072                  * regardless of eeprom setting */
10073                 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
10074                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10075                 break;
10076         case E1000_DEV_ID_82576_QUAD_COPPER:
10077         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
10078                 /* if quad port adapter, disable WoL on all but port A */
10079                 if (global_quad_port_a != 0)
10080                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10081                 else
10082                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
10083                 /* Reset for multiple quad port adapters */
10084                 if (++global_quad_port_a == 4)
10085                         global_quad_port_a = 0;
10086                 break;
10087         default:
10088                 /* If the device can't wake, don't set software support */
10089                 if (!device_can_wakeup(&adapter->pdev->dev))
10090                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10091                 break;
10092         }
10093
10094         /* initialize the wol settings based on the eeprom settings */
10095         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
10096                 adapter->wol |= E1000_WUFC_MAG;
10097
10098         /* Some vendors want WoL disabled by default, but still supported */
10099         if ((hw->mac.type == e1000_i350) &&
10100             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
10101                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10102                 adapter->wol = 0;
10103         }
10104
10105 #ifdef NO_KNI
10106         device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
10107                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
10108
10109         /* reset the hardware with the new settings */
10110         igb_reset(adapter);
10111         adapter->devrc = 0;
10112
10113 #ifdef HAVE_I2C_SUPPORT
10114         /* Init the I2C interface */
10115         err = igb_init_i2c(adapter);
10116         if (err) {
10117                 dev_err(&pdev->dev, "failed to init i2c interface\n");
10118                 goto err_eeprom;
10119         }
10120 #endif /* HAVE_I2C_SUPPORT */
10121
10122         /* let the f/w know that the h/w is now under the control of the
10123          * driver. */
10124         igb_get_hw_control(adapter);
10125
10126         strncpy(netdev->name, "eth%d", IFNAMSIZ);
10127         err = register_netdev(netdev);
10128         if (err)
10129                 goto err_register;
10130
10131 #ifdef CONFIG_IGB_VMDQ_NETDEV
10132         err = igb_init_vmdq_netdevs(adapter);
10133         if (err)
10134                 goto err_register;
10135 #endif
10136         /* carrier off reporting is important to ethtool even BEFORE open */
10137         netif_carrier_off(netdev);
10138
10139 #ifdef IGB_DCA
10140         if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
10141                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
10142                 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
10143                 igb_setup_dca(adapter);
10144         }
10145
10146 #endif
10147 #ifdef HAVE_PTP_1588_CLOCK
10148         /* do hw tstamp init after resetting */
10149         igb_ptp_init(adapter);
10150 #endif /* HAVE_PTP_1588_CLOCK */
10151
10152 #endif /* NO_KNI */
10153         dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
10154         /* print bus type/speed/width info */
10155         dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
10156                  netdev->name,
10157                  ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
10158                   (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
10159                   (hw->mac.type == e1000_i354) ? "integrated" :
10160                                                             "unknown"),
10161                  ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
10162                   (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
10163                   (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
10164                   (hw->mac.type == e1000_i354) ? "integrated" :
10165                    "unknown"));
10166         dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
10167         for (i = 0; i < 6; i++)
10168                 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
10169
10170         ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
10171         if (ret_val)
10172                 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
10173         dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
10174                  pba_str);
10175
10176
10177         /* Initialize the thermal sensor on i350 devices. */
10178         if (hw->mac.type == e1000_i350) {
10179                 if (hw->bus.func == 0) {
10180                         u16 ets_word;
10181
10182                         /*
10183                          * Read the NVM to determine if this i350 device
10184                          * supports an external thermal sensor.
10185                          */
10186                         e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
10187                         if (ets_word != 0x0000 && ets_word != 0xFFFF)
10188                                 adapter->ets = true;
10189                         else
10190                                 adapter->ets = false;
10191                 }
10192 #ifdef NO_KNI
10193 #ifdef IGB_HWMON
10194
10195                 igb_sysfs_init(adapter);
10196 #else
10197 #ifdef IGB_PROCFS
10198
10199                 igb_procfs_init(adapter);
10200 #endif /* IGB_PROCFS */
10201 #endif /* IGB_HWMON */
10202 #endif /* NO_KNI */
10203         } else {
10204                 adapter->ets = false;
10205         }
10206
10207         if (hw->phy.media_type == e1000_media_type_copper) {
10208                 switch (hw->mac.type) {
10209                 case e1000_i350:
10210                 case e1000_i210:
10211                 case e1000_i211:
10212                         /* Enable EEE for internal copper PHY devices */
10213                         err = e1000_set_eee_i350(hw);
10214                         if ((!err) &&
10215                             (adapter->flags & IGB_FLAG_EEE))
10216                                 adapter->eee_advert =
10217                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
10218                         break;
10219                 case e1000_i354:
10220                         if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
10221                             (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
10222                                 err = e1000_set_eee_i354(hw);
10223                                 if ((!err) &&
10224                                     (adapter->flags & IGB_FLAG_EEE))
10225                                         adapter->eee_advert =
10226                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
10227                         }
10228                         break;
10229                 default:
10230                         break;
10231                 }
10232         }
10233
10234         /* send driver version info to firmware */
10235         if (hw->mac.type >= e1000_i350)
10236                 igb_init_fw(adapter);
10237
10238 #ifndef IGB_NO_LRO
10239         if (netdev->features & NETIF_F_LRO)
10240                 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
10241         else
10242                 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
10243 #endif
10244         dev_info(pci_dev_to_dev(pdev),
10245                  "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
10246                  adapter->msix_entries ? "MSI-X" :
10247                  (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
10248                  adapter->num_rx_queues, adapter->num_tx_queues);
10249
10250         cards_found++;
10251         *lad_dev = netdev;
10252
10253         pm_runtime_put_noidle(&pdev->dev);
10254         return 0;
10255
10256 //err_register:
10257 //      igb_release_hw_control(adapter);
10258 #ifdef HAVE_I2C_SUPPORT
10259         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
10260 #endif /* HAVE_I2C_SUPPORT */
10261 err_eeprom:
10262 //      if (!e1000_check_reset_block(hw))
10263 //              e1000_phy_hw_reset(hw);
10264
10265         if (hw->flash_address)
10266                 iounmap(hw->flash_address);
10267 err_sw_init:
10268 //      igb_clear_interrupt_scheme(adapter);
10269 //      igb_reset_sriov_capability(adapter);
10270         iounmap(hw->hw_addr);
10271 err_ioremap:
10272         free_netdev(netdev);
10273 err_alloc_etherdev:
10274 //      pci_release_selected_regions(pdev,
10275 //                                   pci_select_bars(pdev, IORESOURCE_MEM));
10276 //err_pci_reg:
10277 //err_dma:
10278         pci_disable_device(pdev);
10279         return err;
10280 }
10281
10282
10283 void igb_kni_remove(struct pci_dev *pdev)
10284 {
10285         pci_disable_device(pdev);
10286 }