lib/librte_eal/linuxapp/kni/ethtool/igb/igb_main.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007-2013 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #include <linux/module.h>
  29 #include <linux/types.h>
  30 #include <linux/init.h>
  31 #include <linux/vmalloc.h>
  32 #include <linux/pagemap.h>
  33 #include <linux/netdevice.h>
  34 #include <linux/tcp.h>
  35 #ifdef NETIF_F_TSO
  36 #include <net/checksum.h>
  37 #ifdef NETIF_F_TSO6
  38 #include <linux/ipv6.h>
  39 #include <net/ip6_checksum.h>
  40 #endif
  41 #endif
  42 #ifdef SIOCGMIIPHY
  43 #include <linux/mii.h>
  44 #endif
  45 #ifdef SIOCETHTOOL
  46 #include <linux/ethtool.h>
  47 #endif
  48 #include <linux/if_vlan.h>
  49 #ifdef CONFIG_PM_RUNTIME
  50 #include <linux/pm_runtime.h>
  51 #endif /* CONFIG_PM_RUNTIME */
  52
  53 #include <linux/if_bridge.h>
  54 #include "igb.h"
  55 #include "igb_vmdq.h"
  56
  57 #include <linux/uio_driver.h>
  58
  59 #if defined(DEBUG) || defined (DEBUG_DUMP) || defined (DEBUG_ICR) || defined(DEBUG_ITR)
  60 #define DRV_DEBUG "_debug"
  61 #else
  62 #define DRV_DEBUG
  63 #endif
  64 #define DRV_HW_PERF
  65 #define VERSION_SUFFIX
  66
  67 #define MAJ 5
  68 #define MIN 0
  69 #define BUILD 6
  70 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." __stringify(BUILD) VERSION_SUFFIX DRV_DEBUG DRV_HW_PERF
  71
  72 char igb_driver_name[] = "igb";
  73 char igb_driver_version[] = DRV_VERSION;
  74 static const char igb_driver_string[] =
  75                                 "Intel(R) Gigabit Ethernet Network Driver";
  76 static const char igb_copyright[] =
  77                                 "Copyright (c) 2007-2013 Intel Corporation.";
  78
  79 static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl) = {
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER) },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER) },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES) },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII) },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS) },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS) },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER) },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER) },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER) },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES) },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII) },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER) },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER) },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER) },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES) },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII) },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL) },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII) },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES) },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE) },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP) },
 104         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576) },
 105         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS) },
 106         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES) },
 107         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER) },
 108         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES) },
 109         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD) },
 110         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2) },
 111         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER) },
 112         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER) },
 113         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES) },
 114         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER) },
 115         /* required last entry */
 116         {0, }
 117 };
 118
 119 //MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 120 static void igb_set_sriov_capability(struct igb_adapter *adapter) __attribute__((__unused__));
 121 void igb_reset(struct igb_adapter *);
 122 static int igb_setup_all_tx_resources(struct igb_adapter *);
 123 static int igb_setup_all_rx_resources(struct igb_adapter *);
 124 static void igb_free_all_tx_resources(struct igb_adapter *);
 125 static void igb_free_all_rx_resources(struct igb_adapter *);
 126 static void igb_setup_mrqc(struct igb_adapter *);
 127 void igb_update_stats(struct igb_adapter *);
 128 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 129 static void __devexit igb_remove(struct pci_dev *pdev);
 130 static int igb_sw_init(struct igb_adapter *);
 131 static int igb_open(struct net_device *);
 132 static int igb_close(struct net_device *);
 133 static void igb_configure(struct igb_adapter *);
 134 static void igb_configure_tx(struct igb_adapter *);
 135 static void igb_configure_rx(struct igb_adapter *);
 136 static void igb_clean_all_tx_rings(struct igb_adapter *);
 137 static void igb_clean_all_rx_rings(struct igb_adapter *);
 138 static void igb_clean_tx_ring(struct igb_ring *);
 139 static void igb_set_rx_mode(struct net_device *);
 140 static void igb_update_phy_info(unsigned long);
 141 static void igb_watchdog(unsigned long);
 142 static void igb_watchdog_task(struct work_struct *);
 143 static void igb_dma_err_task(struct work_struct *);
 144 static void igb_dma_err_timer(unsigned long data);
 145 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 146 static struct net_device_stats *igb_get_stats(struct net_device *);
 147 static int igb_change_mtu(struct net_device *, int);
 148 void igb_full_sync_mac_table(struct igb_adapter *adapter);
 149 static int igb_set_mac(struct net_device *, void *);
 150 static void igb_set_uta(struct igb_adapter *adapter);
 151 static irqreturn_t igb_intr(int irq, void *);
 152 static irqreturn_t igb_intr_msi(int irq, void *);
 153 static irqreturn_t igb_msix_other(int irq, void *);
 154 static irqreturn_t igb_msix_ring(int irq, void *);
 155 #ifdef IGB_DCA
 156 static void igb_update_dca(struct igb_q_vector *);
 157 static void igb_setup_dca(struct igb_adapter *);
 158 #endif /* IGB_DCA */
 159 static int igb_poll(struct napi_struct *, int);
 160 static bool igb_clean_tx_irq(struct igb_q_vector *);
 161 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
 162 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 163 static void igb_tx_timeout(struct net_device *);
 164 static void igb_reset_task(struct work_struct *);
 165 #ifdef HAVE_VLAN_RX_REGISTER
 166 static void igb_vlan_mode(struct net_device *, struct vlan_group *);
 167 #endif
 168 #ifdef HAVE_VLAN_PROTOCOL
 169 static int igb_vlan_rx_add_vid(struct net_device *,
 170                                __be16 proto, u16);
 171 static int igb_vlan_rx_kill_vid(struct net_device *,
 172                                 __be16 proto, u16);
 173 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
 174 #ifdef NETIF_F_HW_VLAN_CTAG_RX
 175 static int igb_vlan_rx_add_vid(struct net_device *,
 176                                __always_unused __be16 proto, u16);
 177 static int igb_vlan_rx_kill_vid(struct net_device *,
 178                                 __always_unused __be16 proto, u16);
 179 #else
 180 static int igb_vlan_rx_add_vid(struct net_device *, u16);
 181 static int igb_vlan_rx_kill_vid(struct net_device *, u16);
 182 #endif
 183 #else
 184 static void igb_vlan_rx_add_vid(struct net_device *, u16);
 185 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
 186 #endif
 187 static void igb_restore_vlan(struct igb_adapter *);
 188 void igb_rar_set(struct igb_adapter *adapter, u32 index);
 189 static void igb_ping_all_vfs(struct igb_adapter *);
 190 static void igb_msg_task(struct igb_adapter *);
 191 static void igb_vmm_control(struct igb_adapter *);
 192 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 193 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 194 static void igb_process_mdd_event(struct igb_adapter *);
 195 #ifdef IFLA_VF_MAX
 196 static int igb_ndo_set_vf_mac( struct net_device *netdev, int vf, u8 *mac);
 197 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 198                                 int vf, u16 vlan, u8 qos);
 199 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
 200 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 201                                 bool setting);
 202 #endif
 203 #ifdef HAVE_VF_MIN_MAX_TXRATE
 204 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
 205 #else /* HAVE_VF_MIN_MAX_TXRATE */
 206 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate);
 207 #endif /* HAVE_VF_MIN_MAX_TXRATE */
 208 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 209                                  struct ifla_vf_info *ivi);
 210 static void igb_check_vf_rate_limit(struct igb_adapter *);
 211 #endif
 212 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 213 #ifdef CONFIG_PM
 214 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
 215 static int igb_suspend(struct device *dev);
 216 static int igb_resume(struct device *dev);
 217 #ifdef CONFIG_PM_RUNTIME
 218 static int igb_runtime_suspend(struct device *dev);
 219 static int igb_runtime_resume(struct device *dev);
 220 static int igb_runtime_idle(struct device *dev);
 221 #endif /* CONFIG_PM_RUNTIME */
 222 static const struct dev_pm_ops igb_pm_ops = {
 223 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
 224         .suspend = igb_suspend,
 225         .resume = igb_resume,
 226         .freeze = igb_suspend,
 227         .thaw = igb_resume,
 228         .poweroff = igb_suspend,
 229         .restore = igb_resume,
 230 #ifdef CONFIG_PM_RUNTIME
 231         .runtime_suspend = igb_runtime_suspend,
 232         .runtime_resume = igb_runtime_resume,
 233         .runtime_idle = igb_runtime_idle,
 234 #endif
 235 #else /* Linux >= 2.6.34 */
 236         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 237 #ifdef CONFIG_PM_RUNTIME
 238         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 239                         igb_runtime_idle)
 240 #endif /* CONFIG_PM_RUNTIME */
 241 #endif /* Linux version */
 242 };
 243 #else
 244 static int igb_suspend(struct pci_dev *pdev, pm_message_t state);
 245 static int igb_resume(struct pci_dev *pdev);
 246 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
 247 #endif /* CONFIG_PM */
 248 #ifndef USE_REBOOT_NOTIFIER
 249 static void igb_shutdown(struct pci_dev *);
 250 #else
 251 static int igb_notify_reboot(struct notifier_block *, unsigned long, void *);
 252 static struct notifier_block igb_notifier_reboot = {
 253         .notifier_call  = igb_notify_reboot,
 254         .next           = NULL,
 255         .priority       = 0
 256 };
 257 #endif
 258 #ifdef IGB_DCA
 259 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 260 static struct notifier_block dca_notifier = {
 261         .notifier_call  = igb_notify_dca,
 262         .next           = NULL,
 263         .priority       = 0
 264 };
 265 #endif
 266 #ifdef CONFIG_NET_POLL_CONTROLLER
 267 /* for netdump / net console */
 268 static void igb_netpoll(struct net_device *);
 269 #endif
 270
 271 #ifdef HAVE_PCI_ERS
 272 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 273                      pci_channel_state_t);
 274 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 275 static void igb_io_resume(struct pci_dev *);
 276
 277 static struct pci_error_handlers igb_err_handler = {
 278         .error_detected = igb_io_error_detected,
 279         .slot_reset = igb_io_slot_reset,
 280         .resume = igb_io_resume,
 281 };
 282 #endif
 283
 284 static void igb_init_fw(struct igb_adapter *adapter);
 285 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 286
 287 static struct pci_driver igb_driver = {
 288         .name     = igb_driver_name,
 289         .id_table = igb_pci_tbl,
 290         .probe    = igb_probe,
 291         .remove   = __devexit_p(igb_remove),
 292 #ifdef CONFIG_PM
 293 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
 294         .driver.pm = &igb_pm_ops,
 295 #else
 296         .suspend  = igb_suspend,
 297         .resume   = igb_resume,
 298 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
 299 #endif /* CONFIG_PM */
 300 #ifndef USE_REBOOT_NOTIFIER
 301         .shutdown = igb_shutdown,
 302 #endif
 303 #ifdef HAVE_PCI_ERS
 304         .err_handler = &igb_err_handler
 305 #endif
 306 };
 307
 308 //MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 309 //MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 310 //MODULE_LICENSE("GPL");
 311 //MODULE_VERSION(DRV_VERSION);
 312
 313 static void igb_vfta_set(struct igb_adapter *adapter, u32 vid, bool add)
 314 {
 315         struct e1000_hw *hw = &adapter->hw;
 316         struct e1000_host_mng_dhcp_cookie *mng_cookie = &hw->mng_cookie;
 317         u32 index = (vid >> E1000_VFTA_ENTRY_SHIFT) & E1000_VFTA_ENTRY_MASK;
 318         u32 mask = 1 << (vid & E1000_VFTA_ENTRY_BIT_SHIFT_MASK);
 319         u32 vfta;
 320
 321         /*
 322          * if this is the management vlan the only option is to add it in so
 323          * that the management pass through will continue to work
 324          */
 325         if ((mng_cookie->status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
 326             (vid == mng_cookie->vlan_id))
 327                 add = TRUE;
 328
 329         vfta = adapter->shadow_vfta[index];
 330
 331         if (add)
 332                 vfta |= mask;
 333         else
 334                 vfta &= ~mask;
 335
 336         e1000_write_vfta(hw, index, vfta);
 337         adapter->shadow_vfta[index] = vfta;
 338 }
 339
 340 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
 341 //module_param(debug, int, 0);
 342 //MODULE_PARM_DESC(debug, "Debug level (0=none, ..., 16=all)");
 343
 344 /**
 345  * igb_init_module - Driver Registration Routine
 346  *
 347  * igb_init_module is the first routine called when the driver is
 348  * loaded. All it does is register with the PCI subsystem.
 349  **/
 350 static int __init igb_init_module(void)
 351 {
 352         int ret;
 353
 354         printk(KERN_INFO "%s - version %s\n",
 355                igb_driver_string, igb_driver_version);
 356
 357         printk(KERN_INFO "%s\n", igb_copyright);
 358 #ifdef IGB_HWMON
 359 /* only use IGB_PROCFS if IGB_HWMON is not defined */
 360 #else
 361 #ifdef IGB_PROCFS
 362         if (igb_procfs_topdir_init())
 363                 printk(KERN_INFO "Procfs failed to initialize topdir\n");
 364 #endif /* IGB_PROCFS */
 365 #endif /* IGB_HWMON  */
 366
 367 #ifdef IGB_DCA
 368         dca_register_notify(&dca_notifier);
 369 #endif
 370         ret = pci_register_driver(&igb_driver);
 371 #ifdef USE_REBOOT_NOTIFIER
 372         if (ret >= 0) {
 373                 register_reboot_notifier(&igb_notifier_reboot);
 374         }
 375 #endif
 376         return ret;
 377 }
 378
 379 #undef module_init
 380 #define module_init(x) static int x(void)  __attribute__((__unused__));
 381 module_init(igb_init_module);
 382
 383 /**
 384  * igb_exit_module - Driver Exit Cleanup Routine
 385  *
 386  * igb_exit_module is called just before the driver is removed
 387  * from memory.
 388  **/
 389 static void __exit igb_exit_module(void)
 390 {
 391 #ifdef IGB_DCA
 392         dca_unregister_notify(&dca_notifier);
 393 #endif
 394 #ifdef USE_REBOOT_NOTIFIER
 395         unregister_reboot_notifier(&igb_notifier_reboot);
 396 #endif
 397         pci_unregister_driver(&igb_driver);
 398
 399 #ifdef IGB_HWMON
 400 /* only compile IGB_PROCFS if IGB_HWMON is not defined */
 401 #else
 402 #ifdef IGB_PROCFS
 403         igb_procfs_topdir_exit();
 404 #endif /* IGB_PROCFS */
 405 #endif /* IGB_HWMON */
 406 }
 407
 408 #undef module_exit
 409 #define module_exit(x) static void x(void)  __attribute__((__unused__));
 410 module_exit(igb_exit_module);
 411
 412 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 413 /**
 414  * igb_cache_ring_register - Descriptor ring to register mapping
 415  * @adapter: board private structure to initialize
 416  *
 417  * Once we know the feature-set enabled for the device, we'll cache
 418  * the register offset the descriptor ring is assigned to.
 419  **/
 420 static void igb_cache_ring_register(struct igb_adapter *adapter)
 421 {
 422         int i = 0, j = 0;
 423         u32 rbase_offset = adapter->vfs_allocated_count;
 424
 425         switch (adapter->hw.mac.type) {
 426         case e1000_82576:
 427                 /* The queues are allocated for virtualization such that VF 0
 428                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 429                  * In order to avoid collision we start at the first free queue
 430                  * and continue consuming queues in the same sequence
 431                  */
 432                 if ((adapter->rss_queues > 1) && adapter->vmdq_pools) {
 433                         for (; i < adapter->rss_queues; i++)
 434                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 435                                                                Q_IDX_82576(i);
 436                 }
 437         case e1000_82575:
 438         case e1000_82580:
 439         case e1000_i350:
 440         case e1000_i354:
 441         case e1000_i210:
 442         case e1000_i211:
 443         default:
 444                 for (; i < adapter->num_rx_queues; i++)
 445                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 446                 for (; j < adapter->num_tx_queues; j++)
 447                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 448                 break;
 449         }
 450 }
 451
 452 static void igb_configure_lli(struct igb_adapter *adapter)
 453 {
 454         struct e1000_hw *hw = &adapter->hw;
 455         u16 port;
 456
 457         /* LLI should only be enabled for MSI-X or MSI interrupts */
 458         if (!adapter->msix_entries && !(adapter->flags & IGB_FLAG_HAS_MSI))
 459                 return;
 460
 461         if (adapter->lli_port) {
 462                 /* use filter 0 for port */
 463                 port = htons((u16)adapter->lli_port);
 464                 E1000_WRITE_REG(hw, E1000_IMIR(0),
 465                         (port | E1000_IMIR_PORT_IM_EN));
 466                 E1000_WRITE_REG(hw, E1000_IMIREXT(0),
 467                         (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP));
 468         }
 469
 470         if (adapter->flags & IGB_FLAG_LLI_PUSH) {
 471                 /* use filter 1 for push flag */
 472                 E1000_WRITE_REG(hw, E1000_IMIR(1),
 473                         (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
 474                 E1000_WRITE_REG(hw, E1000_IMIREXT(1),
 475                         (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_PSH));
 476         }
 477
 478         if (adapter->lli_size) {
 479                 /* use filter 2 for size */
 480                 E1000_WRITE_REG(hw, E1000_IMIR(2),
 481                         (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
 482                 E1000_WRITE_REG(hw, E1000_IMIREXT(2),
 483                         (adapter->lli_size | E1000_IMIREXT_CTRL_BP));
 484         }
 485
 486 }
 487
 488 /**
 489  *  igb_write_ivar - configure ivar for given MSI-X vector
 490  *  @hw: pointer to the HW structure
 491  *  @msix_vector: vector number we are allocating to a given ring
 492  *  @index: row index of IVAR register to write within IVAR table
 493  *  @offset: column offset of in IVAR, should be multiple of 8
 494  *
 495  *  This function is intended to handle the writing of the IVAR register
 496  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 497  *  each containing an cause allocation for an Rx and Tx ring, and a
 498  *  variable number of rows depending on the number of queues supported.
 499  **/
 500 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 501                            int index, int offset)
 502 {
 503         u32 ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index);
 504
 505         /* clear any bits that are currently set */
 506         ivar &= ~((u32)0xFF << offset);
 507
 508         /* write vector and valid bit */
 509         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 510
 511         E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar);
 512 }
 513
 514 #define IGB_N0_QUEUE -1
 515 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 516 {
 517         struct igb_adapter *adapter = q_vector->adapter;
 518         struct e1000_hw *hw = &adapter->hw;
 519         int rx_queue = IGB_N0_QUEUE;
 520         int tx_queue = IGB_N0_QUEUE;
 521         u32 msixbm = 0;
 522
 523         if (q_vector->rx.ring)
 524                 rx_queue = q_vector->rx.ring->reg_idx;
 525         if (q_vector->tx.ring)
 526                 tx_queue = q_vector->tx.ring->reg_idx;
 527
 528         switch (hw->mac.type) {
 529         case e1000_82575:
 530                 /* The 82575 assigns vectors using a bitmask, which matches the
 531                    bitmask for the EICR/EIMS/EIMC registers.  To assign one
 532                    or more queues to a vector, we write the appropriate bits
 533                    into the MSIXBM register for that vector. */
 534                 if (rx_queue > IGB_N0_QUEUE)
 535                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 536                 if (tx_queue > IGB_N0_QUEUE)
 537                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 538                 if (!adapter->msix_entries && msix_vector == 0)
 539                         msixbm |= E1000_EIMS_OTHER;
 540                 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), msix_vector, msixbm);
 541                 q_vector->eims_value = msixbm;
 542                 break;
 543         case e1000_82576:
 544                 /*
 545                  * 82576 uses a table that essentially consists of 2 columns
 546                  * with 8 rows.  The ordering is column-major so we use the
 547                  * lower 3 bits as the row index, and the 4th bit as the
 548                  * column offset.
 549                  */
 550                 if (rx_queue > IGB_N0_QUEUE)
 551                         igb_write_ivar(hw, msix_vector,
 552                                        rx_queue & 0x7,
 553                                        (rx_queue & 0x8) << 1);
 554                 if (tx_queue > IGB_N0_QUEUE)
 555                         igb_write_ivar(hw, msix_vector,
 556                                        tx_queue & 0x7,
 557                                        ((tx_queue & 0x8) << 1) + 8);
 558                 q_vector->eims_value = 1 << msix_vector;
 559                 break;
 560         case e1000_82580:
 561         case e1000_i350:
 562         case e1000_i354:
 563         case e1000_i210:
 564         case e1000_i211:
 565                 /*
 566                  * On 82580 and newer adapters the scheme is similar to 82576
 567                  * however instead of ordering column-major we have things
 568                  * ordered row-major.  So we traverse the table by using
 569                  * bit 0 as the column offset, and the remaining bits as the
 570                  * row index.
 571                  */
 572                 if (rx_queue > IGB_N0_QUEUE)
 573                         igb_write_ivar(hw, msix_vector,
 574                                        rx_queue >> 1,
 575                                        (rx_queue & 0x1) << 4);
 576                 if (tx_queue > IGB_N0_QUEUE)
 577                         igb_write_ivar(hw, msix_vector,
 578                                        tx_queue >> 1,
 579                                        ((tx_queue & 0x1) << 4) + 8);
 580                 q_vector->eims_value = 1 << msix_vector;
 581                 break;
 582         default:
 583                 BUG();
 584                 break;
 585         }
 586
 587         /* add q_vector eims value to global eims_enable_mask */
 588         adapter->eims_enable_mask |= q_vector->eims_value;
 589
 590         /* configure q_vector to set itr on first interrupt */
 591         q_vector->set_itr = 1;
 592 }
 593
 594 /**
 595  * igb_configure_msix - Configure MSI-X hardware
 596  *
 597  * igb_configure_msix sets up the hardware to properly
 598  * generate MSI-X interrupts.
 599  **/
 600 static void igb_configure_msix(struct igb_adapter *adapter)
 601 {
 602         u32 tmp;
 603         int i, vector = 0;
 604         struct e1000_hw *hw = &adapter->hw;
 605
 606         adapter->eims_enable_mask = 0;
 607
 608         /* set vector for other causes, i.e. link changes */
 609         switch (hw->mac.type) {
 610         case e1000_82575:
 611                 tmp = E1000_READ_REG(hw, E1000_CTRL_EXT);
 612                 /* enable MSI-X PBA support*/
 613                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 614
 615                 /* Auto-Mask interrupts upon ICR read. */
 616                 tmp |= E1000_CTRL_EXT_EIAME;
 617                 tmp |= E1000_CTRL_EXT_IRCA;
 618
 619                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, tmp);
 620
 621                 /* enable msix_other interrupt */
 622                 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), vector++,
 623                                       E1000_EIMS_OTHER);
 624                 adapter->eims_other = E1000_EIMS_OTHER;
 625
 626                 break;
 627
 628         case e1000_82576:
 629         case e1000_82580:
 630         case e1000_i350:
 631         case e1000_i354:
 632         case e1000_i210:
 633         case e1000_i211:
 634                 /* Turn on MSI-X capability first, or our settings
 635                  * won't stick.  And it will take days to debug. */
 636                 E1000_WRITE_REG(hw, E1000_GPIE, E1000_GPIE_MSIX_MODE |
 637                                 E1000_GPIE_PBA | E1000_GPIE_EIAME |
 638                                 E1000_GPIE_NSICR);
 639
 640                 /* enable msix_other interrupt */
 641                 adapter->eims_other = 1 << vector;
 642                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 643
 644                 E1000_WRITE_REG(hw, E1000_IVAR_MISC, tmp);
 645                 break;
 646         default:
 647                 /* do nothing, since nothing else supports MSI-X */
 648                 break;
 649         } /* switch (hw->mac.type) */
 650
 651         adapter->eims_enable_mask |= adapter->eims_other;
 652
 653         for (i = 0; i < adapter->num_q_vectors; i++)
 654                 igb_assign_vector(adapter->q_vector[i], vector++);
 655
 656         E1000_WRITE_FLUSH(hw);
 657 }
 658
 659 /**
 660  * igb_request_msix - Initialize MSI-X interrupts
 661  *
 662  * igb_request_msix allocates MSI-X vectors and requests interrupts from the
 663  * kernel.
 664  **/
 665 static int igb_request_msix(struct igb_adapter *adapter)
 666 {
 667         struct net_device *netdev = adapter->netdev;
 668         struct e1000_hw *hw = &adapter->hw;
 669         int i, err = 0, vector = 0, free_vector = 0;
 670
 671         err = request_irq(adapter->msix_entries[vector].vector,
 672                           &igb_msix_other, 0, netdev->name, adapter);
 673         if (err)
 674                 goto err_out;
 675
 676         for (i = 0; i < adapter->num_q_vectors; i++) {
 677                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 678
 679                 vector++;
 680
 681                 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
 682
 683                 if (q_vector->rx.ring && q_vector->tx.ring)
 684                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 685                                 q_vector->rx.ring->queue_index);
 686                 else if (q_vector->tx.ring)
 687                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 688                                 q_vector->tx.ring->queue_index);
 689                 else if (q_vector->rx.ring)
 690                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 691                                 q_vector->rx.ring->queue_index);
 692                 else
 693                         sprintf(q_vector->name, "%s-unused", netdev->name);
 694
 695                 err = request_irq(adapter->msix_entries[vector].vector,
 696                                   igb_msix_ring, 0, q_vector->name,
 697                                   q_vector);
 698                 if (err)
 699                         goto err_free;
 700         }
 701
 702         igb_configure_msix(adapter);
 703         return 0;
 704
 705 err_free:
 706         /* free already assigned IRQs */
 707         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 708
 709         vector--;
 710         for (i = 0; i < vector; i++) {
 711                 free_irq(adapter->msix_entries[free_vector++].vector,
 712                          adapter->q_vector[i]);
 713         }
 714 err_out:
 715         return err;
 716 }
 717
 718 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
 719 {
 720         if (adapter->msix_entries) {
 721                 pci_disable_msix(adapter->pdev);
 722                 kfree(adapter->msix_entries);
 723                 adapter->msix_entries = NULL;
 724         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
 725                 pci_disable_msi(adapter->pdev);
 726         }
 727 }
 728
 729 /**
 730  * igb_free_q_vector - Free memory allocated for specific interrupt vector
 731  * @adapter: board private structure to initialize
 732  * @v_idx: Index of vector to be freed
 733  *
 734  * This function frees the memory allocated to the q_vector.  In addition if
 735  * NAPI is enabled it will delete any references to the NAPI struct prior
 736  * to freeing the q_vector.
 737  **/
 738 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
 739 {
 740         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
 741
 742         if (q_vector->tx.ring)
 743                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
 744
 745         if (q_vector->rx.ring)
 746                 adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL;
 747
 748         adapter->q_vector[v_idx] = NULL;
 749         netif_napi_del(&q_vector->napi);
 750 #ifndef IGB_NO_LRO
 751         __skb_queue_purge(&q_vector->lrolist.active);
 752 #endif
 753         kfree(q_vector);
 754 }
 755
 756 /**
 757  * igb_free_q_vectors - Free memory allocated for interrupt vectors
 758  * @adapter: board private structure to initialize
 759  *
 760  * This function frees the memory allocated to the q_vectors.  In addition if
 761  * NAPI is enabled it will delete any references to the NAPI struct prior
 762  * to freeing the q_vector.
 763  **/
 764 static void igb_free_q_vectors(struct igb_adapter *adapter)
 765 {
 766         int v_idx = adapter->num_q_vectors;
 767
 768         adapter->num_tx_queues = 0;
 769         adapter->num_rx_queues = 0;
 770         adapter->num_q_vectors = 0;
 771
 772         while (v_idx--)
 773                 igb_free_q_vector(adapter, v_idx);
 774 }
 775
 776 /**
 777  * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
 778  *
 779  * This function resets the device so that it has 0 rx queues, tx queues, and
 780  * MSI-X interrupts allocated.
 781  */
 782 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
 783 {
 784         igb_free_q_vectors(adapter);
 785         igb_reset_interrupt_capability(adapter);
 786 }
 787
 788 /**
 789  * igb_process_mdd_event
 790  * @adapter - board private structure
 791  *
 792  * Identify a malicious VF, disable the VF TX/RX queues and log a message.
 793  */
 794 static void igb_process_mdd_event(struct igb_adapter *adapter)
 795 {
 796         struct e1000_hw *hw = &adapter->hw;
 797         u32 lvmmc, vfte, vfre, mdfb;
 798         u8 vf_queue;
 799
 800         lvmmc = E1000_READ_REG(hw, E1000_LVMMC);
 801         vf_queue = lvmmc >> 29;
 802
 803         /* VF index cannot be bigger or equal to VFs allocated */
 804         if (vf_queue >= adapter->vfs_allocated_count)
 805                 return;
 806
 807         netdev_info(adapter->netdev,
 808                     "VF %d misbehaved. VF queues are disabled. "
 809                     "VM misbehavior code is 0x%x\n", vf_queue, lvmmc);
 810
 811         /* Disable VFTE and VFRE related bits */
 812         vfte = E1000_READ_REG(hw, E1000_VFTE);
 813         vfte &= ~(1 << vf_queue);
 814         E1000_WRITE_REG(hw, E1000_VFTE, vfte);
 815
 816         vfre = E1000_READ_REG(hw, E1000_VFRE);
 817         vfre &= ~(1 << vf_queue);
 818         E1000_WRITE_REG(hw, E1000_VFRE, vfre);
 819
 820         /* Disable MDFB related bit. Clear on write */
 821         mdfb = E1000_READ_REG(hw, E1000_MDFB);
 822         mdfb |= (1 << vf_queue);
 823         E1000_WRITE_REG(hw, E1000_MDFB, mdfb);
 824
 825         /* Reset the specific VF */
 826         E1000_WRITE_REG(hw, E1000_VTCTRL(vf_queue), E1000_VTCTRL_RST);
 827 }
 828
 829 /**
 830  * igb_disable_mdd
 831  * @adapter - board private structure
 832  *
 833  * Disable MDD behavior in the HW
 834  **/
 835 static void igb_disable_mdd(struct igb_adapter *adapter)
 836 {
 837         struct e1000_hw *hw = &adapter->hw;
 838         u32 reg;
 839
 840         if ((hw->mac.type != e1000_i350) ||
 841             (hw->mac.type != e1000_i354))
 842                 return;
 843
 844         reg = E1000_READ_REG(hw, E1000_DTXCTL);
 845         reg &= (~E1000_DTXCTL_MDP_EN);
 846         E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
 847 }
 848
 849 /**
 850  * igb_enable_mdd
 851  * @adapter - board private structure
 852  *
 853  * Enable the HW to detect malicious driver and sends an interrupt to
 854  * the driver.
 855  **/
 856 static void igb_enable_mdd(struct igb_adapter *adapter)
 857 {
 858         struct e1000_hw *hw = &adapter->hw;
 859         u32 reg;
 860
 861         /* Only available on i350 device */
 862         if (hw->mac.type != e1000_i350)
 863                 return;
 864
 865         reg = E1000_READ_REG(hw, E1000_DTXCTL);
 866         reg |= E1000_DTXCTL_MDP_EN;
 867         E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
 868 }
 869
 870 /**
 871  * igb_reset_sriov_capability - disable SR-IOV if enabled
 872  *
 873  * Attempt to disable single root IO virtualization capabilites present in the
 874  * kernel.
 875  **/
 876 static void igb_reset_sriov_capability(struct igb_adapter *adapter)
 877 {
 878         struct pci_dev *pdev = adapter->pdev;
 879         struct e1000_hw *hw = &adapter->hw;
 880
 881         /* reclaim resources allocated to VFs */
 882         if (adapter->vf_data) {
 883                 if (!pci_vfs_assigned(pdev)) {
 884                         /*
 885                          * disable iov and allow time for transactions to
 886                          * clear
 887                          */
 888                         pci_disable_sriov(pdev);
 889                         msleep(500);
 890
 891                         dev_info(pci_dev_to_dev(pdev), "IOV Disabled\n");
 892                 } else {
 893                         dev_info(pci_dev_to_dev(pdev), "IOV Not Disabled\n "
 894                                         "VF(s) are assigned to guests!\n");
 895                 }
 896                 /* Disable Malicious Driver Detection */
 897                 igb_disable_mdd(adapter);
 898
 899                 /* free vf data storage */
 900                 kfree(adapter->vf_data);
 901                 adapter->vf_data = NULL;
 902
 903                 /* switch rings back to PF ownership */
 904                 E1000_WRITE_REG(hw, E1000_IOVCTL,
 905                                 E1000_IOVCTL_REUSE_VFQ);
 906                 E1000_WRITE_FLUSH(hw);
 907                 msleep(100);
 908         }
 909
 910         adapter->vfs_allocated_count = 0;
 911 }
 912
 913 /**
 914  * igb_set_sriov_capability - setup SR-IOV if supported
 915  *
 916  * Attempt to enable single root IO virtualization capabilites present in the
 917  * kernel.
 918  **/
 919 static void igb_set_sriov_capability(struct igb_adapter *adapter)
 920 {
 921         struct pci_dev *pdev = adapter->pdev;
 922         int old_vfs = 0;
 923         int i;
 924
 925         old_vfs = pci_num_vf(pdev);
 926         if (old_vfs) {
 927                 dev_info(pci_dev_to_dev(pdev),
 928                                 "%d pre-allocated VFs found - override "
 929                                 "max_vfs setting of %d\n", old_vfs,
 930                                 adapter->vfs_allocated_count);
 931                 adapter->vfs_allocated_count = old_vfs;
 932         }
 933         /* no VFs requested, do nothing */
 934         if (!adapter->vfs_allocated_count)
 935                 return;
 936
 937         /* allocate vf data storage */
 938         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
 939                                    sizeof(struct vf_data_storage),
 940                                    GFP_KERNEL);
 941
 942         if (adapter->vf_data) {
 943                 if (!old_vfs) {
 944                         if (pci_enable_sriov(pdev,
 945                                         adapter->vfs_allocated_count))
 946                                 goto err_out;
 947                 }
 948                 for (i = 0; i < adapter->vfs_allocated_count; i++)
 949                         igb_vf_configure(adapter, i);
 950
 951                 switch (adapter->hw.mac.type) {
 952                 case e1000_82576:
 953                 case e1000_i350:
 954                         /* Enable VM to VM loopback by default */
 955                         adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
 956                         break;
 957                 default:
 958                         /* Currently no other hardware supports loopback */
 959                         break;
 960                 }
 961
 962                 /* DMA Coalescing is not supported in IOV mode. */
 963                 if (adapter->hw.mac.type >= e1000_i350)
 964                 adapter->dmac = IGB_DMAC_DISABLE;
 965                 if (adapter->hw.mac.type < e1000_i350)
 966                 adapter->flags |= IGB_FLAG_DETECT_BAD_DMA;
 967                 return;
 968
 969         }
 970
 971 err_out:
 972         kfree(adapter->vf_data);
 973         adapter->vf_data = NULL;
 974         adapter->vfs_allocated_count = 0;
 975         dev_warn(pci_dev_to_dev(pdev),
 976                         "Failed to initialize SR-IOV virtualization\n");
 977 }
 978
 979 /**
 980  * igb_set_interrupt_capability - set MSI or MSI-X if supported
 981  *
 982  * Attempt to configure interrupts using the best available
 983  * capabilities of the hardware and kernel.
 984  **/
 985 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
 986 {
 987         struct pci_dev *pdev = adapter->pdev;
 988         int err;
 989         int numvecs, i;
 990
 991         if (!msix)
 992                 adapter->int_mode = IGB_INT_MODE_MSI;
 993
 994         /* Number of supported queues. */
 995         adapter->num_rx_queues = adapter->rss_queues;
 996
 997         if (adapter->vmdq_pools > 1)
 998                 adapter->num_rx_queues += adapter->vmdq_pools - 1;
 999
1000 #ifdef HAVE_TX_MQ
1001         if (adapter->vmdq_pools)
1002                 adapter->num_tx_queues = adapter->vmdq_pools;
1003         else
1004                 adapter->num_tx_queues = adapter->num_rx_queues;
1005 #else
1006         adapter->num_tx_queues = max_t(u32, 1, adapter->vmdq_pools);
1007 #endif
1008
1009         switch (adapter->int_mode) {
1010         case IGB_INT_MODE_MSIX:
1011                 /* start with one vector for every rx queue */
1012                 numvecs = adapter->num_rx_queues;
1013
1014                 /* if tx handler is separate add 1 for every tx queue */
1015                 if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1016                         numvecs += adapter->num_tx_queues;
1017
1018                 /* store the number of vectors reserved for queues */
1019                 adapter->num_q_vectors = numvecs;
1020
1021                 /* add 1 vector for link status interrupts */
1022                 numvecs++;
1023                 adapter->msix_entries = kcalloc(numvecs,
1024                                                 sizeof(struct msix_entry),
1025                                                 GFP_KERNEL);
1026                 if (adapter->msix_entries) {
1027                         for (i = 0; i < numvecs; i++)
1028                                 adapter->msix_entries[i].entry = i;
1029
1030                         err = pci_enable_msix(pdev,
1031                                               adapter->msix_entries, numvecs);
1032                         if (err == 0)
1033                                 break;
1034                 }
1035                 /* MSI-X failed, so fall through and try MSI */
1036                 dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI-X interrupts. "
1037                          "Falling back to MSI interrupts.\n");
1038                 igb_reset_interrupt_capability(adapter);
1039         case IGB_INT_MODE_MSI:
1040                 if (!pci_enable_msi(pdev))
1041                         adapter->flags |= IGB_FLAG_HAS_MSI;
1042                 else
1043                         dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI "
1044                                  "interrupts.  Falling back to legacy "
1045                                  "interrupts.\n");
1046                 /* Fall through */
1047         case IGB_INT_MODE_LEGACY:
1048                 /* disable advanced features and set number of queues to 1 */
1049                 igb_reset_sriov_capability(adapter);
1050                 adapter->vmdq_pools = 0;
1051                 adapter->rss_queues = 1;
1052                 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1053                 adapter->num_rx_queues = 1;
1054                 adapter->num_tx_queues = 1;
1055                 adapter->num_q_vectors = 1;
1056                 /* Don't do anything; this is system default */
1057                 break;
1058         }
1059 }
1060
1061 static void igb_add_ring(struct igb_ring *ring,
1062                          struct igb_ring_container *head)
1063 {
1064         head->ring = ring;
1065         head->count++;
1066 }
1067
1068 /**
1069  * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1070  * @adapter: board private structure to initialize
1071  * @v_count: q_vectors allocated on adapter, used for ring interleaving
1072  * @v_idx: index of vector in adapter struct
1073  * @txr_count: total number of Tx rings to allocate
1074  * @txr_idx: index of first Tx ring to allocate
1075  * @rxr_count: total number of Rx rings to allocate
1076  * @rxr_idx: index of first Rx ring to allocate
1077  *
1078  * We allocate one q_vector.  If allocation fails we return -ENOMEM.
1079  **/
1080 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1081                               unsigned int v_count, unsigned int v_idx,
1082                               unsigned int txr_count, unsigned int txr_idx,
1083                               unsigned int rxr_count, unsigned int rxr_idx)
1084 {
1085         struct igb_q_vector *q_vector;
1086         struct igb_ring *ring;
1087         int ring_count, size;
1088
1089         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1090         if (txr_count > 1 || rxr_count > 1)
1091                 return -ENOMEM;
1092
1093         ring_count = txr_count + rxr_count;
1094         size = sizeof(struct igb_q_vector) +
1095                (sizeof(struct igb_ring) * ring_count);
1096
1097         /* allocate q_vector and rings */
1098         q_vector = kzalloc(size, GFP_KERNEL);
1099         if (!q_vector)
1100                 return -ENOMEM;
1101
1102 #ifndef IGB_NO_LRO
1103         /* initialize LRO */
1104         __skb_queue_head_init(&q_vector->lrolist.active);
1105
1106 #endif
1107         /* initialize NAPI */
1108         netif_napi_add(adapter->netdev, &q_vector->napi,
1109                        igb_poll, 64);
1110
1111         /* tie q_vector and adapter together */
1112         adapter->q_vector[v_idx] = q_vector;
1113         q_vector->adapter = adapter;
1114
1115         /* initialize work limits */
1116         q_vector->tx.work_limit = adapter->tx_work_limit;
1117
1118         /* initialize ITR configuration */
1119         q_vector->itr_register = adapter->hw.hw_addr + E1000_EITR(0);
1120         q_vector->itr_val = IGB_START_ITR;
1121
1122         /* initialize pointer to rings */
1123         ring = q_vector->ring;
1124
1125         /* intialize ITR */
1126         if (rxr_count) {
1127                 /* rx or rx/tx vector */
1128                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1129                         q_vector->itr_val = adapter->rx_itr_setting;
1130         } else {
1131                 /* tx only vector */
1132                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1133                         q_vector->itr_val = adapter->tx_itr_setting;
1134         }
1135
1136         if (txr_count) {
1137                 /* assign generic ring traits */
1138                 ring->dev = &adapter->pdev->dev;
1139                 ring->netdev = adapter->netdev;
1140
1141                 /* configure backlink on ring */
1142                 ring->q_vector = q_vector;
1143
1144                 /* update q_vector Tx values */
1145                 igb_add_ring(ring, &q_vector->tx);
1146
1147                 /* For 82575, context index must be unique per ring. */
1148                 if (adapter->hw.mac.type == e1000_82575)
1149                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1150
1151                 /* apply Tx specific ring traits */
1152                 ring->count = adapter->tx_ring_count;
1153                 ring->queue_index = txr_idx;
1154
1155                 /* assign ring to adapter */
1156                 adapter->tx_ring[txr_idx] = ring;
1157
1158                 /* push pointer to next ring */
1159                 ring++;
1160         }
1161
1162         if (rxr_count) {
1163                 /* assign generic ring traits */
1164                 ring->dev = &adapter->pdev->dev;
1165                 ring->netdev = adapter->netdev;
1166
1167                 /* configure backlink on ring */
1168                 ring->q_vector = q_vector;
1169
1170                 /* update q_vector Rx values */
1171                 igb_add_ring(ring, &q_vector->rx);
1172
1173 #ifndef HAVE_NDO_SET_FEATURES
1174                 /* enable rx checksum */
1175                 set_bit(IGB_RING_FLAG_RX_CSUM, &ring->flags);
1176
1177 #endif
1178                 /* set flag indicating ring supports SCTP checksum offload */
1179                 if (adapter->hw.mac.type >= e1000_82576)
1180                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1181
1182                 if ((adapter->hw.mac.type == e1000_i350) ||
1183                     (adapter->hw.mac.type == e1000_i354))
1184                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1185
1186                 /* apply Rx specific ring traits */
1187                 ring->count = adapter->rx_ring_count;
1188                 ring->queue_index = rxr_idx;
1189
1190                 /* assign ring to adapter */
1191                 adapter->rx_ring[rxr_idx] = ring;
1192         }
1193
1194         return 0;
1195 }
1196
1197 /**
1198  * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1199  * @adapter: board private structure to initialize
1200  *
1201  * We allocate one q_vector per queue interrupt.  If allocation fails we
1202  * return -ENOMEM.
1203  **/
1204 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1205 {
1206         int q_vectors = adapter->num_q_vectors;
1207         int rxr_remaining = adapter->num_rx_queues;
1208         int txr_remaining = adapter->num_tx_queues;
1209         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1210         int err;
1211
1212         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1213                 for (; rxr_remaining; v_idx++) {
1214                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1215                                                  0, 0, 1, rxr_idx);
1216
1217                         if (err)
1218                                 goto err_out;
1219
1220                         /* update counts and index */
1221                         rxr_remaining--;
1222                         rxr_idx++;
1223                 }
1224         }
1225
1226         for (; v_idx < q_vectors; v_idx++) {
1227                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1228                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1229                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1230                                          tqpv, txr_idx, rqpv, rxr_idx);
1231
1232                 if (err)
1233                         goto err_out;
1234
1235                 /* update counts and index */
1236                 rxr_remaining -= rqpv;
1237                 txr_remaining -= tqpv;
1238                 rxr_idx++;
1239                 txr_idx++;
1240         }
1241
1242         return 0;
1243
1244 err_out:
1245         adapter->num_tx_queues = 0;
1246         adapter->num_rx_queues = 0;
1247         adapter->num_q_vectors = 0;
1248
1249         while (v_idx--)
1250                 igb_free_q_vector(adapter, v_idx);
1251
1252         return -ENOMEM;
1253 }
1254
1255 /**
1256  * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1257  *
1258  * This function initializes the interrupts and allocates all of the queues.
1259  **/
1260 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1261 {
1262         struct pci_dev *pdev = adapter->pdev;
1263         int err;
1264
1265         igb_set_interrupt_capability(adapter, msix);
1266
1267         err = igb_alloc_q_vectors(adapter);
1268         if (err) {
1269                 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for vectors\n");
1270                 goto err_alloc_q_vectors;
1271         }
1272
1273         igb_cache_ring_register(adapter);
1274
1275         return 0;
1276
1277 err_alloc_q_vectors:
1278         igb_reset_interrupt_capability(adapter);
1279         return err;
1280 }
1281
1282 /**
1283  * igb_request_irq - initialize interrupts
1284  *
1285  * Attempts to configure interrupts using the best available
1286  * capabilities of the hardware and kernel.
1287  **/
1288 static int igb_request_irq(struct igb_adapter *adapter)
1289 {
1290         struct net_device *netdev = adapter->netdev;
1291         struct pci_dev *pdev = adapter->pdev;
1292         int err = 0;
1293
1294         if (adapter->msix_entries) {
1295                 err = igb_request_msix(adapter);
1296                 if (!err)
1297                         goto request_done;
1298                 /* fall back to MSI */
1299                 igb_free_all_tx_resources(adapter);
1300                 igb_free_all_rx_resources(adapter);
1301
1302                 igb_clear_interrupt_scheme(adapter);
1303                 igb_reset_sriov_capability(adapter);
1304                 err = igb_init_interrupt_scheme(adapter, false);
1305                 if (err)
1306                         goto request_done;
1307                 igb_setup_all_tx_resources(adapter);
1308                 igb_setup_all_rx_resources(adapter);
1309                 igb_configure(adapter);
1310         }
1311
1312         igb_assign_vector(adapter->q_vector[0], 0);
1313
1314         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1315                 err = request_irq(pdev->irq, &igb_intr_msi, 0,
1316                                   netdev->name, adapter);
1317                 if (!err)
1318                         goto request_done;
1319
1320                 /* fall back to legacy interrupts */
1321                 igb_reset_interrupt_capability(adapter);
1322                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1323         }
1324
1325         err = request_irq(pdev->irq, &igb_intr, IRQF_SHARED,
1326                           netdev->name, adapter);
1327
1328         if (err)
1329                 dev_err(pci_dev_to_dev(pdev), "Error %d getting interrupt\n",
1330                         err);
1331
1332 request_done:
1333         return err;
1334 }
1335
1336 static void igb_free_irq(struct igb_adapter *adapter)
1337 {
1338         if (adapter->msix_entries) {
1339                 int vector = 0, i;
1340
1341                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1342
1343                 for (i = 0; i < adapter->num_q_vectors; i++)
1344                         free_irq(adapter->msix_entries[vector++].vector,
1345                                  adapter->q_vector[i]);
1346         } else {
1347                 free_irq(adapter->pdev->irq, adapter);
1348         }
1349 }
1350
1351 /**
1352  * igb_irq_disable - Mask off interrupt generation on the NIC
1353  * @adapter: board private structure
1354  **/
1355 static void igb_irq_disable(struct igb_adapter *adapter)
1356 {
1357         struct e1000_hw *hw = &adapter->hw;
1358
1359         /*
1360          * we need to be careful when disabling interrupts.  The VFs are also
1361          * mapped into these registers and so clearing the bits can cause
1362          * issues on the VF drivers so we only need to clear what we set
1363          */
1364         if (adapter->msix_entries) {
1365                 u32 regval = E1000_READ_REG(hw, E1000_EIAM);
1366                 E1000_WRITE_REG(hw, E1000_EIAM, regval & ~adapter->eims_enable_mask);
1367                 E1000_WRITE_REG(hw, E1000_EIMC, adapter->eims_enable_mask);
1368                 regval = E1000_READ_REG(hw, E1000_EIAC);
1369                 E1000_WRITE_REG(hw, E1000_EIAC, regval & ~adapter->eims_enable_mask);
1370         }
1371
1372         E1000_WRITE_REG(hw, E1000_IAM, 0);
1373         E1000_WRITE_REG(hw, E1000_IMC, ~0);
1374         E1000_WRITE_FLUSH(hw);
1375
1376         if (adapter->msix_entries) {
1377                 int vector = 0, i;
1378
1379                 synchronize_irq(adapter->msix_entries[vector++].vector);
1380
1381                 for (i = 0; i < adapter->num_q_vectors; i++)
1382                         synchronize_irq(adapter->msix_entries[vector++].vector);
1383         } else {
1384                 synchronize_irq(adapter->pdev->irq);
1385         }
1386 }
1387
1388 /**
1389  * igb_irq_enable - Enable default interrupt generation settings
1390  * @adapter: board private structure
1391  **/
1392 static void igb_irq_enable(struct igb_adapter *adapter)
1393 {
1394         struct e1000_hw *hw = &adapter->hw;
1395
1396         if (adapter->msix_entries) {
1397                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1398                 u32 regval = E1000_READ_REG(hw, E1000_EIAC);
1399                 E1000_WRITE_REG(hw, E1000_EIAC, regval | adapter->eims_enable_mask);
1400                 regval = E1000_READ_REG(hw, E1000_EIAM);
1401                 E1000_WRITE_REG(hw, E1000_EIAM, regval | adapter->eims_enable_mask);
1402                 E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_enable_mask);
1403                 if (adapter->vfs_allocated_count) {
1404                         E1000_WRITE_REG(hw, E1000_MBVFIMR, 0xFF);
1405                         ims |= E1000_IMS_VMMB;
1406                         if (adapter->mdd)
1407                                 if ((adapter->hw.mac.type == e1000_i350) ||
1408                                     (adapter->hw.mac.type == e1000_i354))
1409                                 ims |= E1000_IMS_MDDET;
1410                 }
1411                 E1000_WRITE_REG(hw, E1000_IMS, ims);
1412         } else {
1413                 E1000_WRITE_REG(hw, E1000_IMS, IMS_ENABLE_MASK |
1414                                 E1000_IMS_DRSTA);
1415                 E1000_WRITE_REG(hw, E1000_IAM, IMS_ENABLE_MASK |
1416                                 E1000_IMS_DRSTA);
1417         }
1418 }
1419
1420 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1421 {
1422         struct e1000_hw *hw = &adapter->hw;
1423         u16 vid = adapter->hw.mng_cookie.vlan_id;
1424         u16 old_vid = adapter->mng_vlan_id;
1425
1426         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1427                 /* add VID to filter table */
1428                 igb_vfta_set(adapter, vid, TRUE);
1429                 adapter->mng_vlan_id = vid;
1430         } else {
1431                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1432         }
1433
1434         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1435             (vid != old_vid) &&
1436 #ifdef HAVE_VLAN_RX_REGISTER
1437             !vlan_group_get_device(adapter->vlgrp, old_vid)) {
1438 #else
1439             !test_bit(old_vid, adapter->active_vlans)) {
1440 #endif
1441                 /* remove VID from filter table */
1442                 igb_vfta_set(adapter, old_vid, FALSE);
1443         }
1444 }
1445
1446 /**
1447  * igb_release_hw_control - release control of the h/w to f/w
1448  * @adapter: address of board private structure
1449  *
1450  * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1451  * For ASF and Pass Through versions of f/w this means that the
1452  * driver is no longer loaded.
1453  *
1454  **/
1455 static void igb_release_hw_control(struct igb_adapter *adapter)
1456 {
1457         struct e1000_hw *hw = &adapter->hw;
1458         u32 ctrl_ext;
1459
1460         /* Let firmware take over control of h/w */
1461         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1462         E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1463                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1464 }
1465
1466 /**
1467  * igb_get_hw_control - get control of the h/w from f/w
1468  * @adapter: address of board private structure
1469  *
1470  * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1471  * For ASF and Pass Through versions of f/w this means that
1472  * the driver is loaded.
1473  *
1474  **/
1475 static void igb_get_hw_control(struct igb_adapter *adapter)
1476 {
1477         struct e1000_hw *hw = &adapter->hw;
1478         u32 ctrl_ext;
1479
1480         /* Let firmware know the driver has taken over */
1481         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1482         E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1483                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1484 }
1485
1486 /**
1487  * igb_configure - configure the hardware for RX and TX
1488  * @adapter: private board structure
1489  **/
1490 static void igb_configure(struct igb_adapter *adapter)
1491 {
1492         struct net_device *netdev = adapter->netdev;
1493         int i;
1494
1495         igb_get_hw_control(adapter);
1496         igb_set_rx_mode(netdev);
1497
1498         igb_restore_vlan(adapter);
1499
1500         igb_setup_tctl(adapter);
1501         igb_setup_mrqc(adapter);
1502         igb_setup_rctl(adapter);
1503
1504         igb_configure_tx(adapter);
1505         igb_configure_rx(adapter);
1506
1507         e1000_rx_fifo_flush_82575(&adapter->hw);
1508 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1509         if (adapter->num_tx_queues > 1)
1510                 netdev->features |= NETIF_F_MULTI_QUEUE;
1511         else
1512                 netdev->features &= ~NETIF_F_MULTI_QUEUE;
1513 #endif
1514
1515         /* call igb_desc_unused which always leaves
1516          * at least 1 descriptor unused to make sure
1517          * next_to_use != next_to_clean */
1518         for (i = 0; i < adapter->num_rx_queues; i++) {
1519                 struct igb_ring *ring = adapter->rx_ring[i];
1520                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1521         }
1522 }
1523
1524 /**
1525  * igb_power_up_link - Power up the phy/serdes link
1526  * @adapter: address of board private structure
1527  **/
1528 void igb_power_up_link(struct igb_adapter *adapter)
1529 {
1530         e1000_phy_hw_reset(&adapter->hw);
1531
1532         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1533                 e1000_power_up_phy(&adapter->hw);
1534         else
1535                 e1000_power_up_fiber_serdes_link(&adapter->hw);
1536 }
1537
1538 /**
1539  * igb_power_down_link - Power down the phy/serdes link
1540  * @adapter: address of board private structure
1541  */
1542 static void igb_power_down_link(struct igb_adapter *adapter)
1543 {
1544         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1545                 e1000_power_down_phy(&adapter->hw);
1546         else
1547                 e1000_shutdown_fiber_serdes_link(&adapter->hw);
1548 }
1549
1550 /* Detect and switch function for Media Auto Sense */
1551 static void igb_check_swap_media(struct igb_adapter *adapter)
1552 {
1553         struct e1000_hw *hw = &adapter->hw;
1554         u32 ctrl_ext, connsw;
1555         bool swap_now = false;
1556         bool link;
1557
1558         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1559         connsw = E1000_READ_REG(hw, E1000_CONNSW);
1560         link = igb_has_link(adapter);
1561
1562         /* need to live swap if current media is copper and we have fiber/serdes
1563          * to go to.
1564          */
1565
1566         if ((hw->phy.media_type == e1000_media_type_copper) &&
1567             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1568                 swap_now = true;
1569         } else if (!(connsw & E1000_CONNSW_SERDESD)) {
1570                 /* copper signal takes time to appear */
1571                 if (adapter->copper_tries < 2) {
1572                         adapter->copper_tries++;
1573                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1574                         E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1575                         return;
1576                 } else {
1577                         adapter->copper_tries = 0;
1578                         if ((connsw & E1000_CONNSW_PHYSD) &&
1579                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
1580                                 swap_now = true;
1581                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1582                                 E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1583                         }
1584                 }
1585         }
1586
1587         if (swap_now) {
1588                 switch (hw->phy.media_type) {
1589                 case e1000_media_type_copper:
1590                         dev_info(pci_dev_to_dev(adapter->pdev),
1591                                  "%s:MAS: changing media to fiber/serdes\n",
1592                         adapter->netdev->name);
1593                         ctrl_ext |=
1594                                 E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1595                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
1596                         adapter->copper_tries = 0;
1597                         break;
1598                 case e1000_media_type_internal_serdes:
1599                 case e1000_media_type_fiber:
1600                         dev_info(pci_dev_to_dev(adapter->pdev),
1601                                  "%s:MAS: changing media to copper\n",
1602                                  adapter->netdev->name);
1603                         ctrl_ext &=
1604                                 ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1605                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
1606                         break;
1607                 default:
1608                         /* shouldn't get here during regular operation */
1609                         dev_err(pci_dev_to_dev(adapter->pdev),
1610                                 "%s:AMS: Invalid media type found, returning\n",
1611                                 adapter->netdev->name);
1612                         break;
1613                 }
1614                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
1615         }
1616 }
1617
1618 #ifdef HAVE_I2C_SUPPORT
1619 /*  igb_get_i2c_data - Reads the I2C SDA data bit
1620  *  @hw: pointer to hardware structure
1621  *  @i2cctl: Current value of I2CCTL register
1622  *
1623  *  Returns the I2C data bit value
1624  */
1625 static int igb_get_i2c_data(void *data)
1626 {
1627         struct igb_adapter *adapter = (struct igb_adapter *)data;
1628         struct e1000_hw *hw = &adapter->hw;
1629         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1630
1631         return ((i2cctl & E1000_I2C_DATA_IN) != 0);
1632 }
1633
1634 /* igb_set_i2c_data - Sets the I2C data bit
1635  *  @data: pointer to hardware structure
1636  *  @state: I2C data value (0 or 1) to set
1637  *
1638  *  Sets the I2C data bit
1639  */
1640 static void igb_set_i2c_data(void *data, int state)
1641 {
1642         struct igb_adapter *adapter = (struct igb_adapter *)data;
1643         struct e1000_hw *hw = &adapter->hw;
1644         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1645
1646         if (state)
1647                 i2cctl |= E1000_I2C_DATA_OUT;
1648         else
1649                 i2cctl &= ~E1000_I2C_DATA_OUT;
1650
1651         i2cctl &= ~E1000_I2C_DATA_OE_N;
1652         i2cctl |= E1000_I2C_CLK_OE_N;
1653
1654         E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1655         E1000_WRITE_FLUSH(hw);
1656
1657 }
1658
1659 /* igb_set_i2c_clk - Sets the I2C SCL clock
1660  *  @data: pointer to hardware structure
1661  *  @state: state to set clock
1662  *
1663  *  Sets the I2C clock line to state
1664  */
1665 static void igb_set_i2c_clk(void *data, int state)
1666 {
1667         struct igb_adapter *adapter = (struct igb_adapter *)data;
1668         struct e1000_hw *hw = &adapter->hw;
1669         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1670
1671         if (state) {
1672                 i2cctl |= E1000_I2C_CLK_OUT;
1673                 i2cctl &= ~E1000_I2C_CLK_OE_N;
1674         } else {
1675                 i2cctl &= ~E1000_I2C_CLK_OUT;
1676                 i2cctl &= ~E1000_I2C_CLK_OE_N;
1677         }
1678         E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1679         E1000_WRITE_FLUSH(hw);
1680 }
1681
1682 /* igb_get_i2c_clk - Gets the I2C SCL clock state
1683  *  @data: pointer to hardware structure
1684  *
1685  *  Gets the I2C clock state
1686  */
1687 static int igb_get_i2c_clk(void *data)
1688 {
1689         struct igb_adapter *adapter = (struct igb_adapter *)data;
1690         struct e1000_hw *hw = &adapter->hw;
1691         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1692
1693         return ((i2cctl & E1000_I2C_CLK_IN) != 0);
1694 }
1695
1696 static const struct i2c_algo_bit_data igb_i2c_algo = {
1697         .setsda         = igb_set_i2c_data,
1698         .setscl         = igb_set_i2c_clk,
1699         .getsda         = igb_get_i2c_data,
1700         .getscl         = igb_get_i2c_clk,
1701         .udelay         = 5,
1702         .timeout        = 20,
1703 };
1704
1705 /*  igb_init_i2c - Init I2C interface
1706  *  @adapter: pointer to adapter structure
1707  *
1708  */
1709 static s32 igb_init_i2c(struct igb_adapter *adapter)
1710 {
1711         s32 status = E1000_SUCCESS;
1712
1713         /* I2C interface supported on i350 devices */
1714         if (adapter->hw.mac.type != e1000_i350)
1715                 return E1000_SUCCESS;
1716
1717         /* Initialize the i2c bus which is controlled by the registers.
1718          * This bus will use the i2c_algo_bit structue that implements
1719          * the protocol through toggling of the 4 bits in the register.
1720          */
1721         adapter->i2c_adap.owner = THIS_MODULE;
1722         adapter->i2c_algo = igb_i2c_algo;
1723         adapter->i2c_algo.data = adapter;
1724         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
1725         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
1726         strlcpy(adapter->i2c_adap.name, "igb BB",
1727                 sizeof(adapter->i2c_adap.name));
1728         status = i2c_bit_add_bus(&adapter->i2c_adap);
1729         return status;
1730 }
1731
1732 #endif /* HAVE_I2C_SUPPORT */
1733 /**
1734  * igb_up - Open the interface and prepare it to handle traffic
1735  * @adapter: board private structure
1736  **/
1737 int igb_up(struct igb_adapter *adapter)
1738 {
1739         struct e1000_hw *hw = &adapter->hw;
1740         int i;
1741
1742         /* hardware has been reset, we need to reload some things */
1743         igb_configure(adapter);
1744
1745         clear_bit(__IGB_DOWN, &adapter->state);
1746
1747         for (i = 0; i < adapter->num_q_vectors; i++)
1748                 napi_enable(&(adapter->q_vector[i]->napi));
1749
1750         if (adapter->msix_entries)
1751                 igb_configure_msix(adapter);
1752         else
1753                 igb_assign_vector(adapter->q_vector[0], 0);
1754
1755         igb_configure_lli(adapter);
1756
1757         /* Clear any pending interrupts. */
1758         E1000_READ_REG(hw, E1000_ICR);
1759         igb_irq_enable(adapter);
1760
1761         /* notify VFs that reset has been completed */
1762         if (adapter->vfs_allocated_count) {
1763                 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
1764                 reg_data |= E1000_CTRL_EXT_PFRSTD;
1765                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
1766         }
1767
1768         netif_tx_start_all_queues(adapter->netdev);
1769
1770         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1771                 schedule_work(&adapter->dma_err_task);
1772         /* start the watchdog. */
1773         hw->mac.get_link_status = 1;
1774         schedule_work(&adapter->watchdog_task);
1775
1776         if ((adapter->flags & IGB_FLAG_EEE) &&
1777             (!hw->dev_spec._82575.eee_disable))
1778                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
1779
1780         return 0;
1781 }
1782
1783 void igb_down(struct igb_adapter *adapter)
1784 {
1785         struct net_device *netdev = adapter->netdev;
1786         struct e1000_hw *hw = &adapter->hw;
1787         u32 tctl, rctl;
1788         int i;
1789
1790         /* signal that we're down so the interrupt handler does not
1791          * reschedule our watchdog timer */
1792         set_bit(__IGB_DOWN, &adapter->state);
1793
1794         /* disable receives in the hardware */
1795         rctl = E1000_READ_REG(hw, E1000_RCTL);
1796         E1000_WRITE_REG(hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
1797         /* flush and sleep below */
1798
1799         netif_tx_stop_all_queues(netdev);
1800
1801         /* disable transmits in the hardware */
1802         tctl = E1000_READ_REG(hw, E1000_TCTL);
1803         tctl &= ~E1000_TCTL_EN;
1804         E1000_WRITE_REG(hw, E1000_TCTL, tctl);
1805         /* flush both disables and wait for them to finish */
1806         E1000_WRITE_FLUSH(hw);
1807         usleep_range(10000, 20000);
1808
1809         for (i = 0; i < adapter->num_q_vectors; i++)
1810                 napi_disable(&(adapter->q_vector[i]->napi));
1811
1812         igb_irq_disable(adapter);
1813
1814         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1815
1816         del_timer_sync(&adapter->watchdog_timer);
1817         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1818                 del_timer_sync(&adapter->dma_err_timer);
1819         del_timer_sync(&adapter->phy_info_timer);
1820
1821         netif_carrier_off(netdev);
1822
1823         /* record the stats before reset*/
1824         igb_update_stats(adapter);
1825
1826         adapter->link_speed = 0;
1827         adapter->link_duplex = 0;
1828
1829 #ifdef HAVE_PCI_ERS
1830         if (!pci_channel_offline(adapter->pdev))
1831                 igb_reset(adapter);
1832 #else
1833         igb_reset(adapter);
1834 #endif
1835         igb_clean_all_tx_rings(adapter);
1836         igb_clean_all_rx_rings(adapter);
1837 #ifdef IGB_DCA
1838         /* since we reset the hardware DCA settings were cleared */
1839         igb_setup_dca(adapter);
1840 #endif
1841 }
1842
1843 void igb_reinit_locked(struct igb_adapter *adapter)
1844 {
1845         WARN_ON(in_interrupt());
1846         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1847                 usleep_range(1000, 2000);
1848         igb_down(adapter);
1849         igb_up(adapter);
1850         clear_bit(__IGB_RESETTING, &adapter->state);
1851 }
1852
1853 /**
1854  * igb_enable_mas - Media Autosense re-enable after swap
1855  *
1856  * @adapter: adapter struct
1857  **/
1858 static s32  igb_enable_mas(struct igb_adapter *adapter)
1859 {
1860         struct e1000_hw *hw = &adapter->hw;
1861         u32 connsw;
1862         s32 ret_val = E1000_SUCCESS;
1863
1864         connsw = E1000_READ_REG(hw, E1000_CONNSW);
1865         if (hw->phy.media_type == e1000_media_type_copper) {
1866                 /* configure for SerDes media detect */
1867                 if (!(connsw & E1000_CONNSW_SERDESD)) {
1868                         connsw |= E1000_CONNSW_ENRGSRC;
1869                         connsw |= E1000_CONNSW_AUTOSENSE_EN;
1870                         E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1871                         E1000_WRITE_FLUSH(hw);
1872                 } else if (connsw & E1000_CONNSW_SERDESD) {
1873                         /* already SerDes, no need to enable anything */
1874                         return ret_val;
1875                 } else {
1876                         dev_info(pci_dev_to_dev(adapter->pdev),
1877                         "%s:MAS: Unable to configure feature, disabling..\n",
1878                         adapter->netdev->name);
1879                         adapter->flags &= ~IGB_FLAG_MAS_ENABLE;
1880                 }
1881         }
1882         return ret_val;
1883 }
1884
1885 void igb_reset(struct igb_adapter *adapter)
1886 {
1887         struct pci_dev *pdev = adapter->pdev;
1888         struct e1000_hw *hw = &adapter->hw;
1889         struct e1000_mac_info *mac = &hw->mac;
1890         struct e1000_fc_info *fc = &hw->fc;
1891         u32 pba = 0, tx_space, min_tx_space, min_rx_space, hwm;
1892
1893         /* Repartition Pba for greater than 9k mtu
1894          * To take effect CTRL.RST is required.
1895          */
1896         switch (mac->type) {
1897         case e1000_i350:
1898         case e1000_82580:
1899         case e1000_i354:
1900                 pba = E1000_READ_REG(hw, E1000_RXPBS);
1901                 pba = e1000_rxpbs_adjust_82580(pba);
1902                 break;
1903         case e1000_82576:
1904                 pba = E1000_READ_REG(hw, E1000_RXPBS);
1905                 pba &= E1000_RXPBS_SIZE_MASK_82576;
1906                 break;
1907         case e1000_82575:
1908         case e1000_i210:
1909         case e1000_i211:
1910         default:
1911                 pba = E1000_PBA_34K;
1912                 break;
1913         }
1914
1915         if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1916             (mac->type < e1000_82576)) {
1917                 /* adjust PBA for jumbo frames */
1918                 E1000_WRITE_REG(hw, E1000_PBA, pba);
1919
1920                 /* To maintain wire speed transmits, the Tx FIFO should be
1921                  * large enough to accommodate two full transmit packets,
1922                  * rounded up to the next 1KB and expressed in KB.  Likewise,
1923                  * the Rx FIFO should be large enough to accommodate at least
1924                  * one full receive packet and is similarly rounded up and
1925                  * expressed in KB. */
1926                 pba = E1000_READ_REG(hw, E1000_PBA);
1927                 /* upper 16 bits has Tx packet buffer allocation size in KB */
1928                 tx_space = pba >> 16;
1929                 /* lower 16 bits has Rx packet buffer allocation size in KB */
1930                 pba &= 0xffff;
1931                 /* the tx fifo also stores 16 bytes of information about the tx
1932                  * but don't include ethernet FCS because hardware appends it */
1933                 min_tx_space = (adapter->max_frame_size +
1934                                 sizeof(union e1000_adv_tx_desc) -
1935                                 ETH_FCS_LEN) * 2;
1936                 min_tx_space = ALIGN(min_tx_space, 1024);
1937                 min_tx_space >>= 10;
1938                 /* software strips receive CRC, so leave room for it */
1939                 min_rx_space = adapter->max_frame_size;
1940                 min_rx_space = ALIGN(min_rx_space, 1024);
1941                 min_rx_space >>= 10;
1942
1943                 /* If current Tx allocation is less than the min Tx FIFO size,
1944                  * and the min Tx FIFO size is less than the current Rx FIFO
1945                  * allocation, take space away from current Rx allocation */
1946                 if (tx_space < min_tx_space &&
1947                     ((min_tx_space - tx_space) < pba)) {
1948                         pba = pba - (min_tx_space - tx_space);
1949
1950                         /* if short on rx space, rx wins and must trump tx
1951                          * adjustment */
1952                         if (pba < min_rx_space)
1953                                 pba = min_rx_space;
1954                 }
1955                 E1000_WRITE_REG(hw, E1000_PBA, pba);
1956         }
1957
1958         /* flow control settings */
1959         /* The high water mark must be low enough to fit one full frame
1960          * (or the size used for early receive) above it in the Rx FIFO.
1961          * Set it to the lower of:
1962          * - 90% of the Rx FIFO size, or
1963          * - the full Rx FIFO size minus one full frame */
1964         hwm = min(((pba << 10) * 9 / 10),
1965                         ((pba << 10) - 2 * adapter->max_frame_size));
1966
1967         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
1968         fc->low_water = fc->high_water - 16;
1969         fc->pause_time = 0xFFFF;
1970         fc->send_xon = 1;
1971         fc->current_mode = fc->requested_mode;
1972
1973         /* disable receive for all VFs and wait one second */
1974         if (adapter->vfs_allocated_count) {
1975                 int i;
1976                 /*
1977                  * Clear all flags except indication that the PF has set
1978                  * the VF MAC addresses administratively
1979                  */
1980                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1981                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1982
1983                 /* ping all the active vfs to let them know we are going down */
1984                 igb_ping_all_vfs(adapter);
1985
1986                 /* disable transmits and receives */
1987                 E1000_WRITE_REG(hw, E1000_VFRE, 0);
1988                 E1000_WRITE_REG(hw, E1000_VFTE, 0);
1989         }
1990
1991         /* Allow time for pending master requests to run */
1992         e1000_reset_hw(hw);
1993         E1000_WRITE_REG(hw, E1000_WUC, 0);
1994
1995         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
1996                 e1000_setup_init_funcs(hw, TRUE);
1997                 igb_check_options(adapter);
1998                 e1000_get_bus_info(hw);
1999                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
2000         }
2001         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
2002                 if (igb_enable_mas(adapter))
2003                         dev_err(pci_dev_to_dev(pdev),
2004                                 "Error enabling Media Auto Sense\n");
2005         }
2006         if (e1000_init_hw(hw))
2007                 dev_err(pci_dev_to_dev(pdev), "Hardware Error\n");
2008
2009         /*
2010          * Flow control settings reset on hardware reset, so guarantee flow
2011          * control is off when forcing speed.
2012          */
2013         if (!hw->mac.autoneg)
2014                 e1000_force_mac_fc(hw);
2015
2016         igb_init_dmac(adapter, pba);
2017         /* Re-initialize the thermal sensor on i350 devices. */
2018         if (mac->type == e1000_i350 && hw->bus.func == 0) {
2019                 /*
2020                  * If present, re-initialize the external thermal sensor
2021                  * interface.
2022                  */
2023                 if (adapter->ets)
2024                         e1000_set_i2c_bb(hw);
2025                 e1000_init_thermal_sensor_thresh(hw);
2026         }
2027
2028         /*Re-establish EEE setting */
2029         if (hw->phy.media_type == e1000_media_type_copper) {
2030                 switch (mac->type) {
2031                 case e1000_i350:
2032                 case e1000_i210:
2033                 case e1000_i211:
2034                         e1000_set_eee_i350(hw);
2035                         break;
2036                 case e1000_i354:
2037                         e1000_set_eee_i354(hw);
2038                         break;
2039                 default:
2040                         break;
2041                 }
2042         }
2043
2044         if (!netif_running(adapter->netdev))
2045                 igb_power_down_link(adapter);
2046
2047         igb_update_mng_vlan(adapter);
2048
2049         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2050         E1000_WRITE_REG(hw, E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2051
2052
2053 #ifdef HAVE_PTP_1588_CLOCK
2054         /* Re-enable PTP, where applicable. */
2055         igb_ptp_reset(adapter);
2056 #endif /* HAVE_PTP_1588_CLOCK */
2057
2058         e1000_get_phy_info(hw);
2059
2060         adapter->devrc++;
2061 }
2062
2063 #ifdef HAVE_NDO_SET_FEATURES
2064 static kni_netdev_features_t igb_fix_features(struct net_device *netdev,
2065                                               kni_netdev_features_t features)
2066 {
2067         /*
2068          * Since there is no support for separate tx vlan accel
2069          * enabled make sure tx flag is cleared if rx is.
2070          */
2071 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2072         if (!(features & NETIF_F_HW_VLAN_CTAG_RX))
2073                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2074 #else
2075         if (!(features & NETIF_F_HW_VLAN_RX))
2076                 features &= ~NETIF_F_HW_VLAN_TX;
2077 #endif
2078
2079         /* If Rx checksum is disabled, then LRO should also be disabled */
2080         if (!(features & NETIF_F_RXCSUM))
2081                 features &= ~NETIF_F_LRO;
2082
2083         return features;
2084 }
2085
2086 static int igb_set_features(struct net_device *netdev,
2087                             kni_netdev_features_t features)
2088 {
2089         u32 changed = netdev->features ^ features;
2090
2091 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2092         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2093 #else
2094         if (changed & NETIF_F_HW_VLAN_RX)
2095 #endif
2096                 igb_vlan_mode(netdev, features);
2097
2098         return 0;
2099 }
2100
2101 #ifdef NTF_SELF
2102 #ifdef USE_CONST_DEV_UC_CHAR
2103 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2104                            struct net_device *dev,
2105                            const unsigned char *addr,
2106 #ifdef HAVE_NDO_FDB_ADD_VID
2107                            u16 vid,
2108 #endif
2109                            u16 flags)
2110 #else
2111 static int igb_ndo_fdb_add(struct ndmsg *ndm,
2112                            struct net_device *dev,
2113                            unsigned char *addr,
2114                            u16 flags)
2115 #endif
2116 {
2117         struct igb_adapter *adapter = netdev_priv(dev);
2118         struct e1000_hw *hw = &adapter->hw;
2119         int err;
2120
2121         if (!(adapter->vfs_allocated_count))
2122                 return -EOPNOTSUPP;
2123
2124         /* Hardware does not support aging addresses so if a
2125          * ndm_state is given only allow permanent addresses
2126          */
2127         if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
2128                 pr_info("%s: FDB only supports static addresses\n",
2129                         igb_driver_name);
2130                 return -EINVAL;
2131         }
2132
2133         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2134                 u32 rar_uc_entries = hw->mac.rar_entry_count -
2135                                         (adapter->vfs_allocated_count + 1);
2136
2137                 if (netdev_uc_count(dev) < rar_uc_entries)
2138                         err = dev_uc_add_excl(dev, addr);
2139                 else
2140                         err = -ENOMEM;
2141         } else if (is_multicast_ether_addr(addr)) {
2142                 err = dev_mc_add_excl(dev, addr);
2143         } else {
2144                 err = -EINVAL;
2145         }
2146
2147         /* Only return duplicate errors if NLM_F_EXCL is set */
2148         if (err == -EEXIST && !(flags & NLM_F_EXCL))
2149                 err = 0;
2150
2151         return err;
2152 }
2153
2154 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2155 #ifdef USE_CONST_DEV_UC_CHAR
2156 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2157                            struct net_device *dev,
2158                            const unsigned char *addr)
2159 #else
2160 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2161                            struct net_device *dev,
2162                            unsigned char *addr)
2163 #endif
2164 {
2165         struct igb_adapter *adapter = netdev_priv(dev);
2166         int err = -EOPNOTSUPP;
2167
2168         if (ndm->ndm_state & NUD_PERMANENT) {
2169                 pr_info("%s: FDB only supports static addresses\n",
2170                         igb_driver_name);
2171                 return -EINVAL;
2172         }
2173
2174         if (adapter->vfs_allocated_count) {
2175                 if (is_unicast_ether_addr(addr))
2176                         err = dev_uc_del(dev, addr);
2177                 else if (is_multicast_ether_addr(addr))
2178                         err = dev_mc_del(dev, addr);
2179                 else
2180                         err = -EINVAL;
2181         }
2182
2183         return err;
2184 }
2185
2186 static int igb_ndo_fdb_dump(struct sk_buff *skb,
2187                             struct netlink_callback *cb,
2188                             struct net_device *dev,
2189                             int idx)
2190 {
2191         struct igb_adapter *adapter = netdev_priv(dev);
2192
2193         if (adapter->vfs_allocated_count)
2194                 idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
2195
2196         return idx;
2197 }
2198 #endif /* USE_DEFAULT_FDB_DEL_DUMP */
2199
2200 #ifdef HAVE_BRIDGE_ATTRIBS
2201 static int igb_ndo_bridge_setlink(struct net_device *dev,
2202                                   struct nlmsghdr *nlh)
2203 {
2204         struct igb_adapter *adapter = netdev_priv(dev);
2205         struct e1000_hw *hw = &adapter->hw;
2206         struct nlattr *attr, *br_spec;
2207         int rem;
2208
2209         if (!(adapter->vfs_allocated_count))
2210                 return -EOPNOTSUPP;
2211
2212         switch (adapter->hw.mac.type) {
2213         case e1000_82576:
2214         case e1000_i350:
2215         case e1000_i354:
2216                 break;
2217         default:
2218                 return -EOPNOTSUPP;
2219         }
2220
2221         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
2222
2223         nla_for_each_nested(attr, br_spec, rem) {
2224                 __u16 mode;
2225
2226                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
2227                         continue;
2228
2229                 mode = nla_get_u16(attr);
2230                 if (mode == BRIDGE_MODE_VEPA) {
2231                         e1000_vmdq_set_loopback_pf(hw, 0);
2232                         adapter->flags &= ~IGB_FLAG_LOOPBACK_ENABLE;
2233                 } else if (mode == BRIDGE_MODE_VEB) {
2234                         e1000_vmdq_set_loopback_pf(hw, 1);
2235                         adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
2236                 } else
2237                         return -EINVAL;
2238
2239                 netdev_info(adapter->netdev, "enabling bridge mode: %s\n",
2240                             mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
2241         }
2242
2243         return 0;
2244 }
2245
2246 #ifdef HAVE_BRIDGE_FILTER
2247 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2248                                   struct net_device *dev, u32 filter_mask)
2249 #else
2250 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2251                                   struct net_device *dev)
2252 #endif
2253 {
2254         struct igb_adapter *adapter = netdev_priv(dev);
2255         u16 mode;
2256
2257         if (!(adapter->vfs_allocated_count))
2258                 return -EOPNOTSUPP;
2259
2260         if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE)
2261                 mode = BRIDGE_MODE_VEB;
2262         else
2263                 mode = BRIDGE_MODE_VEPA;
2264
2265 #ifdef HAVE_NDO_FDB_ADD_VID
2266         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0);
2267 #else
2268         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode);
2269 #endif /* HAVE_NDO_FDB_ADD_VID */
2270 }
2271 #endif /* HAVE_BRIDGE_ATTRIBS */
2272 #endif /* NTF_SELF */
2273
2274 #endif /* HAVE_NDO_SET_FEATURES */
2275 #ifdef HAVE_NET_DEVICE_OPS
2276 static const struct net_device_ops igb_netdev_ops = {
2277         .ndo_open               = igb_open,
2278         .ndo_stop               = igb_close,
2279         .ndo_start_xmit         = igb_xmit_frame,
2280         .ndo_get_stats          = igb_get_stats,
2281         .ndo_set_rx_mode        = igb_set_rx_mode,
2282         .ndo_set_mac_address    = igb_set_mac,
2283         .ndo_change_mtu         = igb_change_mtu,
2284         .ndo_do_ioctl           = igb_ioctl,
2285         .ndo_tx_timeout         = igb_tx_timeout,
2286         .ndo_validate_addr      = eth_validate_addr,
2287         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2288         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2289 #ifdef IFLA_VF_MAX
2290         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
2291         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
2292 #ifdef HAVE_VF_MIN_MAX_TXRATE
2293         .ndo_set_vf_rate        = igb_ndo_set_vf_bw,
2294 #else /* HAVE_VF_MIN_MAX_TXRATE */
2295         .ndo_set_vf_tx_rate     = igb_ndo_set_vf_bw,
2296 #endif /* HAVE_VF_MIN_MAX_TXRATE */
2297         .ndo_get_vf_config      = igb_ndo_get_vf_config,
2298 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
2299         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
2300 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
2301 #endif /* IFLA_VF_MAX */
2302 #ifdef CONFIG_NET_POLL_CONTROLLER
2303         .ndo_poll_controller    = igb_netpoll,
2304 #endif
2305 #ifdef HAVE_NDO_SET_FEATURES
2306         .ndo_fix_features       = igb_fix_features,
2307         .ndo_set_features       = igb_set_features,
2308 #endif
2309 #ifdef HAVE_VLAN_RX_REGISTER
2310         .ndo_vlan_rx_register   = igb_vlan_mode,
2311 #endif
2312 #ifndef HAVE_RHEL6_NETDEV_OPS_EXT_FDB
2313 #ifdef NTF_SELF
2314         .ndo_fdb_add            = igb_ndo_fdb_add,
2315 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2316         .ndo_fdb_del            = igb_ndo_fdb_del,
2317         .ndo_fdb_dump           = igb_ndo_fdb_dump,
2318 #endif
2319 #endif /* ! HAVE_RHEL6_NETDEV_OPS_EXT_FDB */
2320 #ifdef HAVE_BRIDGE_ATTRIBS
2321         .ndo_bridge_setlink     = igb_ndo_bridge_setlink,
2322         .ndo_bridge_getlink     = igb_ndo_bridge_getlink,
2323 #endif /* HAVE_BRIDGE_ATTRIBS */
2324 #endif
2325 };
2326
2327 #ifdef CONFIG_IGB_VMDQ_NETDEV
2328 static const struct net_device_ops igb_vmdq_ops = {
2329         .ndo_open               = &igb_vmdq_open,
2330         .ndo_stop               = &igb_vmdq_close,
2331         .ndo_start_xmit         = &igb_vmdq_xmit_frame,
2332         .ndo_get_stats          = &igb_vmdq_get_stats,
2333         .ndo_set_rx_mode        = &igb_vmdq_set_rx_mode,
2334         .ndo_validate_addr      = eth_validate_addr,
2335         .ndo_set_mac_address    = &igb_vmdq_set_mac,
2336         .ndo_change_mtu         = &igb_vmdq_change_mtu,
2337         .ndo_tx_timeout         = &igb_vmdq_tx_timeout,
2338         .ndo_vlan_rx_register   = &igb_vmdq_vlan_rx_register,
2339         .ndo_vlan_rx_add_vid    = &igb_vmdq_vlan_rx_add_vid,
2340         .ndo_vlan_rx_kill_vid   = &igb_vmdq_vlan_rx_kill_vid,
2341 };
2342
2343 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2344 #endif /* HAVE_NET_DEVICE_OPS */
2345 #ifdef CONFIG_IGB_VMDQ_NETDEV
2346 void igb_assign_vmdq_netdev_ops(struct net_device *vnetdev)
2347 {
2348 #ifdef HAVE_NET_DEVICE_OPS
2349         vnetdev->netdev_ops = &igb_vmdq_ops;
2350 #else
2351         dev->open = &igb_vmdq_open;
2352         dev->stop = &igb_vmdq_close;
2353         dev->hard_start_xmit = &igb_vmdq_xmit_frame;
2354         dev->get_stats = &igb_vmdq_get_stats;
2355 #ifdef HAVE_SET_RX_MODE
2356         dev->set_rx_mode = &igb_vmdq_set_rx_mode;
2357 #endif
2358         dev->set_multicast_list = &igb_vmdq_set_rx_mode;
2359         dev->set_mac_address = &igb_vmdq_set_mac;
2360         dev->change_mtu = &igb_vmdq_change_mtu;
2361 #ifdef HAVE_TX_TIMEOUT
2362         dev->tx_timeout = &igb_vmdq_tx_timeout;
2363 #endif
2364 #if defined(NETIF_F_HW_VLAN_TX) || defined(NETIF_F_HW_VLAN_CTAG_TX)
2365         dev->vlan_rx_register = &igb_vmdq_vlan_rx_register;
2366         dev->vlan_rx_add_vid = &igb_vmdq_vlan_rx_add_vid;
2367         dev->vlan_rx_kill_vid = &igb_vmdq_vlan_rx_kill_vid;
2368 #endif
2369 #endif
2370         igb_vmdq_set_ethtool_ops(vnetdev);
2371         vnetdev->watchdog_timeo = 5 * HZ;
2372
2373 }
2374
2375 int igb_init_vmdq_netdevs(struct igb_adapter *adapter)
2376 {
2377         int pool, err = 0, base_queue;
2378         struct net_device *vnetdev;
2379         struct igb_vmdq_adapter *vmdq_adapter;
2380
2381         for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2382                 int qpp = (!adapter->rss_queues ? 1 : adapter->rss_queues);
2383                 base_queue = pool * qpp;
2384                 vnetdev = alloc_etherdev(sizeof(struct igb_vmdq_adapter));
2385                 if (!vnetdev) {
2386                         err = -ENOMEM;
2387                         break;
2388                 }
2389                 vmdq_adapter = netdev_priv(vnetdev);
2390                 vmdq_adapter->vnetdev = vnetdev;
2391                 vmdq_adapter->real_adapter = adapter;
2392                 vmdq_adapter->rx_ring = adapter->rx_ring[base_queue];
2393                 vmdq_adapter->tx_ring = adapter->tx_ring[base_queue];
2394                 igb_assign_vmdq_netdev_ops(vnetdev);
2395                 snprintf(vnetdev->name, IFNAMSIZ, "%sv%d",
2396                          adapter->netdev->name, pool);
2397                 vnetdev->features = adapter->netdev->features;
2398 #ifdef HAVE_NETDEV_VLAN_FEATURES
2399                 vnetdev->vlan_features = adapter->netdev->vlan_features;
2400 #endif
2401                 adapter->vmdq_netdev[pool-1] = vnetdev;
2402                 err = register_netdev(vnetdev);
2403                 if (err)
2404                         break;
2405         }
2406         return err;
2407 }
2408
2409 int igb_remove_vmdq_netdevs(struct igb_adapter *adapter)
2410 {
2411         int pool, err = 0;
2412
2413         for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2414                 unregister_netdev(adapter->vmdq_netdev[pool-1]);
2415                 free_netdev(adapter->vmdq_netdev[pool-1]);
2416                 adapter->vmdq_netdev[pool-1] = NULL;
2417         }
2418         return err;
2419 }
2420 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2421
2422 /**
2423  * igb_set_fw_version - Configure version string for ethtool
2424  * @adapter: adapter struct
2425  *
2426  **/
2427 static void igb_set_fw_version(struct igb_adapter *adapter)
2428 {
2429         struct e1000_hw *hw = &adapter->hw;
2430         struct e1000_fw_version fw;
2431
2432         e1000_get_fw_version(hw, &fw);
2433
2434         switch (hw->mac.type) {
2435         case e1000_i210:
2436         case e1000_i211:
2437                 if (!(e1000_get_flash_presence_i210(hw))) {
2438                         snprintf(adapter->fw_version,
2439                             sizeof(adapter->fw_version),
2440                             "%2d.%2d-%d",
2441                             fw.invm_major, fw.invm_minor, fw.invm_img_type);
2442                         break;
2443                 }
2444                 /* fall through */
2445         default:
2446                 /* if option rom is valid, display its version too*/
2447                 if (fw.or_valid) {
2448                         snprintf(adapter->fw_version,
2449                             sizeof(adapter->fw_version),
2450                             "%d.%d, 0x%08x, %d.%d.%d",
2451                             fw.eep_major, fw.eep_minor, fw.etrack_id,
2452                             fw.or_major, fw.or_build, fw.or_patch);
2453                 /* no option rom */
2454                 } else {
2455                         if (fw.etrack_id != 0X0000) {
2456                         snprintf(adapter->fw_version,
2457                             sizeof(adapter->fw_version),
2458                             "%d.%d, 0x%08x",
2459                             fw.eep_major, fw.eep_minor, fw.etrack_id);
2460                         } else {
2461                         snprintf(adapter->fw_version,
2462                             sizeof(adapter->fw_version),
2463                             "%d.%d.%d",
2464                             fw.eep_major, fw.eep_minor, fw.eep_build);
2465                         }
2466                 }
2467                 break;
2468         }
2469
2470         return;
2471 }
2472
2473 /**
2474  * igb_init_mas - init Media Autosense feature if enabled in the NVM
2475  *
2476  * @adapter: adapter struct
2477  **/
2478 static void igb_init_mas(struct igb_adapter *adapter)
2479 {
2480         struct e1000_hw *hw = &adapter->hw;
2481         u16 eeprom_data;
2482
2483         e1000_read_nvm(hw, NVM_COMPAT, 1, &eeprom_data);
2484         switch (hw->bus.func) {
2485         case E1000_FUNC_0:
2486                 if (eeprom_data & IGB_MAS_ENABLE_0)
2487                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2488                 break;
2489         case E1000_FUNC_1:
2490                 if (eeprom_data & IGB_MAS_ENABLE_1)
2491                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2492                 break;
2493         case E1000_FUNC_2:
2494                 if (eeprom_data & IGB_MAS_ENABLE_2)
2495                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2496                 break;
2497         case E1000_FUNC_3:
2498                 if (eeprom_data & IGB_MAS_ENABLE_3)
2499                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2500                 break;
2501         default:
2502                 /* Shouldn't get here */
2503                 dev_err(pci_dev_to_dev(adapter->pdev),
2504                         "%s:AMS: Invalid port configuration, returning\n",
2505                         adapter->netdev->name);
2506                 break;
2507         }
2508 }
2509
2510 /**
2511  * igb_probe - Device Initialization Routine
2512  * @pdev: PCI device information struct
2513  * @ent: entry in igb_pci_tbl
2514  *
2515  * Returns 0 on success, negative on failure
2516  *
2517  * igb_probe initializes an adapter identified by a pci_dev structure.
2518  * The OS initialization, configuring of the adapter private structure,
2519  * and a hardware reset occur.
2520  **/
2521 static int __devinit igb_probe(struct pci_dev *pdev,
2522                                const struct pci_device_id *ent)
2523 {
2524         struct net_device *netdev;
2525         struct igb_adapter *adapter;
2526         struct e1000_hw *hw;
2527         u16 eeprom_data = 0;
2528         u8 pba_str[E1000_PBANUM_LENGTH];
2529         s32 ret_val;
2530         static int global_quad_port_a; /* global quad port a indication */
2531         int i, err, pci_using_dac;
2532         static int cards_found;
2533
2534         err = pci_enable_device_mem(pdev);
2535         if (err)
2536                 return err;
2537
2538         pci_using_dac = 0;
2539         err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2540         if (!err) {
2541                 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2542                 if (!err)
2543                         pci_using_dac = 1;
2544         } else {
2545                 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2546                 if (err) {
2547                         err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2548                         if (err) {
2549                                 IGB_ERR("No usable DMA configuration, "
2550                                         "aborting\n");
2551                                 goto err_dma;
2552                         }
2553                 }
2554         }
2555
2556 #ifndef HAVE_ASPM_QUIRKS
2557         /* 82575 requires that the pci-e link partner disable the L0s state */
2558         switch (pdev->device) {
2559         case E1000_DEV_ID_82575EB_COPPER:
2560         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2561         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2562                 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
2563         default:
2564                 break;
2565         }
2566
2567 #endif /* HAVE_ASPM_QUIRKS */
2568         err = pci_request_selected_regions(pdev,
2569                                            pci_select_bars(pdev,
2570                                                            IORESOURCE_MEM),
2571                                            igb_driver_name);
2572         if (err)
2573                 goto err_pci_reg;
2574
2575         pci_enable_pcie_error_reporting(pdev);
2576
2577         pci_set_master(pdev);
2578
2579         err = -ENOMEM;
2580 #ifdef HAVE_TX_MQ
2581         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2582                                    IGB_MAX_TX_QUEUES);
2583 #else
2584         netdev = alloc_etherdev(sizeof(struct igb_adapter));
2585 #endif /* HAVE_TX_MQ */
2586         if (!netdev)
2587                 goto err_alloc_etherdev;
2588
2589         SET_MODULE_OWNER(netdev);
2590         SET_NETDEV_DEV(netdev, &pdev->dev);
2591
2592         pci_set_drvdata(pdev, netdev);
2593         adapter = netdev_priv(netdev);
2594         adapter->netdev = netdev;
2595         adapter->pdev = pdev;
2596         hw = &adapter->hw;
2597         hw->back = adapter;
2598         adapter->port_num = hw->bus.func;
2599         adapter->msg_enable = (1 << debug) - 1;
2600
2601 #ifdef HAVE_PCI_ERS
2602         err = pci_save_state(pdev);
2603         if (err)
2604                 goto err_ioremap;
2605 #endif
2606         err = -EIO;
2607         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
2608                               pci_resource_len(pdev, 0));
2609         if (!hw->hw_addr)
2610                 goto err_ioremap;
2611
2612 #ifdef HAVE_NET_DEVICE_OPS
2613         netdev->netdev_ops = &igb_netdev_ops;
2614 #else /* HAVE_NET_DEVICE_OPS */
2615         netdev->open = &igb_open;
2616         netdev->stop = &igb_close;
2617         netdev->get_stats = &igb_get_stats;
2618 #ifdef HAVE_SET_RX_MODE
2619         netdev->set_rx_mode = &igb_set_rx_mode;
2620 #endif
2621         netdev->set_multicast_list = &igb_set_rx_mode;
2622         netdev->set_mac_address = &igb_set_mac;
2623         netdev->change_mtu = &igb_change_mtu;
2624         netdev->do_ioctl = &igb_ioctl;
2625 #ifdef HAVE_TX_TIMEOUT
2626         netdev->tx_timeout = &igb_tx_timeout;
2627 #endif
2628         netdev->vlan_rx_register = igb_vlan_mode;
2629         netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
2630         netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
2631 #ifdef CONFIG_NET_POLL_CONTROLLER
2632         netdev->poll_controller = igb_netpoll;
2633 #endif
2634         netdev->hard_start_xmit = &igb_xmit_frame;
2635 #endif /* HAVE_NET_DEVICE_OPS */
2636         igb_set_ethtool_ops(netdev);
2637 #ifdef HAVE_TX_TIMEOUT
2638         netdev->watchdog_timeo = 5 * HZ;
2639 #endif
2640
2641         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2642
2643         adapter->bd_number = cards_found;
2644
2645         /* setup the private structure */
2646         err = igb_sw_init(adapter);
2647         if (err)
2648                 goto err_sw_init;
2649
2650         e1000_get_bus_info(hw);
2651
2652         hw->phy.autoneg_wait_to_complete = FALSE;
2653         hw->mac.adaptive_ifs = FALSE;
2654
2655         /* Copper options */
2656         if (hw->phy.media_type == e1000_media_type_copper) {
2657                 hw->phy.mdix = AUTO_ALL_MODES;
2658                 hw->phy.disable_polarity_correction = FALSE;
2659                 hw->phy.ms_type = e1000_ms_hw_default;
2660         }
2661
2662         if (e1000_check_reset_block(hw))
2663                 dev_info(pci_dev_to_dev(pdev),
2664                         "PHY reset is blocked due to SOL/IDER session.\n");
2665
2666         /*
2667          * features is initialized to 0 in allocation, it might have bits
2668          * set by igb_sw_init so we should use an or instead of an
2669          * assignment.
2670          */
2671         netdev->features |= NETIF_F_SG |
2672                             NETIF_F_IP_CSUM |
2673 #ifdef NETIF_F_IPV6_CSUM
2674                             NETIF_F_IPV6_CSUM |
2675 #endif
2676 #ifdef NETIF_F_TSO
2677                             NETIF_F_TSO |
2678 #ifdef NETIF_F_TSO6
2679                             NETIF_F_TSO6 |
2680 #endif
2681 #endif /* NETIF_F_TSO */
2682 #ifdef NETIF_F_RXHASH
2683                             NETIF_F_RXHASH |
2684 #endif
2685                             NETIF_F_RXCSUM |
2686 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2687                             NETIF_F_HW_VLAN_CTAG_RX |
2688                             NETIF_F_HW_VLAN_CTAG_TX;
2689 #else
2690                             NETIF_F_HW_VLAN_RX |
2691                             NETIF_F_HW_VLAN_TX;
2692 #endif
2693
2694         if (hw->mac.type >= e1000_82576)
2695                 netdev->features |= NETIF_F_SCTP_CSUM;
2696
2697 #ifdef HAVE_NDO_SET_FEATURES
2698         /* copy netdev features into list of user selectable features */
2699         netdev->hw_features |= netdev->features;
2700 #ifndef IGB_NO_LRO
2701
2702         /* give us the option of enabling LRO later */
2703         netdev->hw_features |= NETIF_F_LRO;
2704 #endif
2705 #else
2706 #ifdef NETIF_F_GRO
2707
2708         /* this is only needed on kernels prior to 2.6.39 */
2709         netdev->features |= NETIF_F_GRO;
2710 #endif
2711 #endif
2712
2713         /* set this bit last since it cannot be part of hw_features */
2714 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
2715         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2716 #else
2717         netdev->features |= NETIF_F_HW_VLAN_FILTER;
2718 #endif
2719
2720 #ifdef HAVE_NETDEV_VLAN_FEATURES
2721         netdev->vlan_features |= NETIF_F_TSO |
2722                                  NETIF_F_TSO6 |
2723                                  NETIF_F_IP_CSUM |
2724                                  NETIF_F_IPV6_CSUM |
2725                                  NETIF_F_SG;
2726
2727 #endif
2728         if (pci_using_dac)
2729                 netdev->features |= NETIF_F_HIGHDMA;
2730
2731         adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2732 #ifdef DEBUG
2733         if (adapter->dmac != IGB_DMAC_DISABLE)
2734                 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
2735 #endif
2736
2737         /* before reading the NVM, reset the controller to put the device in a
2738          * known good starting state */
2739         e1000_reset_hw(hw);
2740
2741         /* make sure the NVM is good */
2742         if (e1000_validate_nvm_checksum(hw) < 0) {
2743                 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
2744                         " Valid\n");
2745                 err = -EIO;
2746                 goto err_eeprom;
2747         }
2748
2749         /* copy the MAC address out of the NVM */
2750         if (e1000_read_mac_addr(hw))
2751                 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
2752         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2753 #ifdef ETHTOOL_GPERMADDR
2754         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
2755
2756         if (!is_valid_ether_addr(netdev->perm_addr)) {
2757 #else
2758         if (!is_valid_ether_addr(netdev->dev_addr)) {
2759 #endif
2760                 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
2761                 err = -EIO;
2762                 goto err_eeprom;
2763         }
2764
2765         memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
2766         adapter->mac_table[0].queue = adapter->vfs_allocated_count;
2767         adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
2768         igb_rar_set(adapter, 0);
2769
2770         /* get firmware version for ethtool -i */
2771         igb_set_fw_version(adapter);
2772
2773         /* Check if Media Autosense is enabled */
2774         if (hw->mac.type == e1000_82580)
2775                 igb_init_mas(adapter);
2776         setup_timer(&adapter->watchdog_timer, &igb_watchdog,
2777                     (unsigned long) adapter);
2778         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2779                 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
2780                             (unsigned long) adapter);
2781         setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
2782                     (unsigned long) adapter);
2783
2784         INIT_WORK(&adapter->reset_task, igb_reset_task);
2785         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2786         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2787                 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
2788
2789         /* Initialize link properties that are user-changeable */
2790         adapter->fc_autoneg = true;
2791         hw->mac.autoneg = true;
2792         hw->phy.autoneg_advertised = 0x2f;
2793
2794         hw->fc.requested_mode = e1000_fc_default;
2795         hw->fc.current_mode = e1000_fc_default;
2796
2797         e1000_validate_mdi_setting(hw);
2798
2799         /* By default, support wake on port A */
2800         if (hw->bus.func == 0)
2801                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2802
2803         /* Check the NVM for wake support for non-port A ports */
2804         if (hw->mac.type >= e1000_82580)
2805                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2806                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2807                                  &eeprom_data);
2808         else if (hw->bus.func == 1)
2809                 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2810
2811         if (eeprom_data & IGB_EEPROM_APME)
2812                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2813
2814         /* now that we have the eeprom settings, apply the special cases where
2815          * the eeprom may be wrong or the board simply won't support wake on
2816          * lan on a particular port */
2817         switch (pdev->device) {
2818         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2819                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2820                 break;
2821         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2822         case E1000_DEV_ID_82576_FIBER:
2823         case E1000_DEV_ID_82576_SERDES:
2824                 /* Wake events only supported on port A for dual fiber
2825                  * regardless of eeprom setting */
2826                 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
2827                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2828                 break;
2829         case E1000_DEV_ID_82576_QUAD_COPPER:
2830         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2831                 /* if quad port adapter, disable WoL on all but port A */
2832                 if (global_quad_port_a != 0)
2833                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2834                 else
2835                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2836                 /* Reset for multiple quad port adapters */
2837                 if (++global_quad_port_a == 4)
2838                         global_quad_port_a = 0;
2839                 break;
2840         default:
2841                 /* If the device can't wake, don't set software support */
2842                 if (!device_can_wakeup(&adapter->pdev->dev))
2843                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2844                 break;
2845         }
2846
2847         /* initialize the wol settings based on the eeprom settings */
2848         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2849                 adapter->wol |= E1000_WUFC_MAG;
2850
2851         /* Some vendors want WoL disabled by default, but still supported */
2852         if ((hw->mac.type == e1000_i350) &&
2853             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2854                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2855                 adapter->wol = 0;
2856         }
2857
2858         device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
2859                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2860
2861         /* reset the hardware with the new settings */
2862         igb_reset(adapter);
2863         adapter->devrc = 0;
2864
2865 #ifdef HAVE_I2C_SUPPORT
2866         /* Init the I2C interface */
2867         err = igb_init_i2c(adapter);
2868         if (err) {
2869                 dev_err(&pdev->dev, "failed to init i2c interface\n");
2870                 goto err_eeprom;
2871         }
2872 #endif /* HAVE_I2C_SUPPORT */
2873
2874         /* let the f/w know that the h/w is now under the control of the
2875          * driver. */
2876         igb_get_hw_control(adapter);
2877
2878         strncpy(netdev->name, "eth%d", IFNAMSIZ);
2879         err = register_netdev(netdev);
2880         if (err)
2881                 goto err_register;
2882
2883 #ifdef CONFIG_IGB_VMDQ_NETDEV
2884         err = igb_init_vmdq_netdevs(adapter);
2885         if (err)
2886                 goto err_register;
2887 #endif
2888         /* carrier off reporting is important to ethtool even BEFORE open */
2889         netif_carrier_off(netdev);
2890
2891 #ifdef IGB_DCA
2892         if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
2893                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2894                 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
2895                 igb_setup_dca(adapter);
2896         }
2897
2898 #endif
2899 #ifdef HAVE_PTP_1588_CLOCK
2900         /* do hw tstamp init after resetting */
2901         igb_ptp_init(adapter);
2902 #endif /* HAVE_PTP_1588_CLOCK */
2903
2904         dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
2905         /* print bus type/speed/width info */
2906         dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
2907                  netdev->name,
2908                  ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
2909                   (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
2910                   (hw->mac.type == e1000_i354) ? "integrated" :
2911                                                             "unknown"),
2912                  ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
2913                   (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
2914                   (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
2915                   (hw->mac.type == e1000_i354) ? "integrated" :
2916                    "unknown"));
2917         dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
2918         for (i = 0; i < 6; i++)
2919                 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
2920
2921         ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
2922         if (ret_val)
2923                 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
2924         dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
2925                  pba_str);
2926
2927
2928         /* Initialize the thermal sensor on i350 devices. */
2929         if (hw->mac.type == e1000_i350) {
2930                 if (hw->bus.func == 0) {
2931                         u16 ets_word;
2932
2933                         /*
2934                          * Read the NVM to determine if this i350 device
2935                          * supports an external thermal sensor.
2936                          */
2937                         e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
2938                         if (ets_word != 0x0000 && ets_word != 0xFFFF)
2939                                 adapter->ets = true;
2940                         else
2941                                 adapter->ets = false;
2942                 }
2943 #ifdef IGB_HWMON
2944
2945                 igb_sysfs_init(adapter);
2946 #else
2947 #ifdef IGB_PROCFS
2948
2949                 igb_procfs_init(adapter);
2950 #endif /* IGB_PROCFS */
2951 #endif /* IGB_HWMON */
2952         } else {
2953                 adapter->ets = false;
2954         }
2955
2956         if (hw->phy.media_type == e1000_media_type_copper) {
2957                 switch (hw->mac.type) {
2958                 case e1000_i350:
2959                 case e1000_i210:
2960                 case e1000_i211:
2961                         /* Enable EEE for internal copper PHY devices */
2962                         err = e1000_set_eee_i350(hw);
2963                         if ((!err) &&
2964                             (adapter->flags & IGB_FLAG_EEE))
2965                                 adapter->eee_advert =
2966                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
2967                         break;
2968                 case e1000_i354:
2969                         if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
2970                             (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
2971                                 err = e1000_set_eee_i354(hw);
2972                                 if ((!err) &&
2973                                     (adapter->flags & IGB_FLAG_EEE))
2974                                         adapter->eee_advert =
2975                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
2976                         }
2977                         break;
2978                 default:
2979                         break;
2980                 }
2981         }
2982
2983         /* send driver version info to firmware */
2984         if (hw->mac.type >= e1000_i350)
2985                 igb_init_fw(adapter);
2986
2987 #ifndef IGB_NO_LRO
2988         if (netdev->features & NETIF_F_LRO)
2989                 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
2990         else
2991                 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
2992 #endif
2993         dev_info(pci_dev_to_dev(pdev),
2994                  "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2995                  adapter->msix_entries ? "MSI-X" :
2996                  (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
2997                  adapter->num_rx_queues, adapter->num_tx_queues);
2998
2999         cards_found++;
3000
3001         pm_runtime_put_noidle(&pdev->dev);
3002         return 0;
3003
3004 err_register:
3005         igb_release_hw_control(adapter);
3006 #ifdef HAVE_I2C_SUPPORT
3007         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
3008 #endif /* HAVE_I2C_SUPPORT */
3009 err_eeprom:
3010         if (!e1000_check_reset_block(hw))
3011                 e1000_phy_hw_reset(hw);
3012
3013         if (hw->flash_address)
3014                 iounmap(hw->flash_address);
3015 err_sw_init:
3016         igb_clear_interrupt_scheme(adapter);
3017         igb_reset_sriov_capability(adapter);
3018         iounmap(hw->hw_addr);
3019 err_ioremap:
3020         free_netdev(netdev);
3021 err_alloc_etherdev:
3022         pci_release_selected_regions(pdev,
3023                                      pci_select_bars(pdev, IORESOURCE_MEM));
3024 err_pci_reg:
3025 err_dma:
3026         pci_disable_device(pdev);
3027         return err;
3028 }
3029 #ifdef HAVE_I2C_SUPPORT
3030 /*
3031  *  igb_remove_i2c - Cleanup  I2C interface
3032  *  @adapter: pointer to adapter structure
3033  *
3034  */
3035 static void igb_remove_i2c(struct igb_adapter *adapter)
3036 {
3037
3038         /* free the adapter bus structure */
3039         i2c_del_adapter(&adapter->i2c_adap);
3040 }
3041 #endif /* HAVE_I2C_SUPPORT */
3042
3043 /**
3044  * igb_remove - Device Removal Routine
3045  * @pdev: PCI device information struct
3046  *
3047  * igb_remove is called by the PCI subsystem to alert the driver
3048  * that it should release a PCI device.  The could be caused by a
3049  * Hot-Plug event, or because the driver is going to be removed from
3050  * memory.
3051  **/
3052 static void __devexit igb_remove(struct pci_dev *pdev)
3053 {
3054         struct net_device *netdev = pci_get_drvdata(pdev);
3055         struct igb_adapter *adapter = netdev_priv(netdev);
3056         struct e1000_hw *hw = &adapter->hw;
3057
3058         pm_runtime_get_noresume(&pdev->dev);
3059 #ifdef HAVE_I2C_SUPPORT
3060         igb_remove_i2c(adapter);
3061 #endif /* HAVE_I2C_SUPPORT */
3062 #ifdef HAVE_PTP_1588_CLOCK
3063         igb_ptp_stop(adapter);
3064 #endif /* HAVE_PTP_1588_CLOCK */
3065
3066         /* flush_scheduled work may reschedule our watchdog task, so
3067          * explicitly disable watchdog tasks from being rescheduled  */
3068         set_bit(__IGB_DOWN, &adapter->state);
3069         del_timer_sync(&adapter->watchdog_timer);
3070         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3071                 del_timer_sync(&adapter->dma_err_timer);
3072         del_timer_sync(&adapter->phy_info_timer);
3073
3074         flush_scheduled_work();
3075
3076 #ifdef IGB_DCA
3077         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3078                 dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
3079                 dca_remove_requester(&pdev->dev);
3080                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3081                 E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
3082         }
3083 #endif
3084
3085         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
3086          * would have already happened in close and is redundant. */
3087         igb_release_hw_control(adapter);
3088
3089         unregister_netdev(netdev);
3090 #ifdef CONFIG_IGB_VMDQ_NETDEV
3091         igb_remove_vmdq_netdevs(adapter);
3092 #endif
3093
3094         igb_clear_interrupt_scheme(adapter);
3095         igb_reset_sriov_capability(adapter);
3096
3097         iounmap(hw->hw_addr);
3098         if (hw->flash_address)
3099                 iounmap(hw->flash_address);
3100         pci_release_selected_regions(pdev,
3101                                      pci_select_bars(pdev, IORESOURCE_MEM));
3102
3103 #ifdef IGB_HWMON
3104         igb_sysfs_exit(adapter);
3105 #else
3106 #ifdef IGB_PROCFS
3107         igb_procfs_exit(adapter);
3108 #endif /* IGB_PROCFS */
3109 #endif /* IGB_HWMON */
3110         kfree(adapter->mac_table);
3111         kfree(adapter->shadow_vfta);
3112         free_netdev(netdev);
3113
3114         pci_disable_pcie_error_reporting(pdev);
3115
3116         pci_disable_device(pdev);
3117 }
3118
3119 /**
3120  * igb_sw_init - Initialize general software structures (struct igb_adapter)
3121  * @adapter: board private structure to initialize
3122  *
3123  * igb_sw_init initializes the Adapter private data structure.
3124  * Fields are initialized based on PCI device information and
3125  * OS network device settings (MTU size).
3126  **/
3127 static int igb_sw_init(struct igb_adapter *adapter)
3128 {
3129         struct e1000_hw *hw = &adapter->hw;
3130         struct net_device *netdev = adapter->netdev;
3131         struct pci_dev *pdev = adapter->pdev;
3132
3133         /* PCI config space info */
3134
3135         hw->vendor_id = pdev->vendor;
3136         hw->device_id = pdev->device;
3137         hw->subsystem_vendor_id = pdev->subsystem_vendor;
3138         hw->subsystem_device_id = pdev->subsystem_device;
3139
3140         pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
3141
3142         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3143
3144         /* set default ring sizes */
3145         adapter->tx_ring_count = IGB_DEFAULT_TXD;
3146         adapter->rx_ring_count = IGB_DEFAULT_RXD;
3147
3148         /* set default work limits */
3149         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3150
3151         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
3152                                               VLAN_HLEN;
3153
3154         /* Initialize the hardware-specific values */
3155         if (e1000_setup_init_funcs(hw, TRUE)) {
3156                 dev_err(pci_dev_to_dev(pdev), "Hardware Initialization Failure\n");
3157                 return -EIO;
3158         }
3159
3160         adapter->mac_table = kzalloc(sizeof(struct igb_mac_addr) *
3161                                      hw->mac.rar_entry_count,
3162                                      GFP_ATOMIC);
3163
3164         /* Setup and initialize a copy of the hw vlan table array */
3165         adapter->shadow_vfta = (u32 *)kzalloc(sizeof(u32) * E1000_VFTA_ENTRIES,
3166                                         GFP_ATOMIC);
3167 #ifdef NO_KNI
3168         /* These calls may decrease the number of queues */
3169         if (hw->mac.type < e1000_i210) {
3170                 igb_set_sriov_capability(adapter);
3171         }
3172
3173         if (igb_init_interrupt_scheme(adapter, true)) {
3174                 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
3175                 return -ENOMEM;
3176         }
3177
3178         /* Explicitly disable IRQ since the NIC can be in any state. */
3179         igb_irq_disable(adapter);
3180
3181         set_bit(__IGB_DOWN, &adapter->state);
3182 #endif
3183         return 0;
3184 }
3185
3186 /**
3187  * igb_open - Called when a network interface is made active
3188  * @netdev: network interface device structure
3189  *
3190  * Returns 0 on success, negative value on failure
3191  *
3192  * The open entry point is called when a network interface is made
3193  * active by the system (IFF_UP).  At this point all resources needed
3194  * for transmit and receive operations are allocated, the interrupt
3195  * handler is registered with the OS, the watchdog timer is started,
3196  * and the stack is notified that the interface is ready.
3197  **/
3198 static int __igb_open(struct net_device *netdev, bool resuming)
3199 {
3200         struct igb_adapter *adapter = netdev_priv(netdev);
3201         struct e1000_hw *hw = &adapter->hw;
3202 #ifdef CONFIG_PM_RUNTIME
3203         struct pci_dev *pdev = adapter->pdev;
3204 #endif /* CONFIG_PM_RUNTIME */
3205         int err;
3206         int i;
3207
3208         /* disallow open during test */
3209         if (test_bit(__IGB_TESTING, &adapter->state)) {
3210                 WARN_ON(resuming);
3211                 return -EBUSY;
3212         }
3213
3214 #ifdef CONFIG_PM_RUNTIME
3215         if (!resuming)
3216                 pm_runtime_get_sync(&pdev->dev);
3217 #endif /* CONFIG_PM_RUNTIME */
3218
3219         netif_carrier_off(netdev);
3220
3221         /* allocate transmit descriptors */
3222         err = igb_setup_all_tx_resources(adapter);
3223         if (err)
3224                 goto err_setup_tx;
3225
3226         /* allocate receive descriptors */
3227         err = igb_setup_all_rx_resources(adapter);
3228         if (err)
3229                 goto err_setup_rx;
3230
3231         igb_power_up_link(adapter);
3232
3233         /* before we allocate an interrupt, we must be ready to handle it.
3234          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3235          * as soon as we call pci_request_irq, so we have to setup our
3236          * clean_rx handler before we do so.  */
3237         igb_configure(adapter);
3238
3239         err = igb_request_irq(adapter);
3240         if (err)
3241                 goto err_req_irq;
3242
3243         /* Notify the stack of the actual queue counts. */
3244         netif_set_real_num_tx_queues(netdev,
3245                                      adapter->vmdq_pools ? 1 :
3246                                      adapter->num_tx_queues);
3247
3248         err = netif_set_real_num_rx_queues(netdev,
3249                                            adapter->vmdq_pools ? 1 :
3250                                            adapter->num_rx_queues);
3251         if (err)
3252                 goto err_set_queues;
3253
3254         /* From here on the code is the same as igb_up() */
3255         clear_bit(__IGB_DOWN, &adapter->state);
3256
3257         for (i = 0; i < adapter->num_q_vectors; i++)
3258                 napi_enable(&(adapter->q_vector[i]->napi));
3259         igb_configure_lli(adapter);
3260
3261         /* Clear any pending interrupts. */
3262         E1000_READ_REG(hw, E1000_ICR);
3263
3264         igb_irq_enable(adapter);
3265
3266         /* notify VFs that reset has been completed */
3267         if (adapter->vfs_allocated_count) {
3268                 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
3269                 reg_data |= E1000_CTRL_EXT_PFRSTD;
3270                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
3271         }
3272
3273         netif_tx_start_all_queues(netdev);
3274
3275         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3276                 schedule_work(&adapter->dma_err_task);
3277
3278         /* start the watchdog. */
3279         hw->mac.get_link_status = 1;
3280         schedule_work(&adapter->watchdog_task);
3281
3282         return E1000_SUCCESS;
3283
3284 err_set_queues:
3285         igb_free_irq(adapter);
3286 err_req_irq:
3287         igb_release_hw_control(adapter);
3288         igb_power_down_link(adapter);
3289         igb_free_all_rx_resources(adapter);
3290 err_setup_rx:
3291         igb_free_all_tx_resources(adapter);
3292 err_setup_tx:
3293         igb_reset(adapter);
3294
3295 #ifdef CONFIG_PM_RUNTIME
3296         if (!resuming)
3297                 pm_runtime_put(&pdev->dev);
3298 #endif /* CONFIG_PM_RUNTIME */
3299
3300         return err;
3301 }
3302
3303 static int igb_open(struct net_device *netdev)
3304 {
3305         return __igb_open(netdev, false);
3306 }
3307
3308 /**
3309  * igb_close - Disables a network interface
3310  * @netdev: network interface device structure
3311  *
3312  * Returns 0, this is not allowed to fail
3313  *
3314  * The close entry point is called when an interface is de-activated
3315  * by the OS.  The hardware is still under the driver's control, but
3316  * needs to be disabled.  A global MAC reset is issued to stop the
3317  * hardware, and all transmit and receive resources are freed.
3318  **/
3319 static int __igb_close(struct net_device *netdev, bool suspending)
3320 {
3321         struct igb_adapter *adapter = netdev_priv(netdev);
3322 #ifdef CONFIG_PM_RUNTIME
3323         struct pci_dev *pdev = adapter->pdev;
3324 #endif /* CONFIG_PM_RUNTIME */
3325
3326         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3327
3328 #ifdef CONFIG_PM_RUNTIME
3329         if (!suspending)
3330                 pm_runtime_get_sync(&pdev->dev);
3331 #endif /* CONFIG_PM_RUNTIME */
3332
3333         igb_down(adapter);
3334
3335         igb_release_hw_control(adapter);
3336
3337         igb_free_irq(adapter);
3338
3339         igb_free_all_tx_resources(adapter);
3340         igb_free_all_rx_resources(adapter);
3341
3342 #ifdef CONFIG_PM_RUNTIME
3343         if (!suspending)
3344                 pm_runtime_put_sync(&pdev->dev);
3345 #endif /* CONFIG_PM_RUNTIME */
3346
3347         return 0;
3348 }
3349
3350 static int igb_close(struct net_device *netdev)
3351 {
3352         return __igb_close(netdev, false);
3353 }
3354
3355 /**
3356  * igb_setup_tx_resources - allocate Tx resources (Descriptors)
3357  * @tx_ring: tx descriptor ring (for a specific queue) to setup
3358  *
3359  * Return 0 on success, negative on failure
3360  **/
3361 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3362 {
3363         struct device *dev = tx_ring->dev;
3364         int size;
3365
3366         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3367         tx_ring->tx_buffer_info = vzalloc(size);
3368         if (!tx_ring->tx_buffer_info)
3369                 goto err;
3370
3371         /* round up to nearest 4K */
3372         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3373         tx_ring->size = ALIGN(tx_ring->size, 4096);
3374
3375         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3376                                            &tx_ring->dma, GFP_KERNEL);
3377
3378         if (!tx_ring->desc)
3379                 goto err;
3380
3381         tx_ring->next_to_use = 0;
3382         tx_ring->next_to_clean = 0;
3383
3384         return 0;
3385
3386 err:
3387         vfree(tx_ring->tx_buffer_info);
3388         dev_err(dev,
3389                 "Unable to allocate memory for the transmit descriptor ring\n");
3390         return -ENOMEM;
3391 }
3392
3393 /**
3394  * igb_setup_all_tx_resources - wrapper to allocate Tx resources
3395  *                                (Descriptors) for all queues
3396  * @adapter: board private structure
3397  *
3398  * Return 0 on success, negative on failure
3399  **/
3400 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3401 {
3402         struct pci_dev *pdev = adapter->pdev;
3403         int i, err = 0;
3404
3405         for (i = 0; i < adapter->num_tx_queues; i++) {
3406                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3407                 if (err) {
3408                         dev_err(pci_dev_to_dev(pdev),
3409                                 "Allocation for Tx Queue %u failed\n", i);
3410                         for (i--; i >= 0; i--)
3411                                 igb_free_tx_resources(adapter->tx_ring[i]);
3412                         break;
3413                 }
3414         }
3415
3416         return err;
3417 }
3418
3419 /**
3420  * igb_setup_tctl - configure the transmit control registers
3421  * @adapter: Board private structure
3422  **/
3423 void igb_setup_tctl(struct igb_adapter *adapter)
3424 {
3425         struct e1000_hw *hw = &adapter->hw;
3426         u32 tctl;
3427
3428         /* disable queue 0 which is enabled by default on 82575 and 82576 */
3429         E1000_WRITE_REG(hw, E1000_TXDCTL(0), 0);
3430
3431         /* Program the Transmit Control Register */
3432         tctl = E1000_READ_REG(hw, E1000_TCTL);
3433         tctl &= ~E1000_TCTL_CT;
3434         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3435                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3436
3437         e1000_config_collision_dist(hw);
3438
3439         /* Enable transmits */
3440         tctl |= E1000_TCTL_EN;
3441
3442         E1000_WRITE_REG(hw, E1000_TCTL, tctl);
3443 }
3444
3445 static u32 igb_tx_wthresh(struct igb_adapter *adapter)
3446 {
3447         struct e1000_hw *hw = &adapter->hw;
3448         switch (hw->mac.type) {
3449         case e1000_i354:
3450                 return 4;
3451         case e1000_82576:
3452                 if (adapter->msix_entries)
3453                         return 1;
3454         default:
3455                 break;
3456         }
3457
3458         return 16;
3459 }
3460
3461 /**
3462  * igb_configure_tx_ring - Configure transmit ring after Reset
3463  * @adapter: board private structure
3464  * @ring: tx ring to configure
3465  *
3466  * Configure a transmit ring after a reset.
3467  **/
3468 void igb_configure_tx_ring(struct igb_adapter *adapter,
3469                            struct igb_ring *ring)
3470 {
3471         struct e1000_hw *hw = &adapter->hw;
3472         u32 txdctl = 0;
3473         u64 tdba = ring->dma;
3474         int reg_idx = ring->reg_idx;
3475
3476         /* disable the queue */
3477         E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), 0);
3478         E1000_WRITE_FLUSH(hw);
3479         mdelay(10);
3480
3481         E1000_WRITE_REG(hw, E1000_TDLEN(reg_idx),
3482                         ring->count * sizeof(union e1000_adv_tx_desc));
3483         E1000_WRITE_REG(hw, E1000_TDBAL(reg_idx),
3484                         tdba & 0x00000000ffffffffULL);
3485         E1000_WRITE_REG(hw, E1000_TDBAH(reg_idx), tdba >> 32);
3486
3487         ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
3488         E1000_WRITE_REG(hw, E1000_TDH(reg_idx), 0);
3489         writel(0, ring->tail);
3490
3491         txdctl |= IGB_TX_PTHRESH;
3492         txdctl |= IGB_TX_HTHRESH << 8;
3493         txdctl |= igb_tx_wthresh(adapter) << 16;
3494
3495         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3496         E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), txdctl);
3497 }
3498
3499 /**
3500  * igb_configure_tx - Configure transmit Unit after Reset
3501  * @adapter: board private structure
3502  *
3503  * Configure the Tx unit of the MAC after a reset.
3504  **/
3505 static void igb_configure_tx(struct igb_adapter *adapter)
3506 {
3507         int i;
3508
3509         for (i = 0; i < adapter->num_tx_queues; i++)
3510                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3511 }
3512
3513 /**
3514  * igb_setup_rx_resources - allocate Rx resources (Descriptors)
3515  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
3516  *
3517  * Returns 0 on success, negative on failure
3518  **/
3519 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3520 {
3521         struct device *dev = rx_ring->dev;
3522         int size, desc_len;
3523
3524         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3525         rx_ring->rx_buffer_info = vzalloc(size);
3526         if (!rx_ring->rx_buffer_info)
3527                 goto err;
3528
3529         desc_len = sizeof(union e1000_adv_rx_desc);
3530
3531         /* Round up to nearest 4K */
3532         rx_ring->size = rx_ring->count * desc_len;
3533         rx_ring->size = ALIGN(rx_ring->size, 4096);
3534
3535         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3536                                            &rx_ring->dma, GFP_KERNEL);
3537
3538         if (!rx_ring->desc)
3539                 goto err;
3540
3541         rx_ring->next_to_alloc = 0;
3542         rx_ring->next_to_clean = 0;
3543         rx_ring->next_to_use = 0;
3544
3545         return 0;
3546
3547 err:
3548         vfree(rx_ring->rx_buffer_info);
3549         rx_ring->rx_buffer_info = NULL;
3550         dev_err(dev, "Unable to allocate memory for the receive descriptor"
3551                 " ring\n");
3552         return -ENOMEM;
3553 }
3554
3555 /**
3556  * igb_setup_all_rx_resources - wrapper to allocate Rx resources
3557  *                                (Descriptors) for all queues
3558  * @adapter: board private structure
3559  *
3560  * Return 0 on success, negative on failure
3561  **/
3562 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3563 {
3564         struct pci_dev *pdev = adapter->pdev;
3565         int i, err = 0;
3566
3567         for (i = 0; i < adapter->num_rx_queues; i++) {
3568                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3569                 if (err) {
3570                         dev_err(pci_dev_to_dev(pdev),
3571                                 "Allocation for Rx Queue %u failed\n", i);
3572                         for (i--; i >= 0; i--)
3573                                 igb_free_rx_resources(adapter->rx_ring[i]);
3574                         break;
3575                 }
3576         }
3577
3578         return err;
3579 }
3580
3581 /**
3582  * igb_setup_mrqc - configure the multiple receive queue control registers
3583  * @adapter: Board private structure
3584  **/
3585 static void igb_setup_mrqc(struct igb_adapter *adapter)
3586 {
3587         struct e1000_hw *hw = &adapter->hw;
3588         u32 mrqc, rxcsum;
3589         u32 j, num_rx_queues, shift = 0, shift2 = 0;
3590         static const u32 rsskey[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3591                                         0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3592                                         0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3593                                         0xFA01ACBE };
3594
3595         /* Fill out hash function seeds */
3596         for (j = 0; j < 10; j++)
3597                 E1000_WRITE_REG(hw, E1000_RSSRK(j), rsskey[j]);
3598
3599         num_rx_queues = adapter->rss_queues;
3600
3601         /* 82575 and 82576 supports 2 RSS queues for VMDq */
3602         switch (hw->mac.type) {
3603         case e1000_82575:
3604                 if (adapter->vmdq_pools) {
3605                         shift = 2;
3606                         shift2 = 6;
3607                         break;
3608                 }
3609                 shift = 6;
3610                 break;
3611         case e1000_82576:
3612                 /* 82576 supports 2 RSS queues for SR-IOV */
3613                 if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3614                         shift = 3;
3615                         num_rx_queues = 2;
3616                 }
3617                 break;
3618         default:
3619                 break;
3620         }
3621
3622         /*
3623          * Populate the redirection table 4 entries at a time.  To do this
3624          * we are generating the results for n and n+2 and then interleaving
3625          * those with the results with n+1 and n+3.
3626          */
3627         for (j = 0; j < 32; j++) {
3628                 /* first pass generates n and n+2 */
3629                 u32 base = ((j * 0x00040004) + 0x00020000) * num_rx_queues;
3630                 u32 reta = (base & 0x07800780) >> (7 - shift);
3631
3632                 /* second pass generates n+1 and n+3 */
3633                 base += 0x00010001 * num_rx_queues;
3634                 reta |= (base & 0x07800780) << (1 + shift);
3635
3636                 /* generate 2nd table for 82575 based parts */
3637                 if (shift2)
3638                         reta |= (0x01010101 * num_rx_queues) << shift2;
3639
3640                 E1000_WRITE_REG(hw, E1000_RETA(j), reta);
3641         }
3642
3643         /*
3644          * Disable raw packet checksumming so that RSS hash is placed in
3645          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
3646          * offloads as they are enabled by default
3647          */
3648         rxcsum = E1000_READ_REG(hw, E1000_RXCSUM);
3649         rxcsum |= E1000_RXCSUM_PCSD;
3650
3651         if (adapter->hw.mac.type >= e1000_82576)
3652                 /* Enable Receive Checksum Offload for SCTP */
3653                 rxcsum |= E1000_RXCSUM_CRCOFL;
3654
3655         /* Don't need to set TUOFL or IPOFL, they default to 1 */
3656         E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum);
3657
3658         /* Generate RSS hash based on packet types, TCP/UDP
3659          * port numbers and/or IPv4/v6 src and dst addresses
3660          */
3661         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3662                E1000_MRQC_RSS_FIELD_IPV4_TCP |
3663                E1000_MRQC_RSS_FIELD_IPV6 |
3664                E1000_MRQC_RSS_FIELD_IPV6_TCP |
3665                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3666
3667         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3668                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3669         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3670                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3671
3672         /* If VMDq is enabled then we set the appropriate mode for that, else
3673          * we default to RSS so that an RSS hash is calculated per packet even
3674          * if we are only using one queue */
3675         if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3676                 if (hw->mac.type > e1000_82575) {
3677                         /* Set the default pool for the PF's first queue */
3678                         u32 vtctl = E1000_READ_REG(hw, E1000_VT_CTL);
3679                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3680                                    E1000_VT_CTL_DISABLE_DEF_POOL);
3681                         vtctl |= adapter->vfs_allocated_count <<
3682                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3683                         E1000_WRITE_REG(hw, E1000_VT_CTL, vtctl);
3684                 } else if (adapter->rss_queues > 1) {
3685                         /* set default queue for pool 1 to queue 2 */
3686                         E1000_WRITE_REG(hw, E1000_VT_CTL,
3687                                         adapter->rss_queues << 7);
3688                 }
3689                 if (adapter->rss_queues > 1)
3690                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
3691                 else
3692                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
3693         } else {
3694                 mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
3695         }
3696         igb_vmm_control(adapter);
3697
3698         E1000_WRITE_REG(hw, E1000_MRQC, mrqc);
3699 }
3700
3701 /**
3702  * igb_setup_rctl - configure the receive control registers
3703  * @adapter: Board private structure
3704  **/
3705 void igb_setup_rctl(struct igb_adapter *adapter)
3706 {
3707         struct e1000_hw *hw = &adapter->hw;
3708         u32 rctl;
3709
3710         rctl = E1000_READ_REG(hw, E1000_RCTL);
3711
3712         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3713         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3714
3715         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3716                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3717
3718         /*
3719          * enable stripping of CRC. It's unlikely this will break BMC
3720          * redirection as it did with e1000. Newer features require
3721          * that the HW strips the CRC.
3722          */
3723         rctl |= E1000_RCTL_SECRC;
3724
3725         /* disable store bad packets and clear size bits. */
3726         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3727
3728         /* enable LPE to prevent packets larger than max_frame_size */
3729         rctl |= E1000_RCTL_LPE;
3730
3731         /* disable queue 0 to prevent tail write w/o re-config */
3732         E1000_WRITE_REG(hw, E1000_RXDCTL(0), 0);
3733
3734         /* Attention!!!  For SR-IOV PF driver operations you must enable
3735          * queue drop for all VF and PF queues to prevent head of line blocking
3736          * if an un-trusted VF does not provide descriptors to hardware.
3737          */
3738         if (adapter->vfs_allocated_count) {
3739                 /* set all queue drop enable bits */
3740                 E1000_WRITE_REG(hw, E1000_QDE, ALL_QUEUES);
3741         }
3742
3743         E1000_WRITE_REG(hw, E1000_RCTL, rctl);
3744 }
3745
3746 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3747                                    int vfn)
3748 {
3749         struct e1000_hw *hw = &adapter->hw;
3750         u32 vmolr;
3751
3752         /* if it isn't the PF check to see if VFs are enabled and
3753          * increase the size to support vlan tags */
3754         if (vfn < adapter->vfs_allocated_count &&
3755             adapter->vf_data[vfn].vlans_enabled)
3756                 size += VLAN_HLEN;
3757
3758 #ifdef CONFIG_IGB_VMDQ_NETDEV
3759         if (vfn >= adapter->vfs_allocated_count) {
3760                 int queue = vfn - adapter->vfs_allocated_count;
3761                 struct igb_vmdq_adapter *vadapter;
3762
3763                 vadapter = netdev_priv(adapter->vmdq_netdev[queue-1]);
3764                 if (vadapter->vlgrp)
3765                         size += VLAN_HLEN;
3766         }
3767 #endif
3768         vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3769         vmolr &= ~E1000_VMOLR_RLPML_MASK;
3770         vmolr |= size | E1000_VMOLR_LPE;
3771         E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3772
3773         return 0;
3774 }
3775
3776 /**
3777  * igb_rlpml_set - set maximum receive packet size
3778  * @adapter: board private structure
3779  *
3780  * Configure maximum receivable packet size.
3781  **/
3782 static void igb_rlpml_set(struct igb_adapter *adapter)
3783 {
3784         u32 max_frame_size = adapter->max_frame_size;
3785         struct e1000_hw *hw = &adapter->hw;
3786         u16 pf_id = adapter->vfs_allocated_count;
3787
3788         if (adapter->vmdq_pools && hw->mac.type != e1000_82575) {
3789                 int i;
3790                 for (i = 0; i < adapter->vmdq_pools; i++)
3791                         igb_set_vf_rlpml(adapter, max_frame_size, pf_id + i);
3792                 /*
3793                  * If we're in VMDQ or SR-IOV mode, then set global RLPML
3794                  * to our max jumbo frame size, in case we need to enable
3795                  * jumbo frames on one of the rings later.
3796                  * This will not pass over-length frames into the default
3797                  * queue because it's gated by the VMOLR.RLPML.
3798                  */
3799                 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3800         }
3801         /* Set VF RLPML for the PF device. */
3802         if (adapter->vfs_allocated_count)
3803                 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3804
3805         E1000_WRITE_REG(hw, E1000_RLPML, max_frame_size);
3806 }
3807
3808 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
3809                                         int vfn, bool enable)
3810 {
3811         struct e1000_hw *hw = &adapter->hw;
3812         u32 val;
3813         void __iomem *reg;
3814
3815         if (hw->mac.type < e1000_82576)
3816                 return;
3817
3818         if (hw->mac.type == e1000_i350)
3819                 reg = hw->hw_addr + E1000_DVMOLR(vfn);
3820         else
3821                 reg = hw->hw_addr + E1000_VMOLR(vfn);
3822
3823         val = readl(reg);
3824         if (enable)
3825                 val |= E1000_VMOLR_STRVLAN;
3826         else
3827                 val &= ~(E1000_VMOLR_STRVLAN);
3828         writel(val, reg);
3829 }
3830 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3831                                  int vfn, bool aupe)
3832 {
3833         struct e1000_hw *hw = &adapter->hw;
3834         u32 vmolr;
3835
3836         /*
3837          * This register exists only on 82576 and newer so if we are older then
3838          * we should exit and do nothing
3839          */
3840         if (hw->mac.type < e1000_82576)
3841                 return;
3842
3843         vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3844
3845         if (aupe)
3846                 vmolr |= E1000_VMOLR_AUPE;        /* Accept untagged packets */
3847         else
3848                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3849
3850         /* clear all bits that might not be set */
3851         vmolr &= ~E1000_VMOLR_RSSE;
3852
3853         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3854                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3855
3856         vmolr |= E1000_VMOLR_BAM;          /* Accept broadcast */
3857         vmolr |= E1000_VMOLR_LPE;          /* Accept long packets */
3858
3859         E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3860 }
3861
3862 /**
3863  * igb_configure_rx_ring - Configure a receive ring after Reset
3864  * @adapter: board private structure
3865  * @ring: receive ring to be configured
3866  *
3867  * Configure the Rx unit of the MAC after a reset.
3868  **/
3869 void igb_configure_rx_ring(struct igb_adapter *adapter,
3870                            struct igb_ring *ring)
3871 {
3872         struct e1000_hw *hw = &adapter->hw;
3873         u64 rdba = ring->dma;
3874         int reg_idx = ring->reg_idx;
3875         u32 srrctl = 0, rxdctl = 0;
3876
3877 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
3878         /*
3879          * RLPML prevents us from receiving a frame larger than max_frame so
3880          * it is safe to just set the rx_buffer_len to max_frame without the
3881          * risk of an skb over panic.
3882          */
3883         ring->rx_buffer_len = max_t(u32, adapter->max_frame_size,
3884                                     MAXIMUM_ETHERNET_VLAN_SIZE);
3885
3886 #endif
3887         /* disable the queue */
3888         E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), 0);
3889
3890         /* Set DMA base address registers */
3891         E1000_WRITE_REG(hw, E1000_RDBAL(reg_idx),
3892                         rdba & 0x00000000ffffffffULL);
3893         E1000_WRITE_REG(hw, E1000_RDBAH(reg_idx), rdba >> 32);
3894         E1000_WRITE_REG(hw, E1000_RDLEN(reg_idx),
3895                        ring->count * sizeof(union e1000_adv_rx_desc));
3896
3897         /* initialize head and tail */
3898         ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3899         E1000_WRITE_REG(hw, E1000_RDH(reg_idx), 0);
3900         writel(0, ring->tail);
3901
3902         /* reset next-to- use/clean to place SW in sync with hardwdare */
3903         ring->next_to_clean = 0;
3904         ring->next_to_use = 0;
3905 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3906         ring->next_to_alloc = 0;
3907
3908 #endif
3909         /* set descriptor configuration */
3910 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3911         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3912         srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3913 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3914         srrctl = ALIGN(ring->rx_buffer_len, 1024) >>
3915                  E1000_SRRCTL_BSIZEPKT_SHIFT;
3916 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3917         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3918 #ifdef HAVE_PTP_1588_CLOCK
3919         if (hw->mac.type >= e1000_82580)
3920                 srrctl |= E1000_SRRCTL_TIMESTAMP;
3921 #endif /* HAVE_PTP_1588_CLOCK */
3922         /*
3923          * We should set the drop enable bit if:
3924          *  SR-IOV is enabled
3925          *   or
3926          *  Flow Control is disabled and number of RX queues > 1
3927          *
3928          *  This allows us to avoid head of line blocking for security
3929          *  and performance reasons.
3930          */
3931         if (adapter->vfs_allocated_count ||
3932             (adapter->num_rx_queues > 1 &&
3933              (hw->fc.requested_mode == e1000_fc_none ||
3934               hw->fc.requested_mode == e1000_fc_rx_pause)))
3935                 srrctl |= E1000_SRRCTL_DROP_EN;
3936
3937         E1000_WRITE_REG(hw, E1000_SRRCTL(reg_idx), srrctl);
3938
3939         /* set filtering for VMDQ pools */
3940         igb_set_vmolr(adapter, reg_idx & 0x7, true);
3941
3942         rxdctl |= IGB_RX_PTHRESH;
3943         rxdctl |= IGB_RX_HTHRESH << 8;
3944         rxdctl |= IGB_RX_WTHRESH << 16;
3945
3946         /* enable receive descriptor fetching */
3947         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3948         E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), rxdctl);
3949 }
3950
3951 /**
3952  * igb_configure_rx - Configure receive Unit after Reset
3953  * @adapter: board private structure
3954  *
3955  * Configure the Rx unit of the MAC after a reset.
3956  **/
3957 static void igb_configure_rx(struct igb_adapter *adapter)
3958 {
3959         int i;
3960
3961         /* set UTA to appropriate mode */
3962         igb_set_uta(adapter);
3963
3964         igb_full_sync_mac_table(adapter);
3965         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3966          * the Base and Length of the Rx Descriptor Ring */
3967         for (i = 0; i < adapter->num_rx_queues; i++)
3968                 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3969 }
3970
3971 /**
3972  * igb_free_tx_resources - Free Tx Resources per Queue
3973  * @tx_ring: Tx descriptor ring for a specific queue
3974  *
3975  * Free all transmit software resources
3976  **/
3977 void igb_free_tx_resources(struct igb_ring *tx_ring)
3978 {
3979         igb_clean_tx_ring(tx_ring);
3980
3981         vfree(tx_ring->tx_buffer_info);
3982         tx_ring->tx_buffer_info = NULL;
3983
3984         /* if not set, then don't free */
3985         if (!tx_ring->desc)
3986                 return;
3987
3988         dma_free_coherent(tx_ring->dev, tx_ring->size,
3989                           tx_ring->desc, tx_ring->dma);
3990
3991         tx_ring->desc = NULL;
3992 }
3993
3994 /**
3995  * igb_free_all_tx_resources - Free Tx Resources for All Queues
3996  * @adapter: board private structure
3997  *
3998  * Free all transmit software resources
3999  **/
4000 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
4001 {
4002         int i;
4003
4004         for (i = 0; i < adapter->num_tx_queues; i++)
4005                 igb_free_tx_resources(adapter->tx_ring[i]);
4006 }
4007
4008 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
4009                                     struct igb_tx_buffer *tx_buffer)
4010 {
4011         if (tx_buffer->skb) {
4012                 dev_kfree_skb_any(tx_buffer->skb);
4013                 if (dma_unmap_len(tx_buffer, len))
4014                         dma_unmap_single(ring->dev,
4015                                          dma_unmap_addr(tx_buffer, dma),
4016                                          dma_unmap_len(tx_buffer, len),
4017                                          DMA_TO_DEVICE);
4018         } else if (dma_unmap_len(tx_buffer, len)) {
4019                 dma_unmap_page(ring->dev,
4020                                dma_unmap_addr(tx_buffer, dma),
4021                                dma_unmap_len(tx_buffer, len),
4022                                DMA_TO_DEVICE);
4023         }
4024         tx_buffer->next_to_watch = NULL;
4025         tx_buffer->skb = NULL;
4026         dma_unmap_len_set(tx_buffer, len, 0);
4027         /* buffer_info must be completely set up in the transmit path */
4028 }
4029
4030 /**
4031  * igb_clean_tx_ring - Free Tx Buffers
4032  * @tx_ring: ring to be cleaned
4033  **/
4034 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
4035 {
4036         struct igb_tx_buffer *buffer_info;
4037         unsigned long size;
4038         u16 i;
4039
4040         if (!tx_ring->tx_buffer_info)
4041                 return;
4042         /* Free all the Tx ring sk_buffs */
4043
4044         for (i = 0; i < tx_ring->count; i++) {
4045                 buffer_info = &tx_ring->tx_buffer_info[i];
4046                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
4047         }
4048
4049         netdev_tx_reset_queue(txring_txq(tx_ring));
4050
4051         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
4052         memset(tx_ring->tx_buffer_info, 0, size);
4053
4054         /* Zero out the descriptor ring */
4055         memset(tx_ring->desc, 0, tx_ring->size);
4056
4057         tx_ring->next_to_use = 0;
4058         tx_ring->next_to_clean = 0;
4059 }
4060
4061 /**
4062  * igb_clean_all_tx_rings - Free Tx Buffers for all queues
4063  * @adapter: board private structure
4064  **/
4065 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
4066 {
4067         int i;
4068
4069         for (i = 0; i < adapter->num_tx_queues; i++)
4070                 igb_clean_tx_ring(adapter->tx_ring[i]);
4071 }
4072
4073 /**
4074  * igb_free_rx_resources - Free Rx Resources
4075  * @rx_ring: ring to clean the resources from
4076  *
4077  * Free all receive software resources
4078  **/
4079 void igb_free_rx_resources(struct igb_ring *rx_ring)
4080 {
4081         igb_clean_rx_ring(rx_ring);
4082
4083         vfree(rx_ring->rx_buffer_info);
4084         rx_ring->rx_buffer_info = NULL;
4085
4086         /* if not set, then don't free */
4087         if (!rx_ring->desc)
4088                 return;
4089
4090         dma_free_coherent(rx_ring->dev, rx_ring->size,
4091                           rx_ring->desc, rx_ring->dma);
4092
4093         rx_ring->desc = NULL;
4094 }
4095
4096 /**
4097  * igb_free_all_rx_resources - Free Rx Resources for All Queues
4098  * @adapter: board private structure
4099  *
4100  * Free all receive software resources
4101  **/
4102 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
4103 {
4104         int i;
4105
4106         for (i = 0; i < adapter->num_rx_queues; i++)
4107                 igb_free_rx_resources(adapter->rx_ring[i]);
4108 }
4109
4110 /**
4111  * igb_clean_rx_ring - Free Rx Buffers per Queue
4112  * @rx_ring: ring to free buffers from
4113  **/
4114 void igb_clean_rx_ring(struct igb_ring *rx_ring)
4115 {
4116         unsigned long size;
4117         u16 i;
4118
4119         if (!rx_ring->rx_buffer_info)
4120                 return;
4121
4122 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
4123         if (rx_ring->skb)
4124                 dev_kfree_skb(rx_ring->skb);
4125         rx_ring->skb = NULL;
4126
4127 #endif
4128         /* Free all the Rx ring sk_buffs */
4129         for (i = 0; i < rx_ring->count; i++) {
4130                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
4131 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
4132                 if (buffer_info->dma) {
4133                         dma_unmap_single(rx_ring->dev,
4134                                          buffer_info->dma,
4135                                          rx_ring->rx_buffer_len,
4136                                          DMA_FROM_DEVICE);
4137                         buffer_info->dma = 0;
4138                 }
4139
4140                 if (buffer_info->skb) {
4141                         dev_kfree_skb(buffer_info->skb);
4142                         buffer_info->skb = NULL;
4143                 }
4144 #else
4145                 if (!buffer_info->page)
4146                         continue;
4147
4148                 dma_unmap_page(rx_ring->dev,
4149                                buffer_info->dma,
4150                                PAGE_SIZE,
4151                                DMA_FROM_DEVICE);
4152                 __free_page(buffer_info->page);
4153
4154                 buffer_info->page = NULL;
4155 #endif
4156         }
4157
4158         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
4159         memset(rx_ring->rx_buffer_info, 0, size);
4160
4161         /* Zero out the descriptor ring */
4162         memset(rx_ring->desc, 0, rx_ring->size);
4163
4164         rx_ring->next_to_alloc = 0;
4165         rx_ring->next_to_clean = 0;
4166         rx_ring->next_to_use = 0;
4167 }
4168
4169 /**
4170  * igb_clean_all_rx_rings - Free Rx Buffers for all queues
4171  * @adapter: board private structure
4172  **/
4173 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
4174 {
4175         int i;
4176
4177         for (i = 0; i < adapter->num_rx_queues; i++)
4178                 igb_clean_rx_ring(adapter->rx_ring[i]);
4179 }
4180
4181 /**
4182  * igb_set_mac - Change the Ethernet Address of the NIC
4183  * @netdev: network interface device structure
4184  * @p: pointer to an address structure
4185  *
4186  * Returns 0 on success, negative on failure
4187  **/
4188 static int igb_set_mac(struct net_device *netdev, void *p)
4189 {
4190         struct igb_adapter *adapter = netdev_priv(netdev);
4191         struct e1000_hw *hw = &adapter->hw;
4192         struct sockaddr *addr = p;
4193
4194         if (!is_valid_ether_addr(addr->sa_data))
4195                 return -EADDRNOTAVAIL;
4196
4197         igb_del_mac_filter(adapter, hw->mac.addr,
4198                            adapter->vfs_allocated_count);
4199         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4200         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
4201
4202         /* set the correct pool for the new PF MAC address in entry 0 */
4203         return igb_add_mac_filter(adapter, hw->mac.addr,
4204                            adapter->vfs_allocated_count);
4205 }
4206
4207 /**
4208  * igb_write_mc_addr_list - write multicast addresses to MTA
4209  * @netdev: network interface device structure
4210  *
4211  * Writes multicast address list to the MTA hash table.
4212  * Returns: -ENOMEM on failure
4213  *                0 on no addresses written
4214  *                X on writing X addresses to MTA
4215  **/
4216 int igb_write_mc_addr_list(struct net_device *netdev)
4217 {
4218         struct igb_adapter *adapter = netdev_priv(netdev);
4219         struct e1000_hw *hw = &adapter->hw;
4220 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4221         struct netdev_hw_addr *ha;
4222 #else
4223         struct dev_mc_list *ha;
4224 #endif
4225         u8  *mta_list;
4226         int i, count;
4227 #ifdef CONFIG_IGB_VMDQ_NETDEV
4228         int vm;
4229 #endif
4230         count = netdev_mc_count(netdev);
4231 #ifdef CONFIG_IGB_VMDQ_NETDEV
4232         for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4233                 if (!adapter->vmdq_netdev[vm])
4234                         break;
4235                 if (!netif_running(adapter->vmdq_netdev[vm]))
4236                         continue;
4237                 count += netdev_mc_count(adapter->vmdq_netdev[vm]);
4238         }
4239 #endif
4240
4241         if (!count) {
4242                 e1000_update_mc_addr_list(hw, NULL, 0);
4243                 return 0;
4244         }
4245         mta_list = kzalloc(count * 6, GFP_ATOMIC);
4246         if (!mta_list)
4247                 return -ENOMEM;
4248
4249         /* The shared function expects a packed array of only addresses. */
4250         i = 0;
4251         netdev_for_each_mc_addr(ha, netdev)
4252 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4253                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
4254 #else
4255                 memcpy(mta_list + (i++ * ETH_ALEN), ha->dmi_addr, ETH_ALEN);
4256 #endif
4257 #ifdef CONFIG_IGB_VMDQ_NETDEV
4258         for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4259                 if (!adapter->vmdq_netdev[vm])
4260                         break;
4261                 if (!netif_running(adapter->vmdq_netdev[vm]) ||
4262                     !netdev_mc_count(adapter->vmdq_netdev[vm]))
4263                         continue;
4264                 netdev_for_each_mc_addr(ha, adapter->vmdq_netdev[vm])
4265 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4266                         memcpy(mta_list + (i++ * ETH_ALEN),
4267                                ha->addr, ETH_ALEN);
4268 #else
4269                         memcpy(mta_list + (i++ * ETH_ALEN),
4270                                ha->dmi_addr, ETH_ALEN);
4271 #endif
4272         }
4273 #endif
4274         e1000_update_mc_addr_list(hw, mta_list, i);
4275         kfree(mta_list);
4276
4277         return count;
4278 }
4279
4280 void igb_rar_set(struct igb_adapter *adapter, u32 index)
4281 {
4282         u32 rar_low, rar_high;
4283         struct e1000_hw *hw = &adapter->hw;
4284         u8 *addr = adapter->mac_table[index].addr;
4285         /* HW expects these in little endian so we reverse the byte order
4286          * from network order (big endian) to little endian
4287          */
4288         rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
4289                   ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
4290         rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
4291
4292         /* Indicate to hardware the Address is Valid. */
4293         if (adapter->mac_table[index].state & IGB_MAC_STATE_IN_USE)
4294                 rar_high |= E1000_RAH_AV;
4295
4296         if (hw->mac.type == e1000_82575)
4297                 rar_high |= E1000_RAH_POOL_1 * adapter->mac_table[index].queue;
4298         else
4299                 rar_high |= E1000_RAH_POOL_1 << adapter->mac_table[index].queue;
4300
4301         E1000_WRITE_REG(hw, E1000_RAL(index), rar_low);
4302         E1000_WRITE_FLUSH(hw);
4303         E1000_WRITE_REG(hw, E1000_RAH(index), rar_high);
4304         E1000_WRITE_FLUSH(hw);
4305 }
4306
4307 void igb_full_sync_mac_table(struct igb_adapter *adapter)
4308 {
4309         struct e1000_hw *hw = &adapter->hw;
4310         int i;
4311         for (i = 0; i < hw->mac.rar_entry_count; i++) {
4312                         igb_rar_set(adapter, i);
4313         }
4314 }
4315
4316 void igb_sync_mac_table(struct igb_adapter *adapter)
4317 {
4318         struct e1000_hw *hw = &adapter->hw;
4319         int i;
4320         for (i = 0; i < hw->mac.rar_entry_count; i++) {
4321                 if (adapter->mac_table[i].state & IGB_MAC_STATE_MODIFIED)
4322                         igb_rar_set(adapter, i);
4323                 adapter->mac_table[i].state &= ~(IGB_MAC_STATE_MODIFIED);
4324         }
4325 }
4326
4327 int igb_available_rars(struct igb_adapter *adapter)
4328 {
4329         struct e1000_hw *hw = &adapter->hw;
4330         int i, count = 0;
4331
4332         for (i = 0; i < hw->mac.rar_entry_count; i++) {
4333                 if (adapter->mac_table[i].state == 0)
4334                         count++;
4335         }
4336         return count;
4337 }
4338
4339 #ifdef HAVE_SET_RX_MODE
4340 /**
4341  * igb_write_uc_addr_list - write unicast addresses to RAR table
4342  * @netdev: network interface device structure
4343  *
4344  * Writes unicast address list to the RAR table.
4345  * Returns: -ENOMEM on failure/insufficient address space
4346  *                0 on no addresses written
4347  *                X on writing X addresses to the RAR table
4348  **/
4349 static int igb_write_uc_addr_list(struct net_device *netdev)
4350 {
4351         struct igb_adapter *adapter = netdev_priv(netdev);
4352         unsigned int vfn = adapter->vfs_allocated_count;
4353         int count = 0;
4354
4355         /* return ENOMEM indicating insufficient memory for addresses */
4356         if (netdev_uc_count(netdev) > igb_available_rars(adapter))
4357                 return -ENOMEM;
4358         if (!netdev_uc_empty(netdev)) {
4359 #ifdef NETDEV_HW_ADDR_T_UNICAST
4360                 struct netdev_hw_addr *ha;
4361 #else
4362                 struct dev_mc_list *ha;
4363 #endif
4364                 netdev_for_each_uc_addr(ha, netdev) {
4365 #ifdef NETDEV_HW_ADDR_T_UNICAST
4366                         igb_del_mac_filter(adapter, ha->addr, vfn);
4367                         igb_add_mac_filter(adapter, ha->addr, vfn);
4368 #else
4369                         igb_del_mac_filter(adapter, ha->da_addr, vfn);
4370                         igb_add_mac_filter(adapter, ha->da_addr, vfn);
4371 #endif
4372                         count++;
4373                 }
4374         }
4375         return count;
4376 }
4377
4378 #endif /* HAVE_SET_RX_MODE */
4379 /**
4380  * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
4381  * @netdev: network interface device structure
4382  *
4383  * The set_rx_mode entry point is called whenever the unicast or multicast
4384  * address lists or the network interface flags are updated.  This routine is
4385  * responsible for configuring the hardware for proper unicast, multicast,
4386  * promiscuous mode, and all-multi behavior.
4387  **/
4388 static void igb_set_rx_mode(struct net_device *netdev)
4389 {
4390         struct igb_adapter *adapter = netdev_priv(netdev);
4391         struct e1000_hw *hw = &adapter->hw;
4392         unsigned int vfn = adapter->vfs_allocated_count;
4393         u32 rctl, vmolr = 0;
4394         int count;
4395
4396         /* Check for Promiscuous and All Multicast modes */
4397         rctl = E1000_READ_REG(hw, E1000_RCTL);
4398
4399         /* clear the effected bits */
4400         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
4401
4402         if (netdev->flags & IFF_PROMISC) {
4403                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
4404                 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
4405                 /* retain VLAN HW filtering if in VT mode */
4406                 if (adapter->vfs_allocated_count || adapter->vmdq_pools)
4407                         rctl |= E1000_RCTL_VFE;
4408         } else {
4409                 if (netdev->flags & IFF_ALLMULTI) {
4410                         rctl |= E1000_RCTL_MPE;
4411                         vmolr |= E1000_VMOLR_MPME;
4412                 } else {
4413                         /*
4414                          * Write addresses to the MTA, if the attempt fails
4415                          * then we should just turn on promiscuous mode so
4416                          * that we can at least receive multicast traffic
4417                          */
4418                         count = igb_write_mc_addr_list(netdev);
4419                         if (count < 0) {
4420                                 rctl |= E1000_RCTL_MPE;
4421                                 vmolr |= E1000_VMOLR_MPME;
4422                         } else if (count) {
4423                                 vmolr |= E1000_VMOLR_ROMPE;
4424                         }
4425                 }
4426 #ifdef HAVE_SET_RX_MODE
4427                 /*
4428                  * Write addresses to available RAR registers, if there is not
4429                  * sufficient space to store all the addresses then enable
4430                  * unicast promiscuous mode
4431                  */
4432                 count = igb_write_uc_addr_list(netdev);
4433                 if (count < 0) {
4434                         rctl |= E1000_RCTL_UPE;
4435                         vmolr |= E1000_VMOLR_ROPE;
4436                 }
4437 #endif /* HAVE_SET_RX_MODE */
4438                 rctl |= E1000_RCTL_VFE;
4439         }
4440         E1000_WRITE_REG(hw, E1000_RCTL, rctl);
4441
4442         /*
4443          * In order to support SR-IOV and eventually VMDq it is necessary to set
4444          * the VMOLR to enable the appropriate modes.  Without this workaround
4445          * we will have issues with VLAN tag stripping not being done for frames
4446          * that are only arriving because we are the default pool
4447          */
4448         if (hw->mac.type < e1000_82576)
4449                 return;
4450
4451         vmolr |= E1000_READ_REG(hw, E1000_VMOLR(vfn)) &
4452                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
4453         E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
4454         igb_restore_vf_multicasts(adapter);
4455 }
4456
4457 static void igb_check_wvbr(struct igb_adapter *adapter)
4458 {
4459         struct e1000_hw *hw = &adapter->hw;
4460         u32 wvbr = 0;
4461
4462         switch (hw->mac.type) {
4463         case e1000_82576:
4464         case e1000_i350:
4465                 if (!(wvbr = E1000_READ_REG(hw, E1000_WVBR)))
4466                         return;
4467                 break;
4468         default:
4469                 break;
4470         }
4471
4472         adapter->wvbr |= wvbr;
4473 }
4474
4475 #define IGB_STAGGERED_QUEUE_OFFSET 8
4476
4477 static void igb_spoof_check(struct igb_adapter *adapter)
4478 {
4479         int j;
4480
4481         if (!adapter->wvbr)
4482                 return;
4483
4484         switch (adapter->hw.mac.type) {
4485         case e1000_82576:
4486                 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4487                         if (adapter->wvbr & (1 << j) ||
4488                             adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
4489                                 DPRINTK(DRV, WARNING,
4490                                         "Spoof event(s) detected on VF %d\n", j);
4491                                 adapter->wvbr &=
4492                                         ~((1 << j) |
4493                                           (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
4494                         }
4495                 }
4496                 break;
4497         case e1000_i350:
4498                 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4499                         if (adapter->wvbr & (1 << j)) {
4500                                 DPRINTK(DRV, WARNING,
4501                                         "Spoof event(s) detected on VF %d\n", j);
4502                                 adapter->wvbr &= ~(1 << j);
4503                         }
4504                 }
4505                 break;
4506         default:
4507                 break;
4508         }
4509 }
4510
4511 /* Need to wait a few seconds after link up to get diagnostic information from
4512  * the phy */
4513 static void igb_update_phy_info(unsigned long data)
4514 {
4515         struct igb_adapter *adapter = (struct igb_adapter *) data;
4516         e1000_get_phy_info(&adapter->hw);
4517 }
4518
4519 /**
4520  * igb_has_link - check shared code for link and determine up/down
4521  * @adapter: pointer to driver private info
4522  **/
4523 bool igb_has_link(struct igb_adapter *adapter)
4524 {
4525         struct e1000_hw *hw = &adapter->hw;
4526         bool link_active = FALSE;
4527
4528         /* get_link_status is set on LSC (link status) interrupt or
4529          * rx sequence error interrupt.  get_link_status will stay
4530          * false until the e1000_check_for_link establishes link
4531          * for copper adapters ONLY
4532          */
4533         switch (hw->phy.media_type) {
4534         case e1000_media_type_copper:
4535                 if (!hw->mac.get_link_status)
4536                         return true;
4537         case e1000_media_type_internal_serdes:
4538                 e1000_check_for_link(hw);
4539                 link_active = !hw->mac.get_link_status;
4540                 break;
4541         case e1000_media_type_unknown:
4542         default:
4543                 break;
4544         }
4545
4546         if (((hw->mac.type == e1000_i210) ||
4547              (hw->mac.type == e1000_i211)) &&
4548              (hw->phy.id == I210_I_PHY_ID)) {
4549                 if (!netif_carrier_ok(adapter->netdev)) {
4550                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4551                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4552                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4553                         adapter->link_check_timeout = jiffies;
4554                 }
4555         }
4556
4557         return link_active;
4558 }
4559
4560 /**
4561  * igb_watchdog - Timer Call-back
4562  * @data: pointer to adapter cast into an unsigned long
4563  **/
4564 static void igb_watchdog(unsigned long data)
4565 {
4566         struct igb_adapter *adapter = (struct igb_adapter *)data;
4567         /* Do the rest outside of interrupt context */
4568         schedule_work(&adapter->watchdog_task);
4569 }
4570
4571 static void igb_watchdog_task(struct work_struct *work)
4572 {
4573         struct igb_adapter *adapter = container_of(work,
4574                                                    struct igb_adapter,
4575                                                    watchdog_task);
4576         struct e1000_hw *hw = &adapter->hw;
4577         struct net_device *netdev = adapter->netdev;
4578         u32 link;
4579         int i;
4580         u32 thstat, ctrl_ext;
4581         u32 connsw;
4582
4583         link = igb_has_link(adapter);
4584         /* Force link down if we have fiber to swap to */
4585         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4586                 if (hw->phy.media_type == e1000_media_type_copper) {
4587                         connsw = E1000_READ_REG(hw, E1000_CONNSW);
4588                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4589                                 link = 0;
4590                 }
4591         }
4592
4593         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4594                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4595                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4596                 else
4597                         link = FALSE;
4598         }
4599
4600         if (link) {
4601                 /* Perform a reset if the media type changed. */
4602                 if (hw->dev_spec._82575.media_changed) {
4603                         hw->dev_spec._82575.media_changed = false;
4604                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
4605                         igb_reset(adapter);
4606                 }
4607
4608                 /* Cancel scheduled suspend requests. */
4609                 pm_runtime_resume(netdev->dev.parent);
4610
4611                 if (!netif_carrier_ok(netdev)) {
4612                         u32 ctrl;
4613                         e1000_get_speed_and_duplex(hw,
4614                                                    &adapter->link_speed,
4615                                                    &adapter->link_duplex);
4616
4617                         ctrl = E1000_READ_REG(hw, E1000_CTRL);
4618                         /* Links status message must follow this format */
4619                         printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s, "
4620                                  "Flow Control: %s\n",
4621                                netdev->name,
4622                                adapter->link_speed,
4623                                adapter->link_duplex == FULL_DUPLEX ?
4624                                  "Full Duplex" : "Half Duplex",
4625                                ((ctrl & E1000_CTRL_TFCE) &&
4626                                 (ctrl & E1000_CTRL_RFCE)) ? "RX/TX":
4627                                ((ctrl & E1000_CTRL_RFCE) ?  "RX" :
4628                                ((ctrl & E1000_CTRL_TFCE) ?  "TX" : "None")));
4629                         /* adjust timeout factor according to speed/duplex */
4630                         adapter->tx_timeout_factor = 1;
4631                         switch (adapter->link_speed) {
4632                         case SPEED_10:
4633                                 adapter->tx_timeout_factor = 14;
4634                                 break;
4635                         case SPEED_100:
4636                                 /* maybe add some timeout factor ? */
4637                                 break;
4638                         default:
4639                                 break;
4640                         }
4641
4642                         netif_carrier_on(netdev);
4643                         netif_tx_wake_all_queues(netdev);
4644
4645                         igb_ping_all_vfs(adapter);
4646 #ifdef IFLA_VF_MAX
4647                         igb_check_vf_rate_limit(adapter);
4648 #endif /* IFLA_VF_MAX */
4649
4650                         /* link state has changed, schedule phy info update */
4651                         if (!test_bit(__IGB_DOWN, &adapter->state))
4652                                 mod_timer(&adapter->phy_info_timer,
4653                                           round_jiffies(jiffies + 2 * HZ));
4654                 }
4655         } else {
4656                 if (netif_carrier_ok(netdev)) {
4657                         adapter->link_speed = 0;
4658                         adapter->link_duplex = 0;
4659                         /* check for thermal sensor event on i350 */
4660                         if (hw->mac.type == e1000_i350) {
4661                                 thstat = E1000_READ_REG(hw, E1000_THSTAT);
4662                                 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
4663                                 if ((hw->phy.media_type ==
4664                                         e1000_media_type_copper) &&
4665                                         !(ctrl_ext &
4666                                         E1000_CTRL_EXT_LINK_MODE_SGMII)) {
4667                                         if (thstat & E1000_THSTAT_PWR_DOWN) {
4668                                                 printk(KERN_ERR "igb: %s The "
4669                                                 "network adapter was stopped "
4670                                                 "because it overheated.\n",
4671                                                 netdev->name);
4672                                         }
4673                                         if (thstat & E1000_THSTAT_LINK_THROTTLE) {
4674                                                 printk(KERN_INFO
4675                                                         "igb: %s The network "
4676                                                         "adapter supported "
4677                                                         "link speed "
4678                                                         "was downshifted "
4679                                                         "because it "
4680                                                         "overheated.\n",
4681                                                         netdev->name);
4682                                         }
4683                                 }
4684                         }
4685
4686                         /* Links status message must follow this format */
4687                         printk(KERN_INFO "igb: %s NIC Link is Down\n",
4688                                netdev->name);
4689                         netif_carrier_off(netdev);
4690                         netif_tx_stop_all_queues(netdev);
4691
4692                         igb_ping_all_vfs(adapter);
4693
4694                         /* link state has changed, schedule phy info update */
4695                         if (!test_bit(__IGB_DOWN, &adapter->state))
4696                                 mod_timer(&adapter->phy_info_timer,
4697                                           round_jiffies(jiffies + 2 * HZ));
4698                         /* link is down, time to check for alternate media */
4699                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4700                                 igb_check_swap_media(adapter);
4701                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4702                                         schedule_work(&adapter->reset_task);
4703                                         /* return immediately */
4704                                         return;
4705                                 }
4706                         }
4707                         pm_schedule_suspend(netdev->dev.parent,
4708                                             MSEC_PER_SEC * 5);
4709
4710                 /* also check for alternate media here */
4711                 } else if (!netif_carrier_ok(netdev) &&
4712                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4713                         hw->mac.ops.power_up_serdes(hw);
4714                         igb_check_swap_media(adapter);
4715                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4716                                 schedule_work(&adapter->reset_task);
4717                                 /* return immediately */
4718                                 return;
4719                         }
4720                 }
4721         }
4722
4723         igb_update_stats(adapter);
4724
4725         for (i = 0; i < adapter->num_tx_queues; i++) {
4726                 struct igb_ring *tx_ring = adapter->tx_ring[i];
4727                 if (!netif_carrier_ok(netdev)) {
4728                         /* We've lost link, so the controller stops DMA,
4729                          * but we've got queued Tx work that's never going
4730                          * to get done, so reset controller to flush Tx.
4731                          * (Do the reset outside of interrupt context). */
4732                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4733                                 adapter->tx_timeout_count++;
4734                                 schedule_work(&adapter->reset_task);
4735                                 /* return immediately since reset is imminent */
4736                                 return;
4737                         }
4738                 }
4739
4740                 /* Force detection of hung controller every watchdog period */
4741                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4742         }
4743
4744         /* Cause software interrupt to ensure rx ring is cleaned */
4745         if (adapter->msix_entries) {
4746                 u32 eics = 0;
4747                 for (i = 0; i < adapter->num_q_vectors; i++)
4748                         eics |= adapter->q_vector[i]->eims_value;
4749                 E1000_WRITE_REG(hw, E1000_EICS, eics);
4750         } else {
4751                 E1000_WRITE_REG(hw, E1000_ICS, E1000_ICS_RXDMT0);
4752         }
4753
4754         igb_spoof_check(adapter);
4755
4756         /* Reset the timer */
4757         if (!test_bit(__IGB_DOWN, &adapter->state)) {
4758                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4759                         mod_timer(&adapter->watchdog_timer,
4760                                   round_jiffies(jiffies +  HZ));
4761                 else
4762                         mod_timer(&adapter->watchdog_timer,
4763                                   round_jiffies(jiffies + 2 * HZ));
4764         }
4765 }
4766
4767 static void igb_dma_err_task(struct work_struct *work)
4768 {
4769         struct igb_adapter *adapter = container_of(work,
4770                                                    struct igb_adapter,
4771                                                    dma_err_task);
4772         int vf;
4773         struct e1000_hw *hw = &adapter->hw;
4774         struct net_device *netdev = adapter->netdev;
4775         u32 hgptc;
4776         u32 ciaa, ciad;
4777
4778         hgptc = E1000_READ_REG(hw, E1000_HGPTC);
4779         if (hgptc) /* If incrementing then no need for the check below */
4780                 goto dma_timer_reset;
4781         /*
4782          * Check to see if a bad DMA write target from an errant or
4783          * malicious VF has caused a PCIe error.  If so then we can
4784          * issue a VFLR to the offending VF(s) and then resume without
4785          * requesting a full slot reset.
4786          */
4787
4788         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
4789                 ciaa = (vf << 16) | 0x80000000;
4790                 /* 32 bit read so align, we really want status at offset 6 */
4791                 ciaa |= PCI_COMMAND;
4792                 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4793                 ciad = E1000_READ_REG(hw, E1000_CIAD);
4794                 ciaa &= 0x7FFFFFFF;
4795                 /* disable debug mode asap after reading data */
4796                 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4797                 /* Get the upper 16 bits which will be the PCI status reg */
4798                 ciad >>= 16;
4799                 if (ciad & (PCI_STATUS_REC_MASTER_ABORT |
4800                             PCI_STATUS_REC_TARGET_ABORT |
4801                             PCI_STATUS_SIG_SYSTEM_ERROR)) {
4802                         netdev_err(netdev, "VF %d suffered error\n", vf);
4803                         /* Issue VFLR */
4804                         ciaa = (vf << 16) | 0x80000000;
4805                         ciaa |= 0xA8;
4806                         E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4807                         ciad = 0x00008000;  /* VFLR */
4808                         E1000_WRITE_REG(hw, E1000_CIAD, ciad);
4809                         ciaa &= 0x7FFFFFFF;
4810                         E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4811                 }
4812         }
4813 dma_timer_reset:
4814         /* Reset the timer */
4815         if (!test_bit(__IGB_DOWN, &adapter->state))
4816                 mod_timer(&adapter->dma_err_timer,
4817                           round_jiffies(jiffies + HZ / 10));
4818 }
4819
4820 /**
4821  * igb_dma_err_timer - Timer Call-back
4822  * @data: pointer to adapter cast into an unsigned long
4823  **/
4824 static void igb_dma_err_timer(unsigned long data)
4825 {
4826         struct igb_adapter *adapter = (struct igb_adapter *)data;
4827         /* Do the rest outside of interrupt context */
4828         schedule_work(&adapter->dma_err_task);
4829 }
4830
4831 enum latency_range {
4832         lowest_latency = 0,
4833         low_latency = 1,
4834         bulk_latency = 2,
4835         latency_invalid = 255
4836 };
4837
4838 /**
4839  * igb_update_ring_itr - update the dynamic ITR value based on packet size
4840  *
4841  *      Stores a new ITR value based on strictly on packet size.  This
4842  *      algorithm is less sophisticated than that used in igb_update_itr,
4843  *      due to the difficulty of synchronizing statistics across multiple
4844  *      receive rings.  The divisors and thresholds used by this function
4845  *      were determined based on theoretical maximum wire speed and testing
4846  *      data, in order to minimize response time while increasing bulk
4847  *      throughput.
4848  *      This functionality is controlled by the InterruptThrottleRate module
4849  *      parameter (see igb_param.c)
4850  *      NOTE:  This function is called only when operating in a multiqueue
4851  *             receive environment.
4852  * @q_vector: pointer to q_vector
4853  **/
4854 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4855 {
4856         int new_val = q_vector->itr_val;
4857         int avg_wire_size = 0;
4858         struct igb_adapter *adapter = q_vector->adapter;
4859         unsigned int packets;
4860
4861         /* For non-gigabit speeds, just fix the interrupt rate at 4000
4862          * ints/sec - ITR timer value of 120 ticks.
4863          */
4864         switch (adapter->link_speed) {
4865         case SPEED_10:
4866         case SPEED_100:
4867                 new_val = IGB_4K_ITR;
4868                 goto set_itr_val;
4869         default:
4870                 break;
4871         }
4872
4873         packets = q_vector->rx.total_packets;
4874         if (packets)
4875                 avg_wire_size = q_vector->rx.total_bytes / packets;
4876
4877         packets = q_vector->tx.total_packets;
4878         if (packets)
4879                 avg_wire_size = max_t(u32, avg_wire_size,
4880                                       q_vector->tx.total_bytes / packets);
4881
4882         /* if avg_wire_size isn't set no work was done */
4883         if (!avg_wire_size)
4884                 goto clear_counts;
4885
4886         /* Add 24 bytes to size to account for CRC, preamble, and gap */
4887         avg_wire_size += 24;
4888
4889         /* Don't starve jumbo frames */
4890         avg_wire_size = min(avg_wire_size, 3000);
4891
4892         /* Give a little boost to mid-size frames */
4893         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4894                 new_val = avg_wire_size / 3;
4895         else
4896                 new_val = avg_wire_size / 2;
4897
4898         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4899         if (new_val < IGB_20K_ITR &&
4900             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4901              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4902                 new_val = IGB_20K_ITR;
4903
4904 set_itr_val:
4905         if (new_val != q_vector->itr_val) {
4906                 q_vector->itr_val = new_val;
4907                 q_vector->set_itr = 1;
4908         }
4909 clear_counts:
4910         q_vector->rx.total_bytes = 0;
4911         q_vector->rx.total_packets = 0;
4912         q_vector->tx.total_bytes = 0;
4913         q_vector->tx.total_packets = 0;
4914 }
4915
4916 /**
4917  * igb_update_itr - update the dynamic ITR value based on statistics
4918  *      Stores a new ITR value based on packets and byte
4919  *      counts during the last interrupt.  The advantage of per interrupt
4920  *      computation is faster updates and more accurate ITR for the current
4921  *      traffic pattern.  Constants in this function were computed
4922  *      based on theoretical maximum wire speed and thresholds were set based
4923  *      on testing data as well as attempting to minimize response time
4924  *      while increasing bulk throughput.
4925  *      this functionality is controlled by the InterruptThrottleRate module
4926  *      parameter (see igb_param.c)
4927  *      NOTE:  These calculations are only valid when operating in a single-
4928  *             queue environment.
4929  * @q_vector: pointer to q_vector
4930  * @ring_container: ring info to update the itr for
4931  **/
4932 static void igb_update_itr(struct igb_q_vector *q_vector,
4933                            struct igb_ring_container *ring_container)
4934 {
4935         unsigned int packets = ring_container->total_packets;
4936         unsigned int bytes = ring_container->total_bytes;
4937         u8 itrval = ring_container->itr;
4938
4939         /* no packets, exit with status unchanged */
4940         if (packets == 0)
4941                 return;
4942
4943         switch (itrval) {
4944         case lowest_latency:
4945                 /* handle TSO and jumbo frames */
4946                 if (bytes/packets > 8000)
4947                         itrval = bulk_latency;
4948                 else if ((packets < 5) && (bytes > 512))
4949                         itrval = low_latency;
4950                 break;
4951         case low_latency:  /* 50 usec aka 20000 ints/s */
4952                 if (bytes > 10000) {
4953                         /* this if handles the TSO accounting */
4954                         if (bytes/packets > 8000) {
4955                                 itrval = bulk_latency;
4956                         } else if ((packets < 10) || ((bytes/packets) > 1200)) {
4957                                 itrval = bulk_latency;
4958                         } else if ((packets > 35)) {
4959                                 itrval = lowest_latency;
4960                         }
4961                 } else if (bytes/packets > 2000) {
4962                         itrval = bulk_latency;
4963                 } else if (packets <= 2 && bytes < 512) {
4964                         itrval = lowest_latency;
4965                 }
4966                 break;
4967         case bulk_latency: /* 250 usec aka 4000 ints/s */
4968                 if (bytes > 25000) {
4969                         if (packets > 35)
4970                                 itrval = low_latency;
4971                 } else if (bytes < 1500) {
4972                         itrval = low_latency;
4973                 }
4974                 break;
4975         }
4976
4977         /* clear work counters since we have the values we need */
4978         ring_container->total_bytes = 0;
4979         ring_container->total_packets = 0;
4980
4981         /* write updated itr to ring container */
4982         ring_container->itr = itrval;
4983 }
4984
4985 static void igb_set_itr(struct igb_q_vector *q_vector)
4986 {
4987         struct igb_adapter *adapter = q_vector->adapter;
4988         u32 new_itr = q_vector->itr_val;
4989         u8 current_itr = 0;
4990
4991         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4992         switch (adapter->link_speed) {
4993         case SPEED_10:
4994         case SPEED_100:
4995                 current_itr = 0;
4996                 new_itr = IGB_4K_ITR;
4997                 goto set_itr_now;
4998         default:
4999                 break;
5000         }
5001
5002         igb_update_itr(q_vector, &q_vector->tx);
5003         igb_update_itr(q_vector, &q_vector->rx);
5004
5005         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
5006
5007         /* conservative mode (itr 3) eliminates the lowest_latency setting */
5008         if (current_itr == lowest_latency &&
5009             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5010              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5011                 current_itr = low_latency;
5012
5013         switch (current_itr) {
5014         /* counts and packets in update_itr are dependent on these numbers */
5015         case lowest_latency:
5016                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
5017                 break;
5018         case low_latency:
5019                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
5020                 break;
5021         case bulk_latency:
5022                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
5023                 break;
5024         default:
5025                 break;
5026         }
5027
5028 set_itr_now:
5029         if (new_itr != q_vector->itr_val) {
5030                 /* this attempts to bias the interrupt rate towards Bulk
5031                  * by adding intermediate steps when interrupt rate is
5032                  * increasing */
5033                 new_itr = new_itr > q_vector->itr_val ?
5034                              max((new_itr * q_vector->itr_val) /
5035                                  (new_itr + (q_vector->itr_val >> 2)),
5036                                  new_itr) :
5037                              new_itr;
5038                 /* Don't write the value here; it resets the adapter's
5039                  * internal timer, and causes us to delay far longer than
5040                  * we should between interrupts.  Instead, we write the ITR
5041                  * value at the beginning of the next interrupt so the timing
5042                  * ends up being correct.
5043                  */
5044                 q_vector->itr_val = new_itr;
5045                 q_vector->set_itr = 1;
5046         }
5047 }
5048
5049 void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
5050                      u32 type_tucmd, u32 mss_l4len_idx)
5051 {
5052         struct e1000_adv_tx_context_desc *context_desc;
5053         u16 i = tx_ring->next_to_use;
5054
5055         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
5056
5057         i++;
5058         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
5059
5060         /* set bits to identify this as an advanced context descriptor */
5061         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
5062
5063         /* For 82575, context index must be unique per ring. */
5064         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5065                 mss_l4len_idx |= tx_ring->reg_idx << 4;
5066
5067         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
5068         context_desc->seqnum_seed       = 0;
5069         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
5070         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
5071 }
5072
5073 static int igb_tso(struct igb_ring *tx_ring,
5074                    struct igb_tx_buffer *first,
5075                    u8 *hdr_len)
5076 {
5077 #ifdef NETIF_F_TSO
5078         struct sk_buff *skb = first->skb;
5079         u32 vlan_macip_lens, type_tucmd;
5080         u32 mss_l4len_idx, l4len;
5081
5082         if (skb->ip_summed != CHECKSUM_PARTIAL)
5083                 return 0;
5084
5085         if (!skb_is_gso(skb))
5086 #endif /* NETIF_F_TSO */
5087                 return 0;
5088 #ifdef NETIF_F_TSO
5089
5090         if (skb_header_cloned(skb)) {
5091                 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
5092                 if (err)
5093                         return err;
5094         }
5095
5096         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5097         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5098
5099         if (first->protocol == __constant_htons(ETH_P_IP)) {
5100                 struct iphdr *iph = ip_hdr(skb);
5101                 iph->tot_len = 0;
5102                 iph->check = 0;
5103                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
5104                                                          iph->daddr, 0,
5105                                                          IPPROTO_TCP,
5106                                                          0);
5107                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5108                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5109                                    IGB_TX_FLAGS_CSUM |
5110                                    IGB_TX_FLAGS_IPV4;
5111 #ifdef NETIF_F_TSO6
5112         } else if (skb_is_gso_v6(skb)) {
5113                 ipv6_hdr(skb)->payload_len = 0;
5114                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5115                                                        &ipv6_hdr(skb)->daddr,
5116                                                        0, IPPROTO_TCP, 0);
5117                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5118                                    IGB_TX_FLAGS_CSUM;
5119 #endif
5120         }
5121
5122         /* compute header lengths */
5123         l4len = tcp_hdrlen(skb);
5124         *hdr_len = skb_transport_offset(skb) + l4len;
5125
5126         /* update gso size and bytecount with header size */
5127         first->gso_segs = skb_shinfo(skb)->gso_segs;
5128         first->bytecount += (first->gso_segs - 1) * *hdr_len;
5129
5130         /* MSS L4LEN IDX */
5131         mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
5132         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
5133
5134         /* VLAN MACLEN IPLEN */
5135         vlan_macip_lens = skb_network_header_len(skb);
5136         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5137         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5138
5139         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5140
5141         return 1;
5142 #endif  /* NETIF_F_TSO */
5143 }
5144
5145 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
5146 {
5147         struct sk_buff *skb = first->skb;
5148         u32 vlan_macip_lens = 0;
5149         u32 mss_l4len_idx = 0;
5150         u32 type_tucmd = 0;
5151
5152         if (skb->ip_summed != CHECKSUM_PARTIAL) {
5153                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
5154                         return;
5155         } else {
5156                 u8 nexthdr = 0;
5157                 switch (first->protocol) {
5158                 case __constant_htons(ETH_P_IP):
5159                         vlan_macip_lens |= skb_network_header_len(skb);
5160                         type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5161                         nexthdr = ip_hdr(skb)->protocol;
5162                         break;
5163 #ifdef NETIF_F_IPV6_CSUM
5164                 case __constant_htons(ETH_P_IPV6):
5165                         vlan_macip_lens |= skb_network_header_len(skb);
5166                         nexthdr = ipv6_hdr(skb)->nexthdr;
5167                         break;
5168 #endif
5169                 default:
5170                         if (unlikely(net_ratelimit())) {
5171                                 dev_warn(tx_ring->dev,
5172                                  "partial checksum but proto=%x!\n",
5173                                  first->protocol);
5174                         }
5175                         break;
5176                 }
5177
5178                 switch (nexthdr) {
5179                 case IPPROTO_TCP:
5180                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
5181                         mss_l4len_idx = tcp_hdrlen(skb) <<
5182                                         E1000_ADVTXD_L4LEN_SHIFT;
5183                         break;
5184 #ifdef HAVE_SCTP
5185                 case IPPROTO_SCTP:
5186                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
5187                         mss_l4len_idx = sizeof(struct sctphdr) <<
5188                                         E1000_ADVTXD_L4LEN_SHIFT;
5189                         break;
5190 #endif
5191                 case IPPROTO_UDP:
5192                         mss_l4len_idx = sizeof(struct udphdr) <<
5193                                         E1000_ADVTXD_L4LEN_SHIFT;
5194                         break;
5195                 default:
5196                         if (unlikely(net_ratelimit())) {
5197                                 dev_warn(tx_ring->dev,
5198                                  "partial checksum but l4 proto=%x!\n",
5199                                  nexthdr);
5200                         }
5201                         break;
5202                 }
5203
5204                 /* update TX checksum flag */
5205                 first->tx_flags |= IGB_TX_FLAGS_CSUM;
5206         }
5207
5208         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5209         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5210
5211         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5212 }
5213
5214 #define IGB_SET_FLAG(_input, _flag, _result) \
5215         ((_flag <= _result) ? \
5216          ((u32)(_input & _flag) * (_result / _flag)) : \
5217          ((u32)(_input & _flag) / (_flag / _result)))
5218
5219 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
5220 {
5221         /* set type for advanced descriptor with frame checksum insertion */
5222         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
5223                        E1000_ADVTXD_DCMD_DEXT |
5224                        E1000_ADVTXD_DCMD_IFCS;
5225
5226         /* set HW vlan bit if vlan is present */
5227         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
5228                                  (E1000_ADVTXD_DCMD_VLE));
5229
5230         /* set segmentation bits for TSO */
5231         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
5232                                  (E1000_ADVTXD_DCMD_TSE));
5233
5234         /* set timestamp bit if present */
5235         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
5236                                  (E1000_ADVTXD_MAC_TSTAMP));
5237
5238         return cmd_type;
5239 }
5240
5241 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
5242                                  union e1000_adv_tx_desc *tx_desc,
5243                                  u32 tx_flags, unsigned int paylen)
5244 {
5245         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
5246
5247         /* 82575 requires a unique index per ring */
5248         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5249                 olinfo_status |= tx_ring->reg_idx << 4;
5250
5251         /* insert L4 checksum */
5252         olinfo_status |= IGB_SET_FLAG(tx_flags,
5253                                       IGB_TX_FLAGS_CSUM,
5254                                       (E1000_TXD_POPTS_TXSM << 8));
5255
5256         /* insert IPv4 checksum */
5257         olinfo_status |= IGB_SET_FLAG(tx_flags,
5258                                       IGB_TX_FLAGS_IPV4,
5259                                       (E1000_TXD_POPTS_IXSM << 8));
5260
5261         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
5262 }
5263
5264 static void igb_tx_map(struct igb_ring *tx_ring,
5265                        struct igb_tx_buffer *first,
5266                        const u8 hdr_len)
5267 {
5268         struct sk_buff *skb = first->skb;
5269         struct igb_tx_buffer *tx_buffer;
5270         union e1000_adv_tx_desc *tx_desc;
5271         struct skb_frag_struct *frag;
5272         dma_addr_t dma;
5273         unsigned int data_len, size;
5274         u32 tx_flags = first->tx_flags;
5275         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
5276         u16 i = tx_ring->next_to_use;
5277
5278         tx_desc = IGB_TX_DESC(tx_ring, i);
5279
5280         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
5281
5282         size = skb_headlen(skb);
5283         data_len = skb->data_len;
5284
5285         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
5286
5287         tx_buffer = first;
5288
5289         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
5290                 if (dma_mapping_error(tx_ring->dev, dma))
5291                         goto dma_error;
5292
5293                 /* record length, and DMA address */
5294                 dma_unmap_len_set(tx_buffer, len, size);
5295                 dma_unmap_addr_set(tx_buffer, dma, dma);
5296
5297                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5298
5299                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
5300                         tx_desc->read.cmd_type_len =
5301                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
5302
5303                         i++;
5304                         tx_desc++;
5305                         if (i == tx_ring->count) {
5306                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
5307                                 i = 0;
5308                         }
5309                         tx_desc->read.olinfo_status = 0;
5310
5311                         dma += IGB_MAX_DATA_PER_TXD;
5312                         size -= IGB_MAX_DATA_PER_TXD;
5313
5314                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
5315                 }
5316
5317                 if (likely(!data_len))
5318                         break;
5319
5320                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
5321
5322                 i++;
5323                 tx_desc++;
5324                 if (i == tx_ring->count) {
5325                         tx_desc = IGB_TX_DESC(tx_ring, 0);
5326                         i = 0;
5327                 }
5328                 tx_desc->read.olinfo_status = 0;
5329
5330                 size = skb_frag_size(frag);
5331                 data_len -= size;
5332
5333                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
5334                                        size, DMA_TO_DEVICE);
5335
5336                 tx_buffer = &tx_ring->tx_buffer_info[i];
5337         }
5338
5339         /* write last descriptor with RS and EOP bits */
5340         cmd_type |= size | IGB_TXD_DCMD;
5341         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
5342
5343         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
5344         /* set the timestamp */
5345         first->time_stamp = jiffies;
5346
5347         /*
5348          * Force memory writes to complete before letting h/w know there
5349          * are new descriptors to fetch.  (Only applicable for weak-ordered
5350          * memory model archs, such as IA-64).
5351          *
5352          * We also need this memory barrier to make certain all of the
5353          * status bits have been updated before next_to_watch is written.
5354          */
5355         wmb();
5356
5357         /* set next_to_watch value indicating a packet is present */
5358         first->next_to_watch = tx_desc;
5359
5360         i++;
5361         if (i == tx_ring->count)
5362                 i = 0;
5363
5364         tx_ring->next_to_use = i;
5365
5366         writel(i, tx_ring->tail);
5367
5368         /* we need this if more than one processor can write to our tail
5369          * at a time, it syncronizes IO on IA64/Altix systems */
5370         mmiowb();
5371
5372         return;
5373
5374 dma_error:
5375         dev_err(tx_ring->dev, "TX DMA map failed\n");
5376
5377         /* clear dma mappings for failed tx_buffer_info map */
5378         for (;;) {
5379                 tx_buffer = &tx_ring->tx_buffer_info[i];
5380                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
5381                 if (tx_buffer == first)
5382                         break;
5383                 if (i == 0)
5384                         i = tx_ring->count;
5385                 i--;
5386         }
5387
5388         tx_ring->next_to_use = i;
5389 }
5390
5391 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5392 {
5393         struct net_device *netdev = netdev_ring(tx_ring);
5394
5395         if (netif_is_multiqueue(netdev))
5396                 netif_stop_subqueue(netdev, ring_queue_index(tx_ring));
5397         else
5398                 netif_stop_queue(netdev);
5399
5400         /* Herbert's original patch had:
5401          *  smp_mb__after_netif_stop_queue();
5402          * but since that doesn't exist yet, just open code it. */
5403         smp_mb();
5404
5405         /* We need to check again in a case another CPU has just
5406          * made room available. */
5407         if (igb_desc_unused(tx_ring) < size)
5408                 return -EBUSY;
5409
5410         /* A reprieve! */
5411         if (netif_is_multiqueue(netdev))
5412                 netif_wake_subqueue(netdev, ring_queue_index(tx_ring));
5413         else
5414                 netif_wake_queue(netdev);
5415
5416         tx_ring->tx_stats.restart_queue++;
5417
5418         return 0;
5419 }
5420
5421 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5422 {
5423         if (igb_desc_unused(tx_ring) >= size)
5424                 return 0;
5425         return __igb_maybe_stop_tx(tx_ring, size);
5426 }
5427
5428 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
5429                                 struct igb_ring *tx_ring)
5430 {
5431         struct igb_tx_buffer *first;
5432         int tso;
5433         u32 tx_flags = 0;
5434 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5435         unsigned short f;
5436 #endif
5437         u16 count = TXD_USE_COUNT(skb_headlen(skb));
5438         __be16 protocol = vlan_get_protocol(skb);
5439         u8 hdr_len = 0;
5440
5441         /*
5442          * need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
5443          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
5444          *       + 2 desc gap to keep tail from touching head,
5445          *       + 1 desc for context descriptor,
5446          * otherwise try next time
5447          */
5448 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5449         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
5450                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
5451 #else
5452         count += skb_shinfo(skb)->nr_frags;
5453 #endif
5454         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
5455                 /* this is a hard error */
5456                 return NETDEV_TX_BUSY;
5457         }
5458
5459         /* record the location of the first descriptor for this packet */
5460         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
5461         first->skb = skb;
5462         first->bytecount = skb->len;
5463         first->gso_segs = 1;
5464
5465         skb_tx_timestamp(skb);
5466
5467 #ifdef HAVE_PTP_1588_CLOCK
5468         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
5469                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5470                 if (!adapter->ptp_tx_skb) {
5471                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5472                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
5473
5474                         adapter->ptp_tx_skb = skb_get(skb);
5475                         adapter->ptp_tx_start = jiffies;
5476                         if (adapter->hw.mac.type == e1000_82576)
5477                                 schedule_work(&adapter->ptp_tx_work);
5478                 }
5479         }
5480 #endif /* HAVE_PTP_1588_CLOCK */
5481
5482         if (vlan_tx_tag_present(skb)) {
5483                 tx_flags |= IGB_TX_FLAGS_VLAN;
5484                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
5485         }
5486
5487         /* record initial flags and protocol */
5488         first->tx_flags = tx_flags;
5489         first->protocol = protocol;
5490
5491         tso = igb_tso(tx_ring, first, &hdr_len);
5492         if (tso < 0)
5493                 goto out_drop;
5494         else if (!tso)
5495                 igb_tx_csum(tx_ring, first);
5496
5497         igb_tx_map(tx_ring, first, hdr_len);
5498
5499 #ifndef HAVE_TRANS_START_IN_QUEUE
5500         netdev_ring(tx_ring)->trans_start = jiffies;
5501
5502 #endif
5503         /* Make sure there is space in the ring for the next send. */
5504         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
5505
5506         return NETDEV_TX_OK;
5507
5508 out_drop:
5509         igb_unmap_and_free_tx_resource(tx_ring, first);
5510
5511         return NETDEV_TX_OK;
5512 }
5513
5514 #ifdef HAVE_TX_MQ
5515 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
5516                                                     struct sk_buff *skb)
5517 {
5518         unsigned int r_idx = skb->queue_mapping;
5519
5520         if (r_idx >= adapter->num_tx_queues)
5521                 r_idx = r_idx % adapter->num_tx_queues;
5522
5523         return adapter->tx_ring[r_idx];
5524 }
5525 #else
5526 #define igb_tx_queue_mapping(_adapter, _skb) (_adapter)->tx_ring[0]
5527 #endif
5528
5529 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
5530                                   struct net_device *netdev)
5531 {
5532         struct igb_adapter *adapter = netdev_priv(netdev);
5533
5534         if (test_bit(__IGB_DOWN, &adapter->state)) {
5535                 dev_kfree_skb_any(skb);
5536                 return NETDEV_TX_OK;
5537         }
5538
5539         if (skb->len <= 0) {
5540                 dev_kfree_skb_any(skb);
5541                 return NETDEV_TX_OK;
5542         }
5543
5544         /*
5545          * The minimum packet size with TCTL.PSP set is 17 so pad the skb
5546          * in order to meet this minimum size requirement.
5547          */
5548         if (skb->len < 17) {
5549                 if (skb_padto(skb, 17))
5550                         return NETDEV_TX_OK;
5551                 skb->len = 17;
5552         }
5553
5554         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
5555 }
5556
5557 /**
5558  * igb_tx_timeout - Respond to a Tx Hang
5559  * @netdev: network interface device structure
5560  **/
5561 static void igb_tx_timeout(struct net_device *netdev)
5562 {
5563         struct igb_adapter *adapter = netdev_priv(netdev);
5564         struct e1000_hw *hw = &adapter->hw;
5565
5566         /* Do the reset outside of interrupt context */
5567         adapter->tx_timeout_count++;
5568
5569         if (hw->mac.type >= e1000_82580)
5570                 hw->dev_spec._82575.global_device_reset = true;
5571
5572         schedule_work(&adapter->reset_task);
5573         E1000_WRITE_REG(hw, E1000_EICS,
5574                         (adapter->eims_enable_mask & ~adapter->eims_other));
5575 }
5576
5577 static void igb_reset_task(struct work_struct *work)
5578 {
5579         struct igb_adapter *adapter;
5580         adapter = container_of(work, struct igb_adapter, reset_task);
5581
5582         igb_reinit_locked(adapter);
5583 }
5584
5585 /**
5586  * igb_get_stats - Get System Network Statistics
5587  * @netdev: network interface device structure
5588  *
5589  * Returns the address of the device statistics structure.
5590  * The statistics are updated here and also from the timer callback.
5591  **/
5592 static struct net_device_stats *igb_get_stats(struct net_device *netdev)
5593 {
5594         struct igb_adapter *adapter = netdev_priv(netdev);
5595
5596         if (!test_bit(__IGB_RESETTING, &adapter->state))
5597                 igb_update_stats(adapter);
5598
5599 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5600         /* only return the current stats */
5601         return &netdev->stats;
5602 #else
5603         /* only return the current stats */
5604         return &adapter->net_stats;
5605 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5606 }
5607
5608 /**
5609  * igb_change_mtu - Change the Maximum Transfer Unit
5610  * @netdev: network interface device structure
5611  * @new_mtu: new value for maximum frame size
5612  *
5613  * Returns 0 on success, negative on failure
5614  **/
5615 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5616 {
5617         struct igb_adapter *adapter = netdev_priv(netdev);
5618         struct e1000_hw *hw = &adapter->hw;
5619         struct pci_dev *pdev = adapter->pdev;
5620         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5621
5622         if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
5623                 dev_err(pci_dev_to_dev(pdev), "Invalid MTU setting\n");
5624                 return -EINVAL;
5625         }
5626
5627 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5628         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
5629                 dev_err(pci_dev_to_dev(pdev), "MTU > 9216 not supported.\n");
5630                 return -EINVAL;
5631         }
5632
5633         /* adjust max frame to be at least the size of a standard frame */
5634         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5635                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5636
5637         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5638                 usleep_range(1000, 2000);
5639
5640         /* igb_down has a dependency on max_frame_size */
5641         adapter->max_frame_size = max_frame;
5642
5643         if (netif_running(netdev))
5644                 igb_down(adapter);
5645
5646         dev_info(pci_dev_to_dev(pdev), "changing MTU from %d to %d\n",
5647                 netdev->mtu, new_mtu);
5648         netdev->mtu = new_mtu;
5649         hw->dev_spec._82575.mtu = new_mtu;
5650
5651         if (netif_running(netdev))
5652                 igb_up(adapter);
5653         else
5654                 igb_reset(adapter);
5655
5656         clear_bit(__IGB_RESETTING, &adapter->state);
5657
5658         return 0;
5659 }
5660
5661 /**
5662  * igb_update_stats - Update the board statistics counters
5663  * @adapter: board private structure
5664  **/
5665
5666 void igb_update_stats(struct igb_adapter *adapter)
5667 {
5668 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5669         struct net_device_stats *net_stats = &adapter->netdev->stats;
5670 #else
5671         struct net_device_stats *net_stats = &adapter->net_stats;
5672 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5673         struct e1000_hw *hw = &adapter->hw;
5674 #ifdef HAVE_PCI_ERS
5675         struct pci_dev *pdev = adapter->pdev;
5676 #endif
5677         u32 reg, mpc;
5678         u16 phy_tmp;
5679         int i;
5680         u64 bytes, packets;
5681 #ifndef IGB_NO_LRO
5682         u32 flushed = 0, coal = 0;
5683         struct igb_q_vector *q_vector;
5684 #endif
5685
5686 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
5687
5688         /*
5689          * Prevent stats update while adapter is being reset, or if the pci
5690          * connection is down.
5691          */
5692         if (adapter->link_speed == 0)
5693                 return;
5694 #ifdef HAVE_PCI_ERS
5695         if (pci_channel_offline(pdev))
5696                 return;
5697
5698 #endif
5699 #ifndef IGB_NO_LRO
5700         for (i = 0; i < adapter->num_q_vectors; i++) {
5701                 q_vector = adapter->q_vector[i];
5702                 if (!q_vector)
5703                         continue;
5704                 flushed += q_vector->lrolist.stats.flushed;
5705                 coal += q_vector->lrolist.stats.coal;
5706         }
5707         adapter->lro_stats.flushed = flushed;
5708         adapter->lro_stats.coal = coal;
5709
5710 #endif
5711         bytes = 0;
5712         packets = 0;
5713         for (i = 0; i < adapter->num_rx_queues; i++) {
5714                 u32 rqdpc_tmp = E1000_READ_REG(hw, E1000_RQDPC(i)) & 0x0FFF;
5715                 struct igb_ring *ring = adapter->rx_ring[i];
5716                 ring->rx_stats.drops += rqdpc_tmp;
5717                 net_stats->rx_fifo_errors += rqdpc_tmp;
5718 #ifdef CONFIG_IGB_VMDQ_NETDEV
5719                 if (!ring->vmdq_netdev) {
5720                         bytes += ring->rx_stats.bytes;
5721                         packets += ring->rx_stats.packets;
5722                 }
5723 #else
5724                 bytes += ring->rx_stats.bytes;
5725                 packets += ring->rx_stats.packets;
5726 #endif
5727         }
5728
5729         net_stats->rx_bytes = bytes;
5730         net_stats->rx_packets = packets;
5731
5732         bytes = 0;
5733         packets = 0;
5734         for (i = 0; i < adapter->num_tx_queues; i++) {
5735                 struct igb_ring *ring = adapter->tx_ring[i];
5736 #ifdef CONFIG_IGB_VMDQ_NETDEV
5737                 if (!ring->vmdq_netdev) {
5738                         bytes += ring->tx_stats.bytes;
5739                         packets += ring->tx_stats.packets;
5740                 }
5741 #else
5742                 bytes += ring->tx_stats.bytes;
5743                 packets += ring->tx_stats.packets;
5744 #endif
5745         }
5746         net_stats->tx_bytes = bytes;
5747         net_stats->tx_packets = packets;
5748
5749         /* read stats registers */
5750         adapter->stats.crcerrs += E1000_READ_REG(hw, E1000_CRCERRS);
5751         adapter->stats.gprc += E1000_READ_REG(hw, E1000_GPRC);
5752         adapter->stats.gorc += E1000_READ_REG(hw, E1000_GORCL);
5753         E1000_READ_REG(hw, E1000_GORCH); /* clear GORCL */
5754         adapter->stats.bprc += E1000_READ_REG(hw, E1000_BPRC);
5755         adapter->stats.mprc += E1000_READ_REG(hw, E1000_MPRC);
5756         adapter->stats.roc += E1000_READ_REG(hw, E1000_ROC);
5757
5758         adapter->stats.prc64 += E1000_READ_REG(hw, E1000_PRC64);
5759         adapter->stats.prc127 += E1000_READ_REG(hw, E1000_PRC127);
5760         adapter->stats.prc255 += E1000_READ_REG(hw, E1000_PRC255);
5761         adapter->stats.prc511 += E1000_READ_REG(hw, E1000_PRC511);
5762         adapter->stats.prc1023 += E1000_READ_REG(hw, E1000_PRC1023);
5763         adapter->stats.prc1522 += E1000_READ_REG(hw, E1000_PRC1522);
5764         adapter->stats.symerrs += E1000_READ_REG(hw, E1000_SYMERRS);
5765         adapter->stats.sec += E1000_READ_REG(hw, E1000_SEC);
5766
5767         mpc = E1000_READ_REG(hw, E1000_MPC);
5768         adapter->stats.mpc += mpc;
5769         net_stats->rx_fifo_errors += mpc;
5770         adapter->stats.scc += E1000_READ_REG(hw, E1000_SCC);
5771         adapter->stats.ecol += E1000_READ_REG(hw, E1000_ECOL);
5772         adapter->stats.mcc += E1000_READ_REG(hw, E1000_MCC);
5773         adapter->stats.latecol += E1000_READ_REG(hw, E1000_LATECOL);
5774         adapter->stats.dc += E1000_READ_REG(hw, E1000_DC);
5775         adapter->stats.rlec += E1000_READ_REG(hw, E1000_RLEC);
5776         adapter->stats.xonrxc += E1000_READ_REG(hw, E1000_XONRXC);
5777         adapter->stats.xontxc += E1000_READ_REG(hw, E1000_XONTXC);
5778         adapter->stats.xoffrxc += E1000_READ_REG(hw, E1000_XOFFRXC);
5779         adapter->stats.xofftxc += E1000_READ_REG(hw, E1000_XOFFTXC);
5780         adapter->stats.fcruc += E1000_READ_REG(hw, E1000_FCRUC);
5781         adapter->stats.gptc += E1000_READ_REG(hw, E1000_GPTC);
5782         adapter->stats.gotc += E1000_READ_REG(hw, E1000_GOTCL);
5783         E1000_READ_REG(hw, E1000_GOTCH); /* clear GOTCL */
5784         adapter->stats.rnbc += E1000_READ_REG(hw, E1000_RNBC);
5785         adapter->stats.ruc += E1000_READ_REG(hw, E1000_RUC);
5786         adapter->stats.rfc += E1000_READ_REG(hw, E1000_RFC);
5787         adapter->stats.rjc += E1000_READ_REG(hw, E1000_RJC);
5788         adapter->stats.tor += E1000_READ_REG(hw, E1000_TORH);
5789         adapter->stats.tot += E1000_READ_REG(hw, E1000_TOTH);
5790         adapter->stats.tpr += E1000_READ_REG(hw, E1000_TPR);
5791
5792         adapter->stats.ptc64 += E1000_READ_REG(hw, E1000_PTC64);
5793         adapter->stats.ptc127 += E1000_READ_REG(hw, E1000_PTC127);
5794         adapter->stats.ptc255 += E1000_READ_REG(hw, E1000_PTC255);
5795         adapter->stats.ptc511 += E1000_READ_REG(hw, E1000_PTC511);
5796         adapter->stats.ptc1023 += E1000_READ_REG(hw, E1000_PTC1023);
5797         adapter->stats.ptc1522 += E1000_READ_REG(hw, E1000_PTC1522);
5798
5799         adapter->stats.mptc += E1000_READ_REG(hw, E1000_MPTC);
5800         adapter->stats.bptc += E1000_READ_REG(hw, E1000_BPTC);
5801
5802         adapter->stats.tpt += E1000_READ_REG(hw, E1000_TPT);
5803         adapter->stats.colc += E1000_READ_REG(hw, E1000_COLC);
5804
5805         adapter->stats.algnerrc += E1000_READ_REG(hw, E1000_ALGNERRC);
5806         /* read internal phy sepecific stats */
5807         reg = E1000_READ_REG(hw, E1000_CTRL_EXT);
5808         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5809                 adapter->stats.rxerrc += E1000_READ_REG(hw, E1000_RXERRC);
5810
5811                 /* this stat has invalid values on i210/i211 */
5812                 if ((hw->mac.type != e1000_i210) &&
5813                     (hw->mac.type != e1000_i211))
5814                         adapter->stats.tncrs += E1000_READ_REG(hw, E1000_TNCRS);
5815         }
5816         adapter->stats.tsctc += E1000_READ_REG(hw, E1000_TSCTC);
5817         adapter->stats.tsctfc += E1000_READ_REG(hw, E1000_TSCTFC);
5818
5819         adapter->stats.iac += E1000_READ_REG(hw, E1000_IAC);
5820         adapter->stats.icrxoc += E1000_READ_REG(hw, E1000_ICRXOC);
5821         adapter->stats.icrxptc += E1000_READ_REG(hw, E1000_ICRXPTC);
5822         adapter->stats.icrxatc += E1000_READ_REG(hw, E1000_ICRXATC);
5823         adapter->stats.ictxptc += E1000_READ_REG(hw, E1000_ICTXPTC);
5824         adapter->stats.ictxatc += E1000_READ_REG(hw, E1000_ICTXATC);
5825         adapter->stats.ictxqec += E1000_READ_REG(hw, E1000_ICTXQEC);
5826         adapter->stats.ictxqmtc += E1000_READ_REG(hw, E1000_ICTXQMTC);
5827         adapter->stats.icrxdmtc += E1000_READ_REG(hw, E1000_ICRXDMTC);
5828
5829         /* Fill out the OS statistics structure */
5830         net_stats->multicast = adapter->stats.mprc;
5831         net_stats->collisions = adapter->stats.colc;
5832
5833         /* Rx Errors */
5834
5835         /* RLEC on some newer hardware can be incorrect so build
5836          * our own version based on RUC and ROC */
5837         net_stats->rx_errors = adapter->stats.rxerrc +
5838                 adapter->stats.crcerrs + adapter->stats.algnerrc +
5839                 adapter->stats.ruc + adapter->stats.roc +
5840                 adapter->stats.cexterr;
5841         net_stats->rx_length_errors = adapter->stats.ruc +
5842                                       adapter->stats.roc;
5843         net_stats->rx_crc_errors = adapter->stats.crcerrs;
5844         net_stats->rx_frame_errors = adapter->stats.algnerrc;
5845         net_stats->rx_missed_errors = adapter->stats.mpc;
5846
5847         /* Tx Errors */
5848         net_stats->tx_errors = adapter->stats.ecol +
5849                                adapter->stats.latecol;
5850         net_stats->tx_aborted_errors = adapter->stats.ecol;
5851         net_stats->tx_window_errors = adapter->stats.latecol;
5852         net_stats->tx_carrier_errors = adapter->stats.tncrs;
5853
5854         /* Tx Dropped needs to be maintained elsewhere */
5855
5856         /* Phy Stats */
5857         if (hw->phy.media_type == e1000_media_type_copper) {
5858                 if ((adapter->link_speed == SPEED_1000) &&
5859                    (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
5860                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
5861                         adapter->phy_stats.idle_errors += phy_tmp;
5862                 }
5863         }
5864
5865         /* Management Stats */
5866         adapter->stats.mgptc += E1000_READ_REG(hw, E1000_MGTPTC);
5867         adapter->stats.mgprc += E1000_READ_REG(hw, E1000_MGTPRC);
5868         if (hw->mac.type > e1000_82580) {
5869                 adapter->stats.o2bgptc += E1000_READ_REG(hw, E1000_O2BGPTC);
5870                 adapter->stats.o2bspc += E1000_READ_REG(hw, E1000_O2BSPC);
5871                 adapter->stats.b2ospc += E1000_READ_REG(hw, E1000_B2OSPC);
5872                 adapter->stats.b2ogprc += E1000_READ_REG(hw, E1000_B2OGPRC);
5873         }
5874 }
5875
5876 static irqreturn_t igb_msix_other(int irq, void *data)
5877 {
5878         struct igb_adapter *adapter = data;
5879         struct e1000_hw *hw = &adapter->hw;
5880         u32 icr = E1000_READ_REG(hw, E1000_ICR);
5881         /* reading ICR causes bit 31 of EICR to be cleared */
5882
5883         if (icr & E1000_ICR_DRSTA)
5884                 schedule_work(&adapter->reset_task);
5885
5886         if (icr & E1000_ICR_DOUTSYNC) {
5887                 /* HW is reporting DMA is out of sync */
5888                 adapter->stats.doosync++;
5889                 /* The DMA Out of Sync is also indication of a spoof event
5890                  * in IOV mode. Check the Wrong VM Behavior register to
5891                  * see if it is really a spoof event. */
5892                 igb_check_wvbr(adapter);
5893         }
5894
5895         /* Check for a mailbox event */
5896         if (icr & E1000_ICR_VMMB)
5897                 igb_msg_task(adapter);
5898
5899         if (icr & E1000_ICR_LSC) {
5900                 hw->mac.get_link_status = 1;
5901                 /* guard against interrupt when we're going down */
5902                 if (!test_bit(__IGB_DOWN, &adapter->state))
5903                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5904         }
5905
5906 #ifdef HAVE_PTP_1588_CLOCK
5907         if (icr & E1000_ICR_TS) {
5908                 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
5909
5910                 if (tsicr & E1000_TSICR_TXTS) {
5911                         /* acknowledge the interrupt */
5912                         E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
5913                         /* retrieve hardware timestamp */
5914                         schedule_work(&adapter->ptp_tx_work);
5915                 }
5916         }
5917 #endif /* HAVE_PTP_1588_CLOCK */
5918
5919         /* Check for MDD event */
5920         if (icr & E1000_ICR_MDDET)
5921                 igb_process_mdd_event(adapter);
5922
5923         E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_other);
5924
5925         return IRQ_HANDLED;
5926 }
5927
5928 static void igb_write_itr(struct igb_q_vector *q_vector)
5929 {
5930         struct igb_adapter *adapter = q_vector->adapter;
5931         u32 itr_val = q_vector->itr_val & 0x7FFC;
5932
5933         if (!q_vector->set_itr)
5934                 return;
5935
5936         if (!itr_val)
5937                 itr_val = 0x4;
5938
5939         if (adapter->hw.mac.type == e1000_82575)
5940                 itr_val |= itr_val << 16;
5941         else
5942                 itr_val |= E1000_EITR_CNT_IGNR;
5943
5944         writel(itr_val, q_vector->itr_register);
5945         q_vector->set_itr = 0;
5946 }
5947
5948 static irqreturn_t igb_msix_ring(int irq, void *data)
5949 {
5950         struct igb_q_vector *q_vector = data;
5951
5952         /* Write the ITR value calculated from the previous interrupt. */
5953         igb_write_itr(q_vector);
5954
5955         napi_schedule(&q_vector->napi);
5956
5957         return IRQ_HANDLED;
5958 }
5959
5960 #ifdef IGB_DCA
5961 static void igb_update_tx_dca(struct igb_adapter *adapter,
5962                               struct igb_ring *tx_ring,
5963                               int cpu)
5964 {
5965         struct e1000_hw *hw = &adapter->hw;
5966         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5967
5968         if (hw->mac.type != e1000_82575)
5969                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT_82576;
5970
5971         /*
5972          * We can enable relaxed ordering for reads, but not writes when
5973          * DCA is enabled.  This is due to a known issue in some chipsets
5974          * which will cause the DCA tag to be cleared.
5975          */
5976         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5977                   E1000_DCA_TXCTRL_DATA_RRO_EN |
5978                   E1000_DCA_TXCTRL_DESC_DCA_EN;
5979
5980         E1000_WRITE_REG(hw, E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
5981 }
5982
5983 static void igb_update_rx_dca(struct igb_adapter *adapter,
5984                               struct igb_ring *rx_ring,
5985                               int cpu)
5986 {
5987         struct e1000_hw *hw = &adapter->hw;
5988         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
5989
5990         if (hw->mac.type != e1000_82575)
5991                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT_82576;
5992
5993         /*
5994          * We can enable relaxed ordering for reads, but not writes when
5995          * DCA is enabled.  This is due to a known issue in some chipsets
5996          * which will cause the DCA tag to be cleared.
5997          */
5998         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
5999                   E1000_DCA_RXCTRL_DESC_DCA_EN;
6000
6001         E1000_WRITE_REG(hw, E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
6002 }
6003
6004 static void igb_update_dca(struct igb_q_vector *q_vector)
6005 {
6006         struct igb_adapter *adapter = q_vector->adapter;
6007         int cpu = get_cpu();
6008
6009         if (q_vector->cpu == cpu)
6010                 goto out_no_update;
6011
6012         if (q_vector->tx.ring)
6013                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
6014
6015         if (q_vector->rx.ring)
6016                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
6017
6018         q_vector->cpu = cpu;
6019 out_no_update:
6020         put_cpu();
6021 }
6022
6023 static void igb_setup_dca(struct igb_adapter *adapter)
6024 {
6025         struct e1000_hw *hw = &adapter->hw;
6026         int i;
6027
6028         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
6029                 return;
6030
6031         /* Always use CB2 mode, difference is masked in the CB driver. */
6032         E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
6033
6034         for (i = 0; i < adapter->num_q_vectors; i++) {
6035                 adapter->q_vector[i]->cpu = -1;
6036                 igb_update_dca(adapter->q_vector[i]);
6037         }
6038 }
6039
6040 static int __igb_notify_dca(struct device *dev, void *data)
6041 {
6042         struct net_device *netdev = dev_get_drvdata(dev);
6043         struct igb_adapter *adapter = netdev_priv(netdev);
6044         struct pci_dev *pdev = adapter->pdev;
6045         struct e1000_hw *hw = &adapter->hw;
6046         unsigned long event = *(unsigned long *)data;
6047
6048         switch (event) {
6049         case DCA_PROVIDER_ADD:
6050                 /* if already enabled, don't do it again */
6051                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
6052                         break;
6053                 if (dca_add_requester(dev) == E1000_SUCCESS) {
6054                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
6055                         dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
6056                         igb_setup_dca(adapter);
6057                         break;
6058                 }
6059                 /* Fall Through since DCA is disabled. */
6060         case DCA_PROVIDER_REMOVE:
6061                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
6062                         /* without this a class_device is left
6063                          * hanging around in the sysfs model */
6064                         dca_remove_requester(dev);
6065                         dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
6066                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
6067                         E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
6068                 }
6069                 break;
6070         }
6071
6072         return E1000_SUCCESS;
6073 }
6074
6075 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
6076                           void *p)
6077 {
6078         int ret_val;
6079
6080         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
6081                                          __igb_notify_dca);
6082
6083         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
6084 }
6085 #endif /* IGB_DCA */
6086
6087 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
6088 {
6089         unsigned char mac_addr[ETH_ALEN];
6090
6091         random_ether_addr(mac_addr);
6092         igb_set_vf_mac(adapter, vf, mac_addr);
6093
6094 #ifdef IFLA_VF_MAX
6095 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6096         /* By default spoof check is enabled for all VFs */
6097         adapter->vf_data[vf].spoofchk_enabled = true;
6098 #endif
6099 #endif
6100
6101         return true;
6102 }
6103
6104 static void igb_ping_all_vfs(struct igb_adapter *adapter)
6105 {
6106         struct e1000_hw *hw = &adapter->hw;
6107         u32 ping;
6108         int i;
6109
6110         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
6111                 ping = E1000_PF_CONTROL_MSG;
6112                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
6113                         ping |= E1000_VT_MSGTYPE_CTS;
6114                 e1000_write_mbx(hw, &ping, 1, i);
6115         }
6116 }
6117
6118 /**
6119  *  igb_mta_set_ - Set multicast filter table address
6120  *  @adapter: pointer to the adapter structure
6121  *  @hash_value: determines the MTA register and bit to set
6122  *
6123  *  The multicast table address is a register array of 32-bit registers.
6124  *  The hash_value is used to determine what register the bit is in, the
6125  *  current value is read, the new bit is OR'd in and the new value is
6126  *  written back into the register.
6127  **/
6128 void igb_mta_set(struct igb_adapter *adapter, u32 hash_value)
6129 {
6130         struct e1000_hw *hw = &adapter->hw;
6131         u32 hash_bit, hash_reg, mta;
6132
6133         /*
6134          * The MTA is a register array of 32-bit registers. It is
6135          * treated like an array of (32*mta_reg_count) bits.  We want to
6136          * set bit BitArray[hash_value]. So we figure out what register
6137          * the bit is in, read it, OR in the new bit, then write
6138          * back the new value.  The (hw->mac.mta_reg_count - 1) serves as a
6139          * mask to bits 31:5 of the hash value which gives us the
6140          * register we're modifying.  The hash bit within that register
6141          * is determined by the lower 5 bits of the hash value.
6142          */
6143         hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1);
6144         hash_bit = hash_value & 0x1F;
6145
6146         mta = E1000_READ_REG_ARRAY(hw, E1000_MTA, hash_reg);
6147
6148         mta |= (1 << hash_bit);
6149
6150         E1000_WRITE_REG_ARRAY(hw, E1000_MTA, hash_reg, mta);
6151         E1000_WRITE_FLUSH(hw);
6152 }
6153
6154 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6155 {
6156
6157         struct e1000_hw *hw = &adapter->hw;
6158         u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(vf));
6159         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6160
6161         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
6162                             IGB_VF_FLAG_MULTI_PROMISC);
6163         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6164
6165 #ifdef IGB_ENABLE_VF_PROMISC
6166         if (*msgbuf & E1000_VF_SET_PROMISC_UNICAST) {
6167                 vmolr |= E1000_VMOLR_ROPE;
6168                 vf_data->flags |= IGB_VF_FLAG_UNI_PROMISC;
6169                 *msgbuf &= ~E1000_VF_SET_PROMISC_UNICAST;
6170         }
6171 #endif
6172         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
6173                 vmolr |= E1000_VMOLR_MPME;
6174                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
6175                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
6176         } else {
6177                 /*
6178                  * if we have hashes and we are clearing a multicast promisc
6179                  * flag we need to write the hashes to the MTA as this step
6180                  * was previously skipped
6181                  */
6182                 if (vf_data->num_vf_mc_hashes > 30) {
6183                         vmolr |= E1000_VMOLR_MPME;
6184                 } else if (vf_data->num_vf_mc_hashes) {
6185                         int j;
6186                         vmolr |= E1000_VMOLR_ROMPE;
6187                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6188                                 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6189                 }
6190         }
6191
6192         E1000_WRITE_REG(hw, E1000_VMOLR(vf), vmolr);
6193
6194         /* there are flags left unprocessed, likely not supported */
6195         if (*msgbuf & E1000_VT_MSGINFO_MASK)
6196                 return -EINVAL;
6197
6198         return 0;
6199
6200 }
6201
6202 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
6203                                   u32 *msgbuf, u32 vf)
6204 {
6205         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6206         u16 *hash_list = (u16 *)&msgbuf[1];
6207         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6208         int i;
6209
6210         /* salt away the number of multicast addresses assigned
6211          * to this VF for later use to restore when the PF multi cast
6212          * list changes
6213          */
6214         vf_data->num_vf_mc_hashes = n;
6215
6216         /* only up to 30 hash values supported */
6217         if (n > 30)
6218                 n = 30;
6219
6220         /* store the hashes for later use */
6221         for (i = 0; i < n; i++)
6222                 vf_data->vf_mc_hashes[i] = hash_list[i];
6223
6224         /* Flush and reset the mta with the new values */
6225         igb_set_rx_mode(adapter->netdev);
6226
6227         return 0;
6228 }
6229
6230 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
6231 {
6232         struct e1000_hw *hw = &adapter->hw;
6233         struct vf_data_storage *vf_data;
6234         int i, j;
6235
6236         for (i = 0; i < adapter->vfs_allocated_count; i++) {
6237                 u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(i));
6238                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6239
6240                 vf_data = &adapter->vf_data[i];
6241
6242                 if ((vf_data->num_vf_mc_hashes > 30) ||
6243                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
6244                         vmolr |= E1000_VMOLR_MPME;
6245                 } else if (vf_data->num_vf_mc_hashes) {
6246                         vmolr |= E1000_VMOLR_ROMPE;
6247                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6248                                 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6249                 }
6250                 E1000_WRITE_REG(hw, E1000_VMOLR(i), vmolr);
6251         }
6252 }
6253
6254 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
6255 {
6256         struct e1000_hw *hw = &adapter->hw;
6257         u32 pool_mask, reg, vid;
6258         u16 vlan_default;
6259         int i;
6260
6261         pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6262
6263         /* Find the vlan filter for this id */
6264         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6265                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6266
6267                 /* remove the vf from the pool */
6268                 reg &= ~pool_mask;
6269
6270                 /* if pool is empty then remove entry from vfta */
6271                 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
6272                     (reg & E1000_VLVF_VLANID_ENABLE)) {
6273                         reg = 0;
6274                         vid = reg & E1000_VLVF_VLANID_MASK;
6275                         igb_vfta_set(adapter, vid, FALSE);
6276                 }
6277
6278                 E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6279         }
6280
6281         adapter->vf_data[vf].vlans_enabled = 0;
6282
6283         vlan_default = adapter->vf_data[vf].default_vf_vlan_id;
6284         if (vlan_default)
6285                 igb_vlvf_set(adapter, vlan_default, true, vf);
6286 }
6287
6288 s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
6289 {
6290         struct e1000_hw *hw = &adapter->hw;
6291         u32 reg, i;
6292
6293         /* The vlvf table only exists on 82576 hardware and newer */
6294         if (hw->mac.type < e1000_82576)
6295                 return -1;
6296
6297         /* we only need to do this if VMDq is enabled */
6298         if (!adapter->vmdq_pools)
6299                 return -1;
6300
6301         /* Find the vlan filter for this id */
6302         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6303                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6304                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6305                     vid == (reg & E1000_VLVF_VLANID_MASK))
6306                         break;
6307         }
6308
6309         if (add) {
6310                 if (i == E1000_VLVF_ARRAY_SIZE) {
6311                         /* Did not find a matching VLAN ID entry that was
6312                          * enabled.  Search for a free filter entry, i.e.
6313                          * one without the enable bit set
6314                          */
6315                         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6316                                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6317                                 if (!(reg & E1000_VLVF_VLANID_ENABLE))
6318                                         break;
6319                         }
6320                 }
6321                 if (i < E1000_VLVF_ARRAY_SIZE) {
6322                         /* Found an enabled/available entry */
6323                         reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6324
6325                         /* if !enabled we need to set this up in vfta */
6326                         if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
6327                                 /* add VID to filter table */
6328                                 igb_vfta_set(adapter, vid, TRUE);
6329                                 reg |= E1000_VLVF_VLANID_ENABLE;
6330                         }
6331                         reg &= ~E1000_VLVF_VLANID_MASK;
6332                         reg |= vid;
6333                         E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6334
6335                         /* do not modify RLPML for PF devices */
6336                         if (vf >= adapter->vfs_allocated_count)
6337                                 return E1000_SUCCESS;
6338
6339                         if (!adapter->vf_data[vf].vlans_enabled) {
6340                                 u32 size;
6341                                 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6342                                 size = reg & E1000_VMOLR_RLPML_MASK;
6343                                 size += 4;
6344                                 reg &= ~E1000_VMOLR_RLPML_MASK;
6345                                 reg |= size;
6346                                 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6347                         }
6348
6349                         adapter->vf_data[vf].vlans_enabled++;
6350                 }
6351         } else {
6352                 if (i < E1000_VLVF_ARRAY_SIZE) {
6353                         /* remove vf from the pool */
6354                         reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
6355                         /* if pool is empty then remove entry from vfta */
6356                         if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
6357                                 reg = 0;
6358                                 igb_vfta_set(adapter, vid, FALSE);
6359                         }
6360                         E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6361
6362                         /* do not modify RLPML for PF devices */
6363                         if (vf >= adapter->vfs_allocated_count)
6364                                 return E1000_SUCCESS;
6365
6366                         adapter->vf_data[vf].vlans_enabled--;
6367                         if (!adapter->vf_data[vf].vlans_enabled) {
6368                                 u32 size;
6369                                 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6370                                 size = reg & E1000_VMOLR_RLPML_MASK;
6371                                 size -= 4;
6372                                 reg &= ~E1000_VMOLR_RLPML_MASK;
6373                                 reg |= size;
6374                                 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6375                         }
6376                 }
6377         }
6378         return E1000_SUCCESS;
6379 }
6380
6381 #ifdef IFLA_VF_MAX
6382 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
6383 {
6384         struct e1000_hw *hw = &adapter->hw;
6385
6386         if (vid)
6387                 E1000_WRITE_REG(hw, E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
6388         else
6389                 E1000_WRITE_REG(hw, E1000_VMVIR(vf), 0);
6390 }
6391
6392 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
6393                                int vf, u16 vlan, u8 qos)
6394 {
6395         int err = 0;
6396         struct igb_adapter *adapter = netdev_priv(netdev);
6397
6398         /* VLAN IDs accepted range 0-4094 */
6399         if ((vf >= adapter->vfs_allocated_count) || (vlan > VLAN_VID_MASK-1) || (qos > 7))
6400                 return -EINVAL;
6401         if (vlan || qos) {
6402                 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
6403                 if (err)
6404                         goto out;
6405                 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
6406                 igb_set_vmolr(adapter, vf, !vlan);
6407                 adapter->vf_data[vf].pf_vlan = vlan;
6408                 adapter->vf_data[vf].pf_qos = qos;
6409                 igb_set_vf_vlan_strip(adapter, vf, true);
6410                 dev_info(&adapter->pdev->dev,
6411                          "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
6412                 if (test_bit(__IGB_DOWN, &adapter->state)) {
6413                         dev_warn(&adapter->pdev->dev,
6414                                  "The VF VLAN has been set,"
6415                                  " but the PF device is not up.\n");
6416                         dev_warn(&adapter->pdev->dev,
6417                                  "Bring the PF device up before"
6418                                  " attempting to use the VF device.\n");
6419                 }
6420         } else {
6421                 if (adapter->vf_data[vf].pf_vlan)
6422                         dev_info(&adapter->pdev->dev,
6423                                  "Clearing VLAN on VF %d\n", vf);
6424                 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
6425                                    false, vf);
6426                 igb_set_vmvir(adapter, vlan, vf);
6427                 igb_set_vmolr(adapter, vf, true);
6428                 igb_set_vf_vlan_strip(adapter, vf, false);
6429                 adapter->vf_data[vf].pf_vlan = 0;
6430                 adapter->vf_data[vf].pf_qos = 0;
6431        }
6432 out:
6433        return err;
6434 }
6435
6436 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6437 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
6438                                 bool setting)
6439 {
6440         struct igb_adapter *adapter = netdev_priv(netdev);
6441         struct e1000_hw *hw = &adapter->hw;
6442         u32 dtxswc, reg_offset;
6443
6444         if (!adapter->vfs_allocated_count)
6445                 return -EOPNOTSUPP;
6446
6447         if (vf >= adapter->vfs_allocated_count)
6448                 return -EINVAL;
6449
6450         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
6451         dtxswc = E1000_READ_REG(hw, reg_offset);
6452         if (setting)
6453                 dtxswc |= ((1 << vf) |
6454                            (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6455         else
6456                 dtxswc &= ~((1 << vf) |
6457                             (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6458         E1000_WRITE_REG(hw, reg_offset, dtxswc);
6459
6460         adapter->vf_data[vf].spoofchk_enabled = setting;
6461         return E1000_SUCCESS;
6462 }
6463 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
6464 #endif /* IFLA_VF_MAX */
6465
6466 static int igb_find_vlvf_entry(struct igb_adapter *adapter, int vid)
6467 {
6468         struct e1000_hw *hw = &adapter->hw;
6469         int i;
6470         u32 reg;
6471
6472         /* Find the vlan filter for this id */
6473         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6474                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6475                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6476                     vid == (reg & E1000_VLVF_VLANID_MASK))
6477                         break;
6478         }
6479
6480         if (i >= E1000_VLVF_ARRAY_SIZE)
6481                 i = -1;
6482
6483         return i;
6484 }
6485
6486 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6487 {
6488         struct e1000_hw *hw = &adapter->hw;
6489         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6490         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
6491         int err = 0;
6492
6493         if (vid)
6494                 igb_set_vf_vlan_strip(adapter, vf, true);
6495         else
6496                 igb_set_vf_vlan_strip(adapter, vf, false);
6497
6498         /* If in promiscuous mode we need to make sure the PF also has
6499          * the VLAN filter set.
6500          */
6501         if (add && (adapter->netdev->flags & IFF_PROMISC))
6502                 err = igb_vlvf_set(adapter, vid, add,
6503                                    adapter->vfs_allocated_count);
6504         if (err)
6505                 goto out;
6506
6507         err = igb_vlvf_set(adapter, vid, add, vf);
6508
6509         if (err)
6510                 goto out;
6511
6512         /* Go through all the checks to see if the VLAN filter should
6513          * be wiped completely.
6514          */
6515         if (!add && (adapter->netdev->flags & IFF_PROMISC)) {
6516                 u32 vlvf, bits;
6517
6518                 int regndx = igb_find_vlvf_entry(adapter, vid);
6519                 if (regndx < 0)
6520                         goto out;
6521                 /* See if any other pools are set for this VLAN filter
6522                  * entry other than the PF.
6523                  */
6524                 vlvf = bits = E1000_READ_REG(hw, E1000_VLVF(regndx));
6525                 bits &= 1 << (E1000_VLVF_POOLSEL_SHIFT +
6526                               adapter->vfs_allocated_count);
6527                 /* If the filter was removed then ensure PF pool bit
6528                  * is cleared if the PF only added itself to the pool
6529                  * because the PF is in promiscuous mode.
6530                  */
6531                 if ((vlvf & VLAN_VID_MASK) == vid &&
6532 #ifndef HAVE_VLAN_RX_REGISTER
6533                     !test_bit(vid, adapter->active_vlans) &&
6534 #endif
6535                     !bits)
6536                         igb_vlvf_set(adapter, vid, add,
6537                                      adapter->vfs_allocated_count);
6538         }
6539
6540 out:
6541         return err;
6542 }
6543
6544 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
6545 {
6546         struct e1000_hw *hw = &adapter->hw;
6547
6548         /* clear flags except flag that the PF has set the MAC */
6549         adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
6550         adapter->vf_data[vf].last_nack = jiffies;
6551
6552         /* reset offloads to defaults */
6553         igb_set_vmolr(adapter, vf, true);
6554
6555         /* reset vlans for device */
6556         igb_clear_vf_vfta(adapter, vf);
6557 #ifdef IFLA_VF_MAX
6558         if (adapter->vf_data[vf].pf_vlan)
6559                 igb_ndo_set_vf_vlan(adapter->netdev, vf,
6560                                     adapter->vf_data[vf].pf_vlan,
6561                                     adapter->vf_data[vf].pf_qos);
6562         else
6563                 igb_clear_vf_vfta(adapter, vf);
6564 #endif
6565
6566         /* reset multicast table array for vf */
6567         adapter->vf_data[vf].num_vf_mc_hashes = 0;
6568
6569         /* Flush and reset the mta with the new values */
6570         igb_set_rx_mode(adapter->netdev);
6571
6572         /*
6573          * Reset the VFs TDWBAL and TDWBAH registers which are not
6574          * cleared by a VFLR
6575          */
6576         E1000_WRITE_REG(hw, E1000_TDWBAH(vf), 0);
6577         E1000_WRITE_REG(hw, E1000_TDWBAL(vf), 0);
6578         if (hw->mac.type == e1000_82576) {
6579                 E1000_WRITE_REG(hw, E1000_TDWBAH(IGB_MAX_VF_FUNCTIONS + vf), 0);
6580                 E1000_WRITE_REG(hw, E1000_TDWBAL(IGB_MAX_VF_FUNCTIONS + vf), 0);
6581         }
6582 }
6583
6584 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
6585 {
6586         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6587
6588         /* generate a new mac address as we were hotplug removed/added */
6589         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
6590                 random_ether_addr(vf_mac);
6591
6592         /* process remaining reset events */
6593         igb_vf_reset(adapter, vf);
6594 }
6595
6596 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
6597 {
6598         struct e1000_hw *hw = &adapter->hw;
6599         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6600         u32 reg, msgbuf[3];
6601         u8 *addr = (u8 *)(&msgbuf[1]);
6602
6603         /* process all the same items cleared in a function level reset */
6604         igb_vf_reset(adapter, vf);
6605
6606         /* set vf mac address */
6607         igb_del_mac_filter(adapter, vf_mac, vf);
6608         igb_add_mac_filter(adapter, vf_mac, vf);
6609
6610         /* enable transmit and receive for vf */
6611         reg = E1000_READ_REG(hw, E1000_VFTE);
6612         E1000_WRITE_REG(hw, E1000_VFTE, reg | (1 << vf));
6613         reg = E1000_READ_REG(hw, E1000_VFRE);
6614         E1000_WRITE_REG(hw, E1000_VFRE, reg | (1 << vf));
6615
6616         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
6617
6618         /* reply to reset with ack and vf mac address */
6619         msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
6620         memcpy(addr, vf_mac, 6);
6621         e1000_write_mbx(hw, msgbuf, 3, vf);
6622 }
6623
6624 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
6625 {
6626         /*
6627          * The VF MAC Address is stored in a packed array of bytes
6628          * starting at the second 32 bit word of the msg array
6629          */
6630         unsigned char *addr = (unsigned char *)&msg[1];
6631         int err = -1;
6632
6633         if (is_valid_ether_addr(addr))
6634                 err = igb_set_vf_mac(adapter, vf, addr);
6635
6636         return err;
6637 }
6638
6639 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
6640 {
6641         struct e1000_hw *hw = &adapter->hw;
6642         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6643         u32 msg = E1000_VT_MSGTYPE_NACK;
6644
6645         /* if device isn't clear to send it shouldn't be reading either */
6646         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
6647             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6648                 e1000_write_mbx(hw, &msg, 1, vf);
6649                 vf_data->last_nack = jiffies;
6650         }
6651 }
6652
6653 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
6654 {
6655         struct pci_dev *pdev = adapter->pdev;
6656         u32 msgbuf[E1000_VFMAILBOX_SIZE];
6657         struct e1000_hw *hw = &adapter->hw;
6658         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6659         s32 retval;
6660
6661         retval = e1000_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
6662
6663         if (retval) {
6664                 dev_err(pci_dev_to_dev(pdev), "Error receiving message from VF\n");
6665                 return;
6666         }
6667
6668         /* this is a message we already processed, do nothing */
6669         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
6670                 return;
6671
6672         /*
6673          * until the vf completes a reset it should not be
6674          * allowed to start any configuration.
6675          */
6676
6677         if (msgbuf[0] == E1000_VF_RESET) {
6678                 igb_vf_reset_msg(adapter, vf);
6679                 return;
6680         }
6681
6682         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
6683                 msgbuf[0] = E1000_VT_MSGTYPE_NACK;
6684                 if (time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6685                         e1000_write_mbx(hw, msgbuf, 1, vf);
6686                         vf_data->last_nack = jiffies;
6687                 }
6688                 return;
6689         }
6690
6691         switch ((msgbuf[0] & 0xFFFF)) {
6692         case E1000_VF_SET_MAC_ADDR:
6693                 retval = -EINVAL;
6694 #ifndef IGB_DISABLE_VF_MAC_SET
6695                 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
6696                         retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
6697                 else
6698                         DPRINTK(DRV, INFO,
6699                                 "VF %d attempted to override administratively "
6700                                 "set MAC address\nReload the VF driver to "
6701                                 "resume operations\n", vf);
6702 #endif
6703                 break;
6704         case E1000_VF_SET_PROMISC:
6705                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
6706                 break;
6707         case E1000_VF_SET_MULTICAST:
6708                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
6709                 break;
6710         case E1000_VF_SET_LPE:
6711                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
6712                 break;
6713         case E1000_VF_SET_VLAN:
6714                 retval = -1;
6715 #ifdef IFLA_VF_MAX
6716                 if (vf_data->pf_vlan)
6717                         DPRINTK(DRV, INFO,
6718                                 "VF %d attempted to override administratively "
6719                                 "set VLAN tag\nReload the VF driver to "
6720                                 "resume operations\n", vf);
6721                 else
6722 #endif
6723                         retval = igb_set_vf_vlan(adapter, msgbuf, vf);
6724                 break;
6725         default:
6726                 dev_err(pci_dev_to_dev(pdev), "Unhandled Msg %08x\n", msgbuf[0]);
6727                 retval = -E1000_ERR_MBX;
6728                 break;
6729         }
6730
6731         /* notify the VF of the results of what it sent us */
6732         if (retval)
6733                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6734         else
6735                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6736
6737         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6738
6739         e1000_write_mbx(hw, msgbuf, 1, vf);
6740 }
6741
6742 static void igb_msg_task(struct igb_adapter *adapter)
6743 {
6744         struct e1000_hw *hw = &adapter->hw;
6745         u32 vf;
6746
6747         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6748                 /* process any reset requests */
6749                 if (!e1000_check_for_rst(hw, vf))
6750                         igb_vf_reset_event(adapter, vf);
6751
6752                 /* process any messages pending */
6753                 if (!e1000_check_for_msg(hw, vf))
6754                         igb_rcv_msg_from_vf(adapter, vf);
6755
6756                 /* process any acks */
6757                 if (!e1000_check_for_ack(hw, vf))
6758                         igb_rcv_ack_from_vf(adapter, vf);
6759         }
6760 }
6761
6762 /**
6763  *  igb_set_uta - Set unicast filter table address
6764  *  @adapter: board private structure
6765  *
6766  *  The unicast table address is a register array of 32-bit registers.
6767  *  The table is meant to be used in a way similar to how the MTA is used
6768  *  however due to certain limitations in the hardware it is necessary to
6769  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6770  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
6771  **/
6772 static void igb_set_uta(struct igb_adapter *adapter)
6773 {
6774         struct e1000_hw *hw = &adapter->hw;
6775         int i;
6776
6777         /* The UTA table only exists on 82576 hardware and newer */
6778         if (hw->mac.type < e1000_82576)
6779                 return;
6780
6781         /* we only need to do this if VMDq is enabled */
6782         if (!adapter->vmdq_pools)
6783                 return;
6784
6785         for (i = 0; i < hw->mac.uta_reg_count; i++)
6786                 E1000_WRITE_REG_ARRAY(hw, E1000_UTA, i, ~0);
6787 }
6788
6789 /**
6790  * igb_intr_msi - Interrupt Handler
6791  * @irq: interrupt number
6792  * @data: pointer to a network interface device structure
6793  **/
6794 static irqreturn_t igb_intr_msi(int irq, void *data)
6795 {
6796         struct igb_adapter *adapter = data;
6797         struct igb_q_vector *q_vector = adapter->q_vector[0];
6798         struct e1000_hw *hw = &adapter->hw;
6799         /* read ICR disables interrupts using IAM */
6800         u32 icr = E1000_READ_REG(hw, E1000_ICR);
6801
6802         igb_write_itr(q_vector);
6803
6804         if (icr & E1000_ICR_DRSTA)
6805                 schedule_work(&adapter->reset_task);
6806
6807         if (icr & E1000_ICR_DOUTSYNC) {
6808                 /* HW is reporting DMA is out of sync */
6809                 adapter->stats.doosync++;
6810         }
6811
6812         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6813                 hw->mac.get_link_status = 1;
6814                 if (!test_bit(__IGB_DOWN, &adapter->state))
6815                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6816         }
6817
6818 #ifdef HAVE_PTP_1588_CLOCK
6819         if (icr & E1000_ICR_TS) {
6820                 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6821
6822                 if (tsicr & E1000_TSICR_TXTS) {
6823                         /* acknowledge the interrupt */
6824                         E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6825                         /* retrieve hardware timestamp */
6826                         schedule_work(&adapter->ptp_tx_work);
6827                 }
6828         }
6829 #endif /* HAVE_PTP_1588_CLOCK */
6830
6831         napi_schedule(&q_vector->napi);
6832
6833         return IRQ_HANDLED;
6834 }
6835
6836 /**
6837  * igb_intr - Legacy Interrupt Handler
6838  * @irq: interrupt number
6839  * @data: pointer to a network interface device structure
6840  **/
6841 static irqreturn_t igb_intr(int irq, void *data)
6842 {
6843         struct igb_adapter *adapter = data;
6844         struct igb_q_vector *q_vector = adapter->q_vector[0];
6845         struct e1000_hw *hw = &adapter->hw;
6846         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
6847          * need for the IMC write */
6848         u32 icr = E1000_READ_REG(hw, E1000_ICR);
6849
6850         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6851          * not set, then the adapter didn't send an interrupt */
6852         if (!(icr & E1000_ICR_INT_ASSERTED))
6853                 return IRQ_NONE;
6854
6855         igb_write_itr(q_vector);
6856
6857         if (icr & E1000_ICR_DRSTA)
6858                 schedule_work(&adapter->reset_task);
6859
6860         if (icr & E1000_ICR_DOUTSYNC) {
6861                 /* HW is reporting DMA is out of sync */
6862                 adapter->stats.doosync++;
6863         }
6864
6865         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6866                 hw->mac.get_link_status = 1;
6867                 /* guard against interrupt when we're going down */
6868                 if (!test_bit(__IGB_DOWN, &adapter->state))
6869                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6870         }
6871
6872 #ifdef HAVE_PTP_1588_CLOCK
6873         if (icr & E1000_ICR_TS) {
6874                 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6875
6876                 if (tsicr & E1000_TSICR_TXTS) {
6877                         /* acknowledge the interrupt */
6878                         E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6879                         /* retrieve hardware timestamp */
6880                         schedule_work(&adapter->ptp_tx_work);
6881                 }
6882         }
6883 #endif /* HAVE_PTP_1588_CLOCK */
6884
6885         napi_schedule(&q_vector->napi);
6886
6887         return IRQ_HANDLED;
6888 }
6889
6890 void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6891 {
6892         struct igb_adapter *adapter = q_vector->adapter;
6893         struct e1000_hw *hw = &adapter->hw;
6894
6895         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6896             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6897                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6898                         igb_set_itr(q_vector);
6899                 else
6900                         igb_update_ring_itr(q_vector);
6901         }
6902
6903         if (!test_bit(__IGB_DOWN, &adapter->state)) {
6904                 if (adapter->msix_entries)
6905                         E1000_WRITE_REG(hw, E1000_EIMS, q_vector->eims_value);
6906                 else
6907                         igb_irq_enable(adapter);
6908         }
6909 }
6910
6911 /**
6912  * igb_poll - NAPI Rx polling callback
6913  * @napi: napi polling structure
6914  * @budget: count of how many packets we should handle
6915  **/
6916 static int igb_poll(struct napi_struct *napi, int budget)
6917 {
6918         struct igb_q_vector *q_vector = container_of(napi, struct igb_q_vector, napi);
6919         bool clean_complete = true;
6920
6921 #ifdef IGB_DCA
6922         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6923                 igb_update_dca(q_vector);
6924 #endif
6925         if (q_vector->tx.ring)
6926                 clean_complete = igb_clean_tx_irq(q_vector);
6927
6928         if (q_vector->rx.ring)
6929                 clean_complete &= igb_clean_rx_irq(q_vector, budget);
6930
6931 #ifndef HAVE_NETDEV_NAPI_LIST
6932         /* if netdev is disabled we need to stop polling */
6933         if (!netif_running(q_vector->adapter->netdev))
6934                 clean_complete = true;
6935
6936 #endif
6937         /* If all work not completed, return budget and keep polling */
6938         if (!clean_complete)
6939                 return budget;
6940
6941         /* If not enough Rx work done, exit the polling mode */
6942         napi_complete(napi);
6943         igb_ring_irq_enable(q_vector);
6944
6945         return 0;
6946 }
6947
6948 /**
6949  * igb_clean_tx_irq - Reclaim resources after transmit completes
6950  * @q_vector: pointer to q_vector containing needed info
6951  * returns TRUE if ring is completely cleaned
6952  **/
6953 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
6954 {
6955         struct igb_adapter *adapter = q_vector->adapter;
6956         struct igb_ring *tx_ring = q_vector->tx.ring;
6957         struct igb_tx_buffer *tx_buffer;
6958         union e1000_adv_tx_desc *tx_desc;
6959         unsigned int total_bytes = 0, total_packets = 0;
6960         unsigned int budget = q_vector->tx.work_limit;
6961         unsigned int i = tx_ring->next_to_clean;
6962
6963         if (test_bit(__IGB_DOWN, &adapter->state))
6964                 return true;
6965
6966         tx_buffer = &tx_ring->tx_buffer_info[i];
6967         tx_desc = IGB_TX_DESC(tx_ring, i);
6968         i -= tx_ring->count;
6969
6970         do {
6971                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
6972
6973                 /* if next_to_watch is not set then there is no work pending */
6974                 if (!eop_desc)
6975                         break;
6976
6977                 /* prevent any other reads prior to eop_desc */
6978                 read_barrier_depends();
6979
6980                 /* if DD is not set pending work has not been completed */
6981                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
6982                         break;
6983
6984                 /* clear next_to_watch to prevent false hangs */
6985                 tx_buffer->next_to_watch = NULL;
6986
6987                 /* update the statistics for this packet */
6988                 total_bytes += tx_buffer->bytecount;
6989                 total_packets += tx_buffer->gso_segs;
6990
6991                 /* free the skb */
6992                 dev_kfree_skb_any(tx_buffer->skb);
6993
6994                 /* unmap skb header data */
6995                 dma_unmap_single(tx_ring->dev,
6996                                  dma_unmap_addr(tx_buffer, dma),
6997                                  dma_unmap_len(tx_buffer, len),
6998                                  DMA_TO_DEVICE);
6999
7000                 /* clear tx_buffer data */
7001                 tx_buffer->skb = NULL;
7002                 dma_unmap_len_set(tx_buffer, len, 0);
7003
7004                 /* clear last DMA location and unmap remaining buffers */
7005                 while (tx_desc != eop_desc) {
7006                         tx_buffer++;
7007                         tx_desc++;
7008                         i++;
7009                         if (unlikely(!i)) {
7010                                 i -= tx_ring->count;
7011                                 tx_buffer = tx_ring->tx_buffer_info;
7012                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
7013                         }
7014
7015                         /* unmap any remaining paged data */
7016                         if (dma_unmap_len(tx_buffer, len)) {
7017                                 dma_unmap_page(tx_ring->dev,
7018                                                dma_unmap_addr(tx_buffer, dma),
7019                                                dma_unmap_len(tx_buffer, len),
7020                                                DMA_TO_DEVICE);
7021                                 dma_unmap_len_set(tx_buffer, len, 0);
7022                         }
7023                 }
7024
7025                 /* move us one more past the eop_desc for start of next pkt */
7026                 tx_buffer++;
7027                 tx_desc++;
7028                 i++;
7029                 if (unlikely(!i)) {
7030                         i -= tx_ring->count;
7031                         tx_buffer = tx_ring->tx_buffer_info;
7032                         tx_desc = IGB_TX_DESC(tx_ring, 0);
7033                 }
7034
7035                 /* issue prefetch for next Tx descriptor */
7036                 prefetch(tx_desc);
7037
7038                 /* update budget accounting */
7039                 budget--;
7040         } while (likely(budget));
7041
7042         netdev_tx_completed_queue(txring_txq(tx_ring),
7043                                   total_packets, total_bytes);
7044
7045         i += tx_ring->count;
7046         tx_ring->next_to_clean = i;
7047         tx_ring->tx_stats.bytes += total_bytes;
7048         tx_ring->tx_stats.packets += total_packets;
7049         q_vector->tx.total_bytes += total_bytes;
7050         q_vector->tx.total_packets += total_packets;
7051
7052 #ifdef DEBUG
7053         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags) &&
7054             !(adapter->disable_hw_reset && adapter->tx_hang_detected)) {
7055 #else
7056         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
7057 #endif
7058                 struct e1000_hw *hw = &adapter->hw;
7059
7060                 /* Detect a transmit hang in hardware, this serializes the
7061                  * check with the clearing of time_stamp and movement of i */
7062                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
7063                 if (tx_buffer->next_to_watch &&
7064                     time_after(jiffies, tx_buffer->time_stamp +
7065                                (adapter->tx_timeout_factor * HZ))
7066                     && !(E1000_READ_REG(hw, E1000_STATUS) &
7067                          E1000_STATUS_TXOFF)) {
7068
7069                         /* detected Tx unit hang */
7070 #ifdef DEBUG
7071                         adapter->tx_hang_detected = TRUE;
7072                         if (adapter->disable_hw_reset) {
7073                                 DPRINTK(DRV, WARNING,
7074                                         "Deactivating netdev watchdog timer\n");
7075                                 if (del_timer(&netdev_ring(tx_ring)->watchdog_timer))
7076                                         dev_put(netdev_ring(tx_ring));
7077 #ifndef HAVE_NET_DEVICE_OPS
7078                                 netdev_ring(tx_ring)->tx_timeout = NULL;
7079 #endif
7080                         }
7081 #endif /* DEBUG */
7082                         dev_err(tx_ring->dev,
7083                                 "Detected Tx Unit Hang\n"
7084                                 "  Tx Queue             <%d>\n"
7085                                 "  TDH                  <%x>\n"
7086                                 "  TDT                  <%x>\n"
7087                                 "  next_to_use          <%x>\n"
7088                                 "  next_to_clean        <%x>\n"
7089                                 "buffer_info[next_to_clean]\n"
7090                                 "  time_stamp           <%lx>\n"
7091                                 "  next_to_watch        <%p>\n"
7092                                 "  jiffies              <%lx>\n"
7093                                 "  desc.status          <%x>\n",
7094                                 tx_ring->queue_index,
7095                                 E1000_READ_REG(hw, E1000_TDH(tx_ring->reg_idx)),
7096                                 readl(tx_ring->tail),
7097                                 tx_ring->next_to_use,
7098                                 tx_ring->next_to_clean,
7099                                 tx_buffer->time_stamp,
7100                                 tx_buffer->next_to_watch,
7101                                 jiffies,
7102                                 tx_buffer->next_to_watch->wb.status);
7103                         if (netif_is_multiqueue(netdev_ring(tx_ring)))
7104                                 netif_stop_subqueue(netdev_ring(tx_ring),
7105                                                     ring_queue_index(tx_ring));
7106                         else
7107                                 netif_stop_queue(netdev_ring(tx_ring));
7108
7109                         /* we are about to reset, no point in enabling stuff */
7110                         return true;
7111                 }
7112         }
7113
7114 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7115         if (unlikely(total_packets &&
7116                      netif_carrier_ok(netdev_ring(tx_ring)) &&
7117                      igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
7118                 /* Make sure that anybody stopping the queue after this
7119                  * sees the new next_to_clean.
7120                  */
7121                 smp_mb();
7122                 if (netif_is_multiqueue(netdev_ring(tx_ring))) {
7123                         if (__netif_subqueue_stopped(netdev_ring(tx_ring),
7124                                                      ring_queue_index(tx_ring)) &&
7125                             !(test_bit(__IGB_DOWN, &adapter->state))) {
7126                                 netif_wake_subqueue(netdev_ring(tx_ring),
7127                                                     ring_queue_index(tx_ring));
7128                                 tx_ring->tx_stats.restart_queue++;
7129                         }
7130                 } else {
7131                         if (netif_queue_stopped(netdev_ring(tx_ring)) &&
7132                             !(test_bit(__IGB_DOWN, &adapter->state))) {
7133                                 netif_wake_queue(netdev_ring(tx_ring));
7134                                 tx_ring->tx_stats.restart_queue++;
7135                         }
7136                 }
7137         }
7138
7139         return !!budget;
7140 }
7141
7142 #ifdef HAVE_VLAN_RX_REGISTER
7143 /**
7144  * igb_receive_skb - helper function to handle rx indications
7145  * @q_vector: structure containing interrupt and ring information
7146  * @skb: packet to send up
7147  **/
7148 static void igb_receive_skb(struct igb_q_vector *q_vector,
7149                             struct sk_buff *skb)
7150 {
7151         struct vlan_group **vlgrp = netdev_priv(skb->dev);
7152
7153         if (IGB_CB(skb)->vid) {
7154                 if (*vlgrp) {
7155                         vlan_gro_receive(&q_vector->napi, *vlgrp,
7156                                          IGB_CB(skb)->vid, skb);
7157                 } else {
7158                         dev_kfree_skb_any(skb);
7159                 }
7160         } else {
7161                 napi_gro_receive(&q_vector->napi, skb);
7162         }
7163 }
7164
7165 #endif /* HAVE_VLAN_RX_REGISTER */
7166 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7167 /**
7168  * igb_reuse_rx_page - page flip buffer and store it back on the ring
7169  * @rx_ring: rx descriptor ring to store buffers on
7170  * @old_buff: donor buffer to have page reused
7171  *
7172  * Synchronizes page for reuse by the adapter
7173  **/
7174 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
7175                               struct igb_rx_buffer *old_buff)
7176 {
7177         struct igb_rx_buffer *new_buff;
7178         u16 nta = rx_ring->next_to_alloc;
7179
7180         new_buff = &rx_ring->rx_buffer_info[nta];
7181
7182         /* update, and store next to alloc */
7183         nta++;
7184         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
7185
7186         /* transfer page from old buffer to new buffer */
7187         memcpy(new_buff, old_buff, sizeof(struct igb_rx_buffer));
7188
7189         /* sync the buffer for use by the device */
7190         dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
7191                                          old_buff->page_offset,
7192                                          IGB_RX_BUFSZ,
7193                                          DMA_FROM_DEVICE);
7194 }
7195
7196 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
7197                                   struct page *page,
7198                                   unsigned int truesize)
7199 {
7200         /* avoid re-using remote pages */
7201         if (unlikely(page_to_nid(page) != numa_node_id()))
7202                 return false;
7203
7204 #if (PAGE_SIZE < 8192)
7205         /* if we are only owner of page we can reuse it */
7206         if (unlikely(page_count(page) != 1))
7207                 return false;
7208
7209         /* flip page offset to other buffer */
7210         rx_buffer->page_offset ^= IGB_RX_BUFSZ;
7211
7212 #else
7213         /* move offset up to the next cache line */
7214         rx_buffer->page_offset += truesize;
7215
7216         if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
7217                 return false;
7218 #endif
7219
7220         /* bump ref count on page before it is given to the stack */
7221         get_page(page);
7222
7223         return true;
7224 }
7225
7226 /**
7227  * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
7228  * @rx_ring: rx descriptor ring to transact packets on
7229  * @rx_buffer: buffer containing page to add
7230  * @rx_desc: descriptor containing length of buffer written by hardware
7231  * @skb: sk_buff to place the data into
7232  *
7233  * This function will add the data contained in rx_buffer->page to the skb.
7234  * This is done either through a direct copy if the data in the buffer is
7235  * less than the skb header size, otherwise it will just attach the page as
7236  * a frag to the skb.
7237  *
7238  * The function will then update the page offset if necessary and return
7239  * true if the buffer can be reused by the adapter.
7240  **/
7241 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
7242                             struct igb_rx_buffer *rx_buffer,
7243                             union e1000_adv_rx_desc *rx_desc,
7244                             struct sk_buff *skb)
7245 {
7246         struct page *page = rx_buffer->page;
7247         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
7248 #if (PAGE_SIZE < 8192)
7249         unsigned int truesize = IGB_RX_BUFSZ;
7250 #else
7251         unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
7252 #endif
7253
7254         if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
7255                 unsigned char *va = page_address(page) + rx_buffer->page_offset;
7256
7257 #ifdef HAVE_PTP_1588_CLOCK
7258                 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
7259                         igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
7260                         va += IGB_TS_HDR_LEN;
7261                         size -= IGB_TS_HDR_LEN;
7262                 }
7263 #endif /* HAVE_PTP_1588_CLOCK */
7264
7265                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
7266
7267                 /* we can reuse buffer as-is, just make sure it is local */
7268                 if (likely(page_to_nid(page) == numa_node_id()))
7269                         return true;
7270
7271                 /* this page cannot be reused so discard it */
7272                 put_page(page);
7273                 return false;
7274         }
7275
7276         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
7277                         rx_buffer->page_offset, size, truesize);
7278
7279         return igb_can_reuse_rx_page(rx_buffer, page, truesize);
7280 }
7281
7282 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
7283                                            union e1000_adv_rx_desc *rx_desc,
7284                                            struct sk_buff *skb)
7285 {
7286         struct igb_rx_buffer *rx_buffer;
7287         struct page *page;
7288
7289         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
7290
7291         page = rx_buffer->page;
7292         prefetchw(page);
7293
7294         if (likely(!skb)) {
7295                 void *page_addr = page_address(page) +
7296                                   rx_buffer->page_offset;
7297
7298                 /* prefetch first cache line of first page */
7299                 prefetch(page_addr);
7300 #if L1_CACHE_BYTES < 128
7301                 prefetch(page_addr + L1_CACHE_BYTES);
7302 #endif
7303
7304                 /* allocate a skb to store the frags */
7305                 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
7306                                                 IGB_RX_HDR_LEN);
7307                 if (unlikely(!skb)) {
7308                         rx_ring->rx_stats.alloc_failed++;
7309                         return NULL;
7310                 }
7311
7312                 /*
7313                  * we will be copying header into skb->data in
7314                  * pskb_may_pull so it is in our interest to prefetch
7315                  * it now to avoid a possible cache miss
7316                  */
7317                 prefetchw(skb->data);
7318         }
7319
7320         /* we are reusing so sync this buffer for CPU use */
7321         dma_sync_single_range_for_cpu(rx_ring->dev,
7322                                       rx_buffer->dma,
7323                                       rx_buffer->page_offset,
7324                                       IGB_RX_BUFSZ,
7325                                       DMA_FROM_DEVICE);
7326
7327         /* pull page into skb */
7328         if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
7329                 /* hand second half of page back to the ring */
7330                 igb_reuse_rx_page(rx_ring, rx_buffer);
7331         } else {
7332                 /* we are not reusing the buffer so unmap it */
7333                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
7334                                PAGE_SIZE, DMA_FROM_DEVICE);
7335         }
7336
7337         /* clear contents of rx_buffer */
7338         rx_buffer->page = NULL;
7339
7340         return skb;
7341 }
7342
7343 #endif
7344 static inline void igb_rx_checksum(struct igb_ring *ring,
7345                                    union e1000_adv_rx_desc *rx_desc,
7346                                    struct sk_buff *skb)
7347 {
7348         skb_checksum_none_assert(skb);
7349
7350         /* Ignore Checksum bit is set */
7351         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
7352                 return;
7353
7354         /* Rx checksum disabled via ethtool */
7355         if (!(netdev_ring(ring)->features & NETIF_F_RXCSUM))
7356                 return;
7357
7358         /* TCP/UDP checksum error bit is set */
7359         if (igb_test_staterr(rx_desc,
7360                              E1000_RXDEXT_STATERR_TCPE |
7361                              E1000_RXDEXT_STATERR_IPE)) {
7362                 /*
7363                  * work around errata with sctp packets where the TCPE aka
7364                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
7365                  * packets, (aka let the stack check the crc32c)
7366                  */
7367                 if (!((skb->len == 60) &&
7368                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags)))
7369                         ring->rx_stats.csum_err++;
7370
7371                 /* let the stack verify checksum errors */
7372                 return;
7373         }
7374         /* It must be a TCP or UDP packet with a valid checksum */
7375         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
7376                                       E1000_RXD_STAT_UDPCS))
7377                 skb->ip_summed = CHECKSUM_UNNECESSARY;
7378 }
7379
7380 #ifdef NETIF_F_RXHASH
7381 static inline void igb_rx_hash(struct igb_ring *ring,
7382                                union e1000_adv_rx_desc *rx_desc,
7383                                struct sk_buff *skb)
7384 {
7385         if (netdev_ring(ring)->features & NETIF_F_RXHASH)
7386                 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
7387                              PKT_HASH_TYPE_L3);
7388 }
7389
7390 #endif
7391 #ifndef IGB_NO_LRO
7392 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7393 /**
7394  * igb_merge_active_tail - merge active tail into lro skb
7395  * @tail: pointer to active tail in frag_list
7396  *
7397  * This function merges the length and data of an active tail into the
7398  * skb containing the frag_list.  It resets the tail's pointer to the head,
7399  * but it leaves the heads pointer to tail intact.
7400  **/
7401 static inline struct sk_buff *igb_merge_active_tail(struct sk_buff *tail)
7402 {
7403         struct sk_buff *head = IGB_CB(tail)->head;
7404
7405         if (!head)
7406                 return tail;
7407
7408         head->len += tail->len;
7409         head->data_len += tail->len;
7410         head->truesize += tail->len;
7411
7412         IGB_CB(tail)->head = NULL;
7413
7414         return head;
7415 }
7416
7417 /**
7418  * igb_add_active_tail - adds an active tail into the skb frag_list
7419  * @head: pointer to the start of the skb
7420  * @tail: pointer to active tail to add to frag_list
7421  *
7422  * This function adds an active tail to the end of the frag list.  This tail
7423  * will still be receiving data so we cannot yet ad it's stats to the main
7424  * skb.  That is done via igb_merge_active_tail.
7425  **/
7426 static inline void igb_add_active_tail(struct sk_buff *head, struct sk_buff *tail)
7427 {
7428         struct sk_buff *old_tail = IGB_CB(head)->tail;
7429
7430         if (old_tail) {
7431                 igb_merge_active_tail(old_tail);
7432                 old_tail->next = tail;
7433         } else {
7434                 skb_shinfo(head)->frag_list = tail;
7435         }
7436
7437         IGB_CB(tail)->head = head;
7438         IGB_CB(head)->tail = tail;
7439
7440         IGB_CB(head)->append_cnt++;
7441 }
7442
7443 /**
7444  * igb_close_active_frag_list - cleanup pointers on a frag_list skb
7445  * @head: pointer to head of an active frag list
7446  *
7447  * This function will clear the frag_tail_tracker pointer on an active
7448  * frag_list and returns true if the pointer was actually set
7449  **/
7450 static inline bool igb_close_active_frag_list(struct sk_buff *head)
7451 {
7452         struct sk_buff *tail = IGB_CB(head)->tail;
7453
7454         if (!tail)
7455                 return false;
7456
7457         igb_merge_active_tail(tail);
7458
7459         IGB_CB(head)->tail = NULL;
7460
7461         return true;
7462 }
7463
7464 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7465 /**
7466  * igb_can_lro - returns true if packet is TCP/IPV4 and LRO is enabled
7467  * @adapter: board private structure
7468  * @rx_desc: pointer to the rx descriptor
7469  * @skb: pointer to the skb to be merged
7470  *
7471  **/
7472 static inline bool igb_can_lro(struct igb_ring *rx_ring,
7473                                union e1000_adv_rx_desc *rx_desc,
7474                                struct sk_buff *skb)
7475 {
7476         struct iphdr *iph = (struct iphdr *)skb->data;
7477         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7478
7479         /* verify hardware indicates this is IPv4/TCP */
7480         if((!(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP)) ||
7481             !(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))))
7482                 return false;
7483
7484         /* .. and LRO is enabled */
7485         if (!(netdev_ring(rx_ring)->features & NETIF_F_LRO))
7486                 return false;
7487
7488         /* .. and we are not in promiscuous mode */
7489         if (netdev_ring(rx_ring)->flags & IFF_PROMISC)
7490                 return false;
7491
7492         /* .. and the header is large enough for us to read IP/TCP fields */
7493         if (!pskb_may_pull(skb, sizeof(struct igb_lrohdr)))
7494                 return false;
7495
7496         /* .. and there are no VLANs on packet */
7497         if (skb->protocol != __constant_htons(ETH_P_IP))
7498                 return false;
7499
7500         /* .. and we are version 4 with no options */
7501         if (*(u8 *)iph != 0x45)
7502                 return false;
7503
7504         /* .. and the packet is not fragmented */
7505         if (iph->frag_off & htons(IP_MF | IP_OFFSET))
7506                 return false;
7507
7508         /* .. and that next header is TCP */
7509         if (iph->protocol != IPPROTO_TCP)
7510                 return false;
7511
7512         return true;
7513 }
7514
7515 static inline struct igb_lrohdr *igb_lro_hdr(struct sk_buff *skb)
7516 {
7517         return (struct igb_lrohdr *)skb->data;
7518 }
7519
7520 /**
7521  * igb_lro_flush - Indicate packets to upper layer.
7522  *
7523  * Update IP and TCP header part of head skb if more than one
7524  * skb's chained and indicate packets to upper layer.
7525  **/
7526 static void igb_lro_flush(struct igb_q_vector *q_vector,
7527                           struct sk_buff *skb)
7528 {
7529         struct igb_lro_list *lrolist = &q_vector->lrolist;
7530
7531         __skb_unlink(skb, &lrolist->active);
7532
7533         if (IGB_CB(skb)->append_cnt) {
7534                 struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7535
7536 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7537                 /* close any active lro contexts */
7538                 igb_close_active_frag_list(skb);
7539
7540 #endif
7541                 /* incorporate ip header and re-calculate checksum */
7542                 lroh->iph.tot_len = ntohs(skb->len);
7543                 lroh->iph.check = 0;
7544
7545                 /* header length is 5 since we know no options exist */
7546                 lroh->iph.check = ip_fast_csum((u8 *)lroh, 5);
7547
7548                 /* clear TCP checksum to indicate we are an LRO frame */
7549                 lroh->th.check = 0;
7550
7551                 /* incorporate latest timestamp into the tcp header */
7552                 if (IGB_CB(skb)->tsecr) {
7553                         lroh->ts[2] = IGB_CB(skb)->tsecr;
7554                         lroh->ts[1] = htonl(IGB_CB(skb)->tsval);
7555                 }
7556 #ifdef NETIF_F_GSO
7557
7558                 skb_shinfo(skb)->gso_size = IGB_CB(skb)->mss;
7559                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
7560 #endif
7561         }
7562
7563 #ifdef HAVE_VLAN_RX_REGISTER
7564         igb_receive_skb(q_vector, skb);
7565 #else
7566         napi_gro_receive(&q_vector->napi, skb);
7567 #endif
7568         lrolist->stats.flushed++;
7569 }
7570
7571 static void igb_lro_flush_all(struct igb_q_vector *q_vector)
7572 {
7573         struct igb_lro_list *lrolist = &q_vector->lrolist;
7574         struct sk_buff *skb, *tmp;
7575
7576         skb_queue_reverse_walk_safe(&lrolist->active, skb, tmp)
7577                 igb_lro_flush(q_vector, skb);
7578 }
7579
7580 /*
7581  * igb_lro_header_ok - Main LRO function.
7582  **/
7583 static void igb_lro_header_ok(struct sk_buff *skb)
7584 {
7585         struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7586         u16 opt_bytes, data_len;
7587
7588 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7589         IGB_CB(skb)->tail = NULL;
7590 #endif
7591         IGB_CB(skb)->tsecr = 0;
7592         IGB_CB(skb)->append_cnt = 0;
7593         IGB_CB(skb)->mss = 0;
7594
7595         /* ensure that the checksum is valid */
7596         if (skb->ip_summed != CHECKSUM_UNNECESSARY)
7597                 return;
7598
7599         /* If we see CE codepoint in IP header, packet is not mergeable */
7600         if (INET_ECN_is_ce(ipv4_get_dsfield(&lroh->iph)))
7601                 return;
7602
7603         /* ensure no bits set besides ack or psh */
7604         if (lroh->th.fin || lroh->th.syn || lroh->th.rst ||
7605             lroh->th.urg || lroh->th.ece || lroh->th.cwr ||
7606             !lroh->th.ack)
7607                 return;
7608
7609         /* store the total packet length */
7610         data_len = ntohs(lroh->iph.tot_len);
7611
7612         /* remove any padding from the end of the skb */
7613         __pskb_trim(skb, data_len);
7614
7615         /* remove header length from data length */
7616         data_len -= sizeof(struct igb_lrohdr);
7617
7618         /*
7619          * check for timestamps. Since the only option we handle are timestamps,
7620          * we only have to handle the simple case of aligned timestamps
7621          */
7622         opt_bytes = (lroh->th.doff << 2) - sizeof(struct tcphdr);
7623         if (opt_bytes != 0) {
7624                 if ((opt_bytes != TCPOLEN_TSTAMP_ALIGNED) ||
7625                     !pskb_may_pull(skb, sizeof(struct igb_lrohdr) +
7626                                         TCPOLEN_TSTAMP_ALIGNED) ||
7627                     (lroh->ts[0] != htonl((TCPOPT_NOP << 24) |
7628                                              (TCPOPT_NOP << 16) |
7629                                              (TCPOPT_TIMESTAMP << 8) |
7630                                               TCPOLEN_TIMESTAMP)) ||
7631                     (lroh->ts[2] == 0)) {
7632                         return;
7633                 }
7634
7635                 IGB_CB(skb)->tsval = ntohl(lroh->ts[1]);
7636                 IGB_CB(skb)->tsecr = lroh->ts[2];
7637
7638                 data_len -= TCPOLEN_TSTAMP_ALIGNED;
7639         }
7640
7641         /* record data_len as mss for the packet */
7642         IGB_CB(skb)->mss = data_len;
7643         IGB_CB(skb)->next_seq = ntohl(lroh->th.seq);
7644 }
7645
7646 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7647 static void igb_merge_frags(struct sk_buff *lro_skb, struct sk_buff *new_skb)
7648 {
7649         struct skb_shared_info *sh_info;
7650         struct skb_shared_info *new_skb_info;
7651         unsigned int data_len;
7652
7653         sh_info = skb_shinfo(lro_skb);
7654         new_skb_info = skb_shinfo(new_skb);
7655
7656         /* copy frags into the last skb */
7657         memcpy(sh_info->frags + sh_info->nr_frags,
7658                new_skb_info->frags,
7659                new_skb_info->nr_frags * sizeof(skb_frag_t));
7660
7661         /* copy size data over */
7662         sh_info->nr_frags += new_skb_info->nr_frags;
7663         data_len = IGB_CB(new_skb)->mss;
7664         lro_skb->len += data_len;
7665         lro_skb->data_len += data_len;
7666         lro_skb->truesize += data_len;
7667
7668         /* wipe record of data from new_skb */
7669         new_skb_info->nr_frags = 0;
7670         new_skb->len = new_skb->data_len = 0;
7671         dev_kfree_skb_any(new_skb);
7672 }
7673
7674 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7675 /**
7676  * igb_lro_receive - if able, queue skb into lro chain
7677  * @q_vector: structure containing interrupt and ring information
7678  * @new_skb: pointer to current skb being checked
7679  *
7680  * Checks whether the skb given is eligible for LRO and if that's
7681  * fine chains it to the existing lro_skb based on flowid. If an LRO for
7682  * the flow doesn't exist create one.
7683  **/
7684 static void igb_lro_receive(struct igb_q_vector *q_vector,
7685                             struct sk_buff *new_skb)
7686 {
7687         struct sk_buff *lro_skb;
7688         struct igb_lro_list *lrolist = &q_vector->lrolist;
7689         struct igb_lrohdr *lroh = igb_lro_hdr(new_skb);
7690         __be32 saddr = lroh->iph.saddr;
7691         __be32 daddr = lroh->iph.daddr;
7692         __be32 tcp_ports = *(__be32 *)&lroh->th;
7693         u16 data_len;
7694 #ifdef HAVE_VLAN_RX_REGISTER
7695         u16 vid = IGB_CB(new_skb)->vid;
7696 #else
7697         u16 vid = new_skb->vlan_tci;
7698 #endif
7699
7700         igb_lro_header_ok(new_skb);
7701
7702         /*
7703          * we have a packet that might be eligible for LRO,
7704          * so see if it matches anything we might expect
7705          */
7706         skb_queue_walk(&lrolist->active, lro_skb) {
7707                 if (*(__be32 *)&igb_lro_hdr(lro_skb)->th != tcp_ports ||
7708                     igb_lro_hdr(lro_skb)->iph.saddr != saddr ||
7709                     igb_lro_hdr(lro_skb)->iph.daddr != daddr)
7710                         continue;
7711
7712 #ifdef HAVE_VLAN_RX_REGISTER
7713                 if (IGB_CB(lro_skb)->vid != vid)
7714 #else
7715                 if (lro_skb->vlan_tci != vid)
7716 #endif
7717                         continue;
7718
7719                 /* out of order packet */
7720                 if (IGB_CB(lro_skb)->next_seq != IGB_CB(new_skb)->next_seq) {
7721                         igb_lro_flush(q_vector, lro_skb);
7722                         IGB_CB(new_skb)->mss = 0;
7723                         break;
7724                 }
7725
7726                 /* TCP timestamp options have changed */
7727                 if (!IGB_CB(lro_skb)->tsecr != !IGB_CB(new_skb)->tsecr) {
7728                         igb_lro_flush(q_vector, lro_skb);
7729                         break;
7730                 }
7731
7732                 /* make sure timestamp values are increasing */
7733                 if (IGB_CB(lro_skb)->tsecr &&
7734                     IGB_CB(lro_skb)->tsval > IGB_CB(new_skb)->tsval) {
7735                         igb_lro_flush(q_vector, lro_skb);
7736                         IGB_CB(new_skb)->mss = 0;
7737                         break;
7738                 }
7739
7740                 data_len = IGB_CB(new_skb)->mss;
7741
7742                 /* Check for all of the above below
7743                  *   malformed header
7744                  *   no tcp data
7745                  *   resultant packet would be too large
7746                  *   new skb is larger than our current mss
7747                  *   data would remain in header
7748                  *   we would consume more frags then the sk_buff contains
7749                  *   ack sequence numbers changed
7750                  *   window size has changed
7751                  */
7752                 if (data_len == 0 ||
7753                     data_len > IGB_CB(lro_skb)->mss ||
7754                     data_len > IGB_CB(lro_skb)->free ||
7755 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7756                     data_len != new_skb->data_len ||
7757                     skb_shinfo(new_skb)->nr_frags >=
7758                     (MAX_SKB_FRAGS - skb_shinfo(lro_skb)->nr_frags) ||
7759 #endif
7760                     igb_lro_hdr(lro_skb)->th.ack_seq != lroh->th.ack_seq ||
7761                     igb_lro_hdr(lro_skb)->th.window != lroh->th.window) {
7762                         igb_lro_flush(q_vector, lro_skb);
7763                         break;
7764                 }
7765
7766                 /* Remove IP and TCP header*/
7767                 skb_pull(new_skb, new_skb->len - data_len);
7768
7769                 /* update timestamp and timestamp echo response */
7770                 IGB_CB(lro_skb)->tsval = IGB_CB(new_skb)->tsval;
7771                 IGB_CB(lro_skb)->tsecr = IGB_CB(new_skb)->tsecr;
7772
7773                 /* update sequence and free space */
7774                 IGB_CB(lro_skb)->next_seq += data_len;
7775                 IGB_CB(lro_skb)->free -= data_len;
7776
7777                 /* update append_cnt */
7778                 IGB_CB(lro_skb)->append_cnt++;
7779
7780 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7781                 /* if header is empty pull pages into current skb */
7782                 igb_merge_frags(lro_skb, new_skb);
7783 #else
7784                 /* chain this new skb in frag_list */
7785                 igb_add_active_tail(lro_skb, new_skb);
7786 #endif
7787
7788                 if ((data_len < IGB_CB(lro_skb)->mss) || lroh->th.psh ||
7789                     skb_shinfo(lro_skb)->nr_frags == MAX_SKB_FRAGS) {
7790                         igb_lro_hdr(lro_skb)->th.psh |= lroh->th.psh;
7791                         igb_lro_flush(q_vector, lro_skb);
7792                 }
7793
7794                 lrolist->stats.coal++;
7795                 return;
7796         }
7797
7798         if (IGB_CB(new_skb)->mss && !lroh->th.psh) {
7799                 /* if we are at capacity flush the tail */
7800                 if (skb_queue_len(&lrolist->active) >= IGB_LRO_MAX) {
7801                         lro_skb = skb_peek_tail(&lrolist->active);
7802                         if (lro_skb)
7803                                 igb_lro_flush(q_vector, lro_skb);
7804                 }
7805
7806                 /* update sequence and free space */
7807                 IGB_CB(new_skb)->next_seq += IGB_CB(new_skb)->mss;
7808                 IGB_CB(new_skb)->free = 65521 - new_skb->len;
7809
7810                 /* .. and insert at the front of the active list */
7811                 __skb_queue_head(&lrolist->active, new_skb);
7812
7813                 lrolist->stats.coal++;
7814                 return;
7815         }
7816
7817         /* packet not handled by any of the above, pass it to the stack */
7818 #ifdef HAVE_VLAN_RX_REGISTER
7819         igb_receive_skb(q_vector, new_skb);
7820 #else
7821         napi_gro_receive(&q_vector->napi, new_skb);
7822 #endif
7823 }
7824
7825 #endif /* IGB_NO_LRO */
7826 /**
7827  * igb_process_skb_fields - Populate skb header fields from Rx descriptor
7828  * @rx_ring: rx descriptor ring packet is being transacted on
7829  * @rx_desc: pointer to the EOP Rx descriptor
7830  * @skb: pointer to current skb being populated
7831  *
7832  * This function checks the ring, descriptor, and packet information in
7833  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
7834  * other fields within the skb.
7835  **/
7836 static void igb_process_skb_fields(struct igb_ring *rx_ring,
7837                                    union e1000_adv_rx_desc *rx_desc,
7838                                    struct sk_buff *skb)
7839 {
7840         struct net_device *dev = rx_ring->netdev;
7841         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7842
7843 #ifdef NETIF_F_RXHASH
7844         igb_rx_hash(rx_ring, rx_desc, skb);
7845
7846 #endif
7847         igb_rx_checksum(rx_ring, rx_desc, skb);
7848
7849     /* update packet type stats */
7850         if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))
7851                 rx_ring->rx_stats.ipv4_packets++;
7852         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4_EX))
7853                 rx_ring->rx_stats.ipv4e_packets++;
7854         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6))
7855                 rx_ring->rx_stats.ipv6_packets++;
7856         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6_EX))
7857                 rx_ring->rx_stats.ipv6e_packets++;
7858         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP))
7859                 rx_ring->rx_stats.tcp_packets++;
7860         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_UDP))
7861                 rx_ring->rx_stats.udp_packets++;
7862         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_SCTP))
7863                 rx_ring->rx_stats.sctp_packets++;
7864         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_NFS))
7865                 rx_ring->rx_stats.nfs_packets++;
7866
7867 #ifdef HAVE_PTP_1588_CLOCK
7868         igb_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
7869 #endif /* HAVE_PTP_1588_CLOCK */
7870
7871 #ifdef NETIF_F_HW_VLAN_CTAG_RX
7872         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
7873 #else
7874         if ((dev->features & NETIF_F_HW_VLAN_RX) &&
7875 #endif
7876             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
7877                 u16 vid = 0;
7878                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
7879                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
7880                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
7881                 else
7882                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
7883 #ifdef HAVE_VLAN_RX_REGISTER
7884                 IGB_CB(skb)->vid = vid;
7885         } else {
7886                 IGB_CB(skb)->vid = 0;
7887 #else
7888
7889 #ifdef HAVE_VLAN_PROTOCOL
7890                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7891 #else
7892                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7893 #endif
7894
7895
7896 #endif
7897         }
7898
7899         skb_record_rx_queue(skb, rx_ring->queue_index);
7900
7901         skb->protocol = eth_type_trans(skb, dev);
7902 }
7903
7904 /**
7905  * igb_is_non_eop - process handling of non-EOP buffers
7906  * @rx_ring: Rx ring being processed
7907  * @rx_desc: Rx descriptor for current buffer
7908  *
7909  * This function updates next to clean.  If the buffer is an EOP buffer
7910  * this function exits returning false, otherwise it will place the
7911  * sk_buff in the next buffer to be chained and return true indicating
7912  * that this is in fact a non-EOP buffer.
7913  **/
7914 static bool igb_is_non_eop(struct igb_ring *rx_ring,
7915                            union e1000_adv_rx_desc *rx_desc)
7916 {
7917         u32 ntc = rx_ring->next_to_clean + 1;
7918
7919         /* fetch, update, and store next to clean */
7920         ntc = (ntc < rx_ring->count) ? ntc : 0;
7921         rx_ring->next_to_clean = ntc;
7922
7923         prefetch(IGB_RX_DESC(rx_ring, ntc));
7924
7925         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
7926                 return false;
7927
7928         return true;
7929 }
7930
7931 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7932 /* igb_clean_rx_irq -- * legacy */
7933 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
7934 {
7935         struct igb_ring *rx_ring = q_vector->rx.ring;
7936         unsigned int total_bytes = 0, total_packets = 0;
7937         u16 cleaned_count = igb_desc_unused(rx_ring);
7938
7939         do {
7940                 struct igb_rx_buffer *rx_buffer;
7941                 union e1000_adv_rx_desc *rx_desc;
7942                 struct sk_buff *skb;
7943                 u16 ntc;
7944
7945                 /* return some buffers to hardware, one at a time is too slow */
7946                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
7947                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
7948                         cleaned_count = 0;
7949                 }
7950
7951                 ntc = rx_ring->next_to_clean;
7952                 rx_desc = IGB_RX_DESC(rx_ring, ntc);
7953                 rx_buffer = &rx_ring->rx_buffer_info[ntc];
7954
7955                 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
7956                         break;
7957
7958                 /*
7959                  * This memory barrier is needed to keep us from reading
7960                  * any other fields out of the rx_desc until we know the
7961                  * RXD_STAT_DD bit is set
7962                  */
7963                 rmb();
7964
7965                 skb = rx_buffer->skb;
7966
7967                 prefetch(skb->data);
7968
7969                 /* pull the header of the skb in */
7970                 __skb_put(skb, le16_to_cpu(rx_desc->wb.upper.length));
7971
7972                 /* clear skb reference in buffer info structure */
7973                 rx_buffer->skb = NULL;
7974
7975                 cleaned_count++;
7976
7977                 BUG_ON(igb_is_non_eop(rx_ring, rx_desc));
7978
7979                 dma_unmap_single(rx_ring->dev, rx_buffer->dma,
7980                                  rx_ring->rx_buffer_len,
7981                                  DMA_FROM_DEVICE);
7982                 rx_buffer->dma = 0;
7983
7984                 if (igb_test_staterr(rx_desc,
7985                                      E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
7986                         dev_kfree_skb_any(skb);
7987                         continue;
7988                 }
7989
7990                 total_bytes += skb->len;
7991
7992                 /* populate checksum, timestamp, VLAN, and protocol */
7993                 igb_process_skb_fields(rx_ring, rx_desc, skb);
7994
7995 #ifndef IGB_NO_LRO
7996                 if (igb_can_lro(rx_ring, rx_desc, skb))
7997                         igb_lro_receive(q_vector, skb);
7998                 else
7999 #endif
8000 #ifdef HAVE_VLAN_RX_REGISTER
8001                         igb_receive_skb(q_vector, skb);
8002 #else
8003                         napi_gro_receive(&q_vector->napi, skb);
8004 #endif
8005
8006 #ifndef NETIF_F_GRO
8007                 netdev_ring(rx_ring)->last_rx = jiffies;
8008
8009 #endif
8010                 /* update budget accounting */
8011                 total_packets++;
8012         } while (likely(total_packets < budget));
8013
8014         rx_ring->rx_stats.packets += total_packets;
8015         rx_ring->rx_stats.bytes += total_bytes;
8016         q_vector->rx.total_packets += total_packets;
8017         q_vector->rx.total_bytes += total_bytes;
8018
8019         if (cleaned_count)
8020                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8021
8022 #ifndef IGB_NO_LRO
8023         igb_lro_flush_all(q_vector);
8024
8025 #endif /* IGB_NO_LRO */
8026         return (total_packets < budget);
8027 }
8028 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8029 /**
8030  * igb_get_headlen - determine size of header for LRO/GRO
8031  * @data: pointer to the start of the headers
8032  * @max_len: total length of section to find headers in
8033  *
8034  * This function is meant to determine the length of headers that will
8035  * be recognized by hardware for LRO, and GRO offloads.  The main
8036  * motivation of doing this is to only perform one pull for IPv4 TCP
8037  * packets so that we can do basic things like calculating the gso_size
8038  * based on the average data per packet.
8039  **/
8040 static unsigned int igb_get_headlen(unsigned char *data,
8041                                     unsigned int max_len)
8042 {
8043         union {
8044                 unsigned char *network;
8045                 /* l2 headers */
8046                 struct ethhdr *eth;
8047                 struct vlan_hdr *vlan;
8048                 /* l3 headers */
8049                 struct iphdr *ipv4;
8050                 struct ipv6hdr *ipv6;
8051         } hdr;
8052         __be16 protocol;
8053         u8 nexthdr = 0; /* default to not TCP */
8054         u8 hlen;
8055
8056         /* this should never happen, but better safe than sorry */
8057         if (max_len < ETH_HLEN)
8058                 return max_len;
8059
8060         /* initialize network frame pointer */
8061         hdr.network = data;
8062
8063         /* set first protocol and move network header forward */
8064         protocol = hdr.eth->h_proto;
8065         hdr.network += ETH_HLEN;
8066
8067         /* handle any vlan tag if present */
8068         if (protocol == __constant_htons(ETH_P_8021Q)) {
8069                 if ((hdr.network - data) > (max_len - VLAN_HLEN))
8070                         return max_len;
8071
8072                 protocol = hdr.vlan->h_vlan_encapsulated_proto;
8073                 hdr.network += VLAN_HLEN;
8074         }
8075
8076         /* handle L3 protocols */
8077         if (protocol == __constant_htons(ETH_P_IP)) {
8078                 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
8079                         return max_len;
8080
8081                 /* access ihl as a u8 to avoid unaligned access on ia64 */
8082                 hlen = (hdr.network[0] & 0x0F) << 2;
8083
8084                 /* verify hlen meets minimum size requirements */
8085                 if (hlen < sizeof(struct iphdr))
8086                         return hdr.network - data;
8087
8088                 /* record next protocol if header is present */
8089                 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
8090                         nexthdr = hdr.ipv4->protocol;
8091 #ifdef NETIF_F_TSO6
8092         } else if (protocol == __constant_htons(ETH_P_IPV6)) {
8093                 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
8094                         return max_len;
8095
8096                 /* record next protocol */
8097                 nexthdr = hdr.ipv6->nexthdr;
8098                 hlen = sizeof(struct ipv6hdr);
8099 #endif /* NETIF_F_TSO6 */
8100         } else {
8101                 return hdr.network - data;
8102         }
8103
8104         /* relocate pointer to start of L4 header */
8105         hdr.network += hlen;
8106
8107         /* finally sort out TCP */
8108         if (nexthdr == IPPROTO_TCP) {
8109                 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
8110                         return max_len;
8111
8112                 /* access doff as a u8 to avoid unaligned access on ia64 */
8113                 hlen = (hdr.network[12] & 0xF0) >> 2;
8114
8115                 /* verify hlen meets minimum size requirements */
8116                 if (hlen < sizeof(struct tcphdr))
8117                         return hdr.network - data;
8118
8119                 hdr.network += hlen;
8120         } else if (nexthdr == IPPROTO_UDP) {
8121                 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
8122                         return max_len;
8123
8124                 hdr.network += sizeof(struct udphdr);
8125         }
8126
8127         /*
8128          * If everything has gone correctly hdr.network should be the
8129          * data section of the packet and will be the end of the header.
8130          * If not then it probably represents the end of the last recognized
8131          * header.
8132          */
8133         if ((hdr.network - data) < max_len)
8134                 return hdr.network - data;
8135         else
8136                 return max_len;
8137 }
8138
8139 /**
8140  * igb_pull_tail - igb specific version of skb_pull_tail
8141  * @rx_ring: rx descriptor ring packet is being transacted on
8142  * @rx_desc: pointer to the EOP Rx descriptor
8143  * @skb: pointer to current skb being adjusted
8144  *
8145  * This function is an igb specific version of __pskb_pull_tail.  The
8146  * main difference between this version and the original function is that
8147  * this function can make several assumptions about the state of things
8148  * that allow for significant optimizations versus the standard function.
8149  * As a result we can do things like drop a frag and maintain an accurate
8150  * truesize for the skb.
8151  */
8152 static void igb_pull_tail(struct igb_ring *rx_ring,
8153                           union e1000_adv_rx_desc *rx_desc,
8154                           struct sk_buff *skb)
8155 {
8156         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
8157         unsigned char *va;
8158         unsigned int pull_len;
8159
8160         /*
8161          * it is valid to use page_address instead of kmap since we are
8162          * working with pages allocated out of the lomem pool per
8163          * alloc_page(GFP_ATOMIC)
8164          */
8165         va = skb_frag_address(frag);
8166
8167 #ifdef HAVE_PTP_1588_CLOCK
8168         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
8169                 /* retrieve timestamp from buffer */
8170                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
8171
8172                 /* update pointers to remove timestamp header */
8173                 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
8174                 frag->page_offset += IGB_TS_HDR_LEN;
8175                 skb->data_len -= IGB_TS_HDR_LEN;
8176                 skb->len -= IGB_TS_HDR_LEN;
8177
8178                 /* move va to start of packet data */
8179                 va += IGB_TS_HDR_LEN;
8180         }
8181 #endif /* HAVE_PTP_1588_CLOCK */
8182
8183         /*
8184          * we need the header to contain the greater of either ETH_HLEN or
8185          * 60 bytes if the skb->len is less than 60 for skb_pad.
8186          */
8187         pull_len = igb_get_headlen(va, IGB_RX_HDR_LEN);
8188
8189         /* align pull length to size of long to optimize memcpy performance */
8190         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
8191
8192         /* update all of the pointers */
8193         skb_frag_size_sub(frag, pull_len);
8194         frag->page_offset += pull_len;
8195         skb->data_len -= pull_len;
8196         skb->tail += pull_len;
8197 }
8198
8199 /**
8200  * igb_cleanup_headers - Correct corrupted or empty headers
8201  * @rx_ring: rx descriptor ring packet is being transacted on
8202  * @rx_desc: pointer to the EOP Rx descriptor
8203  * @skb: pointer to current skb being fixed
8204  *
8205  * Address the case where we are pulling data in on pages only
8206  * and as such no data is present in the skb header.
8207  *
8208  * In addition if skb is not at least 60 bytes we need to pad it so that
8209  * it is large enough to qualify as a valid Ethernet frame.
8210  *
8211  * Returns true if an error was encountered and skb was freed.
8212  **/
8213 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
8214                                 union e1000_adv_rx_desc *rx_desc,
8215                                 struct sk_buff *skb)
8216 {
8217
8218         if (unlikely((igb_test_staterr(rx_desc,
8219                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
8220                 struct net_device *netdev = rx_ring->netdev;
8221                 if (!(netdev->features & NETIF_F_RXALL)) {
8222                         dev_kfree_skb_any(skb);
8223                         return true;
8224                 }
8225         }
8226
8227         /* place header in linear portion of buffer */
8228         if (skb_is_nonlinear(skb))
8229                 igb_pull_tail(rx_ring, rx_desc, skb);
8230
8231         /* if skb_pad returns an error the skb was freed */
8232         if (unlikely(skb->len < 60)) {
8233                 int pad_len = 60 - skb->len;
8234
8235                 if (skb_pad(skb, pad_len))
8236                         return true;
8237                 __skb_put(skb, pad_len);
8238         }
8239
8240         return false;
8241 }
8242
8243 /* igb_clean_rx_irq -- * packet split */
8244 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
8245 {
8246         struct igb_ring *rx_ring = q_vector->rx.ring;
8247         struct sk_buff *skb = rx_ring->skb;
8248         unsigned int total_bytes = 0, total_packets = 0;
8249         u16 cleaned_count = igb_desc_unused(rx_ring);
8250
8251         do {
8252                 union e1000_adv_rx_desc *rx_desc;
8253
8254                 /* return some buffers to hardware, one at a time is too slow */
8255                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
8256                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
8257                         cleaned_count = 0;
8258                 }
8259
8260                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
8261
8262                 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
8263                         break;
8264
8265                 /*
8266                  * This memory barrier is needed to keep us from reading
8267                  * any other fields out of the rx_desc until we know the
8268                  * RXD_STAT_DD bit is set
8269                  */
8270                 rmb();
8271
8272                 /* retrieve a buffer from the ring */
8273                 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
8274
8275                 /* exit if we failed to retrieve a buffer */
8276                 if (!skb)
8277                         break;
8278
8279                 cleaned_count++;
8280
8281                 /* fetch next buffer in frame if non-eop */
8282                 if (igb_is_non_eop(rx_ring, rx_desc))
8283                         continue;
8284
8285                 /* verify the packet layout is correct */
8286                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
8287                         skb = NULL;
8288                         continue;
8289                 }
8290
8291                 /* probably a little skewed due to removing CRC */
8292                 total_bytes += skb->len;
8293
8294                 /* populate checksum, timestamp, VLAN, and protocol */
8295                 igb_process_skb_fields(rx_ring, rx_desc, skb);
8296
8297 #ifndef IGB_NO_LRO
8298                 if (igb_can_lro(rx_ring, rx_desc, skb))
8299                         igb_lro_receive(q_vector, skb);
8300                 else
8301 #endif
8302 #ifdef HAVE_VLAN_RX_REGISTER
8303                         igb_receive_skb(q_vector, skb);
8304 #else
8305                         napi_gro_receive(&q_vector->napi, skb);
8306 #endif
8307 #ifndef NETIF_F_GRO
8308
8309                 netdev_ring(rx_ring)->last_rx = jiffies;
8310 #endif
8311
8312                 /* reset skb pointer */
8313                 skb = NULL;
8314
8315                 /* update budget accounting */
8316                 total_packets++;
8317         } while (likely(total_packets < budget));
8318
8319         /* place incomplete frames back on ring for completion */
8320         rx_ring->skb = skb;
8321
8322         rx_ring->rx_stats.packets += total_packets;
8323         rx_ring->rx_stats.bytes += total_bytes;
8324         q_vector->rx.total_packets += total_packets;
8325         q_vector->rx.total_bytes += total_bytes;
8326
8327         if (cleaned_count)
8328                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8329
8330 #ifndef IGB_NO_LRO
8331         igb_lro_flush_all(q_vector);
8332
8333 #endif /* IGB_NO_LRO */
8334         return (total_packets < budget);
8335 }
8336 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8337
8338 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8339 static bool igb_alloc_mapped_skb(struct igb_ring *rx_ring,
8340                                  struct igb_rx_buffer *bi)
8341 {
8342         struct sk_buff *skb = bi->skb;
8343         dma_addr_t dma = bi->dma;
8344
8345         if (dma)
8346                 return true;
8347
8348         if (likely(!skb)) {
8349                 skb = netdev_alloc_skb_ip_align(netdev_ring(rx_ring),
8350                                                 rx_ring->rx_buffer_len);
8351                 bi->skb = skb;
8352                 if (!skb) {
8353                         rx_ring->rx_stats.alloc_failed++;
8354                         return false;
8355                 }
8356
8357                 /* initialize skb for ring */
8358                 skb_record_rx_queue(skb, ring_queue_index(rx_ring));
8359         }
8360
8361         dma = dma_map_single(rx_ring->dev, skb->data,
8362                              rx_ring->rx_buffer_len, DMA_FROM_DEVICE);
8363
8364         /* if mapping failed free memory back to system since
8365          * there isn't much point in holding memory we can't use
8366          */
8367         if (dma_mapping_error(rx_ring->dev, dma)) {
8368                 dev_kfree_skb_any(skb);
8369                 bi->skb = NULL;
8370
8371                 rx_ring->rx_stats.alloc_failed++;
8372                 return false;
8373         }
8374
8375         bi->dma = dma;
8376         return true;
8377 }
8378
8379 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8380 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
8381                                   struct igb_rx_buffer *bi)
8382 {
8383         struct page *page = bi->page;
8384         dma_addr_t dma;
8385
8386         /* since we are recycling buffers we should seldom need to alloc */
8387         if (likely(page))
8388                 return true;
8389
8390         /* alloc new page for storage */
8391         page = alloc_page(GFP_ATOMIC | __GFP_COLD);
8392         if (unlikely(!page)) {
8393                 rx_ring->rx_stats.alloc_failed++;
8394                 return false;
8395         }
8396
8397         /* map page for use */
8398         dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
8399
8400         /*
8401          * if mapping failed free memory back to system since
8402          * there isn't much point in holding memory we can't use
8403          */
8404         if (dma_mapping_error(rx_ring->dev, dma)) {
8405                 __free_page(page);
8406
8407                 rx_ring->rx_stats.alloc_failed++;
8408                 return false;
8409         }
8410
8411         bi->dma = dma;
8412         bi->page = page;
8413         bi->page_offset = 0;
8414
8415         return true;
8416 }
8417
8418 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8419 /**
8420  * igb_alloc_rx_buffers - Replace used receive buffers; packet split
8421  * @adapter: address of board private structure
8422  **/
8423 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
8424 {
8425         union e1000_adv_rx_desc *rx_desc;
8426         struct igb_rx_buffer *bi;
8427         u16 i = rx_ring->next_to_use;
8428
8429         /* nothing to do */
8430         if (!cleaned_count)
8431                 return;
8432
8433         rx_desc = IGB_RX_DESC(rx_ring, i);
8434         bi = &rx_ring->rx_buffer_info[i];
8435         i -= rx_ring->count;
8436
8437         do {
8438 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8439                 if (!igb_alloc_mapped_skb(rx_ring, bi))
8440 #else
8441                 if (!igb_alloc_mapped_page(rx_ring, bi))
8442 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8443                         break;
8444
8445                 /*
8446                  * Refresh the desc even if buffer_addrs didn't change
8447                  * because each write-back erases this info.
8448                  */
8449 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8450                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
8451 #else
8452                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
8453 #endif
8454
8455                 rx_desc++;
8456                 bi++;
8457                 i++;
8458                 if (unlikely(!i)) {
8459                         rx_desc = IGB_RX_DESC(rx_ring, 0);
8460                         bi = rx_ring->rx_buffer_info;
8461                         i -= rx_ring->count;
8462                 }
8463
8464                 /* clear the hdr_addr for the next_to_use descriptor */
8465                 rx_desc->read.hdr_addr = 0;
8466
8467                 cleaned_count--;
8468         } while (cleaned_count);
8469
8470         i += rx_ring->count;
8471
8472         if (rx_ring->next_to_use != i) {
8473                 /* record the next descriptor to use */
8474                 rx_ring->next_to_use = i;
8475
8476 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
8477                 /* update next to alloc since we have filled the ring */
8478                 rx_ring->next_to_alloc = i;
8479
8480 #endif
8481                 /*
8482                  * Force memory writes to complete before letting h/w
8483                  * know there are new descriptors to fetch.  (Only
8484                  * applicable for weak-ordered memory model archs,
8485                  * such as IA-64).
8486                  */
8487                 wmb();
8488                 writel(i, rx_ring->tail);
8489         }
8490 }
8491
8492 #ifdef SIOCGMIIPHY
8493 /**
8494  * igb_mii_ioctl -
8495  * @netdev:
8496  * @ifreq:
8497  * @cmd:
8498  **/
8499 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8500 {
8501         struct igb_adapter *adapter = netdev_priv(netdev);
8502         struct mii_ioctl_data *data = if_mii(ifr);
8503
8504         if (adapter->hw.phy.media_type != e1000_media_type_copper)
8505                 return -EOPNOTSUPP;
8506
8507         switch (cmd) {
8508         case SIOCGMIIPHY:
8509                 data->phy_id = adapter->hw.phy.addr;
8510                 break;
8511         case SIOCGMIIREG:
8512                 if (!capable(CAP_NET_ADMIN))
8513                         return -EPERM;
8514                 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
8515                                    &data->val_out))
8516                         return -EIO;
8517                 break;
8518         case SIOCSMIIREG:
8519         default:
8520                 return -EOPNOTSUPP;
8521         }
8522         return E1000_SUCCESS;
8523 }
8524
8525 #endif
8526 /**
8527  * igb_ioctl -
8528  * @netdev:
8529  * @ifreq:
8530  * @cmd:
8531  **/
8532 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8533 {
8534         switch (cmd) {
8535 #ifdef SIOCGMIIPHY
8536         case SIOCGMIIPHY:
8537         case SIOCGMIIREG:
8538         case SIOCSMIIREG:
8539                 return igb_mii_ioctl(netdev, ifr, cmd);
8540 #endif
8541 #ifdef HAVE_PTP_1588_CLOCK
8542         case SIOCSHWTSTAMP:
8543                 return igb_ptp_hwtstamp_ioctl(netdev, ifr, cmd);
8544 #endif /* HAVE_PTP_1588_CLOCK */
8545 #ifdef ETHTOOL_OPS_COMPAT
8546         case SIOCETHTOOL:
8547                 return ethtool_ioctl(ifr);
8548 #endif
8549         default:
8550                 return -EOPNOTSUPP;
8551         }
8552 }
8553
8554 s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8555 {
8556         struct igb_adapter *adapter = hw->back;
8557         u16 cap_offset;
8558
8559         cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8560         if (!cap_offset)
8561                 return -E1000_ERR_CONFIG;
8562
8563         pci_read_config_word(adapter->pdev, cap_offset + reg, value);
8564
8565         return E1000_SUCCESS;
8566 }
8567
8568 s32 e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8569 {
8570         struct igb_adapter *adapter = hw->back;
8571         u16 cap_offset;
8572
8573         cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8574         if (!cap_offset)
8575                 return -E1000_ERR_CONFIG;
8576
8577         pci_write_config_word(adapter->pdev, cap_offset + reg, *value);
8578
8579         return E1000_SUCCESS;
8580 }
8581
8582 #ifdef HAVE_VLAN_RX_REGISTER
8583 static void igb_vlan_mode(struct net_device *netdev, struct vlan_group *vlgrp)
8584 #else
8585 void igb_vlan_mode(struct net_device *netdev, u32 features)
8586 #endif
8587 {
8588         struct igb_adapter *adapter = netdev_priv(netdev);
8589         struct e1000_hw *hw = &adapter->hw;
8590         u32 ctrl, rctl;
8591         int i;
8592 #ifdef HAVE_VLAN_RX_REGISTER
8593         bool enable = !!vlgrp;
8594
8595         igb_irq_disable(adapter);
8596
8597         adapter->vlgrp = vlgrp;
8598
8599         if (!test_bit(__IGB_DOWN, &adapter->state))
8600                 igb_irq_enable(adapter);
8601 #else
8602 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8603         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
8604 #else
8605         bool enable = !!(features & NETIF_F_HW_VLAN_RX);
8606 #endif
8607 #endif
8608
8609         if (enable) {
8610                 /* enable VLAN tag insert/strip */
8611                 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8612                 ctrl |= E1000_CTRL_VME;
8613                 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8614
8615                 /* Disable CFI check */
8616                 rctl = E1000_READ_REG(hw, E1000_RCTL);
8617                 rctl &= ~E1000_RCTL_CFIEN;
8618                 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8619         } else {
8620                 /* disable VLAN tag insert/strip */
8621                 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8622                 ctrl &= ~E1000_CTRL_VME;
8623                 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8624         }
8625
8626 #ifndef CONFIG_IGB_VMDQ_NETDEV
8627         for (i = 0; i < adapter->vmdq_pools; i++) {
8628                 igb_set_vf_vlan_strip(adapter,
8629                                       adapter->vfs_allocated_count + i,
8630                                       enable);
8631         }
8632
8633 #else
8634         igb_set_vf_vlan_strip(adapter,
8635                               adapter->vfs_allocated_count,
8636                               enable);
8637
8638         for (i = 1; i < adapter->vmdq_pools; i++) {
8639 #ifdef HAVE_VLAN_RX_REGISTER
8640                 struct igb_vmdq_adapter *vadapter;
8641                 vadapter = netdev_priv(adapter->vmdq_netdev[i-1]);
8642                 enable = !!vadapter->vlgrp;
8643 #else
8644                 struct net_device *vnetdev;
8645                 vnetdev = adapter->vmdq_netdev[i-1];
8646 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8647                 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_CTAG_RX);
8648 #else
8649                 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_RX);
8650 #endif
8651 #endif
8652                 igb_set_vf_vlan_strip(adapter,
8653                                       adapter->vfs_allocated_count + i,
8654                                       enable);
8655         }
8656
8657 #endif
8658         igb_rlpml_set(adapter);
8659 }
8660
8661 #ifdef HAVE_VLAN_PROTOCOL
8662 static int igb_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid)
8663 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8664 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8665 static int igb_vlan_rx_add_vid(struct net_device *netdev,
8666                                __always_unused __be16 proto, u16 vid)
8667 #else
8668 static int igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8669 #endif
8670 #else
8671 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8672 #endif
8673 {
8674         struct igb_adapter *adapter = netdev_priv(netdev);
8675         int pf_id = adapter->vfs_allocated_count;
8676
8677         /* attempt to add filter to vlvf array */
8678         igb_vlvf_set(adapter, vid, TRUE, pf_id);
8679
8680         /* add the filter since PF can receive vlans w/o entry in vlvf */
8681         igb_vfta_set(adapter, vid, TRUE);
8682 #ifndef HAVE_NETDEV_VLAN_FEATURES
8683
8684         /* Copy feature flags from netdev to the vlan netdev for this vid.
8685          * This allows things like TSO to bubble down to our vlan device.
8686          * There is no need to update netdev for vlan 0 (DCB), since it
8687          * wouldn't has v_netdev.
8688          */
8689         if (adapter->vlgrp) {
8690                 struct vlan_group *vlgrp = adapter->vlgrp;
8691                 struct net_device *v_netdev = vlan_group_get_device(vlgrp, vid);
8692                 if (v_netdev) {
8693                         v_netdev->features |= netdev->features;
8694                         vlan_group_set_device(vlgrp, vid, v_netdev);
8695                 }
8696         }
8697 #endif
8698 #ifndef HAVE_VLAN_RX_REGISTER
8699
8700         set_bit(vid, adapter->active_vlans);
8701 #endif
8702 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8703         return 0;
8704 #endif
8705 }
8706
8707 #ifdef HAVE_VLAN_PROTOCOL
8708 static int igb_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid)
8709 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8710 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8711 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
8712                                 __always_unused __be16 proto, u16 vid)
8713 #else
8714 static int igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8715 #endif
8716 #else
8717 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8718 #endif
8719 {
8720         struct igb_adapter *adapter = netdev_priv(netdev);
8721         int pf_id = adapter->vfs_allocated_count;
8722         s32 err;
8723
8724 #ifdef HAVE_VLAN_RX_REGISTER
8725         igb_irq_disable(adapter);
8726
8727         vlan_group_set_device(adapter->vlgrp, vid, NULL);
8728
8729         if (!test_bit(__IGB_DOWN, &adapter->state))
8730                 igb_irq_enable(adapter);
8731
8732 #endif /* HAVE_VLAN_RX_REGISTER */
8733         /* remove vlan from VLVF table array */
8734         err = igb_vlvf_set(adapter, vid, FALSE, pf_id);
8735
8736         /* if vid was not present in VLVF just remove it from table */
8737         if (err)
8738                 igb_vfta_set(adapter, vid, FALSE);
8739 #ifndef HAVE_VLAN_RX_REGISTER
8740
8741         clear_bit(vid, adapter->active_vlans);
8742 #endif
8743 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8744         return 0;
8745 #endif
8746 }
8747
8748 static void igb_restore_vlan(struct igb_adapter *adapter)
8749 {
8750 #ifdef HAVE_VLAN_RX_REGISTER
8751         igb_vlan_mode(adapter->netdev, adapter->vlgrp);
8752
8753         if (adapter->vlgrp) {
8754                 u16 vid;
8755                 for (vid = 0; vid < VLAN_N_VID; vid++) {
8756                         if (!vlan_group_get_device(adapter->vlgrp, vid))
8757                                 continue;
8758 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8759                         igb_vlan_rx_add_vid(adapter->netdev,
8760                                             htons(ETH_P_8021Q), vid);
8761 #else
8762                         igb_vlan_rx_add_vid(adapter->netdev, vid);
8763 #endif
8764                 }
8765         }
8766 #else
8767         u16 vid;
8768
8769         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
8770
8771         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
8772 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8773                 igb_vlan_rx_add_vid(adapter->netdev,
8774                                     htons(ETH_P_8021Q), vid);
8775 #else
8776                 igb_vlan_rx_add_vid(adapter->netdev, vid);
8777 #endif
8778 #endif
8779 }
8780
8781 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
8782 {
8783         struct pci_dev *pdev = adapter->pdev;
8784         struct e1000_mac_info *mac = &adapter->hw.mac;
8785
8786         mac->autoneg = 0;
8787
8788         /* SerDes device's does not support 10Mbps Full/duplex
8789          * and 100Mbps Half duplex
8790          */
8791         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
8792                 switch (spddplx) {
8793                 case SPEED_10 + DUPLEX_HALF:
8794                 case SPEED_10 + DUPLEX_FULL:
8795                 case SPEED_100 + DUPLEX_HALF:
8796                         dev_err(pci_dev_to_dev(pdev),
8797                                 "Unsupported Speed/Duplex configuration\n");
8798                         return -EINVAL;
8799                 default:
8800                         break;
8801                 }
8802         }
8803
8804         switch (spddplx) {
8805         case SPEED_10 + DUPLEX_HALF:
8806                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
8807                 break;
8808         case SPEED_10 + DUPLEX_FULL:
8809                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
8810                 break;
8811         case SPEED_100 + DUPLEX_HALF:
8812                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
8813                 break;
8814         case SPEED_100 + DUPLEX_FULL:
8815                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
8816                 break;
8817         case SPEED_1000 + DUPLEX_FULL:
8818                 mac->autoneg = 1;
8819                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
8820                 break;
8821         case SPEED_1000 + DUPLEX_HALF: /* not supported */
8822         default:
8823                 dev_err(pci_dev_to_dev(pdev), "Unsupported Speed/Duplex configuration\n");
8824                 return -EINVAL;
8825         }
8826
8827         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
8828         adapter->hw.phy.mdix = AUTO_ALL_MODES;
8829
8830         return 0;
8831 }
8832
8833 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
8834                           bool runtime)
8835 {
8836         struct net_device *netdev = pci_get_drvdata(pdev);
8837         struct igb_adapter *adapter = netdev_priv(netdev);
8838         struct e1000_hw *hw = &adapter->hw;
8839         u32 ctrl, rctl, status;
8840         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
8841 #ifdef CONFIG_PM
8842         int retval = 0;
8843 #endif
8844
8845         netif_device_detach(netdev);
8846
8847         status = E1000_READ_REG(hw, E1000_STATUS);
8848         if (status & E1000_STATUS_LU)
8849                 wufc &= ~E1000_WUFC_LNKC;
8850
8851         if (netif_running(netdev))
8852                 __igb_close(netdev, true);
8853
8854         igb_clear_interrupt_scheme(adapter);
8855
8856 #ifdef CONFIG_PM
8857         retval = pci_save_state(pdev);
8858         if (retval)
8859                 return retval;
8860 #endif
8861
8862         if (wufc) {
8863                 igb_setup_rctl(adapter);
8864                 igb_set_rx_mode(netdev);
8865
8866                 /* turn on all-multi mode if wake on multicast is enabled */
8867                 if (wufc & E1000_WUFC_MC) {
8868                         rctl = E1000_READ_REG(hw, E1000_RCTL);
8869                         rctl |= E1000_RCTL_MPE;
8870                         E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8871                 }
8872
8873                 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8874                 /* phy power management enable */
8875                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
8876                 ctrl |= E1000_CTRL_ADVD3WUC;
8877                 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8878
8879                 /* Allow time for pending master requests to run */
8880                 e1000_disable_pcie_master(hw);
8881
8882                 E1000_WRITE_REG(hw, E1000_WUC, E1000_WUC_PME_EN);
8883                 E1000_WRITE_REG(hw, E1000_WUFC, wufc);
8884         } else {
8885                 E1000_WRITE_REG(hw, E1000_WUC, 0);
8886                 E1000_WRITE_REG(hw, E1000_WUFC, 0);
8887         }
8888
8889         *enable_wake = wufc || adapter->en_mng_pt;
8890         if (!*enable_wake)
8891                 igb_power_down_link(adapter);
8892         else
8893                 igb_power_up_link(adapter);
8894
8895         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
8896          * would have already happened in close and is redundant. */
8897         igb_release_hw_control(adapter);
8898
8899         pci_disable_device(pdev);
8900
8901         return 0;
8902 }
8903
8904 #ifdef CONFIG_PM
8905 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8906 static int igb_suspend(struct device *dev)
8907 #else
8908 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
8909 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8910 {
8911 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8912         struct pci_dev *pdev = to_pci_dev(dev);
8913 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8914         int retval;
8915         bool wake;
8916
8917         retval = __igb_shutdown(pdev, &wake, 0);
8918         if (retval)
8919                 return retval;
8920
8921         if (wake) {
8922                 pci_prepare_to_sleep(pdev);
8923         } else {
8924                 pci_wake_from_d3(pdev, false);
8925                 pci_set_power_state(pdev, PCI_D3hot);
8926         }
8927
8928         return 0;
8929 }
8930
8931 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8932 static int igb_resume(struct device *dev)
8933 #else
8934 static int igb_resume(struct pci_dev *pdev)
8935 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8936 {
8937 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8938         struct pci_dev *pdev = to_pci_dev(dev);
8939 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8940         struct net_device *netdev = pci_get_drvdata(pdev);
8941         struct igb_adapter *adapter = netdev_priv(netdev);
8942         struct e1000_hw *hw = &adapter->hw;
8943         u32 err;
8944
8945         pci_set_power_state(pdev, PCI_D0);
8946         pci_restore_state(pdev);
8947         pci_save_state(pdev);
8948
8949         err = pci_enable_device_mem(pdev);
8950         if (err) {
8951                 dev_err(pci_dev_to_dev(pdev),
8952                         "igb: Cannot enable PCI device from suspend\n");
8953                 return err;
8954         }
8955         pci_set_master(pdev);
8956
8957         pci_enable_wake(pdev, PCI_D3hot, 0);
8958         pci_enable_wake(pdev, PCI_D3cold, 0);
8959
8960         if (igb_init_interrupt_scheme(adapter, true)) {
8961                 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
8962                 return -ENOMEM;
8963         }
8964
8965         igb_reset(adapter);
8966
8967         /* let the f/w know that the h/w is now under the control of the
8968          * driver. */
8969         igb_get_hw_control(adapter);
8970
8971         E1000_WRITE_REG(hw, E1000_WUS, ~0);
8972
8973         if (netdev->flags & IFF_UP) {
8974                 rtnl_lock();
8975                 err = __igb_open(netdev, true);
8976                 rtnl_unlock();
8977                 if (err)
8978                         return err;
8979         }
8980
8981         netif_device_attach(netdev);
8982
8983         return 0;
8984 }
8985
8986 #ifdef CONFIG_PM_RUNTIME
8987 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8988 static int igb_runtime_idle(struct device *dev)
8989 {
8990         struct pci_dev *pdev = to_pci_dev(dev);
8991         struct net_device *netdev = pci_get_drvdata(pdev);
8992         struct igb_adapter *adapter = netdev_priv(netdev);
8993
8994         if (!igb_has_link(adapter))
8995                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
8996
8997         return -EBUSY;
8998 }
8999
9000 static int igb_runtime_suspend(struct device *dev)
9001 {
9002         struct pci_dev *pdev = to_pci_dev(dev);
9003         int retval;
9004         bool wake;
9005
9006         retval = __igb_shutdown(pdev, &wake, 1);
9007         if (retval)
9008                 return retval;
9009
9010         if (wake) {
9011                 pci_prepare_to_sleep(pdev);
9012         } else {
9013                 pci_wake_from_d3(pdev, false);
9014                 pci_set_power_state(pdev, PCI_D3hot);
9015         }
9016
9017         return 0;
9018 }
9019
9020 static int igb_runtime_resume(struct device *dev)
9021 {
9022         return igb_resume(dev);
9023 }
9024 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
9025 #endif /* CONFIG_PM_RUNTIME */
9026 #endif /* CONFIG_PM */
9027
9028 #ifdef USE_REBOOT_NOTIFIER
9029 /* only want to do this for 2.4 kernels? */
9030 static int igb_notify_reboot(struct notifier_block *nb, unsigned long event,
9031                              void *p)
9032 {
9033         struct pci_dev *pdev = NULL;
9034         bool wake;
9035
9036         switch (event) {
9037         case SYS_DOWN:
9038         case SYS_HALT:
9039         case SYS_POWER_OFF:
9040                 while ((pdev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pdev))) {
9041                         if (pci_dev_driver(pdev) == &igb_driver) {
9042                                 __igb_shutdown(pdev, &wake, 0);
9043                                 if (event == SYS_POWER_OFF) {
9044                                         pci_wake_from_d3(pdev, wake);
9045                                         pci_set_power_state(pdev, PCI_D3hot);
9046                                 }
9047                         }
9048                 }
9049         }
9050         return NOTIFY_DONE;
9051 }
9052 #else
9053 static void igb_shutdown(struct pci_dev *pdev)
9054 {
9055         bool wake = false;
9056
9057         __igb_shutdown(pdev, &wake, 0);
9058
9059         if (system_state == SYSTEM_POWER_OFF) {
9060                 pci_wake_from_d3(pdev, wake);
9061                 pci_set_power_state(pdev, PCI_D3hot);
9062         }
9063 }
9064 #endif /* USE_REBOOT_NOTIFIER */
9065
9066 #ifdef CONFIG_NET_POLL_CONTROLLER
9067 /*
9068  * Polling 'interrupt' - used by things like netconsole to send skbs
9069  * without having to re-enable interrupts. It's not called while
9070  * the interrupt routine is executing.
9071  */
9072 static void igb_netpoll(struct net_device *netdev)
9073 {
9074         struct igb_adapter *adapter = netdev_priv(netdev);
9075         struct e1000_hw *hw = &adapter->hw;
9076         struct igb_q_vector *q_vector;
9077         int i;
9078
9079         for (i = 0; i < adapter->num_q_vectors; i++) {
9080                 q_vector = adapter->q_vector[i];
9081                 if (adapter->msix_entries)
9082                         E1000_WRITE_REG(hw, E1000_EIMC, q_vector->eims_value);
9083                 else
9084                         igb_irq_disable(adapter);
9085                 napi_schedule(&q_vector->napi);
9086         }
9087 }
9088 #endif /* CONFIG_NET_POLL_CONTROLLER */
9089
9090 #ifdef HAVE_PCI_ERS
9091 #define E1000_DEV_ID_82576_VF 0x10CA
9092 /**
9093  * igb_io_error_detected - called when PCI error is detected
9094  * @pdev: Pointer to PCI device
9095  * @state: The current pci connection state
9096  *
9097  * This function is called after a PCI bus error affecting
9098  * this device has been detected.
9099  */
9100 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
9101                                               pci_channel_state_t state)
9102 {
9103         struct net_device *netdev = pci_get_drvdata(pdev);
9104         struct igb_adapter *adapter = netdev_priv(netdev);
9105
9106 #ifdef CONFIG_PCI_IOV__UNUSED
9107         struct pci_dev *bdev, *vfdev;
9108         u32 dw0, dw1, dw2, dw3;
9109         int vf, pos;
9110         u16 req_id, pf_func;
9111
9112         if (!(adapter->flags & IGB_FLAG_DETECT_BAD_DMA))
9113                 goto skip_bad_vf_detection;
9114
9115         bdev = pdev->bus->self;
9116         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
9117                 bdev = bdev->bus->self;
9118
9119         if (!bdev)
9120                 goto skip_bad_vf_detection;
9121
9122         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
9123         if (!pos)
9124                 goto skip_bad_vf_detection;
9125
9126         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG, &dw0);
9127         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 4, &dw1);
9128         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 8, &dw2);
9129         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 12, &dw3);
9130
9131         req_id = dw1 >> 16;
9132         /* On the 82576 if bit 7 of the requestor ID is set then it's a VF */
9133         if (!(req_id & 0x0080))
9134                 goto skip_bad_vf_detection;
9135
9136         pf_func = req_id & 0x01;
9137         if ((pf_func & 1) == (pdev->devfn & 1)) {
9138
9139                 vf = (req_id & 0x7F) >> 1;
9140                 dev_err(pci_dev_to_dev(pdev),
9141                         "VF %d has caused a PCIe error\n", vf);
9142                 dev_err(pci_dev_to_dev(pdev),
9143                         "TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9144                         "%8.8x\tdw3: %8.8x\n",
9145                         dw0, dw1, dw2, dw3);
9146
9147                 /* Find the pci device of the offending VF */
9148                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9149                                        E1000_DEV_ID_82576_VF, NULL);
9150                 while (vfdev) {
9151                         if (vfdev->devfn == (req_id & 0xFF))
9152                                 break;
9153                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9154                                                E1000_DEV_ID_82576_VF, vfdev);
9155                 }
9156                 /*
9157                  * There's a slim chance the VF could have been hot plugged,
9158                  * so if it is no longer present we don't need to issue the
9159                  * VFLR.  Just clean up the AER in that case.
9160                  */
9161                 if (vfdev) {
9162                         dev_err(pci_dev_to_dev(pdev),
9163                                 "Issuing VFLR to VF %d\n", vf);
9164                         pci_write_config_dword(vfdev, 0xA8, 0x00008000);
9165                 }
9166
9167                 pci_cleanup_aer_uncorrect_error_status(pdev);
9168         }
9169
9170         /*
9171          * Even though the error may have occurred on the other port
9172          * we still need to increment the vf error reference count for
9173          * both ports because the I/O resume function will be called
9174          * for both of them.
9175          */
9176         adapter->vferr_refcount++;
9177
9178         return PCI_ERS_RESULT_RECOVERED;
9179
9180 skip_bad_vf_detection:
9181 #endif /* CONFIG_PCI_IOV */
9182
9183         netif_device_detach(netdev);
9184
9185         if (state == pci_channel_io_perm_failure)
9186                 return PCI_ERS_RESULT_DISCONNECT;
9187
9188         if (netif_running(netdev))
9189                 igb_down(adapter);
9190         pci_disable_device(pdev);
9191
9192         /* Request a slot slot reset. */
9193         return PCI_ERS_RESULT_NEED_RESET;
9194 }
9195
9196 /**
9197  * igb_io_slot_reset - called after the pci bus has been reset.
9198  * @pdev: Pointer to PCI device
9199  *
9200  * Restart the card from scratch, as if from a cold-boot. Implementation
9201  * resembles the first-half of the igb_resume routine.
9202  */
9203 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
9204 {
9205         struct net_device *netdev = pci_get_drvdata(pdev);
9206         struct igb_adapter *adapter = netdev_priv(netdev);
9207         struct e1000_hw *hw = &adapter->hw;
9208         pci_ers_result_t result;
9209
9210         if (pci_enable_device_mem(pdev)) {
9211                 dev_err(pci_dev_to_dev(pdev),
9212                         "Cannot re-enable PCI device after reset.\n");
9213                 result = PCI_ERS_RESULT_DISCONNECT;
9214         } else {
9215                 pci_set_master(pdev);
9216                 pci_restore_state(pdev);
9217                 pci_save_state(pdev);
9218
9219                 pci_enable_wake(pdev, PCI_D3hot, 0);
9220                 pci_enable_wake(pdev, PCI_D3cold, 0);
9221
9222                 schedule_work(&adapter->reset_task);
9223                 E1000_WRITE_REG(hw, E1000_WUS, ~0);
9224                 result = PCI_ERS_RESULT_RECOVERED;
9225         }
9226
9227         pci_cleanup_aer_uncorrect_error_status(pdev);
9228
9229         return result;
9230 }
9231
9232 /**
9233  * igb_io_resume - called when traffic can start flowing again.
9234  * @pdev: Pointer to PCI device
9235  *
9236  * This callback is called when the error recovery driver tells us that
9237  * its OK to resume normal operation. Implementation resembles the
9238  * second-half of the igb_resume routine.
9239  */
9240 static void igb_io_resume(struct pci_dev *pdev)
9241 {
9242         struct net_device *netdev = pci_get_drvdata(pdev);
9243         struct igb_adapter *adapter = netdev_priv(netdev);
9244
9245         if (adapter->vferr_refcount) {
9246                 dev_info(pci_dev_to_dev(pdev), "Resuming after VF err\n");
9247                 adapter->vferr_refcount--;
9248                 return;
9249         }
9250
9251         if (netif_running(netdev)) {
9252                 if (igb_up(adapter)) {
9253                         dev_err(pci_dev_to_dev(pdev), "igb_up failed after reset\n");
9254                         return;
9255                 }
9256         }
9257
9258         netif_device_attach(netdev);
9259
9260         /* let the f/w know that the h/w is now under the control of the
9261          * driver. */
9262         igb_get_hw_control(adapter);
9263 }
9264
9265 #endif /* HAVE_PCI_ERS */
9266
9267 int igb_add_mac_filter(struct igb_adapter *adapter, u8 *addr, u16 queue)
9268 {
9269         struct e1000_hw *hw = &adapter->hw;
9270         int i;
9271
9272         if (is_zero_ether_addr(addr))
9273                 return 0;
9274
9275         for (i = 0; i < hw->mac.rar_entry_count; i++) {
9276                 if (adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE)
9277                         continue;
9278                 adapter->mac_table[i].state = (IGB_MAC_STATE_MODIFIED |
9279                                                    IGB_MAC_STATE_IN_USE);
9280                 memcpy(adapter->mac_table[i].addr, addr, ETH_ALEN);
9281                 adapter->mac_table[i].queue = queue;
9282                 igb_sync_mac_table(adapter);
9283                 return 0;
9284         }
9285         return -ENOMEM;
9286 }
9287 int igb_del_mac_filter(struct igb_adapter *adapter, u8* addr, u16 queue)
9288 {
9289         /* search table for addr, if found, set to 0 and sync */
9290         int i;
9291         struct e1000_hw *hw = &adapter->hw;
9292
9293         if (is_zero_ether_addr(addr))
9294                 return 0;
9295         for (i = 0; i < hw->mac.rar_entry_count; i++) {
9296                 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
9297                     adapter->mac_table[i].queue == queue) {
9298                         adapter->mac_table[i].state = IGB_MAC_STATE_MODIFIED;
9299                         memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
9300                         adapter->mac_table[i].queue = 0;
9301                         igb_sync_mac_table(adapter);
9302                         return 0;
9303                 }
9304         }
9305         return -ENOMEM;
9306 }
9307 static int igb_set_vf_mac(struct igb_adapter *adapter,
9308                           int vf, unsigned char *mac_addr)
9309 {
9310         igb_del_mac_filter(adapter, adapter->vf_data[vf].vf_mac_addresses, vf);
9311         memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
9312
9313         igb_add_mac_filter(adapter, mac_addr, vf);
9314
9315         return 0;
9316 }
9317
9318 #ifdef IFLA_VF_MAX
9319 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
9320 {
9321         struct igb_adapter *adapter = netdev_priv(netdev);
9322         if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
9323                 return -EINVAL;
9324         adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
9325         dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
9326         dev_info(&adapter->pdev->dev, "Reload the VF driver to make this"
9327                                       " change effective.\n");
9328         if (test_bit(__IGB_DOWN, &adapter->state)) {
9329                 dev_warn(&adapter->pdev->dev, "The VF MAC address has been set,"
9330                          " but the PF device is not up.\n");
9331                 dev_warn(&adapter->pdev->dev, "Bring the PF device up before"
9332                          " attempting to use the VF device.\n");
9333         }
9334         return igb_set_vf_mac(adapter, vf, mac);
9335 }
9336
9337 static int igb_link_mbps(int internal_link_speed)
9338 {
9339         switch (internal_link_speed) {
9340         case SPEED_100:
9341                 return 100;
9342         case SPEED_1000:
9343                 return 1000;
9344         case SPEED_2500:
9345                 return 2500;
9346         default:
9347                 return 0;
9348         }
9349 }
9350
9351 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
9352                         int link_speed)
9353 {
9354         int rf_dec, rf_int;
9355         u32 bcnrc_val;
9356
9357         if (tx_rate != 0) {
9358                 /* Calculate the rate factor values to set */
9359                 rf_int = link_speed / tx_rate;
9360                 rf_dec = (link_speed - (rf_int * tx_rate));
9361                 rf_dec = (rf_dec * (1<<E1000_RTTBCNRC_RF_INT_SHIFT)) / tx_rate;
9362
9363                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
9364                 bcnrc_val |= ((rf_int<<E1000_RTTBCNRC_RF_INT_SHIFT) &
9365                                 E1000_RTTBCNRC_RF_INT_MASK);
9366                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
9367         } else {
9368                 bcnrc_val = 0;
9369         }
9370
9371         E1000_WRITE_REG(hw, E1000_RTTDQSEL, vf); /* vf X uses queue X */
9372         /*
9373          * Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
9374          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
9375          */
9376         E1000_WRITE_REG(hw, E1000_RTTBCNRM(0), 0x14);
9377         E1000_WRITE_REG(hw, E1000_RTTBCNRC, bcnrc_val);
9378 }
9379
9380 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
9381 {
9382         int actual_link_speed, i;
9383         bool reset_rate = false;
9384
9385         /* VF TX rate limit was not set */
9386         if ((adapter->vf_rate_link_speed == 0) ||
9387                 (adapter->hw.mac.type != e1000_82576))
9388                 return;
9389
9390         actual_link_speed = igb_link_mbps(adapter->link_speed);
9391         if (actual_link_speed != adapter->vf_rate_link_speed) {
9392                 reset_rate = true;
9393                 adapter->vf_rate_link_speed = 0;
9394                 dev_info(&adapter->pdev->dev,
9395                 "Link speed has been changed. VF Transmit rate is disabled\n");
9396         }
9397
9398         for (i = 0; i < adapter->vfs_allocated_count; i++) {
9399                 if (reset_rate)
9400                         adapter->vf_data[i].tx_rate = 0;
9401
9402                 igb_set_vf_rate_limit(&adapter->hw, i,
9403                         adapter->vf_data[i].tx_rate, actual_link_speed);
9404         }
9405 }
9406
9407 #ifdef HAVE_VF_MIN_MAX_TXRATE
9408 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int min_tx_rate,
9409                              int tx_rate)
9410 #else /* HAVE_VF_MIN_MAX_TXRATE */
9411 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate)
9412 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9413 {
9414         struct igb_adapter *adapter = netdev_priv(netdev);
9415         struct e1000_hw *hw = &adapter->hw;
9416         int actual_link_speed;
9417
9418         if (hw->mac.type != e1000_82576)
9419                 return -EOPNOTSUPP;
9420
9421 #ifdef HAVE_VF_MIN_MAX_TXRATE
9422         if (min_tx_rate)
9423                 return -EINVAL;
9424 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9425
9426         actual_link_speed = igb_link_mbps(adapter->link_speed);
9427         if ((vf >= adapter->vfs_allocated_count) ||
9428                 (!(E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU)) ||
9429                 (tx_rate < 0) || (tx_rate > actual_link_speed))
9430                 return -EINVAL;
9431
9432         adapter->vf_rate_link_speed = actual_link_speed;
9433         adapter->vf_data[vf].tx_rate = (u16)tx_rate;
9434         igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed);
9435
9436         return 0;
9437 }
9438
9439 static int igb_ndo_get_vf_config(struct net_device *netdev,
9440                                  int vf, struct ifla_vf_info *ivi)
9441 {
9442         struct igb_adapter *adapter = netdev_priv(netdev);
9443         if (vf >= adapter->vfs_allocated_count)
9444                 return -EINVAL;
9445         ivi->vf = vf;
9446         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
9447 #ifdef HAVE_VF_MIN_MAX_TXRATE
9448         ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
9449         ivi->min_tx_rate = 0;
9450 #else /* HAVE_VF_MIN_MAX_TXRATE */
9451         ivi->tx_rate = adapter->vf_data[vf].tx_rate;
9452 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9453         ivi->vlan = adapter->vf_data[vf].pf_vlan;
9454         ivi->qos = adapter->vf_data[vf].pf_qos;
9455 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
9456         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
9457 #endif
9458         return 0;
9459 }
9460 #endif
9461 static void igb_vmm_control(struct igb_adapter *adapter)
9462 {
9463         struct e1000_hw *hw = &adapter->hw;
9464         int count;
9465         u32 reg;
9466
9467         switch (hw->mac.type) {
9468         case e1000_82575:
9469         default:
9470                 /* replication is not supported for 82575 */
9471                 return;
9472         case e1000_82576:
9473                 /* notify HW that the MAC is adding vlan tags */
9474                 reg = E1000_READ_REG(hw, E1000_DTXCTL);
9475                 reg |= (E1000_DTXCTL_VLAN_ADDED |
9476                         E1000_DTXCTL_SPOOF_INT);
9477                 E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
9478         case e1000_82580:
9479                 /* enable replication vlan tag stripping */
9480                 reg = E1000_READ_REG(hw, E1000_RPLOLR);
9481                 reg |= E1000_RPLOLR_STRVLAN;
9482                 E1000_WRITE_REG(hw, E1000_RPLOLR, reg);
9483         case e1000_i350:
9484         case e1000_i354:
9485                 /* none of the above registers are supported by i350 */
9486                 break;
9487         }
9488
9489         /* Enable Malicious Driver Detection */
9490         if ((adapter->vfs_allocated_count) &&
9491             (adapter->mdd)) {
9492                 if (hw->mac.type == e1000_i350)
9493                         igb_enable_mdd(adapter);
9494         }
9495
9496                 /* enable replication and loopback support */
9497                 count = adapter->vfs_allocated_count || adapter->vmdq_pools;
9498                 if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE && count)
9499                         e1000_vmdq_set_loopback_pf(hw, 1);
9500                 e1000_vmdq_set_anti_spoofing_pf(hw,
9501                         adapter->vfs_allocated_count || adapter->vmdq_pools,
9502                         adapter->vfs_allocated_count);
9503         e1000_vmdq_set_replication_pf(hw, adapter->vfs_allocated_count ||
9504                                       adapter->vmdq_pools);
9505 }
9506
9507 static void igb_init_fw(struct igb_adapter *adapter)
9508 {
9509         struct e1000_fw_drv_info fw_cmd;
9510         struct e1000_hw *hw = &adapter->hw;
9511         int i;
9512         u16 mask;
9513
9514         if (hw->mac.type == e1000_i210)
9515                 mask = E1000_SWFW_EEP_SM;
9516         else
9517                 mask = E1000_SWFW_PHY0_SM;
9518         /* i211 parts do not support this feature */
9519         if (hw->mac.type == e1000_i211)
9520                 hw->mac.arc_subsystem_valid = false;
9521
9522         if (!hw->mac.ops.acquire_swfw_sync(hw, mask)) {
9523                 for (i = 0; i <= FW_MAX_RETRIES; i++) {
9524                         E1000_WRITE_REG(hw, E1000_FWSTS, E1000_FWSTS_FWRI);
9525                         fw_cmd.hdr.cmd = FW_CMD_DRV_INFO;
9526                         fw_cmd.hdr.buf_len = FW_CMD_DRV_INFO_LEN;
9527                         fw_cmd.hdr.cmd_or_resp.cmd_resv = FW_CMD_RESERVED;
9528                         fw_cmd.port_num = hw->bus.func;
9529                         fw_cmd.drv_version = FW_FAMILY_DRV_VER;
9530                         fw_cmd.hdr.checksum = 0;
9531                         fw_cmd.hdr.checksum = e1000_calculate_checksum((u8 *)&fw_cmd,
9532                                                                    (FW_HDR_LEN +
9533                                                                     fw_cmd.hdr.buf_len));
9534                          e1000_host_interface_command(hw, (u8*)&fw_cmd,
9535                                                      sizeof(fw_cmd));
9536                         if (fw_cmd.hdr.cmd_or_resp.ret_status == FW_STATUS_SUCCESS)
9537                                 break;
9538                 }
9539         } else
9540                 dev_warn(pci_dev_to_dev(adapter->pdev),
9541                          "Unable to get semaphore, firmware init failed.\n");
9542         hw->mac.ops.release_swfw_sync(hw, mask);
9543 }
9544
9545 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
9546 {
9547         struct e1000_hw *hw = &adapter->hw;
9548         u32 dmac_thr;
9549         u16 hwm;
9550         u32 status;
9551
9552         if (hw->mac.type == e1000_i211)
9553                 return;
9554
9555         if (hw->mac.type > e1000_82580) {
9556                 if (adapter->dmac != IGB_DMAC_DISABLE) {
9557                         u32 reg;
9558
9559                         /* force threshold to 0.  */
9560                         E1000_WRITE_REG(hw, E1000_DMCTXTH, 0);
9561
9562                         /*
9563                          * DMA Coalescing high water mark needs to be greater
9564                          * than the Rx threshold. Set hwm to PBA - max frame
9565                          * size in 16B units, capping it at PBA - 6KB.
9566                          */
9567                         hwm = 64 * pba - adapter->max_frame_size / 16;
9568                         if (hwm < 64 * (pba - 6))
9569                                 hwm = 64 * (pba - 6);
9570                         reg = E1000_READ_REG(hw, E1000_FCRTC);
9571                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
9572                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
9573                                 & E1000_FCRTC_RTH_COAL_MASK);
9574                         E1000_WRITE_REG(hw, E1000_FCRTC, reg);
9575
9576                         /*
9577                          * Set the DMA Coalescing Rx threshold to PBA - 2 * max
9578                          * frame size, capping it at PBA - 10KB.
9579                          */
9580                         dmac_thr = pba - adapter->max_frame_size / 512;
9581                         if (dmac_thr < pba - 10)
9582                                 dmac_thr = pba - 10;
9583                         reg = E1000_READ_REG(hw, E1000_DMACR);
9584                         reg &= ~E1000_DMACR_DMACTHR_MASK;
9585                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
9586                                 & E1000_DMACR_DMACTHR_MASK);
9587
9588                         /* transition to L0x or L1 if available..*/
9589                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
9590
9591                         /* Check if status is 2.5Gb backplane connection
9592                          * before configuration of watchdog timer, which is
9593                          * in msec values in 12.8usec intervals
9594                          * watchdog timer= msec values in 32usec intervals
9595                          * for non 2.5Gb connection
9596                          */
9597                         if (hw->mac.type == e1000_i354) {
9598                                 status = E1000_READ_REG(hw, E1000_STATUS);
9599                                 if ((status & E1000_STATUS_2P5_SKU) &&
9600                                     (!(status & E1000_STATUS_2P5_SKU_OVER)))
9601                                         reg |= ((adapter->dmac * 5) >> 6);
9602                                 else
9603                                         reg |= ((adapter->dmac) >> 5);
9604                         } else {
9605                                 reg |= ((adapter->dmac) >> 5);
9606                         }
9607
9608                         /*
9609                          * Disable BMC-to-OS Watchdog enable
9610                          * on devices that support OS-to-BMC
9611                          */
9612                         if (hw->mac.type != e1000_i354)
9613                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
9614                         E1000_WRITE_REG(hw, E1000_DMACR, reg);
9615
9616                         /* no lower threshold to disable coalescing(smart fifb)-UTRESH=0*/
9617                         E1000_WRITE_REG(hw, E1000_DMCRTRH, 0);
9618
9619                         /* This sets the time to wait before requesting
9620                          * transition to low power state to number of usecs
9621                          * needed to receive 1 512 byte frame at gigabit
9622                          * line rate. On i350 device, time to make transition
9623                          * to Lx state is delayed by 4 usec with flush disable
9624                          * bit set to avoid losing mailbox interrupts
9625                          */
9626                         reg = E1000_READ_REG(hw, E1000_DMCTLX);
9627                         if (hw->mac.type == e1000_i350)
9628                                 reg |= IGB_DMCTLX_DCFLUSH_DIS;
9629
9630                         /* in 2.5Gb connection, TTLX unit is 0.4 usec
9631                          * which is 0x4*2 = 0xA. But delay is still 4 usec
9632                          */
9633                         if (hw->mac.type == e1000_i354) {
9634                                 status = E1000_READ_REG(hw, E1000_STATUS);
9635                                 if ((status & E1000_STATUS_2P5_SKU) &&
9636                                     (!(status & E1000_STATUS_2P5_SKU_OVER)))
9637                                         reg |= 0xA;
9638                                 else
9639                                         reg |= 0x4;
9640                         } else {
9641                                 reg |= 0x4;
9642                         }
9643                         E1000_WRITE_REG(hw, E1000_DMCTLX, reg);
9644
9645                         /* free space in tx packet buffer to wake from DMA coal */
9646                         E1000_WRITE_REG(hw, E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
9647                                 (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
9648
9649                         /* make low power state decision controlled by DMA coal */
9650                         reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9651                         reg &= ~E1000_PCIEMISC_LX_DECISION;
9652                         E1000_WRITE_REG(hw, E1000_PCIEMISC, reg);
9653                 } /* endif adapter->dmac is not disabled */
9654         } else if (hw->mac.type == e1000_82580) {
9655                 u32 reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9656                 E1000_WRITE_REG(hw, E1000_PCIEMISC,
9657                                 reg & ~E1000_PCIEMISC_LX_DECISION);
9658                 E1000_WRITE_REG(hw, E1000_DMACR, 0);
9659         }
9660 }
9661
9662 #ifdef HAVE_I2C_SUPPORT
9663 /*  igb_read_i2c_byte - Reads 8 bit word over I2C
9664  *  @hw: pointer to hardware structure
9665  *  @byte_offset: byte offset to read
9666  *  @dev_addr: device address
9667  *  @data: value read
9668  *
9669  *  Performs byte read operation over I2C interface at
9670  *  a specified device address.
9671  */
9672 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9673                                 u8 dev_addr, u8 *data)
9674 {
9675         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9676         struct i2c_client *this_client = adapter->i2c_client;
9677         s32 status;
9678         u16 swfw_mask = 0;
9679
9680         if (!this_client)
9681                 return E1000_ERR_I2C;
9682
9683         swfw_mask = E1000_SWFW_PHY0_SM;
9684
9685         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)
9686             != E1000_SUCCESS)
9687                 return E1000_ERR_SWFW_SYNC;
9688
9689         status = i2c_smbus_read_byte_data(this_client, byte_offset);
9690         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9691
9692         if (status < 0)
9693                 return E1000_ERR_I2C;
9694         else {
9695                 *data = status;
9696                 return E1000_SUCCESS;
9697         }
9698 }
9699
9700 /*  igb_write_i2c_byte - Writes 8 bit word over I2C
9701  *  @hw: pointer to hardware structure
9702  *  @byte_offset: byte offset to write
9703  *  @dev_addr: device address
9704  *  @data: value to write
9705  *
9706  *  Performs byte write operation over I2C interface at
9707  *  a specified device address.
9708  */
9709 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9710                                  u8 dev_addr, u8 data)
9711 {
9712         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9713         struct i2c_client *this_client = adapter->i2c_client;
9714         s32 status;
9715         u16 swfw_mask = E1000_SWFW_PHY0_SM;
9716
9717         if (!this_client)
9718                 return E1000_ERR_I2C;
9719
9720         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != E1000_SUCCESS)
9721                 return E1000_ERR_SWFW_SYNC;
9722         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
9723         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9724
9725         if (status)
9726                 return E1000_ERR_I2C;
9727         else
9728                 return E1000_SUCCESS;
9729 }
9730 #endif /*  HAVE_I2C_SUPPORT */
9731 /* igb_main.c */
9732
9733
9734 /**
9735  * igb_probe - Device Initialization Routine
9736  * @pdev: PCI device information struct
9737  * @ent: entry in igb_pci_tbl
9738  *
9739  * Returns 0 on success, negative on failure
9740  *
9741  * igb_probe initializes an adapter identified by a pci_dev structure.
9742  * The OS initialization, configuring of the adapter private structure,
9743  * and a hardware reset occur.
9744  **/
9745 int igb_kni_probe(struct pci_dev *pdev,
9746                                struct net_device **lad_dev)
9747 {
9748         struct net_device *netdev;
9749         struct igb_adapter *adapter;
9750         struct e1000_hw *hw;
9751         u16 eeprom_data = 0;
9752         u8 pba_str[E1000_PBANUM_LENGTH];
9753         s32 ret_val;
9754         static int global_quad_port_a; /* global quad port a indication */
9755         int i, err, pci_using_dac = 0;
9756         static int cards_found;
9757
9758         err = pci_enable_device_mem(pdev);
9759         if (err)
9760                 return err;
9761
9762 #ifdef NO_KNI
9763         pci_using_dac = 0;
9764         err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9765         if (!err) {
9766                 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9767                 if (!err)
9768                         pci_using_dac = 1;
9769         } else {
9770                 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9771                 if (err) {
9772                         err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9773                         if (err) {
9774                                 IGB_ERR("No usable DMA configuration, "
9775                                         "aborting\n");
9776                                 goto err_dma;
9777                         }
9778                 }
9779         }
9780
9781 #ifndef HAVE_ASPM_QUIRKS
9782         /* 82575 requires that the pci-e link partner disable the L0s state */
9783         switch (pdev->device) {
9784         case E1000_DEV_ID_82575EB_COPPER:
9785         case E1000_DEV_ID_82575EB_FIBER_SERDES:
9786         case E1000_DEV_ID_82575GB_QUAD_COPPER:
9787                 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
9788         default:
9789                 break;
9790         }
9791
9792 #endif /* HAVE_ASPM_QUIRKS */
9793         err = pci_request_selected_regions(pdev,
9794                                            pci_select_bars(pdev,
9795                                                            IORESOURCE_MEM),
9796                                            igb_driver_name);
9797         if (err)
9798                 goto err_pci_reg;
9799
9800         pci_enable_pcie_error_reporting(pdev);
9801
9802         pci_set_master(pdev);
9803
9804         err = -ENOMEM;
9805 #endif /* NO_KNI */
9806 #ifdef HAVE_TX_MQ
9807         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
9808                                    IGB_MAX_TX_QUEUES);
9809 #else
9810         netdev = alloc_etherdev(sizeof(struct igb_adapter));
9811 #endif /* HAVE_TX_MQ */
9812         if (!netdev)
9813                 goto err_alloc_etherdev;
9814
9815         SET_MODULE_OWNER(netdev);
9816         SET_NETDEV_DEV(netdev, &pdev->dev);
9817
9818         //pci_set_drvdata(pdev, netdev);
9819         adapter = netdev_priv(netdev);
9820         adapter->netdev = netdev;
9821         adapter->pdev = pdev;
9822         hw = &adapter->hw;
9823         hw->back = adapter;
9824         adapter->port_num = hw->bus.func;
9825         adapter->msg_enable = (1 << debug) - 1;
9826
9827 #ifdef HAVE_PCI_ERS
9828         err = pci_save_state(pdev);
9829         if (err)
9830                 goto err_ioremap;
9831 #endif
9832         err = -EIO;
9833         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
9834                               pci_resource_len(pdev, 0));
9835         if (!hw->hw_addr)
9836                 goto err_ioremap;
9837
9838 #ifdef HAVE_NET_DEVICE_OPS
9839         netdev->netdev_ops = &igb_netdev_ops;
9840 #else /* HAVE_NET_DEVICE_OPS */
9841         netdev->open = &igb_open;
9842         netdev->stop = &igb_close;
9843         netdev->get_stats = &igb_get_stats;
9844 #ifdef HAVE_SET_RX_MODE
9845         netdev->set_rx_mode = &igb_set_rx_mode;
9846 #endif
9847         netdev->set_multicast_list = &igb_set_rx_mode;
9848         netdev->set_mac_address = &igb_set_mac;
9849         netdev->change_mtu = &igb_change_mtu;
9850         netdev->do_ioctl = &igb_ioctl;
9851 #ifdef HAVE_TX_TIMEOUT
9852         netdev->tx_timeout = &igb_tx_timeout;
9853 #endif
9854         netdev->vlan_rx_register = igb_vlan_mode;
9855         netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
9856         netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
9857 #ifdef CONFIG_NET_POLL_CONTROLLER
9858         netdev->poll_controller = igb_netpoll;
9859 #endif
9860         netdev->hard_start_xmit = &igb_xmit_frame;
9861 #endif /* HAVE_NET_DEVICE_OPS */
9862         igb_set_ethtool_ops(netdev);
9863 #ifdef HAVE_TX_TIMEOUT
9864         netdev->watchdog_timeo = 5 * HZ;
9865 #endif
9866
9867         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
9868
9869         adapter->bd_number = cards_found;
9870
9871         /* setup the private structure */
9872         err = igb_sw_init(adapter);
9873         if (err)
9874                 goto err_sw_init;
9875
9876         e1000_get_bus_info(hw);
9877
9878         hw->phy.autoneg_wait_to_complete = FALSE;
9879         hw->mac.adaptive_ifs = FALSE;
9880
9881         /* Copper options */
9882         if (hw->phy.media_type == e1000_media_type_copper) {
9883                 hw->phy.mdix = AUTO_ALL_MODES;
9884                 hw->phy.disable_polarity_correction = FALSE;
9885                 hw->phy.ms_type = e1000_ms_hw_default;
9886         }
9887
9888         if (e1000_check_reset_block(hw))
9889                 dev_info(pci_dev_to_dev(pdev),
9890                         "PHY reset is blocked due to SOL/IDER session.\n");
9891
9892         /*
9893          * features is initialized to 0 in allocation, it might have bits
9894          * set by igb_sw_init so we should use an or instead of an
9895          * assignment.
9896          */
9897         netdev->features |= NETIF_F_SG |
9898                             NETIF_F_IP_CSUM |
9899 #ifdef NETIF_F_IPV6_CSUM
9900                             NETIF_F_IPV6_CSUM |
9901 #endif
9902 #ifdef NETIF_F_TSO
9903                             NETIF_F_TSO |
9904 #ifdef NETIF_F_TSO6
9905                             NETIF_F_TSO6 |
9906 #endif
9907 #endif /* NETIF_F_TSO */
9908 #ifdef NETIF_F_RXHASH
9909                             NETIF_F_RXHASH |
9910 #endif
9911                             NETIF_F_RXCSUM |
9912 #ifdef NETIF_F_HW_VLAN_CTAG_RX
9913                             NETIF_F_HW_VLAN_CTAG_RX |
9914                             NETIF_F_HW_VLAN_CTAG_TX;
9915 #else
9916                             NETIF_F_HW_VLAN_RX |
9917                             NETIF_F_HW_VLAN_TX;
9918 #endif
9919
9920         if (hw->mac.type >= e1000_82576)
9921                 netdev->features |= NETIF_F_SCTP_CSUM;
9922
9923 #ifdef HAVE_NDO_SET_FEATURES
9924         /* copy netdev features into list of user selectable features */
9925         netdev->hw_features |= netdev->features;
9926 #ifndef IGB_NO_LRO
9927
9928         /* give us the option of enabling LRO later */
9929         netdev->hw_features |= NETIF_F_LRO;
9930 #endif
9931 #else
9932 #ifdef NETIF_F_GRO
9933
9934         /* this is only needed on kernels prior to 2.6.39 */
9935         netdev->features |= NETIF_F_GRO;
9936 #endif
9937 #endif
9938
9939         /* set this bit last since it cannot be part of hw_features */
9940 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
9941         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
9942 #else
9943         netdev->features |= NETIF_F_HW_VLAN_FILTER;
9944 #endif
9945
9946 #ifdef HAVE_NETDEV_VLAN_FEATURES
9947         netdev->vlan_features |= NETIF_F_TSO |
9948                                  NETIF_F_TSO6 |
9949                                  NETIF_F_IP_CSUM |
9950                                  NETIF_F_IPV6_CSUM |
9951                                  NETIF_F_SG;
9952
9953 #endif
9954         if (pci_using_dac)
9955                 netdev->features |= NETIF_F_HIGHDMA;
9956
9957 #ifdef NO_KNI
9958         adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
9959 #ifdef DEBUG
9960         if (adapter->dmac != IGB_DMAC_DISABLE)
9961                 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
9962 #endif
9963
9964         /* before reading the NVM, reset the controller to put the device in a
9965          * known good starting state */
9966         e1000_reset_hw(hw);
9967 #endif /* NO_KNI */
9968
9969         /* make sure the NVM is good */
9970         if (e1000_validate_nvm_checksum(hw) < 0) {
9971                 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
9972                         " Valid\n");
9973                 err = -EIO;
9974                 goto err_eeprom;
9975         }
9976
9977         /* copy the MAC address out of the NVM */
9978         if (e1000_read_mac_addr(hw))
9979                 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
9980         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
9981 #ifdef ETHTOOL_GPERMADDR
9982         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
9983
9984         if (!is_valid_ether_addr(netdev->perm_addr)) {
9985 #else
9986         if (!is_valid_ether_addr(netdev->dev_addr)) {
9987 #endif
9988                 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
9989                 err = -EIO;
9990                 goto err_eeprom;
9991         }
9992
9993         memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
9994         adapter->mac_table[0].queue = adapter->vfs_allocated_count;
9995         adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
9996         igb_rar_set(adapter, 0);
9997
9998         /* get firmware version for ethtool -i */
9999         igb_set_fw_version(adapter);
10000
10001         /* Check if Media Autosense is enabled */
10002         if (hw->mac.type == e1000_82580)
10003                 igb_init_mas(adapter);
10004
10005 #ifdef NO_KNI
10006         setup_timer(&adapter->watchdog_timer, &igb_watchdog,
10007                     (unsigned long) adapter);
10008         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10009                 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
10010                             (unsigned long) adapter);
10011         setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
10012                     (unsigned long) adapter);
10013
10014         INIT_WORK(&adapter->reset_task, igb_reset_task);
10015         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
10016         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10017                 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
10018 #endif
10019
10020         /* Initialize link properties that are user-changeable */
10021         adapter->fc_autoneg = true;
10022         hw->mac.autoneg = true;
10023         hw->phy.autoneg_advertised = 0x2f;
10024
10025         hw->fc.requested_mode = e1000_fc_default;
10026         hw->fc.current_mode = e1000_fc_default;
10027
10028         e1000_validate_mdi_setting(hw);
10029
10030         /* By default, support wake on port A */
10031         if (hw->bus.func == 0)
10032                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10033
10034         /* Check the NVM for wake support for non-port A ports */
10035         if (hw->mac.type >= e1000_82580)
10036                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
10037                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
10038                                  &eeprom_data);
10039         else if (hw->bus.func == 1)
10040                 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
10041
10042         if (eeprom_data & IGB_EEPROM_APME)
10043                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10044
10045         /* now that we have the eeprom settings, apply the special cases where
10046          * the eeprom may be wrong or the board simply won't support wake on
10047          * lan on a particular port */
10048         switch (pdev->device) {
10049         case E1000_DEV_ID_82575GB_QUAD_COPPER:
10050                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10051                 break;
10052         case E1000_DEV_ID_82575EB_FIBER_SERDES:
10053         case E1000_DEV_ID_82576_FIBER:
10054         case E1000_DEV_ID_82576_SERDES:
10055                 /* Wake events only supported on port A for dual fiber
10056                  * regardless of eeprom setting */
10057                 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
10058                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10059                 break;
10060         case E1000_DEV_ID_82576_QUAD_COPPER:
10061         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
10062                 /* if quad port adapter, disable WoL on all but port A */
10063                 if (global_quad_port_a != 0)
10064                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10065                 else
10066                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
10067                 /* Reset for multiple quad port adapters */
10068                 if (++global_quad_port_a == 4)
10069                         global_quad_port_a = 0;
10070                 break;
10071         default:
10072                 /* If the device can't wake, don't set software support */
10073                 if (!device_can_wakeup(&adapter->pdev->dev))
10074                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10075                 break;
10076         }
10077
10078         /* initialize the wol settings based on the eeprom settings */
10079         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
10080                 adapter->wol |= E1000_WUFC_MAG;
10081
10082         /* Some vendors want WoL disabled by default, but still supported */
10083         if ((hw->mac.type == e1000_i350) &&
10084             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
10085                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10086                 adapter->wol = 0;
10087         }
10088
10089 #ifdef NO_KNI
10090         device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
10091                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
10092
10093         /* reset the hardware with the new settings */
10094         igb_reset(adapter);
10095         adapter->devrc = 0;
10096
10097 #ifdef HAVE_I2C_SUPPORT
10098         /* Init the I2C interface */
10099         err = igb_init_i2c(adapter);
10100         if (err) {
10101                 dev_err(&pdev->dev, "failed to init i2c interface\n");
10102                 goto err_eeprom;
10103         }
10104 #endif /* HAVE_I2C_SUPPORT */
10105
10106         /* let the f/w know that the h/w is now under the control of the
10107          * driver. */
10108         igb_get_hw_control(adapter);
10109
10110         strncpy(netdev->name, "eth%d", IFNAMSIZ);
10111         err = register_netdev(netdev);
10112         if (err)
10113                 goto err_register;
10114
10115 #ifdef CONFIG_IGB_VMDQ_NETDEV
10116         err = igb_init_vmdq_netdevs(adapter);
10117         if (err)
10118                 goto err_register;
10119 #endif
10120         /* carrier off reporting is important to ethtool even BEFORE open */
10121         netif_carrier_off(netdev);
10122
10123 #ifdef IGB_DCA
10124         if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
10125                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
10126                 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
10127                 igb_setup_dca(adapter);
10128         }
10129
10130 #endif
10131 #ifdef HAVE_PTP_1588_CLOCK
10132         /* do hw tstamp init after resetting */
10133         igb_ptp_init(adapter);
10134 #endif /* HAVE_PTP_1588_CLOCK */
10135
10136 #endif /* NO_KNI */
10137         dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
10138         /* print bus type/speed/width info */
10139         dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
10140                  netdev->name,
10141                  ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
10142                   (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
10143                   (hw->mac.type == e1000_i354) ? "integrated" :
10144                                                             "unknown"),
10145                  ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
10146                   (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
10147                   (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
10148                   (hw->mac.type == e1000_i354) ? "integrated" :
10149                    "unknown"));
10150         dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
10151         for (i = 0; i < 6; i++)
10152                 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
10153
10154         ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
10155         if (ret_val)
10156                 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
10157         dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
10158                  pba_str);
10159
10160
10161         /* Initialize the thermal sensor on i350 devices. */
10162         if (hw->mac.type == e1000_i350) {
10163                 if (hw->bus.func == 0) {
10164                         u16 ets_word;
10165
10166                         /*
10167                          * Read the NVM to determine if this i350 device
10168                          * supports an external thermal sensor.
10169                          */
10170                         e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
10171                         if (ets_word != 0x0000 && ets_word != 0xFFFF)
10172                                 adapter->ets = true;
10173                         else
10174                                 adapter->ets = false;
10175                 }
10176 #ifdef NO_KNI
10177 #ifdef IGB_HWMON
10178
10179                 igb_sysfs_init(adapter);
10180 #else
10181 #ifdef IGB_PROCFS
10182
10183                 igb_procfs_init(adapter);
10184 #endif /* IGB_PROCFS */
10185 #endif /* IGB_HWMON */
10186 #endif /* NO_KNI */
10187         } else {
10188                 adapter->ets = false;
10189         }
10190
10191         if (hw->phy.media_type == e1000_media_type_copper) {
10192                 switch (hw->mac.type) {
10193                 case e1000_i350:
10194                 case e1000_i210:
10195                 case e1000_i211:
10196                         /* Enable EEE for internal copper PHY devices */
10197                         err = e1000_set_eee_i350(hw);
10198                         if ((!err) &&
10199                             (adapter->flags & IGB_FLAG_EEE))
10200                                 adapter->eee_advert =
10201                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
10202                         break;
10203                 case e1000_i354:
10204                         if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
10205                             (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
10206                                 err = e1000_set_eee_i354(hw);
10207                                 if ((!err) &&
10208                                     (adapter->flags & IGB_FLAG_EEE))
10209                                         adapter->eee_advert =
10210                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
10211                         }
10212                         break;
10213                 default:
10214                         break;
10215                 }
10216         }
10217
10218         /* send driver version info to firmware */
10219         if (hw->mac.type >= e1000_i350)
10220                 igb_init_fw(adapter);
10221
10222 #ifndef IGB_NO_LRO
10223         if (netdev->features & NETIF_F_LRO)
10224                 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
10225         else
10226                 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
10227 #endif
10228         dev_info(pci_dev_to_dev(pdev),
10229                  "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
10230                  adapter->msix_entries ? "MSI-X" :
10231                  (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
10232                  adapter->num_rx_queues, adapter->num_tx_queues);
10233
10234         cards_found++;
10235         *lad_dev = netdev;
10236
10237         pm_runtime_put_noidle(&pdev->dev);
10238         return 0;
10239
10240 //err_register:
10241 //      igb_release_hw_control(adapter);
10242 #ifdef HAVE_I2C_SUPPORT
10243         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
10244 #endif /* HAVE_I2C_SUPPORT */
10245 err_eeprom:
10246 //      if (!e1000_check_reset_block(hw))
10247 //              e1000_phy_hw_reset(hw);
10248
10249         if (hw->flash_address)
10250                 iounmap(hw->flash_address);
10251 err_sw_init:
10252 //      igb_clear_interrupt_scheme(adapter);
10253 //      igb_reset_sriov_capability(adapter);
10254         iounmap(hw->hw_addr);
10255 err_ioremap:
10256         free_netdev(netdev);
10257 err_alloc_etherdev:
10258 //      pci_release_selected_regions(pdev,
10259 //                                   pci_select_bars(pdev, IORESOURCE_MEM));
10260 //err_pci_reg:
10261 //err_dma:
10262         pci_disable_device(pdev);
10263         return err;
10264 }
10265
10266
10267 void igb_kni_remove(struct pci_dev *pdev)
10268 {
10269         pci_disable_device(pdev);
10270 }