1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
40 #include <rte_ether.h>
42 #include "rte_ethdev.h"
43 #include "rte_ethdev_driver.h"
44 #include "ethdev_profile.h"
45 #include "ethdev_private.h"
47 int rte_eth_dev_logtype;
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
64 /* store statistics names and its offset in stats structure */
65 struct rte_eth_xstats_name_off {
66 char name[RTE_ETH_XSTATS_NAME_SIZE];
70 /* Shared memory between primary and secondary processes. */
72 uint64_t next_owner_id;
73 rte_spinlock_t ownership_lock;
74 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
89 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94 {"errors", offsetof(struct rte_eth_stats, q_errors)},
97 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
98 sizeof(rte_rxq_stats_strings[0]))
100 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
101 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
102 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
104 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
105 sizeof(rte_txq_stats_strings[0]))
107 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
108 { DEV_RX_OFFLOAD_##_name, #_name }
110 static const struct {
113 } rte_rx_offload_names[] = {
114 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
115 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
119 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
120 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
121 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
122 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
125 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
126 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
127 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
128 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
129 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
130 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
131 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
134 #undef RTE_RX_OFFLOAD_BIT2STR
136 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
137 { DEV_TX_OFFLOAD_##_name, #_name }
139 static const struct {
142 } rte_tx_offload_names[] = {
143 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
144 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
151 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
152 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
157 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
158 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
159 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
160 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
161 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
163 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
164 RTE_TX_OFFLOAD_BIT2STR(MATCH_METADATA),
167 #undef RTE_TX_OFFLOAD_BIT2STR
170 * The user application callback description.
172 * It contains callback address to be registered by user application,
173 * the pointer to the parameters for callback, and the event type.
175 struct rte_eth_dev_callback {
176 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
177 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
178 void *cb_arg; /**< Parameter for callback */
179 void *ret_param; /**< Return parameter */
180 enum rte_eth_event_type event; /**< Interrupt event type */
181 uint32_t active; /**< Callback is executing */
190 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
193 struct rte_devargs devargs = {.args = NULL};
194 const char *bus_param_key;
195 char *bus_str = NULL;
196 char *cls_str = NULL;
199 memset(iter, 0, sizeof(*iter));
202 * The devargs string may use various syntaxes:
203 * - 0000:08:00.0,representor=[1-3]
204 * - pci:0000:06:00.0,representor=[0,5]
205 * - class=eth,mac=00:11:22:33:44:55
206 * A new syntax is in development (not yet supported):
207 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
211 * Handle pure class filter (i.e. without any bus-level argument),
212 * from future new syntax.
213 * rte_devargs_parse() is not yet supporting the new syntax,
214 * that's why this simple case is temporarily parsed here.
216 #define iter_anybus_str "class=eth,"
217 if (strncmp(devargs_str, iter_anybus_str,
218 strlen(iter_anybus_str)) == 0) {
219 iter->cls_str = devargs_str + strlen(iter_anybus_str);
223 /* Split bus, device and parameters. */
224 ret = rte_devargs_parse(&devargs, devargs_str);
229 * Assume parameters of old syntax can match only at ethdev level.
230 * Extra parameters will be ignored, thanks to "+" prefix.
232 str_size = strlen(devargs.args) + 2;
233 cls_str = malloc(str_size);
234 if (cls_str == NULL) {
238 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
239 if (ret != str_size - 1) {
243 iter->cls_str = cls_str;
244 free(devargs.args); /* allocated by rte_devargs_parse() */
247 iter->bus = devargs.bus;
248 if (iter->bus->dev_iterate == NULL) {
253 /* Convert bus args to new syntax for use with new API dev_iterate. */
254 if (strcmp(iter->bus->name, "vdev") == 0) {
255 bus_param_key = "name";
256 } else if (strcmp(iter->bus->name, "pci") == 0) {
257 bus_param_key = "addr";
262 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
263 bus_str = malloc(str_size);
264 if (bus_str == NULL) {
268 ret = snprintf(bus_str, str_size, "%s=%s",
269 bus_param_key, devargs.name);
270 if (ret != str_size - 1) {
274 iter->bus_str = bus_str;
277 iter->cls = rte_class_find_by_name("eth");
282 RTE_LOG(ERR, EAL, "Bus %s does not support iterating.\n",
291 rte_eth_iterator_next(struct rte_dev_iterator *iter)
293 if (iter->cls == NULL) /* invalid ethdev iterator */
294 return RTE_MAX_ETHPORTS;
296 do { /* loop to try all matching rte_device */
297 /* If not pure ethdev filter and */
298 if (iter->bus != NULL &&
299 /* not in middle of rte_eth_dev iteration, */
300 iter->class_device == NULL) {
301 /* get next rte_device to try. */
302 iter->device = iter->bus->dev_iterate(
303 iter->device, iter->bus_str, iter);
304 if (iter->device == NULL)
305 break; /* no more rte_device candidate */
307 /* A device is matching bus part, need to check ethdev part. */
308 iter->class_device = iter->cls->dev_iterate(
309 iter->class_device, iter->cls_str, iter);
310 if (iter->class_device != NULL)
311 return eth_dev_to_id(iter->class_device); /* match */
312 } while (iter->bus != NULL); /* need to try next rte_device */
314 /* No more ethdev port to iterate. */
315 rte_eth_iterator_cleanup(iter);
316 return RTE_MAX_ETHPORTS;
320 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
322 if (iter->bus_str == NULL)
323 return; /* nothing to free in pure class filter */
324 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
325 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
326 memset(iter, 0, sizeof(*iter));
330 rte_eth_find_next(uint16_t port_id)
332 while (port_id < RTE_MAX_ETHPORTS &&
333 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
336 if (port_id >= RTE_MAX_ETHPORTS)
337 return RTE_MAX_ETHPORTS;
343 * Macro to iterate over all valid ports for internal usage.
344 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
346 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
347 for (port_id = rte_eth_find_next(0); \
348 port_id < RTE_MAX_ETHPORTS; \
349 port_id = rte_eth_find_next(port_id + 1))
352 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
354 port_id = rte_eth_find_next(port_id);
355 while (port_id < RTE_MAX_ETHPORTS &&
356 rte_eth_devices[port_id].device != parent)
357 port_id = rte_eth_find_next(port_id + 1);
363 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
365 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
366 return rte_eth_find_next_of(port_id,
367 rte_eth_devices[ref_port_id].device);
371 rte_eth_dev_shared_data_prepare(void)
373 const unsigned flags = 0;
374 const struct rte_memzone *mz;
376 rte_spinlock_lock(&rte_eth_shared_data_lock);
378 if (rte_eth_dev_shared_data == NULL) {
379 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
380 /* Allocate port data and ownership shared memory. */
381 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
382 sizeof(*rte_eth_dev_shared_data),
383 rte_socket_id(), flags);
385 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
387 rte_panic("Cannot allocate ethdev shared data\n");
389 rte_eth_dev_shared_data = mz->addr;
390 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
391 rte_eth_dev_shared_data->next_owner_id =
392 RTE_ETH_DEV_NO_OWNER + 1;
393 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
394 memset(rte_eth_dev_shared_data->data, 0,
395 sizeof(rte_eth_dev_shared_data->data));
399 rte_spinlock_unlock(&rte_eth_shared_data_lock);
403 is_allocated(const struct rte_eth_dev *ethdev)
405 return ethdev->data->name[0] != '\0';
408 static struct rte_eth_dev *
409 _rte_eth_dev_allocated(const char *name)
413 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
414 if (rte_eth_devices[i].data != NULL &&
415 strcmp(rte_eth_devices[i].data->name, name) == 0)
416 return &rte_eth_devices[i];
422 rte_eth_dev_allocated(const char *name)
424 struct rte_eth_dev *ethdev;
426 rte_eth_dev_shared_data_prepare();
428 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
430 ethdev = _rte_eth_dev_allocated(name);
432 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
438 rte_eth_dev_find_free_port(void)
442 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
443 /* Using shared name field to find a free port. */
444 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
445 RTE_ASSERT(rte_eth_devices[i].state ==
450 return RTE_MAX_ETHPORTS;
453 static struct rte_eth_dev *
454 eth_dev_get(uint16_t port_id)
456 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
458 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
464 rte_eth_dev_allocate(const char *name)
467 struct rte_eth_dev *eth_dev = NULL;
470 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
472 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
476 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
477 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
481 rte_eth_dev_shared_data_prepare();
483 /* Synchronize port creation between primary and secondary threads. */
484 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
486 if (_rte_eth_dev_allocated(name) != NULL) {
488 "Ethernet device with name %s already allocated\n",
493 port_id = rte_eth_dev_find_free_port();
494 if (port_id == RTE_MAX_ETHPORTS) {
496 "Reached maximum number of Ethernet ports\n");
500 eth_dev = eth_dev_get(port_id);
501 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
502 eth_dev->data->port_id = port_id;
503 eth_dev->data->mtu = RTE_ETHER_MTU;
506 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
512 * Attach to a port already registered by the primary process, which
513 * makes sure that the same device would have the same port id both
514 * in the primary and secondary process.
517 rte_eth_dev_attach_secondary(const char *name)
520 struct rte_eth_dev *eth_dev = NULL;
522 rte_eth_dev_shared_data_prepare();
524 /* Synchronize port attachment to primary port creation and release. */
525 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
527 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
528 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
531 if (i == RTE_MAX_ETHPORTS) {
533 "Device %s is not driven by the primary process\n",
536 eth_dev = eth_dev_get(i);
537 RTE_ASSERT(eth_dev->data->port_id == i);
540 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
545 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
550 rte_eth_dev_shared_data_prepare();
552 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
553 _rte_eth_dev_callback_process(eth_dev,
554 RTE_ETH_EVENT_DESTROY, NULL);
556 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
558 eth_dev->state = RTE_ETH_DEV_UNUSED;
560 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
561 rte_free(eth_dev->data->rx_queues);
562 rte_free(eth_dev->data->tx_queues);
563 rte_free(eth_dev->data->mac_addrs);
564 rte_free(eth_dev->data->hash_mac_addrs);
565 rte_free(eth_dev->data->dev_private);
566 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
569 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
575 rte_eth_dev_is_valid_port(uint16_t port_id)
577 if (port_id >= RTE_MAX_ETHPORTS ||
578 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
585 rte_eth_is_valid_owner_id(uint64_t owner_id)
587 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
588 rte_eth_dev_shared_data->next_owner_id <= owner_id)
594 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
596 port_id = rte_eth_find_next(port_id);
597 while (port_id < RTE_MAX_ETHPORTS &&
598 rte_eth_devices[port_id].data->owner.id != owner_id)
599 port_id = rte_eth_find_next(port_id + 1);
605 rte_eth_dev_owner_new(uint64_t *owner_id)
607 rte_eth_dev_shared_data_prepare();
609 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
611 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
613 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
618 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
619 const struct rte_eth_dev_owner *new_owner)
621 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
622 struct rte_eth_dev_owner *port_owner;
624 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
625 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
630 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
631 !rte_eth_is_valid_owner_id(old_owner_id)) {
633 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
634 old_owner_id, new_owner->id);
638 port_owner = &rte_eth_devices[port_id].data->owner;
639 if (port_owner->id != old_owner_id) {
641 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
642 port_id, port_owner->name, port_owner->id);
646 /* can not truncate (same structure) */
647 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
649 port_owner->id = new_owner->id;
651 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
652 port_id, new_owner->name, new_owner->id);
658 rte_eth_dev_owner_set(const uint16_t port_id,
659 const struct rte_eth_dev_owner *owner)
663 rte_eth_dev_shared_data_prepare();
665 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
667 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
669 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
674 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
676 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
677 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
680 rte_eth_dev_shared_data_prepare();
682 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
684 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
686 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
691 rte_eth_dev_owner_delete(const uint64_t owner_id)
696 rte_eth_dev_shared_data_prepare();
698 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
700 if (rte_eth_is_valid_owner_id(owner_id)) {
701 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
702 if (rte_eth_devices[port_id].data->owner.id == owner_id)
703 memset(&rte_eth_devices[port_id].data->owner, 0,
704 sizeof(struct rte_eth_dev_owner));
705 RTE_ETHDEV_LOG(NOTICE,
706 "All port owners owned by %016"PRIx64" identifier have removed\n",
710 "Invalid owner id=%016"PRIx64"\n",
715 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
721 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
724 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
726 rte_eth_dev_shared_data_prepare();
728 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
730 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
731 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
735 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
738 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
743 rte_eth_dev_socket_id(uint16_t port_id)
745 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
746 return rte_eth_devices[port_id].data->numa_node;
750 rte_eth_dev_get_sec_ctx(uint16_t port_id)
752 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
753 return rte_eth_devices[port_id].security_ctx;
757 rte_eth_dev_count_avail(void)
764 RTE_ETH_FOREACH_DEV(p)
771 rte_eth_dev_count_total(void)
773 uint16_t port, count = 0;
775 RTE_ETH_FOREACH_VALID_DEV(port)
782 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
786 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
789 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
793 /* shouldn't check 'rte_eth_devices[i].data',
794 * because it might be overwritten by VDEV PMD */
795 tmp = rte_eth_dev_shared_data->data[port_id].name;
801 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
806 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
810 RTE_ETH_FOREACH_VALID_DEV(pid)
811 if (!strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
820 eth_err(uint16_t port_id, int ret)
824 if (rte_eth_dev_is_removed(port_id))
830 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
832 uint16_t old_nb_queues = dev->data->nb_rx_queues;
836 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
837 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
838 sizeof(dev->data->rx_queues[0]) * nb_queues,
839 RTE_CACHE_LINE_SIZE);
840 if (dev->data->rx_queues == NULL) {
841 dev->data->nb_rx_queues = 0;
844 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
845 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
847 rxq = dev->data->rx_queues;
849 for (i = nb_queues; i < old_nb_queues; i++)
850 (*dev->dev_ops->rx_queue_release)(rxq[i]);
851 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
852 RTE_CACHE_LINE_SIZE);
855 if (nb_queues > old_nb_queues) {
856 uint16_t new_qs = nb_queues - old_nb_queues;
858 memset(rxq + old_nb_queues, 0,
859 sizeof(rxq[0]) * new_qs);
862 dev->data->rx_queues = rxq;
864 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
865 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
867 rxq = dev->data->rx_queues;
869 for (i = nb_queues; i < old_nb_queues; i++)
870 (*dev->dev_ops->rx_queue_release)(rxq[i]);
872 rte_free(dev->data->rx_queues);
873 dev->data->rx_queues = NULL;
875 dev->data->nb_rx_queues = nb_queues;
880 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
882 struct rte_eth_dev *dev;
884 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
886 dev = &rte_eth_devices[port_id];
887 if (!dev->data->dev_started) {
889 "Port %u must be started before start any queue\n",
894 if (rx_queue_id >= dev->data->nb_rx_queues) {
895 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
899 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
901 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
903 "Can't start Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
904 rx_queue_id, port_id);
908 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
910 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
911 rx_queue_id, port_id);
915 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
921 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
923 struct rte_eth_dev *dev;
925 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
927 dev = &rte_eth_devices[port_id];
928 if (rx_queue_id >= dev->data->nb_rx_queues) {
929 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
933 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
935 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
937 "Can't stop Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
938 rx_queue_id, port_id);
942 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
944 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
945 rx_queue_id, port_id);
949 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
954 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
956 struct rte_eth_dev *dev;
958 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
960 dev = &rte_eth_devices[port_id];
961 if (!dev->data->dev_started) {
963 "Port %u must be started before start any queue\n",
968 if (tx_queue_id >= dev->data->nb_tx_queues) {
969 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
973 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
975 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
977 "Can't start Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
978 tx_queue_id, port_id);
982 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
984 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
985 tx_queue_id, port_id);
989 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
993 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
995 struct rte_eth_dev *dev;
997 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
999 dev = &rte_eth_devices[port_id];
1000 if (tx_queue_id >= dev->data->nb_tx_queues) {
1001 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1005 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
1007 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1008 RTE_ETHDEV_LOG(INFO,
1009 "Can't stop Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1010 tx_queue_id, port_id);
1014 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1015 RTE_ETHDEV_LOG(INFO,
1016 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1017 tx_queue_id, port_id);
1021 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1026 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1028 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1032 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1033 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1034 sizeof(dev->data->tx_queues[0]) * nb_queues,
1035 RTE_CACHE_LINE_SIZE);
1036 if (dev->data->tx_queues == NULL) {
1037 dev->data->nb_tx_queues = 0;
1040 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1041 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1043 txq = dev->data->tx_queues;
1045 for (i = nb_queues; i < old_nb_queues; i++)
1046 (*dev->dev_ops->tx_queue_release)(txq[i]);
1047 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1048 RTE_CACHE_LINE_SIZE);
1051 if (nb_queues > old_nb_queues) {
1052 uint16_t new_qs = nb_queues - old_nb_queues;
1054 memset(txq + old_nb_queues, 0,
1055 sizeof(txq[0]) * new_qs);
1058 dev->data->tx_queues = txq;
1060 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1061 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1063 txq = dev->data->tx_queues;
1065 for (i = nb_queues; i < old_nb_queues; i++)
1066 (*dev->dev_ops->tx_queue_release)(txq[i]);
1068 rte_free(dev->data->tx_queues);
1069 dev->data->tx_queues = NULL;
1071 dev->data->nb_tx_queues = nb_queues;
1076 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1079 case ETH_SPEED_NUM_10M:
1080 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1081 case ETH_SPEED_NUM_100M:
1082 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1083 case ETH_SPEED_NUM_1G:
1084 return ETH_LINK_SPEED_1G;
1085 case ETH_SPEED_NUM_2_5G:
1086 return ETH_LINK_SPEED_2_5G;
1087 case ETH_SPEED_NUM_5G:
1088 return ETH_LINK_SPEED_5G;
1089 case ETH_SPEED_NUM_10G:
1090 return ETH_LINK_SPEED_10G;
1091 case ETH_SPEED_NUM_20G:
1092 return ETH_LINK_SPEED_20G;
1093 case ETH_SPEED_NUM_25G:
1094 return ETH_LINK_SPEED_25G;
1095 case ETH_SPEED_NUM_40G:
1096 return ETH_LINK_SPEED_40G;
1097 case ETH_SPEED_NUM_50G:
1098 return ETH_LINK_SPEED_50G;
1099 case ETH_SPEED_NUM_56G:
1100 return ETH_LINK_SPEED_56G;
1101 case ETH_SPEED_NUM_100G:
1102 return ETH_LINK_SPEED_100G;
1109 rte_eth_dev_rx_offload_name(uint64_t offload)
1111 const char *name = "UNKNOWN";
1114 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1115 if (offload == rte_rx_offload_names[i].offload) {
1116 name = rte_rx_offload_names[i].name;
1125 rte_eth_dev_tx_offload_name(uint64_t offload)
1127 const char *name = "UNKNOWN";
1130 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1131 if (offload == rte_tx_offload_names[i].offload) {
1132 name = rte_tx_offload_names[i].name;
1141 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1142 const struct rte_eth_conf *dev_conf)
1144 struct rte_eth_dev *dev;
1145 struct rte_eth_dev_info dev_info;
1146 struct rte_eth_conf orig_conf;
1150 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1152 dev = &rte_eth_devices[port_id];
1154 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1156 if (dev->data->dev_started) {
1158 "Port %u must be stopped to allow configuration\n",
1163 /* Store original config, as rollback required on failure */
1164 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1167 * Copy the dev_conf parameter into the dev structure.
1168 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1170 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
1172 ret = rte_eth_dev_info_get(port_id, &dev_info);
1176 /* If number of queues specified by application for both Rx and Tx is
1177 * zero, use driver preferred values. This cannot be done individually
1178 * as it is valid for either Tx or Rx (but not both) to be zero.
1179 * If driver does not provide any preferred valued, fall back on
1182 if (nb_rx_q == 0 && nb_tx_q == 0) {
1183 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1185 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1186 nb_tx_q = dev_info.default_txportconf.nb_queues;
1188 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1191 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1193 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1194 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1199 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1201 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1202 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1208 * Check that the numbers of RX and TX queues are not greater
1209 * than the maximum number of RX and TX queues supported by the
1210 * configured device.
1212 if (nb_rx_q > dev_info.max_rx_queues) {
1213 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1214 port_id, nb_rx_q, dev_info.max_rx_queues);
1219 if (nb_tx_q > dev_info.max_tx_queues) {
1220 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1221 port_id, nb_tx_q, dev_info.max_tx_queues);
1226 /* Check that the device supports requested interrupts */
1227 if ((dev_conf->intr_conf.lsc == 1) &&
1228 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1229 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1230 dev->device->driver->name);
1234 if ((dev_conf->intr_conf.rmv == 1) &&
1235 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1236 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1237 dev->device->driver->name);
1243 * If jumbo frames are enabled, check that the maximum RX packet
1244 * length is supported by the configured device.
1246 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1247 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1249 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1250 port_id, dev_conf->rxmode.max_rx_pkt_len,
1251 dev_info.max_rx_pktlen);
1254 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1256 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1257 port_id, dev_conf->rxmode.max_rx_pkt_len,
1258 (unsigned int)RTE_ETHER_MIN_LEN);
1263 if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN ||
1264 dev_conf->rxmode.max_rx_pkt_len > RTE_ETHER_MAX_LEN)
1265 /* Use default value */
1266 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1270 /* Any requested offloading must be within its device capabilities */
1271 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1272 dev_conf->rxmode.offloads) {
1274 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1275 "capabilities 0x%"PRIx64" in %s()\n",
1276 port_id, dev_conf->rxmode.offloads,
1277 dev_info.rx_offload_capa,
1282 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1283 dev_conf->txmode.offloads) {
1285 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1286 "capabilities 0x%"PRIx64" in %s()\n",
1287 port_id, dev_conf->txmode.offloads,
1288 dev_info.tx_offload_capa,
1294 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
1295 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
1297 /* Check that device supports requested rss hash functions. */
1298 if ((dev_info.flow_type_rss_offloads |
1299 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1300 dev_info.flow_type_rss_offloads) {
1302 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1303 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1304 dev_info.flow_type_rss_offloads);
1310 * Setup new number of RX/TX queues and reconfigure device.
1312 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1315 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1321 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1324 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1326 rte_eth_dev_rx_queue_config(dev, 0);
1331 diag = (*dev->dev_ops->dev_configure)(dev);
1333 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1335 rte_eth_dev_rx_queue_config(dev, 0);
1336 rte_eth_dev_tx_queue_config(dev, 0);
1337 ret = eth_err(port_id, diag);
1341 /* Initialize Rx profiling if enabled at compilation time. */
1342 diag = __rte_eth_dev_profile_init(port_id, dev);
1344 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1346 rte_eth_dev_rx_queue_config(dev, 0);
1347 rte_eth_dev_tx_queue_config(dev, 0);
1348 ret = eth_err(port_id, diag);
1355 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1361 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1363 if (dev->data->dev_started) {
1364 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1365 dev->data->port_id);
1369 rte_eth_dev_rx_queue_config(dev, 0);
1370 rte_eth_dev_tx_queue_config(dev, 0);
1372 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1376 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1377 struct rte_eth_dev_info *dev_info)
1379 struct rte_ether_addr *addr;
1384 /* replay MAC address configuration including default MAC */
1385 addr = &dev->data->mac_addrs[0];
1386 if (*dev->dev_ops->mac_addr_set != NULL)
1387 (*dev->dev_ops->mac_addr_set)(dev, addr);
1388 else if (*dev->dev_ops->mac_addr_add != NULL)
1389 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1391 if (*dev->dev_ops->mac_addr_add != NULL) {
1392 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1393 addr = &dev->data->mac_addrs[i];
1395 /* skip zero address */
1396 if (rte_is_zero_ether_addr(addr))
1400 pool_mask = dev->data->mac_pool_sel[i];
1403 if (pool_mask & 1ULL)
1404 (*dev->dev_ops->mac_addr_add)(dev,
1408 } while (pool_mask);
1414 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1415 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1419 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1420 rte_eth_dev_mac_restore(dev, dev_info);
1422 /* replay promiscuous configuration */
1424 * use callbacks directly since we don't need port_id check and
1425 * would like to bypass the same value set
1427 if (rte_eth_promiscuous_get(port_id) == 1 &&
1428 *dev->dev_ops->promiscuous_enable != NULL) {
1429 ret = eth_err(port_id,
1430 (*dev->dev_ops->promiscuous_enable)(dev));
1431 if (ret != 0 && ret != -ENOTSUP) {
1433 "Failed to enable promiscuous mode for device (port %u): %s\n",
1434 port_id, rte_strerror(-ret));
1437 } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1438 *dev->dev_ops->promiscuous_disable != NULL) {
1439 ret = eth_err(port_id,
1440 (*dev->dev_ops->promiscuous_disable)(dev));
1441 if (ret != 0 && ret != -ENOTSUP) {
1443 "Failed to disable promiscuous mode for device (port %u): %s\n",
1444 port_id, rte_strerror(-ret));
1449 /* replay all multicast configuration */
1451 * use callbacks directly since we don't need port_id check and
1452 * would like to bypass the same value set
1454 if (rte_eth_allmulticast_get(port_id) == 1 &&
1455 *dev->dev_ops->allmulticast_enable != NULL) {
1456 ret = eth_err(port_id,
1457 (*dev->dev_ops->allmulticast_enable)(dev));
1458 if (ret != 0 && ret != -ENOTSUP) {
1460 "Failed to enable allmulticast mode for device (port %u): %s\n",
1461 port_id, rte_strerror(-ret));
1464 } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1465 *dev->dev_ops->allmulticast_disable != NULL) {
1466 ret = eth_err(port_id,
1467 (*dev->dev_ops->allmulticast_disable)(dev));
1468 if (ret != 0 && ret != -ENOTSUP) {
1470 "Failed to disable allmulticast mode for device (port %u): %s\n",
1471 port_id, rte_strerror(-ret));
1480 rte_eth_dev_start(uint16_t port_id)
1482 struct rte_eth_dev *dev;
1483 struct rte_eth_dev_info dev_info;
1487 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1489 dev = &rte_eth_devices[port_id];
1491 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1493 if (dev->data->dev_started != 0) {
1494 RTE_ETHDEV_LOG(INFO,
1495 "Device with port_id=%"PRIu16" already started\n",
1500 ret = rte_eth_dev_info_get(port_id, &dev_info);
1504 /* Lets restore MAC now if device does not support live change */
1505 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1506 rte_eth_dev_mac_restore(dev, &dev_info);
1508 diag = (*dev->dev_ops->dev_start)(dev);
1510 dev->data->dev_started = 1;
1512 return eth_err(port_id, diag);
1514 ret = rte_eth_dev_config_restore(dev, &dev_info, port_id);
1517 "Error during restoring configuration for device (port %u): %s\n",
1518 port_id, rte_strerror(-ret));
1519 rte_eth_dev_stop(port_id);
1523 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1524 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1525 (*dev->dev_ops->link_update)(dev, 0);
1531 rte_eth_dev_stop(uint16_t port_id)
1533 struct rte_eth_dev *dev;
1535 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1536 dev = &rte_eth_devices[port_id];
1538 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1540 if (dev->data->dev_started == 0) {
1541 RTE_ETHDEV_LOG(INFO,
1542 "Device with port_id=%"PRIu16" already stopped\n",
1547 dev->data->dev_started = 0;
1548 (*dev->dev_ops->dev_stop)(dev);
1552 rte_eth_dev_set_link_up(uint16_t port_id)
1554 struct rte_eth_dev *dev;
1556 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1558 dev = &rte_eth_devices[port_id];
1560 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1561 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1565 rte_eth_dev_set_link_down(uint16_t port_id)
1567 struct rte_eth_dev *dev;
1569 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1571 dev = &rte_eth_devices[port_id];
1573 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1574 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1578 rte_eth_dev_close(uint16_t port_id)
1580 struct rte_eth_dev *dev;
1582 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1583 dev = &rte_eth_devices[port_id];
1585 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1586 dev->data->dev_started = 0;
1587 (*dev->dev_ops->dev_close)(dev);
1589 /* check behaviour flag - temporary for PMD migration */
1590 if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1591 /* new behaviour: send event + reset state + free all data */
1592 rte_eth_dev_release_port(dev);
1595 RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1596 "The driver %s should migrate to the new behaviour.\n",
1597 dev->device->driver->name);
1598 /* old behaviour: only free queue arrays */
1599 dev->data->nb_rx_queues = 0;
1600 rte_free(dev->data->rx_queues);
1601 dev->data->rx_queues = NULL;
1602 dev->data->nb_tx_queues = 0;
1603 rte_free(dev->data->tx_queues);
1604 dev->data->tx_queues = NULL;
1608 rte_eth_dev_reset(uint16_t port_id)
1610 struct rte_eth_dev *dev;
1613 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1614 dev = &rte_eth_devices[port_id];
1616 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1618 rte_eth_dev_stop(port_id);
1619 ret = dev->dev_ops->dev_reset(dev);
1621 return eth_err(port_id, ret);
1625 rte_eth_dev_is_removed(uint16_t port_id)
1627 struct rte_eth_dev *dev;
1630 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1632 dev = &rte_eth_devices[port_id];
1634 if (dev->state == RTE_ETH_DEV_REMOVED)
1637 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1639 ret = dev->dev_ops->is_removed(dev);
1641 /* Device is physically removed. */
1642 dev->state = RTE_ETH_DEV_REMOVED;
1648 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1649 uint16_t nb_rx_desc, unsigned int socket_id,
1650 const struct rte_eth_rxconf *rx_conf,
1651 struct rte_mempool *mp)
1654 uint32_t mbp_buf_size;
1655 struct rte_eth_dev *dev;
1656 struct rte_eth_dev_info dev_info;
1657 struct rte_eth_rxconf local_conf;
1660 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1662 dev = &rte_eth_devices[port_id];
1663 if (rx_queue_id >= dev->data->nb_rx_queues) {
1664 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1669 RTE_ETHDEV_LOG(ERR, "Invalid null mempool pointer\n");
1673 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1676 * Check the size of the mbuf data buffer.
1677 * This value must be provided in the private data of the memory pool.
1678 * First check that the memory pool has a valid private data.
1680 ret = rte_eth_dev_info_get(port_id, &dev_info);
1684 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1685 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1686 mp->name, (int)mp->private_data_size,
1687 (int)sizeof(struct rte_pktmbuf_pool_private));
1690 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1692 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1694 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1695 mp->name, (int)mbp_buf_size,
1696 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1697 (int)RTE_PKTMBUF_HEADROOM,
1698 (int)dev_info.min_rx_bufsize);
1702 /* Use default specified by driver, if nb_rx_desc is zero */
1703 if (nb_rx_desc == 0) {
1704 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1705 /* If driver default is also zero, fall back on EAL default */
1706 if (nb_rx_desc == 0)
1707 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1710 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1711 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1712 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1715 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1716 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1717 dev_info.rx_desc_lim.nb_min,
1718 dev_info.rx_desc_lim.nb_align);
1722 if (dev->data->dev_started &&
1723 !(dev_info.dev_capa &
1724 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1727 if (dev->data->dev_started &&
1728 (dev->data->rx_queue_state[rx_queue_id] !=
1729 RTE_ETH_QUEUE_STATE_STOPPED))
1732 rxq = dev->data->rx_queues;
1733 if (rxq[rx_queue_id]) {
1734 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1736 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1737 rxq[rx_queue_id] = NULL;
1740 if (rx_conf == NULL)
1741 rx_conf = &dev_info.default_rxconf;
1743 local_conf = *rx_conf;
1746 * If an offloading has already been enabled in
1747 * rte_eth_dev_configure(), it has been enabled on all queues,
1748 * so there is no need to enable it in this queue again.
1749 * The local_conf.offloads input to underlying PMD only carries
1750 * those offloadings which are only enabled on this queue and
1751 * not enabled on all queues.
1753 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1756 * New added offloadings for this queue are those not enabled in
1757 * rte_eth_dev_configure() and they must be per-queue type.
1758 * A pure per-port offloading can't be enabled on a queue while
1759 * disabled on another queue. A pure per-port offloading can't
1760 * be enabled for any queue as new added one if it hasn't been
1761 * enabled in rte_eth_dev_configure().
1763 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1764 local_conf.offloads) {
1766 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1767 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1768 port_id, rx_queue_id, local_conf.offloads,
1769 dev_info.rx_queue_offload_capa,
1774 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1775 socket_id, &local_conf, mp);
1777 if (!dev->data->min_rx_buf_size ||
1778 dev->data->min_rx_buf_size > mbp_buf_size)
1779 dev->data->min_rx_buf_size = mbp_buf_size;
1782 return eth_err(port_id, ret);
1786 rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1787 uint16_t nb_rx_desc,
1788 const struct rte_eth_hairpin_conf *conf)
1791 struct rte_eth_dev *dev;
1792 struct rte_eth_hairpin_cap cap;
1797 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1799 dev = &rte_eth_devices[port_id];
1800 if (rx_queue_id >= dev->data->nb_rx_queues) {
1801 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1804 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
1807 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_hairpin_queue_setup,
1809 /* if nb_rx_desc is zero use max number of desc from the driver. */
1810 if (nb_rx_desc == 0)
1811 nb_rx_desc = cap.max_nb_desc;
1812 if (nb_rx_desc > cap.max_nb_desc) {
1814 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu",
1815 nb_rx_desc, cap.max_nb_desc);
1818 if (conf->peer_count > cap.max_rx_2_tx) {
1820 "Invalid value for number of peers for Rx queue(=%hu), should be: <= %hu",
1821 conf->peer_count, cap.max_rx_2_tx);
1824 if (conf->peer_count == 0) {
1826 "Invalid value for number of peers for Rx queue(=%hu), should be: > 0",
1830 for (i = 0, count = 0; i < dev->data->nb_rx_queues &&
1831 cap.max_nb_queues != UINT16_MAX; i++) {
1832 if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i))
1835 if (count > cap.max_nb_queues) {
1836 RTE_ETHDEV_LOG(ERR, "To many Rx hairpin queues max is %d",
1840 if (dev->data->dev_started)
1842 rxq = dev->data->rx_queues;
1843 if (rxq[rx_queue_id] != NULL) {
1844 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1846 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1847 rxq[rx_queue_id] = NULL;
1849 ret = (*dev->dev_ops->rx_hairpin_queue_setup)(dev, rx_queue_id,
1852 dev->data->rx_queue_state[rx_queue_id] =
1853 RTE_ETH_QUEUE_STATE_HAIRPIN;
1854 return eth_err(port_id, ret);
1858 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1859 uint16_t nb_tx_desc, unsigned int socket_id,
1860 const struct rte_eth_txconf *tx_conf)
1862 struct rte_eth_dev *dev;
1863 struct rte_eth_dev_info dev_info;
1864 struct rte_eth_txconf local_conf;
1868 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1870 dev = &rte_eth_devices[port_id];
1871 if (tx_queue_id >= dev->data->nb_tx_queues) {
1872 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1876 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1878 ret = rte_eth_dev_info_get(port_id, &dev_info);
1882 /* Use default specified by driver, if nb_tx_desc is zero */
1883 if (nb_tx_desc == 0) {
1884 nb_tx_desc = dev_info.default_txportconf.ring_size;
1885 /* If driver default is zero, fall back on EAL default */
1886 if (nb_tx_desc == 0)
1887 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1889 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1890 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1891 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1893 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1894 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1895 dev_info.tx_desc_lim.nb_min,
1896 dev_info.tx_desc_lim.nb_align);
1900 if (dev->data->dev_started &&
1901 !(dev_info.dev_capa &
1902 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1905 if (dev->data->dev_started &&
1906 (dev->data->tx_queue_state[tx_queue_id] !=
1907 RTE_ETH_QUEUE_STATE_STOPPED))
1910 txq = dev->data->tx_queues;
1911 if (txq[tx_queue_id]) {
1912 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1914 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1915 txq[tx_queue_id] = NULL;
1918 if (tx_conf == NULL)
1919 tx_conf = &dev_info.default_txconf;
1921 local_conf = *tx_conf;
1924 * If an offloading has already been enabled in
1925 * rte_eth_dev_configure(), it has been enabled on all queues,
1926 * so there is no need to enable it in this queue again.
1927 * The local_conf.offloads input to underlying PMD only carries
1928 * those offloadings which are only enabled on this queue and
1929 * not enabled on all queues.
1931 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1934 * New added offloadings for this queue are those not enabled in
1935 * rte_eth_dev_configure() and they must be per-queue type.
1936 * A pure per-port offloading can't be enabled on a queue while
1937 * disabled on another queue. A pure per-port offloading can't
1938 * be enabled for any queue as new added one if it hasn't been
1939 * enabled in rte_eth_dev_configure().
1941 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1942 local_conf.offloads) {
1944 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1945 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1946 port_id, tx_queue_id, local_conf.offloads,
1947 dev_info.tx_queue_offload_capa,
1952 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1953 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1957 rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1958 uint16_t nb_tx_desc,
1959 const struct rte_eth_hairpin_conf *conf)
1961 struct rte_eth_dev *dev;
1962 struct rte_eth_hairpin_cap cap;
1968 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1969 dev = &rte_eth_devices[port_id];
1970 if (tx_queue_id >= dev->data->nb_tx_queues) {
1971 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1974 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
1977 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_hairpin_queue_setup,
1979 /* if nb_rx_desc is zero use max number of desc from the driver. */
1980 if (nb_tx_desc == 0)
1981 nb_tx_desc = cap.max_nb_desc;
1982 if (nb_tx_desc > cap.max_nb_desc) {
1984 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu",
1985 nb_tx_desc, cap.max_nb_desc);
1988 if (conf->peer_count > cap.max_tx_2_rx) {
1990 "Invalid value for number of peers for Tx queue(=%hu), should be: <= %hu",
1991 conf->peer_count, cap.max_tx_2_rx);
1994 if (conf->peer_count == 0) {
1996 "Invalid value for number of peers for Tx queue(=%hu), should be: > 0",
2000 for (i = 0, count = 0; i < dev->data->nb_tx_queues &&
2001 cap.max_nb_queues != UINT16_MAX; i++) {
2002 if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i))
2005 if (count > cap.max_nb_queues) {
2006 RTE_ETHDEV_LOG(ERR, "To many Tx hairpin queues max is %d",
2010 if (dev->data->dev_started)
2012 txq = dev->data->tx_queues;
2013 if (txq[tx_queue_id] != NULL) {
2014 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2016 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2017 txq[tx_queue_id] = NULL;
2019 ret = (*dev->dev_ops->tx_hairpin_queue_setup)
2020 (dev, tx_queue_id, nb_tx_desc, conf);
2022 dev->data->tx_queue_state[tx_queue_id] =
2023 RTE_ETH_QUEUE_STATE_HAIRPIN;
2024 return eth_err(port_id, ret);
2028 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
2029 void *userdata __rte_unused)
2033 for (i = 0; i < unsent; i++)
2034 rte_pktmbuf_free(pkts[i]);
2038 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
2041 uint64_t *count = userdata;
2044 for (i = 0; i < unsent; i++)
2045 rte_pktmbuf_free(pkts[i]);
2051 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
2052 buffer_tx_error_fn cbfn, void *userdata)
2054 buffer->error_callback = cbfn;
2055 buffer->error_userdata = userdata;
2060 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
2067 buffer->size = size;
2068 if (buffer->error_callback == NULL) {
2069 ret = rte_eth_tx_buffer_set_err_callback(
2070 buffer, rte_eth_tx_buffer_drop_callback, NULL);
2077 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
2079 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2082 /* Validate Input Data. Bail if not valid or not supported. */
2083 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2084 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
2086 /* Call driver to free pending mbufs. */
2087 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
2089 return eth_err(port_id, ret);
2093 rte_eth_promiscuous_enable(uint16_t port_id)
2095 struct rte_eth_dev *dev;
2098 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2099 dev = &rte_eth_devices[port_id];
2101 if (dev->data->promiscuous == 1)
2104 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
2106 diag = (*dev->dev_ops->promiscuous_enable)(dev);
2107 dev->data->promiscuous = (diag == 0) ? 1 : 0;
2109 return eth_err(port_id, diag);
2113 rte_eth_promiscuous_disable(uint16_t port_id)
2115 struct rte_eth_dev *dev;
2118 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2119 dev = &rte_eth_devices[port_id];
2121 if (dev->data->promiscuous == 0)
2124 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
2126 dev->data->promiscuous = 0;
2127 diag = (*dev->dev_ops->promiscuous_disable)(dev);
2129 dev->data->promiscuous = 1;
2131 return eth_err(port_id, diag);
2135 rte_eth_promiscuous_get(uint16_t port_id)
2137 struct rte_eth_dev *dev;
2139 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2141 dev = &rte_eth_devices[port_id];
2142 return dev->data->promiscuous;
2146 rte_eth_allmulticast_enable(uint16_t port_id)
2148 struct rte_eth_dev *dev;
2151 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2152 dev = &rte_eth_devices[port_id];
2154 if (dev->data->all_multicast == 1)
2157 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2158 diag = (*dev->dev_ops->allmulticast_enable)(dev);
2159 dev->data->all_multicast = (diag == 0) ? 1 : 0;
2161 return eth_err(port_id, diag);
2165 rte_eth_allmulticast_disable(uint16_t port_id)
2167 struct rte_eth_dev *dev;
2170 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2171 dev = &rte_eth_devices[port_id];
2173 if (dev->data->all_multicast == 0)
2176 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2177 dev->data->all_multicast = 0;
2178 diag = (*dev->dev_ops->allmulticast_disable)(dev);
2180 dev->data->all_multicast = 1;
2182 return eth_err(port_id, diag);
2186 rte_eth_allmulticast_get(uint16_t port_id)
2188 struct rte_eth_dev *dev;
2190 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2192 dev = &rte_eth_devices[port_id];
2193 return dev->data->all_multicast;
2197 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2199 struct rte_eth_dev *dev;
2201 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2202 dev = &rte_eth_devices[port_id];
2204 if (dev->data->dev_conf.intr_conf.lsc &&
2205 dev->data->dev_started)
2206 rte_eth_linkstatus_get(dev, eth_link);
2208 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2209 (*dev->dev_ops->link_update)(dev, 1);
2210 *eth_link = dev->data->dev_link;
2217 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2219 struct rte_eth_dev *dev;
2221 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2222 dev = &rte_eth_devices[port_id];
2224 if (dev->data->dev_conf.intr_conf.lsc &&
2225 dev->data->dev_started)
2226 rte_eth_linkstatus_get(dev, eth_link);
2228 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2229 (*dev->dev_ops->link_update)(dev, 0);
2230 *eth_link = dev->data->dev_link;
2237 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2239 struct rte_eth_dev *dev;
2241 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2243 dev = &rte_eth_devices[port_id];
2244 memset(stats, 0, sizeof(*stats));
2246 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2247 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2248 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2252 rte_eth_stats_reset(uint16_t port_id)
2254 struct rte_eth_dev *dev;
2257 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2258 dev = &rte_eth_devices[port_id];
2260 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2261 ret = (*dev->dev_ops->stats_reset)(dev);
2263 return eth_err(port_id, ret);
2265 dev->data->rx_mbuf_alloc_failed = 0;
2271 get_xstats_basic_count(struct rte_eth_dev *dev)
2273 uint16_t nb_rxqs, nb_txqs;
2276 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2277 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2279 count = RTE_NB_STATS;
2280 count += nb_rxqs * RTE_NB_RXQ_STATS;
2281 count += nb_txqs * RTE_NB_TXQ_STATS;
2287 get_xstats_count(uint16_t port_id)
2289 struct rte_eth_dev *dev;
2292 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2293 dev = &rte_eth_devices[port_id];
2294 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2295 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2298 return eth_err(port_id, count);
2300 if (dev->dev_ops->xstats_get_names != NULL) {
2301 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2303 return eth_err(port_id, count);
2308 count += get_xstats_basic_count(dev);
2314 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2317 int cnt_xstats, idx_xstat;
2319 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2322 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2327 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2332 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2333 if (cnt_xstats < 0) {
2334 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2338 /* Get id-name lookup table */
2339 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2341 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2342 port_id, xstats_names, cnt_xstats, NULL)) {
2343 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2347 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2348 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2357 /* retrieve basic stats names */
2359 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2360 struct rte_eth_xstat_name *xstats_names)
2362 int cnt_used_entries = 0;
2363 uint32_t idx, id_queue;
2366 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2367 strlcpy(xstats_names[cnt_used_entries].name,
2368 rte_stats_strings[idx].name,
2369 sizeof(xstats_names[0].name));
2372 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2373 for (id_queue = 0; id_queue < num_q; id_queue++) {
2374 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2375 snprintf(xstats_names[cnt_used_entries].name,
2376 sizeof(xstats_names[0].name),
2378 id_queue, rte_rxq_stats_strings[idx].name);
2383 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2384 for (id_queue = 0; id_queue < num_q; id_queue++) {
2385 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2386 snprintf(xstats_names[cnt_used_entries].name,
2387 sizeof(xstats_names[0].name),
2389 id_queue, rte_txq_stats_strings[idx].name);
2393 return cnt_used_entries;
2396 /* retrieve ethdev extended statistics names */
2398 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2399 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2402 struct rte_eth_xstat_name *xstats_names_copy;
2403 unsigned int no_basic_stat_requested = 1;
2404 unsigned int no_ext_stat_requested = 1;
2405 unsigned int expected_entries;
2406 unsigned int basic_count;
2407 struct rte_eth_dev *dev;
2411 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2412 dev = &rte_eth_devices[port_id];
2414 basic_count = get_xstats_basic_count(dev);
2415 ret = get_xstats_count(port_id);
2418 expected_entries = (unsigned int)ret;
2420 /* Return max number of stats if no ids given */
2423 return expected_entries;
2424 else if (xstats_names && size < expected_entries)
2425 return expected_entries;
2428 if (ids && !xstats_names)
2431 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2432 uint64_t ids_copy[size];
2434 for (i = 0; i < size; i++) {
2435 if (ids[i] < basic_count) {
2436 no_basic_stat_requested = 0;
2441 * Convert ids to xstats ids that PMD knows.
2442 * ids known by user are basic + extended stats.
2444 ids_copy[i] = ids[i] - basic_count;
2447 if (no_basic_stat_requested)
2448 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2449 xstats_names, ids_copy, size);
2452 /* Retrieve all stats */
2454 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2456 if (num_stats < 0 || num_stats > (int)expected_entries)
2459 return expected_entries;
2462 xstats_names_copy = calloc(expected_entries,
2463 sizeof(struct rte_eth_xstat_name));
2465 if (!xstats_names_copy) {
2466 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2471 for (i = 0; i < size; i++) {
2472 if (ids[i] >= basic_count) {
2473 no_ext_stat_requested = 0;
2479 /* Fill xstats_names_copy structure */
2480 if (ids && no_ext_stat_requested) {
2481 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2483 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2486 free(xstats_names_copy);
2492 for (i = 0; i < size; i++) {
2493 if (ids[i] >= expected_entries) {
2494 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2495 free(xstats_names_copy);
2498 xstats_names[i] = xstats_names_copy[ids[i]];
2501 free(xstats_names_copy);
2506 rte_eth_xstats_get_names(uint16_t port_id,
2507 struct rte_eth_xstat_name *xstats_names,
2510 struct rte_eth_dev *dev;
2511 int cnt_used_entries;
2512 int cnt_expected_entries;
2513 int cnt_driver_entries;
2515 cnt_expected_entries = get_xstats_count(port_id);
2516 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2517 (int)size < cnt_expected_entries)
2518 return cnt_expected_entries;
2520 /* port_id checked in get_xstats_count() */
2521 dev = &rte_eth_devices[port_id];
2523 cnt_used_entries = rte_eth_basic_stats_get_names(
2526 if (dev->dev_ops->xstats_get_names != NULL) {
2527 /* If there are any driver-specific xstats, append them
2530 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2532 xstats_names + cnt_used_entries,
2533 size - cnt_used_entries);
2534 if (cnt_driver_entries < 0)
2535 return eth_err(port_id, cnt_driver_entries);
2536 cnt_used_entries += cnt_driver_entries;
2539 return cnt_used_entries;
2544 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2546 struct rte_eth_dev *dev;
2547 struct rte_eth_stats eth_stats;
2548 unsigned int count = 0, i, q;
2549 uint64_t val, *stats_ptr;
2550 uint16_t nb_rxqs, nb_txqs;
2553 ret = rte_eth_stats_get(port_id, ð_stats);
2557 dev = &rte_eth_devices[port_id];
2559 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2560 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2563 for (i = 0; i < RTE_NB_STATS; i++) {
2564 stats_ptr = RTE_PTR_ADD(ð_stats,
2565 rte_stats_strings[i].offset);
2567 xstats[count++].value = val;
2571 for (q = 0; q < nb_rxqs; q++) {
2572 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2573 stats_ptr = RTE_PTR_ADD(ð_stats,
2574 rte_rxq_stats_strings[i].offset +
2575 q * sizeof(uint64_t));
2577 xstats[count++].value = val;
2582 for (q = 0; q < nb_txqs; q++) {
2583 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2584 stats_ptr = RTE_PTR_ADD(ð_stats,
2585 rte_txq_stats_strings[i].offset +
2586 q * sizeof(uint64_t));
2588 xstats[count++].value = val;
2594 /* retrieve ethdev extended statistics */
2596 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2597 uint64_t *values, unsigned int size)
2599 unsigned int no_basic_stat_requested = 1;
2600 unsigned int no_ext_stat_requested = 1;
2601 unsigned int num_xstats_filled;
2602 unsigned int basic_count;
2603 uint16_t expected_entries;
2604 struct rte_eth_dev *dev;
2608 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2609 ret = get_xstats_count(port_id);
2612 expected_entries = (uint16_t)ret;
2613 struct rte_eth_xstat xstats[expected_entries];
2614 dev = &rte_eth_devices[port_id];
2615 basic_count = get_xstats_basic_count(dev);
2617 /* Return max number of stats if no ids given */
2620 return expected_entries;
2621 else if (values && size < expected_entries)
2622 return expected_entries;
2628 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2629 unsigned int basic_count = get_xstats_basic_count(dev);
2630 uint64_t ids_copy[size];
2632 for (i = 0; i < size; i++) {
2633 if (ids[i] < basic_count) {
2634 no_basic_stat_requested = 0;
2639 * Convert ids to xstats ids that PMD knows.
2640 * ids known by user are basic + extended stats.
2642 ids_copy[i] = ids[i] - basic_count;
2645 if (no_basic_stat_requested)
2646 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2651 for (i = 0; i < size; i++) {
2652 if (ids[i] >= basic_count) {
2653 no_ext_stat_requested = 0;
2659 /* Fill the xstats structure */
2660 if (ids && no_ext_stat_requested)
2661 ret = rte_eth_basic_stats_get(port_id, xstats);
2663 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2667 num_xstats_filled = (unsigned int)ret;
2669 /* Return all stats */
2671 for (i = 0; i < num_xstats_filled; i++)
2672 values[i] = xstats[i].value;
2673 return expected_entries;
2677 for (i = 0; i < size; i++) {
2678 if (ids[i] >= expected_entries) {
2679 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2682 values[i] = xstats[ids[i]].value;
2688 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2691 struct rte_eth_dev *dev;
2692 unsigned int count = 0, i;
2693 signed int xcount = 0;
2694 uint16_t nb_rxqs, nb_txqs;
2697 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2699 dev = &rte_eth_devices[port_id];
2701 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2702 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2704 /* Return generic statistics */
2705 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2706 (nb_txqs * RTE_NB_TXQ_STATS);
2708 /* implemented by the driver */
2709 if (dev->dev_ops->xstats_get != NULL) {
2710 /* Retrieve the xstats from the driver at the end of the
2713 xcount = (*dev->dev_ops->xstats_get)(dev,
2714 xstats ? xstats + count : NULL,
2715 (n > count) ? n - count : 0);
2718 return eth_err(port_id, xcount);
2721 if (n < count + xcount || xstats == NULL)
2722 return count + xcount;
2724 /* now fill the xstats structure */
2725 ret = rte_eth_basic_stats_get(port_id, xstats);
2730 for (i = 0; i < count; i++)
2732 /* add an offset to driver-specific stats */
2733 for ( ; i < count + xcount; i++)
2734 xstats[i].id += count;
2736 return count + xcount;
2739 /* reset ethdev extended statistics */
2741 rte_eth_xstats_reset(uint16_t port_id)
2743 struct rte_eth_dev *dev;
2745 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2746 dev = &rte_eth_devices[port_id];
2748 /* implemented by the driver */
2749 if (dev->dev_ops->xstats_reset != NULL)
2750 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
2752 /* fallback to default */
2753 return rte_eth_stats_reset(port_id);
2757 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2760 struct rte_eth_dev *dev;
2762 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2764 dev = &rte_eth_devices[port_id];
2766 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2768 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2771 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2774 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2777 return (*dev->dev_ops->queue_stats_mapping_set)
2778 (dev, queue_id, stat_idx, is_rx);
2783 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2786 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2787 stat_idx, STAT_QMAP_TX));
2792 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2795 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2796 stat_idx, STAT_QMAP_RX));
2800 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2802 struct rte_eth_dev *dev;
2804 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2805 dev = &rte_eth_devices[port_id];
2807 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2808 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2809 fw_version, fw_size));
2813 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2815 struct rte_eth_dev *dev;
2816 const struct rte_eth_desc_lim lim = {
2817 .nb_max = UINT16_MAX,
2820 .nb_seg_max = UINT16_MAX,
2821 .nb_mtu_seg_max = UINT16_MAX,
2826 * Init dev_info before port_id check since caller does not have
2827 * return status and does not know if get is successful or not.
2829 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2831 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2832 dev = &rte_eth_devices[port_id];
2834 dev_info->rx_desc_lim = lim;
2835 dev_info->tx_desc_lim = lim;
2836 dev_info->device = dev->device;
2837 dev_info->min_mtu = RTE_ETHER_MIN_MTU;
2838 dev_info->max_mtu = UINT16_MAX;
2840 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
2841 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2843 /* Cleanup already filled in device information */
2844 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2845 return eth_err(port_id, diag);
2848 dev_info->driver_name = dev->device->driver->name;
2849 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2850 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2852 dev_info->dev_flags = &dev->data->dev_flags;
2858 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2859 uint32_t *ptypes, int num)
2862 struct rte_eth_dev *dev;
2863 const uint32_t *all_ptypes;
2865 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2866 dev = &rte_eth_devices[port_id];
2867 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2868 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2873 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2874 if (all_ptypes[i] & ptype_mask) {
2876 ptypes[j] = all_ptypes[i];
2884 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
2886 struct rte_eth_dev *dev;
2888 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2889 dev = &rte_eth_devices[port_id];
2890 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2897 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2899 struct rte_eth_dev *dev;
2901 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2903 dev = &rte_eth_devices[port_id];
2904 *mtu = dev->data->mtu;
2909 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2912 struct rte_eth_dev_info dev_info;
2913 struct rte_eth_dev *dev;
2915 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2916 dev = &rte_eth_devices[port_id];
2917 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2920 * Check if the device supports dev_infos_get, if it does not
2921 * skip min_mtu/max_mtu validation here as this requires values
2922 * that are populated within the call to rte_eth_dev_info_get()
2923 * which relies on dev->dev_ops->dev_infos_get.
2925 if (*dev->dev_ops->dev_infos_get != NULL) {
2926 ret = rte_eth_dev_info_get(port_id, &dev_info);
2930 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
2934 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2936 dev->data->mtu = mtu;
2938 return eth_err(port_id, ret);
2942 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2944 struct rte_eth_dev *dev;
2947 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2948 dev = &rte_eth_devices[port_id];
2949 if (!(dev->data->dev_conf.rxmode.offloads &
2950 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2951 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2956 if (vlan_id > 4095) {
2957 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2961 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2963 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2965 struct rte_vlan_filter_conf *vfc;
2969 vfc = &dev->data->vlan_filter_conf;
2970 vidx = vlan_id / 64;
2971 vbit = vlan_id % 64;
2974 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2976 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2979 return eth_err(port_id, ret);
2983 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2986 struct rte_eth_dev *dev;
2988 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2989 dev = &rte_eth_devices[port_id];
2990 if (rx_queue_id >= dev->data->nb_rx_queues) {
2991 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2995 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2996 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
3002 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3003 enum rte_vlan_type vlan_type,
3006 struct rte_eth_dev *dev;
3008 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3009 dev = &rte_eth_devices[port_id];
3010 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
3012 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
3017 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
3019 struct rte_eth_dev *dev;
3023 uint64_t orig_offloads;
3024 uint64_t *dev_offloads;
3026 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3027 dev = &rte_eth_devices[port_id];
3029 /* save original values in case of failure */
3030 orig_offloads = dev->data->dev_conf.rxmode.offloads;
3031 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3033 /*check which option changed by application*/
3034 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
3035 org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
3038 *dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
3040 *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
3041 mask |= ETH_VLAN_STRIP_MASK;
3044 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
3045 org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
3048 *dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
3050 *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
3051 mask |= ETH_VLAN_FILTER_MASK;
3054 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
3055 org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
3058 *dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
3060 *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
3061 mask |= ETH_VLAN_EXTEND_MASK;
3064 cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
3065 org = !!(*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
3068 *dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
3070 *dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
3071 mask |= ETH_QINQ_STRIP_MASK;
3078 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
3079 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
3081 /* hit an error restore original values */
3082 *dev_offloads = orig_offloads;
3085 return eth_err(port_id, ret);
3089 rte_eth_dev_get_vlan_offload(uint16_t port_id)
3091 struct rte_eth_dev *dev;
3092 uint64_t *dev_offloads;
3095 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3096 dev = &rte_eth_devices[port_id];
3097 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3099 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
3100 ret |= ETH_VLAN_STRIP_OFFLOAD;
3102 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
3103 ret |= ETH_VLAN_FILTER_OFFLOAD;
3105 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
3106 ret |= ETH_VLAN_EXTEND_OFFLOAD;
3108 if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
3109 ret |= ETH_QINQ_STRIP_OFFLOAD;
3115 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
3117 struct rte_eth_dev *dev;
3119 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3120 dev = &rte_eth_devices[port_id];
3121 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
3123 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
3127 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3129 struct rte_eth_dev *dev;
3131 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3132 dev = &rte_eth_devices[port_id];
3133 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
3134 memset(fc_conf, 0, sizeof(*fc_conf));
3135 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
3139 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3141 struct rte_eth_dev *dev;
3143 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3144 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
3145 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
3149 dev = &rte_eth_devices[port_id];
3150 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3151 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3155 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3156 struct rte_eth_pfc_conf *pfc_conf)
3158 struct rte_eth_dev *dev;
3160 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3161 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
3162 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
3166 dev = &rte_eth_devices[port_id];
3167 /* High water, low water validation are device specific */
3168 if (*dev->dev_ops->priority_flow_ctrl_set)
3169 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
3175 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
3183 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
3184 for (i = 0; i < num; i++) {
3185 if (reta_conf[i].mask)
3193 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
3197 uint16_t i, idx, shift;
3203 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3207 for (i = 0; i < reta_size; i++) {
3208 idx = i / RTE_RETA_GROUP_SIZE;
3209 shift = i % RTE_RETA_GROUP_SIZE;
3210 if ((reta_conf[idx].mask & (1ULL << shift)) &&
3211 (reta_conf[idx].reta[shift] >= max_rxq)) {
3213 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
3215 reta_conf[idx].reta[shift], max_rxq);
3224 rte_eth_dev_rss_reta_update(uint16_t port_id,
3225 struct rte_eth_rss_reta_entry64 *reta_conf,
3228 struct rte_eth_dev *dev;
3231 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3232 /* Check mask bits */
3233 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3237 dev = &rte_eth_devices[port_id];
3239 /* Check entry value */
3240 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
3241 dev->data->nb_rx_queues);
3245 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
3246 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
3251 rte_eth_dev_rss_reta_query(uint16_t port_id,
3252 struct rte_eth_rss_reta_entry64 *reta_conf,
3255 struct rte_eth_dev *dev;
3258 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3260 /* Check mask bits */
3261 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3265 dev = &rte_eth_devices[port_id];
3266 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
3267 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
3272 rte_eth_dev_rss_hash_update(uint16_t port_id,
3273 struct rte_eth_rss_conf *rss_conf)
3275 struct rte_eth_dev *dev;
3276 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
3279 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3281 ret = rte_eth_dev_info_get(port_id, &dev_info);
3285 rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
3287 dev = &rte_eth_devices[port_id];
3288 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
3289 dev_info.flow_type_rss_offloads) {
3291 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
3292 port_id, rss_conf->rss_hf,
3293 dev_info.flow_type_rss_offloads);
3296 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
3297 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
3302 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
3303 struct rte_eth_rss_conf *rss_conf)
3305 struct rte_eth_dev *dev;
3307 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3308 dev = &rte_eth_devices[port_id];
3309 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
3310 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
3315 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
3316 struct rte_eth_udp_tunnel *udp_tunnel)
3318 struct rte_eth_dev *dev;
3320 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3321 if (udp_tunnel == NULL) {
3322 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3326 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3327 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3331 dev = &rte_eth_devices[port_id];
3332 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
3333 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
3338 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
3339 struct rte_eth_udp_tunnel *udp_tunnel)
3341 struct rte_eth_dev *dev;
3343 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3344 dev = &rte_eth_devices[port_id];
3346 if (udp_tunnel == NULL) {
3347 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3351 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3352 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3356 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3357 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3362 rte_eth_led_on(uint16_t port_id)
3364 struct rte_eth_dev *dev;
3366 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3367 dev = &rte_eth_devices[port_id];
3368 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3369 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3373 rte_eth_led_off(uint16_t port_id)
3375 struct rte_eth_dev *dev;
3377 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3378 dev = &rte_eth_devices[port_id];
3379 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3380 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3384 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3388 get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3390 struct rte_eth_dev_info dev_info;
3391 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3395 ret = rte_eth_dev_info_get(port_id, &dev_info);
3399 for (i = 0; i < dev_info.max_mac_addrs; i++)
3400 if (memcmp(addr, &dev->data->mac_addrs[i],
3401 RTE_ETHER_ADDR_LEN) == 0)
3407 static const struct rte_ether_addr null_mac_addr;
3410 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
3413 struct rte_eth_dev *dev;
3418 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3419 dev = &rte_eth_devices[port_id];
3420 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3422 if (rte_is_zero_ether_addr(addr)) {
3423 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3427 if (pool >= ETH_64_POOLS) {
3428 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3432 index = get_mac_addr_index(port_id, addr);
3434 index = get_mac_addr_index(port_id, &null_mac_addr);
3436 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3441 pool_mask = dev->data->mac_pool_sel[index];
3443 /* Check if both MAC address and pool is already there, and do nothing */
3444 if (pool_mask & (1ULL << pool))
3449 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3452 /* Update address in NIC data structure */
3453 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3455 /* Update pool bitmap in NIC data structure */
3456 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3459 return eth_err(port_id, ret);
3463 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
3465 struct rte_eth_dev *dev;
3468 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3469 dev = &rte_eth_devices[port_id];
3470 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3472 index = get_mac_addr_index(port_id, addr);
3475 "Port %u: Cannot remove default MAC address\n",
3478 } else if (index < 0)
3479 return 0; /* Do nothing if address wasn't found */
3482 (*dev->dev_ops->mac_addr_remove)(dev, index);
3484 /* Update address in NIC data structure */
3485 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3487 /* reset pool bitmap */
3488 dev->data->mac_pool_sel[index] = 0;
3494 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
3496 struct rte_eth_dev *dev;
3499 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3501 if (!rte_is_valid_assigned_ether_addr(addr))
3504 dev = &rte_eth_devices[port_id];
3505 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3507 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3511 /* Update default address in NIC data structure */
3512 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3519 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3523 get_hash_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3525 struct rte_eth_dev_info dev_info;
3526 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3530 ret = rte_eth_dev_info_get(port_id, &dev_info);
3534 if (!dev->data->hash_mac_addrs)
3537 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3538 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3539 RTE_ETHER_ADDR_LEN) == 0)
3546 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
3551 struct rte_eth_dev *dev;
3553 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3555 dev = &rte_eth_devices[port_id];
3556 if (rte_is_zero_ether_addr(addr)) {
3557 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3562 index = get_hash_mac_addr_index(port_id, addr);
3563 /* Check if it's already there, and do nothing */
3564 if ((index >= 0) && on)
3570 "Port %u: the MAC address was not set in UTA\n",
3575 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3577 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3583 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3584 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3586 /* Update address in NIC data structure */
3588 rte_ether_addr_copy(addr,
3589 &dev->data->hash_mac_addrs[index]);
3591 rte_ether_addr_copy(&null_mac_addr,
3592 &dev->data->hash_mac_addrs[index]);
3595 return eth_err(port_id, ret);
3599 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3601 struct rte_eth_dev *dev;
3603 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3605 dev = &rte_eth_devices[port_id];
3607 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3608 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3612 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3615 struct rte_eth_dev *dev;
3616 struct rte_eth_dev_info dev_info;
3617 struct rte_eth_link link;
3620 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3622 ret = rte_eth_dev_info_get(port_id, &dev_info);
3626 dev = &rte_eth_devices[port_id];
3627 link = dev->data->dev_link;
3629 if (queue_idx > dev_info.max_tx_queues) {
3631 "Set queue rate limit:port %u: invalid queue id=%u\n",
3632 port_id, queue_idx);
3636 if (tx_rate > link.link_speed) {
3638 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3639 tx_rate, link.link_speed);
3643 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3644 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3645 queue_idx, tx_rate));
3649 rte_eth_mirror_rule_set(uint16_t port_id,
3650 struct rte_eth_mirror_conf *mirror_conf,
3651 uint8_t rule_id, uint8_t on)
3653 struct rte_eth_dev *dev;
3655 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3656 if (mirror_conf->rule_type == 0) {
3657 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3661 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3662 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3667 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3668 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3669 (mirror_conf->pool_mask == 0)) {
3671 "Invalid mirror pool, pool mask can not be 0\n");
3675 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3676 mirror_conf->vlan.vlan_mask == 0) {
3678 "Invalid vlan mask, vlan mask can not be 0\n");
3682 dev = &rte_eth_devices[port_id];
3683 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3685 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3686 mirror_conf, rule_id, on));
3690 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3692 struct rte_eth_dev *dev;
3694 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3696 dev = &rte_eth_devices[port_id];
3697 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3699 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3703 RTE_INIT(eth_dev_init_cb_lists)
3707 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3708 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3712 rte_eth_dev_callback_register(uint16_t port_id,
3713 enum rte_eth_event_type event,
3714 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3716 struct rte_eth_dev *dev;
3717 struct rte_eth_dev_callback *user_cb;
3718 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3724 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3725 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3729 if (port_id == RTE_ETH_ALL) {
3731 last_port = RTE_MAX_ETHPORTS - 1;
3733 next_port = last_port = port_id;
3736 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3739 dev = &rte_eth_devices[next_port];
3741 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3742 if (user_cb->cb_fn == cb_fn &&
3743 user_cb->cb_arg == cb_arg &&
3744 user_cb->event == event) {
3749 /* create a new callback. */
3750 if (user_cb == NULL) {
3751 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3752 sizeof(struct rte_eth_dev_callback), 0);
3753 if (user_cb != NULL) {
3754 user_cb->cb_fn = cb_fn;
3755 user_cb->cb_arg = cb_arg;
3756 user_cb->event = event;
3757 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3760 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3761 rte_eth_dev_callback_unregister(port_id, event,
3767 } while (++next_port <= last_port);
3769 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3774 rte_eth_dev_callback_unregister(uint16_t port_id,
3775 enum rte_eth_event_type event,
3776 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3779 struct rte_eth_dev *dev;
3780 struct rte_eth_dev_callback *cb, *next;
3781 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3787 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3788 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3792 if (port_id == RTE_ETH_ALL) {
3794 last_port = RTE_MAX_ETHPORTS - 1;
3796 next_port = last_port = port_id;
3799 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3802 dev = &rte_eth_devices[next_port];
3804 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3807 next = TAILQ_NEXT(cb, next);
3809 if (cb->cb_fn != cb_fn || cb->event != event ||
3810 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3814 * if this callback is not executing right now,
3817 if (cb->active == 0) {
3818 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3824 } while (++next_port <= last_port);
3826 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3831 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3832 enum rte_eth_event_type event, void *ret_param)
3834 struct rte_eth_dev_callback *cb_lst;
3835 struct rte_eth_dev_callback dev_cb;
3838 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3839 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3840 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3844 if (ret_param != NULL)
3845 dev_cb.ret_param = ret_param;
3847 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3848 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3849 dev_cb.cb_arg, dev_cb.ret_param);
3850 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3853 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3858 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3863 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3865 dev->state = RTE_ETH_DEV_ATTACHED;
3869 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3872 struct rte_eth_dev *dev;
3873 struct rte_intr_handle *intr_handle;
3877 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3879 dev = &rte_eth_devices[port_id];
3881 if (!dev->intr_handle) {
3882 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3886 intr_handle = dev->intr_handle;
3887 if (!intr_handle->intr_vec) {
3888 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3892 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3893 vec = intr_handle->intr_vec[qid];
3894 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3895 if (rc && rc != -EEXIST) {
3897 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3898 port_id, qid, op, epfd, vec);
3906 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
3908 struct rte_intr_handle *intr_handle;
3909 struct rte_eth_dev *dev;
3910 unsigned int efd_idx;
3914 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
3916 dev = &rte_eth_devices[port_id];
3918 if (queue_id >= dev->data->nb_rx_queues) {
3919 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3923 if (!dev->intr_handle) {
3924 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3928 intr_handle = dev->intr_handle;
3929 if (!intr_handle->intr_vec) {
3930 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3934 vec = intr_handle->intr_vec[queue_id];
3935 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
3936 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
3937 fd = intr_handle->efds[efd_idx];
3942 const struct rte_memzone *
3943 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3944 uint16_t queue_id, size_t size, unsigned align,
3947 char z_name[RTE_MEMZONE_NAMESIZE];
3948 const struct rte_memzone *mz;
3951 rc = snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
3952 dev->data->port_id, queue_id, ring_name);
3953 if (rc >= RTE_MEMZONE_NAMESIZE) {
3954 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
3955 rte_errno = ENAMETOOLONG;
3959 mz = rte_memzone_lookup(z_name);
3963 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3964 RTE_MEMZONE_IOVA_CONTIG, align);
3968 rte_eth_dev_create(struct rte_device *device, const char *name,
3969 size_t priv_data_size,
3970 ethdev_bus_specific_init ethdev_bus_specific_init,
3971 void *bus_init_params,
3972 ethdev_init_t ethdev_init, void *init_params)
3974 struct rte_eth_dev *ethdev;
3977 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3979 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3980 ethdev = rte_eth_dev_allocate(name);
3984 if (priv_data_size) {
3985 ethdev->data->dev_private = rte_zmalloc_socket(
3986 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3989 if (!ethdev->data->dev_private) {
3990 RTE_LOG(ERR, EAL, "failed to allocate private data");
3996 ethdev = rte_eth_dev_attach_secondary(name);
3998 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3999 "ethdev doesn't exist");
4004 ethdev->device = device;
4006 if (ethdev_bus_specific_init) {
4007 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
4010 "ethdev bus specific initialisation failed");
4015 retval = ethdev_init(ethdev, init_params);
4017 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
4021 rte_eth_dev_probing_finish(ethdev);
4026 rte_eth_dev_release_port(ethdev);
4031 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
4032 ethdev_uninit_t ethdev_uninit)
4036 ethdev = rte_eth_dev_allocated(ethdev->data->name);
4040 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
4042 ret = ethdev_uninit(ethdev);
4046 return rte_eth_dev_release_port(ethdev);
4050 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
4051 int epfd, int op, void *data)
4054 struct rte_eth_dev *dev;
4055 struct rte_intr_handle *intr_handle;
4058 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4060 dev = &rte_eth_devices[port_id];
4061 if (queue_id >= dev->data->nb_rx_queues) {
4062 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4066 if (!dev->intr_handle) {
4067 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4071 intr_handle = dev->intr_handle;
4072 if (!intr_handle->intr_vec) {
4073 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4077 vec = intr_handle->intr_vec[queue_id];
4078 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4079 if (rc && rc != -EEXIST) {
4081 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4082 port_id, queue_id, op, epfd, vec);
4090 rte_eth_dev_rx_intr_enable(uint16_t port_id,
4093 struct rte_eth_dev *dev;
4095 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4097 dev = &rte_eth_devices[port_id];
4099 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
4100 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
4105 rte_eth_dev_rx_intr_disable(uint16_t port_id,
4108 struct rte_eth_dev *dev;
4110 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4112 dev = &rte_eth_devices[port_id];
4114 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
4115 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
4121 rte_eth_dev_filter_supported(uint16_t port_id,
4122 enum rte_filter_type filter_type)
4124 struct rte_eth_dev *dev;
4126 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4128 dev = &rte_eth_devices[port_id];
4129 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4130 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4131 RTE_ETH_FILTER_NOP, NULL);
4135 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
4136 enum rte_filter_op filter_op, void *arg)
4138 struct rte_eth_dev *dev;
4140 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4142 dev = &rte_eth_devices[port_id];
4143 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4144 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4148 const struct rte_eth_rxtx_callback *
4149 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
4150 rte_rx_callback_fn fn, void *user_param)
4152 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4153 rte_errno = ENOTSUP;
4156 struct rte_eth_dev *dev;
4158 /* check input parameters */
4159 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4160 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4164 dev = &rte_eth_devices[port_id];
4165 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4169 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4177 cb->param = user_param;
4179 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4180 /* Add the callbacks in fifo order. */
4181 struct rte_eth_rxtx_callback *tail =
4182 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4185 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4192 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4197 const struct rte_eth_rxtx_callback *
4198 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
4199 rte_rx_callback_fn fn, void *user_param)
4201 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4202 rte_errno = ENOTSUP;
4205 /* check input parameters */
4206 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4207 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4212 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4220 cb->param = user_param;
4222 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4223 /* Add the callbacks at fisrt position*/
4224 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4226 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4227 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4232 const struct rte_eth_rxtx_callback *
4233 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
4234 rte_tx_callback_fn fn, void *user_param)
4236 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4237 rte_errno = ENOTSUP;
4240 struct rte_eth_dev *dev;
4242 /* check input parameters */
4243 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4244 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
4249 dev = &rte_eth_devices[port_id];
4250 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4255 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4263 cb->param = user_param;
4265 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4266 /* Add the callbacks in fifo order. */
4267 struct rte_eth_rxtx_callback *tail =
4268 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
4271 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
4278 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4284 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4285 const struct rte_eth_rxtx_callback *user_cb)
4287 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4290 /* Check input parameters. */
4291 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4292 if (user_cb == NULL ||
4293 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
4296 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4297 struct rte_eth_rxtx_callback *cb;
4298 struct rte_eth_rxtx_callback **prev_cb;
4301 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4302 prev_cb = &dev->post_rx_burst_cbs[queue_id];
4303 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4305 if (cb == user_cb) {
4306 /* Remove the user cb from the callback list. */
4307 *prev_cb = cb->next;
4312 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4318 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4319 const struct rte_eth_rxtx_callback *user_cb)
4321 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4324 /* Check input parameters. */
4325 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4326 if (user_cb == NULL ||
4327 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
4330 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4332 struct rte_eth_rxtx_callback *cb;
4333 struct rte_eth_rxtx_callback **prev_cb;
4335 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4336 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4337 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4339 if (cb == user_cb) {
4340 /* Remove the user cb from the callback list. */
4341 *prev_cb = cb->next;
4346 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4352 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4353 struct rte_eth_rxq_info *qinfo)
4355 struct rte_eth_dev *dev;
4357 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4362 dev = &rte_eth_devices[port_id];
4363 if (queue_id >= dev->data->nb_rx_queues) {
4364 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4368 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4369 RTE_ETHDEV_LOG(INFO,
4370 "Can't get hairpin Rx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4375 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
4377 memset(qinfo, 0, sizeof(*qinfo));
4378 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4383 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4384 struct rte_eth_txq_info *qinfo)
4386 struct rte_eth_dev *dev;
4388 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4393 dev = &rte_eth_devices[port_id];
4394 if (queue_id >= dev->data->nb_tx_queues) {
4395 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4399 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4400 RTE_ETHDEV_LOG(INFO,
4401 "Can't get hairpin Tx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4406 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4408 memset(qinfo, 0, sizeof(*qinfo));
4409 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4415 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4416 struct rte_eth_burst_mode *mode)
4418 struct rte_eth_dev *dev;
4420 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4425 dev = &rte_eth_devices[port_id];
4427 if (queue_id >= dev->data->nb_rx_queues) {
4428 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4432 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
4433 memset(mode, 0, sizeof(*mode));
4434 return eth_err(port_id,
4435 dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
4439 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4440 struct rte_eth_burst_mode *mode)
4442 struct rte_eth_dev *dev;
4444 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4449 dev = &rte_eth_devices[port_id];
4451 if (queue_id >= dev->data->nb_tx_queues) {
4452 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4456 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
4457 memset(mode, 0, sizeof(*mode));
4458 return eth_err(port_id,
4459 dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
4463 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4464 struct rte_ether_addr *mc_addr_set,
4465 uint32_t nb_mc_addr)
4467 struct rte_eth_dev *dev;
4469 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4471 dev = &rte_eth_devices[port_id];
4472 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4473 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4474 mc_addr_set, nb_mc_addr));
4478 rte_eth_timesync_enable(uint16_t port_id)
4480 struct rte_eth_dev *dev;
4482 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4483 dev = &rte_eth_devices[port_id];
4485 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4486 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4490 rte_eth_timesync_disable(uint16_t port_id)
4492 struct rte_eth_dev *dev;
4494 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4495 dev = &rte_eth_devices[port_id];
4497 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4498 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4502 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4505 struct rte_eth_dev *dev;
4507 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4508 dev = &rte_eth_devices[port_id];
4510 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4511 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4512 (dev, timestamp, flags));
4516 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4517 struct timespec *timestamp)
4519 struct rte_eth_dev *dev;
4521 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4522 dev = &rte_eth_devices[port_id];
4524 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4525 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4530 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4532 struct rte_eth_dev *dev;
4534 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4535 dev = &rte_eth_devices[port_id];
4537 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4538 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4543 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4545 struct rte_eth_dev *dev;
4547 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4548 dev = &rte_eth_devices[port_id];
4550 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4551 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4556 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4558 struct rte_eth_dev *dev;
4560 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4561 dev = &rte_eth_devices[port_id];
4563 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4564 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4569 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
4571 struct rte_eth_dev *dev;
4573 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4574 dev = &rte_eth_devices[port_id];
4576 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
4577 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
4581 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4583 struct rte_eth_dev *dev;
4585 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4587 dev = &rte_eth_devices[port_id];
4588 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4589 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4593 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4595 struct rte_eth_dev *dev;
4597 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4599 dev = &rte_eth_devices[port_id];
4600 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4601 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4605 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4607 struct rte_eth_dev *dev;
4609 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4611 dev = &rte_eth_devices[port_id];
4612 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4613 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4617 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4619 struct rte_eth_dev *dev;
4621 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4623 dev = &rte_eth_devices[port_id];
4624 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4625 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4629 rte_eth_dev_get_module_info(uint16_t port_id,
4630 struct rte_eth_dev_module_info *modinfo)
4632 struct rte_eth_dev *dev;
4634 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4636 dev = &rte_eth_devices[port_id];
4637 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4638 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4642 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4643 struct rte_dev_eeprom_info *info)
4645 struct rte_eth_dev *dev;
4647 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4649 dev = &rte_eth_devices[port_id];
4650 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4651 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4655 rte_eth_dev_get_dcb_info(uint16_t port_id,
4656 struct rte_eth_dcb_info *dcb_info)
4658 struct rte_eth_dev *dev;
4660 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4662 dev = &rte_eth_devices[port_id];
4663 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4665 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4666 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4670 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4671 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4673 struct rte_eth_dev *dev;
4675 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4676 if (l2_tunnel == NULL) {
4677 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4681 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4682 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4686 dev = &rte_eth_devices[port_id];
4687 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4689 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4694 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4695 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4699 struct rte_eth_dev *dev;
4701 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4703 if (l2_tunnel == NULL) {
4704 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4708 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4709 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4714 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4718 dev = &rte_eth_devices[port_id];
4719 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4721 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4722 l2_tunnel, mask, en));
4726 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4727 const struct rte_eth_desc_lim *desc_lim)
4729 if (desc_lim->nb_align != 0)
4730 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4732 if (desc_lim->nb_max != 0)
4733 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4735 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4739 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4740 uint16_t *nb_rx_desc,
4741 uint16_t *nb_tx_desc)
4743 struct rte_eth_dev_info dev_info;
4746 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4748 ret = rte_eth_dev_info_get(port_id, &dev_info);
4752 if (nb_rx_desc != NULL)
4753 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4755 if (nb_tx_desc != NULL)
4756 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4762 rte_eth_dev_hairpin_capability_get(uint16_t port_id,
4763 struct rte_eth_hairpin_cap *cap)
4765 struct rte_eth_dev *dev;
4767 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4769 dev = &rte_eth_devices[port_id];
4770 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_cap_get, -ENOTSUP);
4771 memset(cap, 0, sizeof(*cap));
4772 return eth_err(port_id, (*dev->dev_ops->hairpin_cap_get)(dev, cap));
4776 rte_eth_dev_is_rx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
4778 if (dev->data->rx_queue_state[queue_id] ==
4779 RTE_ETH_QUEUE_STATE_HAIRPIN)
4785 rte_eth_dev_is_tx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
4787 if (dev->data->tx_queue_state[queue_id] ==
4788 RTE_ETH_QUEUE_STATE_HAIRPIN)
4794 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4796 struct rte_eth_dev *dev;
4798 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4803 dev = &rte_eth_devices[port_id];
4805 if (*dev->dev_ops->pool_ops_supported == NULL)
4806 return 1; /* all pools are supported */
4808 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4812 * A set of values to describe the possible states of a switch domain.
4814 enum rte_eth_switch_domain_state {
4815 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4816 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4820 * Array of switch domains available for allocation. Array is sized to
4821 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4822 * ethdev ports in a single process.
4824 static struct rte_eth_dev_switch {
4825 enum rte_eth_switch_domain_state state;
4826 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4829 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4833 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4835 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4836 i < RTE_MAX_ETHPORTS; i++) {
4837 if (rte_eth_switch_domains[i].state ==
4838 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4839 rte_eth_switch_domains[i].state =
4840 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4850 rte_eth_switch_domain_free(uint16_t domain_id)
4852 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4853 domain_id >= RTE_MAX_ETHPORTS)
4856 if (rte_eth_switch_domains[domain_id].state !=
4857 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4860 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4866 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4869 struct rte_kvargs_pair *pair;
4872 arglist->str = strdup(str_in);
4873 if (arglist->str == NULL)
4876 letter = arglist->str;
4879 pair = &arglist->pairs[0];
4882 case 0: /* Initial */
4885 else if (*letter == '\0')
4892 case 1: /* Parsing key */
4893 if (*letter == '=') {
4895 pair->value = letter + 1;
4897 } else if (*letter == ',' || *letter == '\0')
4902 case 2: /* Parsing value */
4905 else if (*letter == ',') {
4908 pair = &arglist->pairs[arglist->count];
4910 } else if (*letter == '\0') {
4913 pair = &arglist->pairs[arglist->count];
4918 case 3: /* Parsing list */
4921 else if (*letter == '\0')
4930 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4932 struct rte_kvargs args;
4933 struct rte_kvargs_pair *pair;
4937 memset(eth_da, 0, sizeof(*eth_da));
4939 result = rte_eth_devargs_tokenise(&args, dargs);
4943 for (i = 0; i < args.count; i++) {
4944 pair = &args.pairs[i];
4945 if (strcmp("representor", pair->key) == 0) {
4946 result = rte_eth_devargs_parse_list(pair->value,
4947 rte_eth_devargs_parse_representor_ports,
4961 RTE_INIT(ethdev_init_log)
4963 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4964 if (rte_eth_dev_logtype >= 0)
4965 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);