598ff80a6e5d4b958eade0a4aa89417a4361bf57
[dpdk.git] / lib / librte_ethdev / rte_ethdev.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2010-2017 Intel Corporation
3  */
4
5 #include <sys/types.h>
6 #include <sys/queue.h>
7 #include <ctype.h>
8 #include <stdio.h>
9 #include <stdlib.h>
10 #include <string.h>
11 #include <stdarg.h>
12 #include <errno.h>
13 #include <stdbool.h>
14 #include <stdint.h>
15 #include <inttypes.h>
16 #include <netinet/in.h>
17
18 #include <rte_byteorder.h>
19 #include <rte_log.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
26 #include <rte_eal.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
34 #include <rte_mbuf.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
40 #include <rte_ether.h>
41 #include <rte_telemetry.h>
42
43 #include "rte_ethdev_trace.h"
44 #include "rte_ethdev.h"
45 #include "rte_ethdev_driver.h"
46 #include "ethdev_profile.h"
47 #include "ethdev_private.h"
48
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
51
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
54
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
57
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
60
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
63
64 /* store statistics names and its offset in stats structure  */
65 struct rte_eth_xstats_name_off {
66         char name[RTE_ETH_XSTATS_NAME_SIZE];
67         unsigned offset;
68 };
69
70 /* Shared memory between primary and secondary processes. */
71 static struct {
72         uint64_t next_owner_id;
73         rte_spinlock_t ownership_lock;
74         struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
76
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78         {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79         {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80         {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81         {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82         {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83         {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84         {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85         {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
86                 rx_nombuf)},
87 };
88
89 #define RTE_NB_STATS RTE_DIM(rte_stats_strings)
90
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92         {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93         {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94         {"errors", offsetof(struct rte_eth_stats, q_errors)},
95 };
96
97 #define RTE_NB_RXQ_STATS RTE_DIM(rte_rxq_stats_strings)
98
99 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
100         {"packets", offsetof(struct rte_eth_stats, q_opackets)},
101         {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
102 };
103 #define RTE_NB_TXQ_STATS RTE_DIM(rte_txq_stats_strings)
104
105 #define RTE_RX_OFFLOAD_BIT2STR(_name)   \
106         { DEV_RX_OFFLOAD_##_name, #_name }
107
108 static const struct {
109         uint64_t offload;
110         const char *name;
111 } rte_rx_offload_names[] = {
112         RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
113         RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
114         RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
115         RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
116         RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
117         RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
118         RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
119         RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
120         RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
121         RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
122         RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
123         RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
124         RTE_RX_OFFLOAD_BIT2STR(SCATTER),
125         RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
126         RTE_RX_OFFLOAD_BIT2STR(SECURITY),
127         RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
128         RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
129         RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
130         RTE_RX_OFFLOAD_BIT2STR(RSS_HASH),
131 };
132
133 #undef RTE_RX_OFFLOAD_BIT2STR
134
135 #define RTE_TX_OFFLOAD_BIT2STR(_name)   \
136         { DEV_TX_OFFLOAD_##_name, #_name }
137
138 static const struct {
139         uint64_t offload;
140         const char *name;
141 } rte_tx_offload_names[] = {
142         RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
143         RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
144         RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
145         RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
146         RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
147         RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
148         RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
149         RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
150         RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
151         RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
152         RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
153         RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
154         RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
155         RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
156         RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
157         RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
158         RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
159         RTE_TX_OFFLOAD_BIT2STR(SECURITY),
160         RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
161         RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
162         RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
163         RTE_TX_OFFLOAD_BIT2STR(SEND_ON_TIMESTAMP),
164 };
165
166 #undef RTE_TX_OFFLOAD_BIT2STR
167
168 /**
169  * The user application callback description.
170  *
171  * It contains callback address to be registered by user application,
172  * the pointer to the parameters for callback, and the event type.
173  */
174 struct rte_eth_dev_callback {
175         TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
176         rte_eth_dev_cb_fn cb_fn;                /**< Callback address */
177         void *cb_arg;                           /**< Parameter for callback */
178         void *ret_param;                        /**< Return parameter */
179         enum rte_eth_event_type event;          /**< Interrupt event type */
180         uint32_t active;                        /**< Callback is executing */
181 };
182
183 enum {
184         STAT_QMAP_TX = 0,
185         STAT_QMAP_RX
186 };
187
188 int
189 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
190 {
191         int ret;
192         struct rte_devargs devargs = {.args = NULL};
193         const char *bus_param_key;
194         char *bus_str = NULL;
195         char *cls_str = NULL;
196         int str_size;
197
198         memset(iter, 0, sizeof(*iter));
199
200         /*
201          * The devargs string may use various syntaxes:
202          *   - 0000:08:00.0,representor=[1-3]
203          *   - pci:0000:06:00.0,representor=[0,5]
204          *   - class=eth,mac=00:11:22:33:44:55
205          * A new syntax is in development (not yet supported):
206          *   - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
207          */
208
209         /*
210          * Handle pure class filter (i.e. without any bus-level argument),
211          * from future new syntax.
212          * rte_devargs_parse() is not yet supporting the new syntax,
213          * that's why this simple case is temporarily parsed here.
214          */
215 #define iter_anybus_str "class=eth,"
216         if (strncmp(devargs_str, iter_anybus_str,
217                         strlen(iter_anybus_str)) == 0) {
218                 iter->cls_str = devargs_str + strlen(iter_anybus_str);
219                 goto end;
220         }
221
222         /* Split bus, device and parameters. */
223         ret = rte_devargs_parse(&devargs, devargs_str);
224         if (ret != 0)
225                 goto error;
226
227         /*
228          * Assume parameters of old syntax can match only at ethdev level.
229          * Extra parameters will be ignored, thanks to "+" prefix.
230          */
231         str_size = strlen(devargs.args) + 2;
232         cls_str = malloc(str_size);
233         if (cls_str == NULL) {
234                 ret = -ENOMEM;
235                 goto error;
236         }
237         ret = snprintf(cls_str, str_size, "+%s", devargs.args);
238         if (ret != str_size - 1) {
239                 ret = -EINVAL;
240                 goto error;
241         }
242         iter->cls_str = cls_str;
243         free(devargs.args); /* allocated by rte_devargs_parse() */
244         devargs.args = NULL;
245
246         iter->bus = devargs.bus;
247         if (iter->bus->dev_iterate == NULL) {
248                 ret = -ENOTSUP;
249                 goto error;
250         }
251
252         /* Convert bus args to new syntax for use with new API dev_iterate. */
253         if (strcmp(iter->bus->name, "vdev") == 0) {
254                 bus_param_key = "name";
255         } else if (strcmp(iter->bus->name, "pci") == 0) {
256                 bus_param_key = "addr";
257         } else {
258                 ret = -ENOTSUP;
259                 goto error;
260         }
261         str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
262         bus_str = malloc(str_size);
263         if (bus_str == NULL) {
264                 ret = -ENOMEM;
265                 goto error;
266         }
267         ret = snprintf(bus_str, str_size, "%s=%s",
268                         bus_param_key, devargs.name);
269         if (ret != str_size - 1) {
270                 ret = -EINVAL;
271                 goto error;
272         }
273         iter->bus_str = bus_str;
274
275 end:
276         iter->cls = rte_class_find_by_name("eth");
277         return 0;
278
279 error:
280         if (ret == -ENOTSUP)
281                 RTE_ETHDEV_LOG(ERR, "Bus %s does not support iterating.\n",
282                                 iter->bus->name);
283         free(devargs.args);
284         free(bus_str);
285         free(cls_str);
286         return ret;
287 }
288
289 uint16_t
290 rte_eth_iterator_next(struct rte_dev_iterator *iter)
291 {
292         if (iter->cls == NULL) /* invalid ethdev iterator */
293                 return RTE_MAX_ETHPORTS;
294
295         do { /* loop to try all matching rte_device */
296                 /* If not pure ethdev filter and */
297                 if (iter->bus != NULL &&
298                                 /* not in middle of rte_eth_dev iteration, */
299                                 iter->class_device == NULL) {
300                         /* get next rte_device to try. */
301                         iter->device = iter->bus->dev_iterate(
302                                         iter->device, iter->bus_str, iter);
303                         if (iter->device == NULL)
304                                 break; /* no more rte_device candidate */
305                 }
306                 /* A device is matching bus part, need to check ethdev part. */
307                 iter->class_device = iter->cls->dev_iterate(
308                                 iter->class_device, iter->cls_str, iter);
309                 if (iter->class_device != NULL)
310                         return eth_dev_to_id(iter->class_device); /* match */
311         } while (iter->bus != NULL); /* need to try next rte_device */
312
313         /* No more ethdev port to iterate. */
314         rte_eth_iterator_cleanup(iter);
315         return RTE_MAX_ETHPORTS;
316 }
317
318 void
319 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
320 {
321         if (iter->bus_str == NULL)
322                 return; /* nothing to free in pure class filter */
323         free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
324         free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
325         memset(iter, 0, sizeof(*iter));
326 }
327
328 uint16_t
329 rte_eth_find_next(uint16_t port_id)
330 {
331         while (port_id < RTE_MAX_ETHPORTS &&
332                         rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
333                 port_id++;
334
335         if (port_id >= RTE_MAX_ETHPORTS)
336                 return RTE_MAX_ETHPORTS;
337
338         return port_id;
339 }
340
341 /*
342  * Macro to iterate over all valid ports for internal usage.
343  * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
344  */
345 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
346         for (port_id = rte_eth_find_next(0); \
347              port_id < RTE_MAX_ETHPORTS; \
348              port_id = rte_eth_find_next(port_id + 1))
349
350 uint16_t
351 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
352 {
353         port_id = rte_eth_find_next(port_id);
354         while (port_id < RTE_MAX_ETHPORTS &&
355                         rte_eth_devices[port_id].device != parent)
356                 port_id = rte_eth_find_next(port_id + 1);
357
358         return port_id;
359 }
360
361 uint16_t
362 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
363 {
364         RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
365         return rte_eth_find_next_of(port_id,
366                         rte_eth_devices[ref_port_id].device);
367 }
368
369 static void
370 rte_eth_dev_shared_data_prepare(void)
371 {
372         const unsigned flags = 0;
373         const struct rte_memzone *mz;
374
375         rte_spinlock_lock(&rte_eth_shared_data_lock);
376
377         if (rte_eth_dev_shared_data == NULL) {
378                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
379                         /* Allocate port data and ownership shared memory. */
380                         mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
381                                         sizeof(*rte_eth_dev_shared_data),
382                                         rte_socket_id(), flags);
383                 } else
384                         mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
385                 if (mz == NULL)
386                         rte_panic("Cannot allocate ethdev shared data\n");
387
388                 rte_eth_dev_shared_data = mz->addr;
389                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
390                         rte_eth_dev_shared_data->next_owner_id =
391                                         RTE_ETH_DEV_NO_OWNER + 1;
392                         rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
393                         memset(rte_eth_dev_shared_data->data, 0,
394                                sizeof(rte_eth_dev_shared_data->data));
395                 }
396         }
397
398         rte_spinlock_unlock(&rte_eth_shared_data_lock);
399 }
400
401 static bool
402 is_allocated(const struct rte_eth_dev *ethdev)
403 {
404         return ethdev->data->name[0] != '\0';
405 }
406
407 static struct rte_eth_dev *
408 _rte_eth_dev_allocated(const char *name)
409 {
410         unsigned i;
411
412         for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
413                 if (rte_eth_devices[i].data != NULL &&
414                     strcmp(rte_eth_devices[i].data->name, name) == 0)
415                         return &rte_eth_devices[i];
416         }
417         return NULL;
418 }
419
420 struct rte_eth_dev *
421 rte_eth_dev_allocated(const char *name)
422 {
423         struct rte_eth_dev *ethdev;
424
425         rte_eth_dev_shared_data_prepare();
426
427         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
428
429         ethdev = _rte_eth_dev_allocated(name);
430
431         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
432
433         return ethdev;
434 }
435
436 static uint16_t
437 rte_eth_dev_find_free_port(void)
438 {
439         unsigned i;
440
441         for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
442                 /* Using shared name field to find a free port. */
443                 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
444                         RTE_ASSERT(rte_eth_devices[i].state ==
445                                    RTE_ETH_DEV_UNUSED);
446                         return i;
447                 }
448         }
449         return RTE_MAX_ETHPORTS;
450 }
451
452 static struct rte_eth_dev *
453 eth_dev_get(uint16_t port_id)
454 {
455         struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
456
457         eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
458
459         return eth_dev;
460 }
461
462 struct rte_eth_dev *
463 rte_eth_dev_allocate(const char *name)
464 {
465         uint16_t port_id;
466         struct rte_eth_dev *eth_dev = NULL;
467         size_t name_len;
468
469         name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
470         if (name_len == 0) {
471                 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
472                 return NULL;
473         }
474
475         if (name_len >= RTE_ETH_NAME_MAX_LEN) {
476                 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
477                 return NULL;
478         }
479
480         rte_eth_dev_shared_data_prepare();
481
482         /* Synchronize port creation between primary and secondary threads. */
483         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
484
485         if (_rte_eth_dev_allocated(name) != NULL) {
486                 RTE_ETHDEV_LOG(ERR,
487                         "Ethernet device with name %s already allocated\n",
488                         name);
489                 goto unlock;
490         }
491
492         port_id = rte_eth_dev_find_free_port();
493         if (port_id == RTE_MAX_ETHPORTS) {
494                 RTE_ETHDEV_LOG(ERR,
495                         "Reached maximum number of Ethernet ports\n");
496                 goto unlock;
497         }
498
499         eth_dev = eth_dev_get(port_id);
500         strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
501         eth_dev->data->port_id = port_id;
502         eth_dev->data->mtu = RTE_ETHER_MTU;
503
504 unlock:
505         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
506
507         return eth_dev;
508 }
509
510 /*
511  * Attach to a port already registered by the primary process, which
512  * makes sure that the same device would have the same port id both
513  * in the primary and secondary process.
514  */
515 struct rte_eth_dev *
516 rte_eth_dev_attach_secondary(const char *name)
517 {
518         uint16_t i;
519         struct rte_eth_dev *eth_dev = NULL;
520
521         rte_eth_dev_shared_data_prepare();
522
523         /* Synchronize port attachment to primary port creation and release. */
524         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
525
526         for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
527                 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
528                         break;
529         }
530         if (i == RTE_MAX_ETHPORTS) {
531                 RTE_ETHDEV_LOG(ERR,
532                         "Device %s is not driven by the primary process\n",
533                         name);
534         } else {
535                 eth_dev = eth_dev_get(i);
536                 RTE_ASSERT(eth_dev->data->port_id == i);
537         }
538
539         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
540         return eth_dev;
541 }
542
543 int
544 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
545 {
546         if (eth_dev == NULL)
547                 return -EINVAL;
548
549         rte_eth_dev_shared_data_prepare();
550
551         if (eth_dev->state != RTE_ETH_DEV_UNUSED)
552                 _rte_eth_dev_callback_process(eth_dev,
553                                 RTE_ETH_EVENT_DESTROY, NULL);
554
555         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
556
557         eth_dev->state = RTE_ETH_DEV_UNUSED;
558
559         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
560                 rte_free(eth_dev->data->rx_queues);
561                 rte_free(eth_dev->data->tx_queues);
562                 rte_free(eth_dev->data->mac_addrs);
563                 rte_free(eth_dev->data->hash_mac_addrs);
564                 rte_free(eth_dev->data->dev_private);
565                 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
566         }
567
568         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
569
570         return 0;
571 }
572
573 int
574 rte_eth_dev_is_valid_port(uint16_t port_id)
575 {
576         if (port_id >= RTE_MAX_ETHPORTS ||
577             (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
578                 return 0;
579         else
580                 return 1;
581 }
582
583 static int
584 rte_eth_is_valid_owner_id(uint64_t owner_id)
585 {
586         if (owner_id == RTE_ETH_DEV_NO_OWNER ||
587             rte_eth_dev_shared_data->next_owner_id <= owner_id)
588                 return 0;
589         return 1;
590 }
591
592 uint64_t
593 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
594 {
595         port_id = rte_eth_find_next(port_id);
596         while (port_id < RTE_MAX_ETHPORTS &&
597                         rte_eth_devices[port_id].data->owner.id != owner_id)
598                 port_id = rte_eth_find_next(port_id + 1);
599
600         return port_id;
601 }
602
603 int
604 rte_eth_dev_owner_new(uint64_t *owner_id)
605 {
606         rte_eth_dev_shared_data_prepare();
607
608         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
609
610         *owner_id = rte_eth_dev_shared_data->next_owner_id++;
611
612         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
613         return 0;
614 }
615
616 static int
617 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
618                        const struct rte_eth_dev_owner *new_owner)
619 {
620         struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
621         struct rte_eth_dev_owner *port_owner;
622
623         if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
624                 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
625                         port_id);
626                 return -ENODEV;
627         }
628
629         if (!rte_eth_is_valid_owner_id(new_owner->id) &&
630             !rte_eth_is_valid_owner_id(old_owner_id)) {
631                 RTE_ETHDEV_LOG(ERR,
632                         "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
633                        old_owner_id, new_owner->id);
634                 return -EINVAL;
635         }
636
637         port_owner = &rte_eth_devices[port_id].data->owner;
638         if (port_owner->id != old_owner_id) {
639                 RTE_ETHDEV_LOG(ERR,
640                         "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
641                         port_id, port_owner->name, port_owner->id);
642                 return -EPERM;
643         }
644
645         /* can not truncate (same structure) */
646         strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
647
648         port_owner->id = new_owner->id;
649
650         RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
651                 port_id, new_owner->name, new_owner->id);
652
653         return 0;
654 }
655
656 int
657 rte_eth_dev_owner_set(const uint16_t port_id,
658                       const struct rte_eth_dev_owner *owner)
659 {
660         int ret;
661
662         rte_eth_dev_shared_data_prepare();
663
664         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
665
666         ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
667
668         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
669         return ret;
670 }
671
672 int
673 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
674 {
675         const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
676                         {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
677         int ret;
678
679         rte_eth_dev_shared_data_prepare();
680
681         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
682
683         ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
684
685         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
686         return ret;
687 }
688
689 int
690 rte_eth_dev_owner_delete(const uint64_t owner_id)
691 {
692         uint16_t port_id;
693         int ret = 0;
694
695         rte_eth_dev_shared_data_prepare();
696
697         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
698
699         if (rte_eth_is_valid_owner_id(owner_id)) {
700                 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
701                         if (rte_eth_devices[port_id].data->owner.id == owner_id)
702                                 memset(&rte_eth_devices[port_id].data->owner, 0,
703                                        sizeof(struct rte_eth_dev_owner));
704                 RTE_ETHDEV_LOG(NOTICE,
705                         "All port owners owned by %016"PRIx64" identifier have removed\n",
706                         owner_id);
707         } else {
708                 RTE_ETHDEV_LOG(ERR,
709                                "Invalid owner id=%016"PRIx64"\n",
710                                owner_id);
711                 ret = -EINVAL;
712         }
713
714         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
715
716         return ret;
717 }
718
719 int
720 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
721 {
722         int ret = 0;
723         struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
724
725         rte_eth_dev_shared_data_prepare();
726
727         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
728
729         if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
730                 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
731                         port_id);
732                 ret = -ENODEV;
733         } else {
734                 rte_memcpy(owner, &ethdev->data->owner, sizeof(*owner));
735         }
736
737         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
738         return ret;
739 }
740
741 int
742 rte_eth_dev_socket_id(uint16_t port_id)
743 {
744         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
745         return rte_eth_devices[port_id].data->numa_node;
746 }
747
748 void *
749 rte_eth_dev_get_sec_ctx(uint16_t port_id)
750 {
751         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
752         return rte_eth_devices[port_id].security_ctx;
753 }
754
755 uint16_t
756 rte_eth_dev_count_avail(void)
757 {
758         uint16_t p;
759         uint16_t count;
760
761         count = 0;
762
763         RTE_ETH_FOREACH_DEV(p)
764                 count++;
765
766         return count;
767 }
768
769 uint16_t
770 rte_eth_dev_count_total(void)
771 {
772         uint16_t port, count = 0;
773
774         RTE_ETH_FOREACH_VALID_DEV(port)
775                 count++;
776
777         return count;
778 }
779
780 int
781 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
782 {
783         char *tmp;
784
785         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
786
787         if (name == NULL) {
788                 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
789                 return -EINVAL;
790         }
791
792         /* shouldn't check 'rte_eth_devices[i].data',
793          * because it might be overwritten by VDEV PMD */
794         tmp = rte_eth_dev_shared_data->data[port_id].name;
795         strcpy(name, tmp);
796         return 0;
797 }
798
799 int
800 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
801 {
802         uint32_t pid;
803
804         if (name == NULL) {
805                 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
806                 return -EINVAL;
807         }
808
809         RTE_ETH_FOREACH_VALID_DEV(pid)
810                 if (!strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
811                         *port_id = pid;
812                         return 0;
813                 }
814
815         return -ENODEV;
816 }
817
818 static int
819 eth_err(uint16_t port_id, int ret)
820 {
821         if (ret == 0)
822                 return 0;
823         if (rte_eth_dev_is_removed(port_id))
824                 return -EIO;
825         return ret;
826 }
827
828 static int
829 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
830 {
831         uint16_t old_nb_queues = dev->data->nb_rx_queues;
832         void **rxq;
833         unsigned i;
834
835         if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
836                 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
837                                 sizeof(dev->data->rx_queues[0]) * nb_queues,
838                                 RTE_CACHE_LINE_SIZE);
839                 if (dev->data->rx_queues == NULL) {
840                         dev->data->nb_rx_queues = 0;
841                         return -(ENOMEM);
842                 }
843         } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
844                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
845
846                 rxq = dev->data->rx_queues;
847
848                 for (i = nb_queues; i < old_nb_queues; i++)
849                         (*dev->dev_ops->rx_queue_release)(rxq[i]);
850                 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
851                                 RTE_CACHE_LINE_SIZE);
852                 if (rxq == NULL)
853                         return -(ENOMEM);
854                 if (nb_queues > old_nb_queues) {
855                         uint16_t new_qs = nb_queues - old_nb_queues;
856
857                         memset(rxq + old_nb_queues, 0,
858                                 sizeof(rxq[0]) * new_qs);
859                 }
860
861                 dev->data->rx_queues = rxq;
862
863         } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
864                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
865
866                 rxq = dev->data->rx_queues;
867
868                 for (i = nb_queues; i < old_nb_queues; i++)
869                         (*dev->dev_ops->rx_queue_release)(rxq[i]);
870
871                 rte_free(dev->data->rx_queues);
872                 dev->data->rx_queues = NULL;
873         }
874         dev->data->nb_rx_queues = nb_queues;
875         return 0;
876 }
877
878 int
879 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
880 {
881         struct rte_eth_dev *dev;
882
883         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
884
885         dev = &rte_eth_devices[port_id];
886         if (!dev->data->dev_started) {
887                 RTE_ETHDEV_LOG(ERR,
888                         "Port %u must be started before start any queue\n",
889                         port_id);
890                 return -EINVAL;
891         }
892
893         if (rx_queue_id >= dev->data->nb_rx_queues) {
894                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
895                 return -EINVAL;
896         }
897
898         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
899
900         if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
901                 RTE_ETHDEV_LOG(INFO,
902                         "Can't start Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
903                         rx_queue_id, port_id);
904                 return -EINVAL;
905         }
906
907         if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
908                 RTE_ETHDEV_LOG(INFO,
909                         "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
910                         rx_queue_id, port_id);
911                 return 0;
912         }
913
914         return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
915                                                              rx_queue_id));
916
917 }
918
919 int
920 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
921 {
922         struct rte_eth_dev *dev;
923
924         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
925
926         dev = &rte_eth_devices[port_id];
927         if (rx_queue_id >= dev->data->nb_rx_queues) {
928                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
929                 return -EINVAL;
930         }
931
932         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
933
934         if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
935                 RTE_ETHDEV_LOG(INFO,
936                         "Can't stop Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
937                         rx_queue_id, port_id);
938                 return -EINVAL;
939         }
940
941         if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
942                 RTE_ETHDEV_LOG(INFO,
943                         "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
944                         rx_queue_id, port_id);
945                 return 0;
946         }
947
948         return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
949
950 }
951
952 int
953 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
954 {
955         struct rte_eth_dev *dev;
956
957         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
958
959         dev = &rte_eth_devices[port_id];
960         if (!dev->data->dev_started) {
961                 RTE_ETHDEV_LOG(ERR,
962                         "Port %u must be started before start any queue\n",
963                         port_id);
964                 return -EINVAL;
965         }
966
967         if (tx_queue_id >= dev->data->nb_tx_queues) {
968                 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
969                 return -EINVAL;
970         }
971
972         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
973
974         if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
975                 RTE_ETHDEV_LOG(INFO,
976                         "Can't start Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
977                         tx_queue_id, port_id);
978                 return -EINVAL;
979         }
980
981         if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
982                 RTE_ETHDEV_LOG(INFO,
983                         "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
984                         tx_queue_id, port_id);
985                 return 0;
986         }
987
988         return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
989 }
990
991 int
992 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
993 {
994         struct rte_eth_dev *dev;
995
996         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
997
998         dev = &rte_eth_devices[port_id];
999         if (tx_queue_id >= dev->data->nb_tx_queues) {
1000                 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1001                 return -EINVAL;
1002         }
1003
1004         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
1005
1006         if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1007                 RTE_ETHDEV_LOG(INFO,
1008                         "Can't stop Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1009                         tx_queue_id, port_id);
1010                 return -EINVAL;
1011         }
1012
1013         if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1014                 RTE_ETHDEV_LOG(INFO,
1015                         "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1016                         tx_queue_id, port_id);
1017                 return 0;
1018         }
1019
1020         return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1021
1022 }
1023
1024 static int
1025 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1026 {
1027         uint16_t old_nb_queues = dev->data->nb_tx_queues;
1028         void **txq;
1029         unsigned i;
1030
1031         if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1032                 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1033                                                    sizeof(dev->data->tx_queues[0]) * nb_queues,
1034                                                    RTE_CACHE_LINE_SIZE);
1035                 if (dev->data->tx_queues == NULL) {
1036                         dev->data->nb_tx_queues = 0;
1037                         return -(ENOMEM);
1038                 }
1039         } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1040                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1041
1042                 txq = dev->data->tx_queues;
1043
1044                 for (i = nb_queues; i < old_nb_queues; i++)
1045                         (*dev->dev_ops->tx_queue_release)(txq[i]);
1046                 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1047                                   RTE_CACHE_LINE_SIZE);
1048                 if (txq == NULL)
1049                         return -ENOMEM;
1050                 if (nb_queues > old_nb_queues) {
1051                         uint16_t new_qs = nb_queues - old_nb_queues;
1052
1053                         memset(txq + old_nb_queues, 0,
1054                                sizeof(txq[0]) * new_qs);
1055                 }
1056
1057                 dev->data->tx_queues = txq;
1058
1059         } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1060                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1061
1062                 txq = dev->data->tx_queues;
1063
1064                 for (i = nb_queues; i < old_nb_queues; i++)
1065                         (*dev->dev_ops->tx_queue_release)(txq[i]);
1066
1067                 rte_free(dev->data->tx_queues);
1068                 dev->data->tx_queues = NULL;
1069         }
1070         dev->data->nb_tx_queues = nb_queues;
1071         return 0;
1072 }
1073
1074 uint32_t
1075 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1076 {
1077         switch (speed) {
1078         case ETH_SPEED_NUM_10M:
1079                 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1080         case ETH_SPEED_NUM_100M:
1081                 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1082         case ETH_SPEED_NUM_1G:
1083                 return ETH_LINK_SPEED_1G;
1084         case ETH_SPEED_NUM_2_5G:
1085                 return ETH_LINK_SPEED_2_5G;
1086         case ETH_SPEED_NUM_5G:
1087                 return ETH_LINK_SPEED_5G;
1088         case ETH_SPEED_NUM_10G:
1089                 return ETH_LINK_SPEED_10G;
1090         case ETH_SPEED_NUM_20G:
1091                 return ETH_LINK_SPEED_20G;
1092         case ETH_SPEED_NUM_25G:
1093                 return ETH_LINK_SPEED_25G;
1094         case ETH_SPEED_NUM_40G:
1095                 return ETH_LINK_SPEED_40G;
1096         case ETH_SPEED_NUM_50G:
1097                 return ETH_LINK_SPEED_50G;
1098         case ETH_SPEED_NUM_56G:
1099                 return ETH_LINK_SPEED_56G;
1100         case ETH_SPEED_NUM_100G:
1101                 return ETH_LINK_SPEED_100G;
1102         case ETH_SPEED_NUM_200G:
1103                 return ETH_LINK_SPEED_200G;
1104         default:
1105                 return 0;
1106         }
1107 }
1108
1109 const char *
1110 rte_eth_dev_rx_offload_name(uint64_t offload)
1111 {
1112         const char *name = "UNKNOWN";
1113         unsigned int i;
1114
1115         for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1116                 if (offload == rte_rx_offload_names[i].offload) {
1117                         name = rte_rx_offload_names[i].name;
1118                         break;
1119                 }
1120         }
1121
1122         return name;
1123 }
1124
1125 const char *
1126 rte_eth_dev_tx_offload_name(uint64_t offload)
1127 {
1128         const char *name = "UNKNOWN";
1129         unsigned int i;
1130
1131         for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1132                 if (offload == rte_tx_offload_names[i].offload) {
1133                         name = rte_tx_offload_names[i].name;
1134                         break;
1135                 }
1136         }
1137
1138         return name;
1139 }
1140
1141 static inline int
1142 check_lro_pkt_size(uint16_t port_id, uint32_t config_size,
1143                    uint32_t max_rx_pkt_len, uint32_t dev_info_size)
1144 {
1145         int ret = 0;
1146
1147         if (dev_info_size == 0) {
1148                 if (config_size != max_rx_pkt_len) {
1149                         RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size"
1150                                        " %u != %u is not allowed\n",
1151                                        port_id, config_size, max_rx_pkt_len);
1152                         ret = -EINVAL;
1153                 }
1154         } else if (config_size > dev_info_size) {
1155                 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1156                                "> max allowed value %u\n", port_id, config_size,
1157                                dev_info_size);
1158                 ret = -EINVAL;
1159         } else if (config_size < RTE_ETHER_MIN_LEN) {
1160                 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1161                                "< min allowed value %u\n", port_id, config_size,
1162                                (unsigned int)RTE_ETHER_MIN_LEN);
1163                 ret = -EINVAL;
1164         }
1165         return ret;
1166 }
1167
1168 /*
1169  * Validate offloads that are requested through rte_eth_dev_configure against
1170  * the offloads successfully set by the ethernet device.
1171  *
1172  * @param port_id
1173  *   The port identifier of the Ethernet device.
1174  * @param req_offloads
1175  *   The offloads that have been requested through `rte_eth_dev_configure`.
1176  * @param set_offloads
1177  *   The offloads successfully set by the ethernet device.
1178  * @param offload_type
1179  *   The offload type i.e. Rx/Tx string.
1180  * @param offload_name
1181  *   The function that prints the offload name.
1182  * @return
1183  *   - (0) if validation successful.
1184  *   - (-EINVAL) if requested offload has been silently disabled.
1185  *
1186  */
1187 static int
1188 validate_offloads(uint16_t port_id, uint64_t req_offloads,
1189                   uint64_t set_offloads, const char *offload_type,
1190                   const char *(*offload_name)(uint64_t))
1191 {
1192         uint64_t offloads_diff = req_offloads ^ set_offloads;
1193         uint64_t offload;
1194         int ret = 0;
1195
1196         while (offloads_diff != 0) {
1197                 /* Check if any offload is requested but not enabled. */
1198                 offload = 1ULL << __builtin_ctzll(offloads_diff);
1199                 if (offload & req_offloads) {
1200                         RTE_ETHDEV_LOG(ERR,
1201                                 "Port %u failed to enable %s offload %s\n",
1202                                 port_id, offload_type, offload_name(offload));
1203                         ret = -EINVAL;
1204                 }
1205
1206                 /* Check if offload couldn't be disabled. */
1207                 if (offload & set_offloads) {
1208                         RTE_ETHDEV_LOG(DEBUG,
1209                                 "Port %u %s offload %s is not requested but enabled\n",
1210                                 port_id, offload_type, offload_name(offload));
1211                 }
1212
1213                 offloads_diff &= ~offload;
1214         }
1215
1216         return ret;
1217 }
1218
1219 int
1220 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1221                       const struct rte_eth_conf *dev_conf)
1222 {
1223         struct rte_eth_dev *dev;
1224         struct rte_eth_dev_info dev_info;
1225         struct rte_eth_conf orig_conf;
1226         int diag;
1227         int ret;
1228
1229         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1230
1231         dev = &rte_eth_devices[port_id];
1232
1233         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1234
1235         if (dev->data->dev_started) {
1236                 RTE_ETHDEV_LOG(ERR,
1237                         "Port %u must be stopped to allow configuration\n",
1238                         port_id);
1239                 return -EBUSY;
1240         }
1241
1242          /* Store original config, as rollback required on failure */
1243         memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1244
1245         /*
1246          * Copy the dev_conf parameter into the dev structure.
1247          * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1248          */
1249         if (dev_conf != &dev->data->dev_conf)
1250                 memcpy(&dev->data->dev_conf, dev_conf,
1251                        sizeof(dev->data->dev_conf));
1252
1253         ret = rte_eth_dev_info_get(port_id, &dev_info);
1254         if (ret != 0)
1255                 goto rollback;
1256
1257         /* If number of queues specified by application for both Rx and Tx is
1258          * zero, use driver preferred values. This cannot be done individually
1259          * as it is valid for either Tx or Rx (but not both) to be zero.
1260          * If driver does not provide any preferred valued, fall back on
1261          * EAL defaults.
1262          */
1263         if (nb_rx_q == 0 && nb_tx_q == 0) {
1264                 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1265                 if (nb_rx_q == 0)
1266                         nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1267                 nb_tx_q = dev_info.default_txportconf.nb_queues;
1268                 if (nb_tx_q == 0)
1269                         nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1270         }
1271
1272         if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1273                 RTE_ETHDEV_LOG(ERR,
1274                         "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1275                         nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1276                 ret = -EINVAL;
1277                 goto rollback;
1278         }
1279
1280         if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1281                 RTE_ETHDEV_LOG(ERR,
1282                         "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1283                         nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1284                 ret = -EINVAL;
1285                 goto rollback;
1286         }
1287
1288         /*
1289          * Check that the numbers of RX and TX queues are not greater
1290          * than the maximum number of RX and TX queues supported by the
1291          * configured device.
1292          */
1293         if (nb_rx_q > dev_info.max_rx_queues) {
1294                 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1295                         port_id, nb_rx_q, dev_info.max_rx_queues);
1296                 ret = -EINVAL;
1297                 goto rollback;
1298         }
1299
1300         if (nb_tx_q > dev_info.max_tx_queues) {
1301                 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1302                         port_id, nb_tx_q, dev_info.max_tx_queues);
1303                 ret = -EINVAL;
1304                 goto rollback;
1305         }
1306
1307         /* Check that the device supports requested interrupts */
1308         if ((dev_conf->intr_conf.lsc == 1) &&
1309                         (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1310                 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1311                         dev->device->driver->name);
1312                 ret = -EINVAL;
1313                 goto rollback;
1314         }
1315         if ((dev_conf->intr_conf.rmv == 1) &&
1316                         (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1317                 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1318                         dev->device->driver->name);
1319                 ret = -EINVAL;
1320                 goto rollback;
1321         }
1322
1323         /*
1324          * If jumbo frames are enabled, check that the maximum RX packet
1325          * length is supported by the configured device.
1326          */
1327         if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1328                 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1329                         RTE_ETHDEV_LOG(ERR,
1330                                 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1331                                 port_id, dev_conf->rxmode.max_rx_pkt_len,
1332                                 dev_info.max_rx_pktlen);
1333                         ret = -EINVAL;
1334                         goto rollback;
1335                 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1336                         RTE_ETHDEV_LOG(ERR,
1337                                 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1338                                 port_id, dev_conf->rxmode.max_rx_pkt_len,
1339                                 (unsigned int)RTE_ETHER_MIN_LEN);
1340                         ret = -EINVAL;
1341                         goto rollback;
1342                 }
1343         } else {
1344                 if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN ||
1345                         dev_conf->rxmode.max_rx_pkt_len > RTE_ETHER_MAX_LEN)
1346                         /* Use default value */
1347                         dev->data->dev_conf.rxmode.max_rx_pkt_len =
1348                                                         RTE_ETHER_MAX_LEN;
1349         }
1350
1351         /*
1352          * If LRO is enabled, check that the maximum aggregated packet
1353          * size is supported by the configured device.
1354          */
1355         if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1356                 if (dev_conf->rxmode.max_lro_pkt_size == 0)
1357                         dev->data->dev_conf.rxmode.max_lro_pkt_size =
1358                                 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1359                 ret = check_lro_pkt_size(port_id,
1360                                 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1361                                 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1362                                 dev_info.max_lro_pkt_size);
1363                 if (ret != 0)
1364                         goto rollback;
1365         }
1366
1367         /* Any requested offloading must be within its device capabilities */
1368         if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1369              dev_conf->rxmode.offloads) {
1370                 RTE_ETHDEV_LOG(ERR,
1371                         "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1372                         "capabilities 0x%"PRIx64" in %s()\n",
1373                         port_id, dev_conf->rxmode.offloads,
1374                         dev_info.rx_offload_capa,
1375                         __func__);
1376                 ret = -EINVAL;
1377                 goto rollback;
1378         }
1379         if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1380              dev_conf->txmode.offloads) {
1381                 RTE_ETHDEV_LOG(ERR,
1382                         "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1383                         "capabilities 0x%"PRIx64" in %s()\n",
1384                         port_id, dev_conf->txmode.offloads,
1385                         dev_info.tx_offload_capa,
1386                         __func__);
1387                 ret = -EINVAL;
1388                 goto rollback;
1389         }
1390
1391         dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
1392                 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
1393
1394         /* Check that device supports requested rss hash functions. */
1395         if ((dev_info.flow_type_rss_offloads |
1396              dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1397             dev_info.flow_type_rss_offloads) {
1398                 RTE_ETHDEV_LOG(ERR,
1399                         "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1400                         port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1401                         dev_info.flow_type_rss_offloads);
1402                 ret = -EINVAL;
1403                 goto rollback;
1404         }
1405
1406         /* Check if Rx RSS distribution is disabled but RSS hash is enabled. */
1407         if (((dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) == 0) &&
1408             (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) {
1409                 RTE_ETHDEV_LOG(ERR,
1410                         "Ethdev port_id=%u config invalid Rx mq_mode without RSS but %s offload is requested\n",
1411                         port_id,
1412                         rte_eth_dev_rx_offload_name(DEV_RX_OFFLOAD_RSS_HASH));
1413                 ret = -EINVAL;
1414                 goto rollback;
1415         }
1416
1417         /*
1418          * Setup new number of RX/TX queues and reconfigure device.
1419          */
1420         diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1421         if (diag != 0) {
1422                 RTE_ETHDEV_LOG(ERR,
1423                         "Port%u rte_eth_dev_rx_queue_config = %d\n",
1424                         port_id, diag);
1425                 ret = diag;
1426                 goto rollback;
1427         }
1428
1429         diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1430         if (diag != 0) {
1431                 RTE_ETHDEV_LOG(ERR,
1432                         "Port%u rte_eth_dev_tx_queue_config = %d\n",
1433                         port_id, diag);
1434                 rte_eth_dev_rx_queue_config(dev, 0);
1435                 ret = diag;
1436                 goto rollback;
1437         }
1438
1439         diag = (*dev->dev_ops->dev_configure)(dev);
1440         if (diag != 0) {
1441                 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1442                         port_id, diag);
1443                 ret = eth_err(port_id, diag);
1444                 goto reset_queues;
1445         }
1446
1447         /* Initialize Rx profiling if enabled at compilation time. */
1448         diag = __rte_eth_dev_profile_init(port_id, dev);
1449         if (diag != 0) {
1450                 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1451                         port_id, diag);
1452                 ret = eth_err(port_id, diag);
1453                 goto reset_queues;
1454         }
1455
1456         /* Validate Rx offloads. */
1457         diag = validate_offloads(port_id,
1458                         dev_conf->rxmode.offloads,
1459                         dev->data->dev_conf.rxmode.offloads, "Rx",
1460                         rte_eth_dev_rx_offload_name);
1461         if (diag != 0) {
1462                 ret = diag;
1463                 goto reset_queues;
1464         }
1465
1466         /* Validate Tx offloads. */
1467         diag = validate_offloads(port_id,
1468                         dev_conf->txmode.offloads,
1469                         dev->data->dev_conf.txmode.offloads, "Tx",
1470                         rte_eth_dev_tx_offload_name);
1471         if (diag != 0) {
1472                 ret = diag;
1473                 goto reset_queues;
1474         }
1475
1476         rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, 0);
1477         return 0;
1478 reset_queues:
1479         rte_eth_dev_rx_queue_config(dev, 0);
1480         rte_eth_dev_tx_queue_config(dev, 0);
1481 rollback:
1482         memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1483
1484         rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, ret);
1485         return ret;
1486 }
1487
1488 void
1489 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1490 {
1491         if (dev->data->dev_started) {
1492                 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1493                         dev->data->port_id);
1494                 return;
1495         }
1496
1497         rte_eth_dev_rx_queue_config(dev, 0);
1498         rte_eth_dev_tx_queue_config(dev, 0);
1499
1500         memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1501 }
1502
1503 static void
1504 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1505                         struct rte_eth_dev_info *dev_info)
1506 {
1507         struct rte_ether_addr *addr;
1508         uint16_t i;
1509         uint32_t pool = 0;
1510         uint64_t pool_mask;
1511
1512         /* replay MAC address configuration including default MAC */
1513         addr = &dev->data->mac_addrs[0];
1514         if (*dev->dev_ops->mac_addr_set != NULL)
1515                 (*dev->dev_ops->mac_addr_set)(dev, addr);
1516         else if (*dev->dev_ops->mac_addr_add != NULL)
1517                 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1518
1519         if (*dev->dev_ops->mac_addr_add != NULL) {
1520                 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1521                         addr = &dev->data->mac_addrs[i];
1522
1523                         /* skip zero address */
1524                         if (rte_is_zero_ether_addr(addr))
1525                                 continue;
1526
1527                         pool = 0;
1528                         pool_mask = dev->data->mac_pool_sel[i];
1529
1530                         do {
1531                                 if (pool_mask & 1ULL)
1532                                         (*dev->dev_ops->mac_addr_add)(dev,
1533                                                 addr, i, pool);
1534                                 pool_mask >>= 1;
1535                                 pool++;
1536                         } while (pool_mask);
1537                 }
1538         }
1539 }
1540
1541 static int
1542 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1543                            struct rte_eth_dev_info *dev_info, uint16_t port_id)
1544 {
1545         int ret;
1546
1547         if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1548                 rte_eth_dev_mac_restore(dev, dev_info);
1549
1550         /* replay promiscuous configuration */
1551         /*
1552          * use callbacks directly since we don't need port_id check and
1553          * would like to bypass the same value set
1554          */
1555         if (rte_eth_promiscuous_get(port_id) == 1 &&
1556             *dev->dev_ops->promiscuous_enable != NULL) {
1557                 ret = eth_err(port_id,
1558                               (*dev->dev_ops->promiscuous_enable)(dev));
1559                 if (ret != 0 && ret != -ENOTSUP) {
1560                         RTE_ETHDEV_LOG(ERR,
1561                                 "Failed to enable promiscuous mode for device (port %u): %s\n",
1562                                 port_id, rte_strerror(-ret));
1563                         return ret;
1564                 }
1565         } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1566                    *dev->dev_ops->promiscuous_disable != NULL) {
1567                 ret = eth_err(port_id,
1568                               (*dev->dev_ops->promiscuous_disable)(dev));
1569                 if (ret != 0 && ret != -ENOTSUP) {
1570                         RTE_ETHDEV_LOG(ERR,
1571                                 "Failed to disable promiscuous mode for device (port %u): %s\n",
1572                                 port_id, rte_strerror(-ret));
1573                         return ret;
1574                 }
1575         }
1576
1577         /* replay all multicast configuration */
1578         /*
1579          * use callbacks directly since we don't need port_id check and
1580          * would like to bypass the same value set
1581          */
1582         if (rte_eth_allmulticast_get(port_id) == 1 &&
1583             *dev->dev_ops->allmulticast_enable != NULL) {
1584                 ret = eth_err(port_id,
1585                               (*dev->dev_ops->allmulticast_enable)(dev));
1586                 if (ret != 0 && ret != -ENOTSUP) {
1587                         RTE_ETHDEV_LOG(ERR,
1588                                 "Failed to enable allmulticast mode for device (port %u): %s\n",
1589                                 port_id, rte_strerror(-ret));
1590                         return ret;
1591                 }
1592         } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1593                    *dev->dev_ops->allmulticast_disable != NULL) {
1594                 ret = eth_err(port_id,
1595                               (*dev->dev_ops->allmulticast_disable)(dev));
1596                 if (ret != 0 && ret != -ENOTSUP) {
1597                         RTE_ETHDEV_LOG(ERR,
1598                                 "Failed to disable allmulticast mode for device (port %u): %s\n",
1599                                 port_id, rte_strerror(-ret));
1600                         return ret;
1601                 }
1602         }
1603
1604         return 0;
1605 }
1606
1607 int
1608 rte_eth_dev_start(uint16_t port_id)
1609 {
1610         struct rte_eth_dev *dev;
1611         struct rte_eth_dev_info dev_info;
1612         int diag;
1613         int ret;
1614
1615         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1616
1617         dev = &rte_eth_devices[port_id];
1618
1619         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1620
1621         if (dev->data->dev_started != 0) {
1622                 RTE_ETHDEV_LOG(INFO,
1623                         "Device with port_id=%"PRIu16" already started\n",
1624                         port_id);
1625                 return 0;
1626         }
1627
1628         ret = rte_eth_dev_info_get(port_id, &dev_info);
1629         if (ret != 0)
1630                 return ret;
1631
1632         /* Lets restore MAC now if device does not support live change */
1633         if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1634                 rte_eth_dev_mac_restore(dev, &dev_info);
1635
1636         diag = (*dev->dev_ops->dev_start)(dev);
1637         if (diag == 0)
1638                 dev->data->dev_started = 1;
1639         else
1640                 return eth_err(port_id, diag);
1641
1642         ret = rte_eth_dev_config_restore(dev, &dev_info, port_id);
1643         if (ret != 0) {
1644                 RTE_ETHDEV_LOG(ERR,
1645                         "Error during restoring configuration for device (port %u): %s\n",
1646                         port_id, rte_strerror(-ret));
1647                 rte_eth_dev_stop(port_id);
1648                 return ret;
1649         }
1650
1651         if (dev->data->dev_conf.intr_conf.lsc == 0) {
1652                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1653                 (*dev->dev_ops->link_update)(dev, 0);
1654         }
1655
1656         rte_ethdev_trace_start(port_id);
1657         return 0;
1658 }
1659
1660 void
1661 rte_eth_dev_stop(uint16_t port_id)
1662 {
1663         struct rte_eth_dev *dev;
1664
1665         RTE_ETH_VALID_PORTID_OR_RET(port_id);
1666         dev = &rte_eth_devices[port_id];
1667
1668         RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1669
1670         if (dev->data->dev_started == 0) {
1671                 RTE_ETHDEV_LOG(INFO,
1672                         "Device with port_id=%"PRIu16" already stopped\n",
1673                         port_id);
1674                 return;
1675         }
1676
1677         dev->data->dev_started = 0;
1678         (*dev->dev_ops->dev_stop)(dev);
1679         rte_ethdev_trace_stop(port_id);
1680 }
1681
1682 int
1683 rte_eth_dev_set_link_up(uint16_t port_id)
1684 {
1685         struct rte_eth_dev *dev;
1686
1687         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1688
1689         dev = &rte_eth_devices[port_id];
1690
1691         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1692         return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1693 }
1694
1695 int
1696 rte_eth_dev_set_link_down(uint16_t port_id)
1697 {
1698         struct rte_eth_dev *dev;
1699
1700         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1701
1702         dev = &rte_eth_devices[port_id];
1703
1704         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1705         return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1706 }
1707
1708 void
1709 rte_eth_dev_close(uint16_t port_id)
1710 {
1711         struct rte_eth_dev *dev;
1712
1713         RTE_ETH_VALID_PORTID_OR_RET(port_id);
1714         dev = &rte_eth_devices[port_id];
1715
1716         RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1717         dev->data->dev_started = 0;
1718         (*dev->dev_ops->dev_close)(dev);
1719
1720         rte_ethdev_trace_close(port_id);
1721         /* check behaviour flag - temporary for PMD migration */
1722         if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1723                 /* new behaviour: send event + reset state + free all data */
1724                 rte_eth_dev_release_port(dev);
1725                 return;
1726         }
1727         RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1728                         "The driver %s should migrate to the new behaviour.\n",
1729                         dev->device->driver->name);
1730         /* old behaviour: only free queue arrays */
1731         dev->data->nb_rx_queues = 0;
1732         rte_free(dev->data->rx_queues);
1733         dev->data->rx_queues = NULL;
1734         dev->data->nb_tx_queues = 0;
1735         rte_free(dev->data->tx_queues);
1736         dev->data->tx_queues = NULL;
1737 }
1738
1739 int
1740 rte_eth_dev_reset(uint16_t port_id)
1741 {
1742         struct rte_eth_dev *dev;
1743         int ret;
1744
1745         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1746         dev = &rte_eth_devices[port_id];
1747
1748         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1749
1750         rte_eth_dev_stop(port_id);
1751         ret = dev->dev_ops->dev_reset(dev);
1752
1753         return eth_err(port_id, ret);
1754 }
1755
1756 int
1757 rte_eth_dev_is_removed(uint16_t port_id)
1758 {
1759         struct rte_eth_dev *dev;
1760         int ret;
1761
1762         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1763
1764         dev = &rte_eth_devices[port_id];
1765
1766         if (dev->state == RTE_ETH_DEV_REMOVED)
1767                 return 1;
1768
1769         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1770
1771         ret = dev->dev_ops->is_removed(dev);
1772         if (ret != 0)
1773                 /* Device is physically removed. */
1774                 dev->state = RTE_ETH_DEV_REMOVED;
1775
1776         return ret;
1777 }
1778
1779 int
1780 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1781                        uint16_t nb_rx_desc, unsigned int socket_id,
1782                        const struct rte_eth_rxconf *rx_conf,
1783                        struct rte_mempool *mp)
1784 {
1785         int ret;
1786         uint32_t mbp_buf_size;
1787         struct rte_eth_dev *dev;
1788         struct rte_eth_dev_info dev_info;
1789         struct rte_eth_rxconf local_conf;
1790         void **rxq;
1791
1792         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1793
1794         dev = &rte_eth_devices[port_id];
1795         if (rx_queue_id >= dev->data->nb_rx_queues) {
1796                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1797                 return -EINVAL;
1798         }
1799
1800         if (mp == NULL) {
1801                 RTE_ETHDEV_LOG(ERR, "Invalid null mempool pointer\n");
1802                 return -EINVAL;
1803         }
1804
1805         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1806
1807         /*
1808          * Check the size of the mbuf data buffer.
1809          * This value must be provided in the private data of the memory pool.
1810          * First check that the memory pool has a valid private data.
1811          */
1812         ret = rte_eth_dev_info_get(port_id, &dev_info);
1813         if (ret != 0)
1814                 return ret;
1815
1816         if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1817                 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1818                         mp->name, (int)mp->private_data_size,
1819                         (int)sizeof(struct rte_pktmbuf_pool_private));
1820                 return -ENOSPC;
1821         }
1822         mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1823
1824         if (mbp_buf_size < dev_info.min_rx_bufsize + RTE_PKTMBUF_HEADROOM) {
1825                 RTE_ETHDEV_LOG(ERR,
1826                         "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1827                         mp->name, (int)mbp_buf_size,
1828                         (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1829                         (int)RTE_PKTMBUF_HEADROOM,
1830                         (int)dev_info.min_rx_bufsize);
1831                 return -EINVAL;
1832         }
1833
1834         /* Use default specified by driver, if nb_rx_desc is zero */
1835         if (nb_rx_desc == 0) {
1836                 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1837                 /* If driver default is also zero, fall back on EAL default */
1838                 if (nb_rx_desc == 0)
1839                         nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1840         }
1841
1842         if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1843                         nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1844                         nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1845
1846                 RTE_ETHDEV_LOG(ERR,
1847                         "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1848                         nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1849                         dev_info.rx_desc_lim.nb_min,
1850                         dev_info.rx_desc_lim.nb_align);
1851                 return -EINVAL;
1852         }
1853
1854         if (dev->data->dev_started &&
1855                 !(dev_info.dev_capa &
1856                         RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1857                 return -EBUSY;
1858
1859         if (dev->data->dev_started &&
1860                 (dev->data->rx_queue_state[rx_queue_id] !=
1861                         RTE_ETH_QUEUE_STATE_STOPPED))
1862                 return -EBUSY;
1863
1864         rxq = dev->data->rx_queues;
1865         if (rxq[rx_queue_id]) {
1866                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1867                                         -ENOTSUP);
1868                 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1869                 rxq[rx_queue_id] = NULL;
1870         }
1871
1872         if (rx_conf == NULL)
1873                 rx_conf = &dev_info.default_rxconf;
1874
1875         local_conf = *rx_conf;
1876
1877         /*
1878          * If an offloading has already been enabled in
1879          * rte_eth_dev_configure(), it has been enabled on all queues,
1880          * so there is no need to enable it in this queue again.
1881          * The local_conf.offloads input to underlying PMD only carries
1882          * those offloadings which are only enabled on this queue and
1883          * not enabled on all queues.
1884          */
1885         local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1886
1887         /*
1888          * New added offloadings for this queue are those not enabled in
1889          * rte_eth_dev_configure() and they must be per-queue type.
1890          * A pure per-port offloading can't be enabled on a queue while
1891          * disabled on another queue. A pure per-port offloading can't
1892          * be enabled for any queue as new added one if it hasn't been
1893          * enabled in rte_eth_dev_configure().
1894          */
1895         if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1896              local_conf.offloads) {
1897                 RTE_ETHDEV_LOG(ERR,
1898                         "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1899                         "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1900                         port_id, rx_queue_id, local_conf.offloads,
1901                         dev_info.rx_queue_offload_capa,
1902                         __func__);
1903                 return -EINVAL;
1904         }
1905
1906         /*
1907          * If LRO is enabled, check that the maximum aggregated packet
1908          * size is supported by the configured device.
1909          */
1910         if (local_conf.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1911                 if (dev->data->dev_conf.rxmode.max_lro_pkt_size == 0)
1912                         dev->data->dev_conf.rxmode.max_lro_pkt_size =
1913                                 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1914                 int ret = check_lro_pkt_size(port_id,
1915                                 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1916                                 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1917                                 dev_info.max_lro_pkt_size);
1918                 if (ret != 0)
1919                         return ret;
1920         }
1921
1922         ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1923                                               socket_id, &local_conf, mp);
1924         if (!ret) {
1925                 if (!dev->data->min_rx_buf_size ||
1926                     dev->data->min_rx_buf_size > mbp_buf_size)
1927                         dev->data->min_rx_buf_size = mbp_buf_size;
1928         }
1929
1930         rte_ethdev_trace_rxq_setup(port_id, rx_queue_id, nb_rx_desc, mp,
1931                 rx_conf, ret);
1932         return eth_err(port_id, ret);
1933 }
1934
1935 int
1936 rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1937                                uint16_t nb_rx_desc,
1938                                const struct rte_eth_hairpin_conf *conf)
1939 {
1940         int ret;
1941         struct rte_eth_dev *dev;
1942         struct rte_eth_hairpin_cap cap;
1943         void **rxq;
1944         int i;
1945         int count;
1946
1947         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1948
1949         dev = &rte_eth_devices[port_id];
1950         if (rx_queue_id >= dev->data->nb_rx_queues) {
1951                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1952                 return -EINVAL;
1953         }
1954         ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
1955         if (ret != 0)
1956                 return ret;
1957         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_hairpin_queue_setup,
1958                                 -ENOTSUP);
1959         /* if nb_rx_desc is zero use max number of desc from the driver. */
1960         if (nb_rx_desc == 0)
1961                 nb_rx_desc = cap.max_nb_desc;
1962         if (nb_rx_desc > cap.max_nb_desc) {
1963                 RTE_ETHDEV_LOG(ERR,
1964                         "Invalid value for nb_rx_desc(=%hu), should be: <= %hu",
1965                         nb_rx_desc, cap.max_nb_desc);
1966                 return -EINVAL;
1967         }
1968         if (conf->peer_count > cap.max_rx_2_tx) {
1969                 RTE_ETHDEV_LOG(ERR,
1970                         "Invalid value for number of peers for Rx queue(=%hu), should be: <= %hu",
1971                         conf->peer_count, cap.max_rx_2_tx);
1972                 return -EINVAL;
1973         }
1974         if (conf->peer_count == 0) {
1975                 RTE_ETHDEV_LOG(ERR,
1976                         "Invalid value for number of peers for Rx queue(=%hu), should be: > 0",
1977                         conf->peer_count);
1978                 return -EINVAL;
1979         }
1980         for (i = 0, count = 0; i < dev->data->nb_rx_queues &&
1981              cap.max_nb_queues != UINT16_MAX; i++) {
1982                 if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i))
1983                         count++;
1984         }
1985         if (count > cap.max_nb_queues) {
1986                 RTE_ETHDEV_LOG(ERR, "To many Rx hairpin queues max is %d",
1987                 cap.max_nb_queues);
1988                 return -EINVAL;
1989         }
1990         if (dev->data->dev_started)
1991                 return -EBUSY;
1992         rxq = dev->data->rx_queues;
1993         if (rxq[rx_queue_id] != NULL) {
1994                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1995                                         -ENOTSUP);
1996                 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1997                 rxq[rx_queue_id] = NULL;
1998         }
1999         ret = (*dev->dev_ops->rx_hairpin_queue_setup)(dev, rx_queue_id,
2000                                                       nb_rx_desc, conf);
2001         if (ret == 0)
2002                 dev->data->rx_queue_state[rx_queue_id] =
2003                         RTE_ETH_QUEUE_STATE_HAIRPIN;
2004         return eth_err(port_id, ret);
2005 }
2006
2007 int
2008 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2009                        uint16_t nb_tx_desc, unsigned int socket_id,
2010                        const struct rte_eth_txconf *tx_conf)
2011 {
2012         struct rte_eth_dev *dev;
2013         struct rte_eth_dev_info dev_info;
2014         struct rte_eth_txconf local_conf;
2015         void **txq;
2016         int ret;
2017
2018         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2019
2020         dev = &rte_eth_devices[port_id];
2021         if (tx_queue_id >= dev->data->nb_tx_queues) {
2022                 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2023                 return -EINVAL;
2024         }
2025
2026         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
2027
2028         ret = rte_eth_dev_info_get(port_id, &dev_info);
2029         if (ret != 0)
2030                 return ret;
2031
2032         /* Use default specified by driver, if nb_tx_desc is zero */
2033         if (nb_tx_desc == 0) {
2034                 nb_tx_desc = dev_info.default_txportconf.ring_size;
2035                 /* If driver default is zero, fall back on EAL default */
2036                 if (nb_tx_desc == 0)
2037                         nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
2038         }
2039         if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
2040             nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
2041             nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
2042                 RTE_ETHDEV_LOG(ERR,
2043                         "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2044                         nb_tx_desc, dev_info.tx_desc_lim.nb_max,
2045                         dev_info.tx_desc_lim.nb_min,
2046                         dev_info.tx_desc_lim.nb_align);
2047                 return -EINVAL;
2048         }
2049
2050         if (dev->data->dev_started &&
2051                 !(dev_info.dev_capa &
2052                         RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
2053                 return -EBUSY;
2054
2055         if (dev->data->dev_started &&
2056                 (dev->data->tx_queue_state[tx_queue_id] !=
2057                         RTE_ETH_QUEUE_STATE_STOPPED))
2058                 return -EBUSY;
2059
2060         txq = dev->data->tx_queues;
2061         if (txq[tx_queue_id]) {
2062                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2063                                         -ENOTSUP);
2064                 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2065                 txq[tx_queue_id] = NULL;
2066         }
2067
2068         if (tx_conf == NULL)
2069                 tx_conf = &dev_info.default_txconf;
2070
2071         local_conf = *tx_conf;
2072
2073         /*
2074          * If an offloading has already been enabled in
2075          * rte_eth_dev_configure(), it has been enabled on all queues,
2076          * so there is no need to enable it in this queue again.
2077          * The local_conf.offloads input to underlying PMD only carries
2078          * those offloadings which are only enabled on this queue and
2079          * not enabled on all queues.
2080          */
2081         local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
2082
2083         /*
2084          * New added offloadings for this queue are those not enabled in
2085          * rte_eth_dev_configure() and they must be per-queue type.
2086          * A pure per-port offloading can't be enabled on a queue while
2087          * disabled on another queue. A pure per-port offloading can't
2088          * be enabled for any queue as new added one if it hasn't been
2089          * enabled in rte_eth_dev_configure().
2090          */
2091         if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
2092              local_conf.offloads) {
2093                 RTE_ETHDEV_LOG(ERR,
2094                         "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2095                         "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2096                         port_id, tx_queue_id, local_conf.offloads,
2097                         dev_info.tx_queue_offload_capa,
2098                         __func__);
2099                 return -EINVAL;
2100         }
2101
2102         rte_ethdev_trace_txq_setup(port_id, tx_queue_id, nb_tx_desc, tx_conf);
2103         return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
2104                        tx_queue_id, nb_tx_desc, socket_id, &local_conf));
2105 }
2106
2107 int
2108 rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2109                                uint16_t nb_tx_desc,
2110                                const struct rte_eth_hairpin_conf *conf)
2111 {
2112         struct rte_eth_dev *dev;
2113         struct rte_eth_hairpin_cap cap;
2114         void **txq;
2115         int i;
2116         int count;
2117         int ret;
2118
2119         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2120         dev = &rte_eth_devices[port_id];
2121         if (tx_queue_id >= dev->data->nb_tx_queues) {
2122                 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2123                 return -EINVAL;
2124         }
2125         ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2126         if (ret != 0)
2127                 return ret;
2128         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_hairpin_queue_setup,
2129                                 -ENOTSUP);
2130         /* if nb_rx_desc is zero use max number of desc from the driver. */
2131         if (nb_tx_desc == 0)
2132                 nb_tx_desc = cap.max_nb_desc;
2133         if (nb_tx_desc > cap.max_nb_desc) {
2134                 RTE_ETHDEV_LOG(ERR,
2135                         "Invalid value for nb_tx_desc(=%hu), should be: <= %hu",
2136                         nb_tx_desc, cap.max_nb_desc);
2137                 return -EINVAL;
2138         }
2139         if (conf->peer_count > cap.max_tx_2_rx) {
2140                 RTE_ETHDEV_LOG(ERR,
2141                         "Invalid value for number of peers for Tx queue(=%hu), should be: <= %hu",
2142                         conf->peer_count, cap.max_tx_2_rx);
2143                 return -EINVAL;
2144         }
2145         if (conf->peer_count == 0) {
2146                 RTE_ETHDEV_LOG(ERR,
2147                         "Invalid value for number of peers for Tx queue(=%hu), should be: > 0",
2148                         conf->peer_count);
2149                 return -EINVAL;
2150         }
2151         for (i = 0, count = 0; i < dev->data->nb_tx_queues &&
2152              cap.max_nb_queues != UINT16_MAX; i++) {
2153                 if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i))
2154                         count++;
2155         }
2156         if (count > cap.max_nb_queues) {
2157                 RTE_ETHDEV_LOG(ERR, "To many Tx hairpin queues max is %d",
2158                 cap.max_nb_queues);
2159                 return -EINVAL;
2160         }
2161         if (dev->data->dev_started)
2162                 return -EBUSY;
2163         txq = dev->data->tx_queues;
2164         if (txq[tx_queue_id] != NULL) {
2165                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2166                                         -ENOTSUP);
2167                 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2168                 txq[tx_queue_id] = NULL;
2169         }
2170         ret = (*dev->dev_ops->tx_hairpin_queue_setup)
2171                 (dev, tx_queue_id, nb_tx_desc, conf);
2172         if (ret == 0)
2173                 dev->data->tx_queue_state[tx_queue_id] =
2174                         RTE_ETH_QUEUE_STATE_HAIRPIN;
2175         return eth_err(port_id, ret);
2176 }
2177
2178 void
2179 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
2180                 void *userdata __rte_unused)
2181 {
2182         unsigned i;
2183
2184         for (i = 0; i < unsent; i++)
2185                 rte_pktmbuf_free(pkts[i]);
2186 }
2187
2188 void
2189 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
2190                 void *userdata)
2191 {
2192         uint64_t *count = userdata;
2193         unsigned i;
2194
2195         for (i = 0; i < unsent; i++)
2196                 rte_pktmbuf_free(pkts[i]);
2197
2198         *count += unsent;
2199 }
2200
2201 int
2202 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
2203                 buffer_tx_error_fn cbfn, void *userdata)
2204 {
2205         buffer->error_callback = cbfn;
2206         buffer->error_userdata = userdata;
2207         return 0;
2208 }
2209
2210 int
2211 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
2212 {
2213         int ret = 0;
2214
2215         if (buffer == NULL)
2216                 return -EINVAL;
2217
2218         buffer->size = size;
2219         if (buffer->error_callback == NULL) {
2220                 ret = rte_eth_tx_buffer_set_err_callback(
2221                         buffer, rte_eth_tx_buffer_drop_callback, NULL);
2222         }
2223
2224         return ret;
2225 }
2226
2227 int
2228 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
2229 {
2230         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2231         int ret;
2232
2233         /* Validate Input Data. Bail if not valid or not supported. */
2234         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2235         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
2236
2237         /* Call driver to free pending mbufs. */
2238         ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
2239                                                free_cnt);
2240         return eth_err(port_id, ret);
2241 }
2242
2243 int
2244 rte_eth_promiscuous_enable(uint16_t port_id)
2245 {
2246         struct rte_eth_dev *dev;
2247         int diag = 0;
2248
2249         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2250         dev = &rte_eth_devices[port_id];
2251
2252         if (dev->data->promiscuous == 1)
2253                 return 0;
2254
2255         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
2256
2257         diag = (*dev->dev_ops->promiscuous_enable)(dev);
2258         dev->data->promiscuous = (diag == 0) ? 1 : 0;
2259
2260         return eth_err(port_id, diag);
2261 }
2262
2263 int
2264 rte_eth_promiscuous_disable(uint16_t port_id)
2265 {
2266         struct rte_eth_dev *dev;
2267         int diag = 0;
2268
2269         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2270         dev = &rte_eth_devices[port_id];
2271
2272         if (dev->data->promiscuous == 0)
2273                 return 0;
2274
2275         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
2276
2277         dev->data->promiscuous = 0;
2278         diag = (*dev->dev_ops->promiscuous_disable)(dev);
2279         if (diag != 0)
2280                 dev->data->promiscuous = 1;
2281
2282         return eth_err(port_id, diag);
2283 }
2284
2285 int
2286 rte_eth_promiscuous_get(uint16_t port_id)
2287 {
2288         struct rte_eth_dev *dev;
2289
2290         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2291
2292         dev = &rte_eth_devices[port_id];
2293         return dev->data->promiscuous;
2294 }
2295
2296 int
2297 rte_eth_allmulticast_enable(uint16_t port_id)
2298 {
2299         struct rte_eth_dev *dev;
2300         int diag;
2301
2302         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2303         dev = &rte_eth_devices[port_id];
2304
2305         if (dev->data->all_multicast == 1)
2306                 return 0;
2307
2308         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2309         diag = (*dev->dev_ops->allmulticast_enable)(dev);
2310         dev->data->all_multicast = (diag == 0) ? 1 : 0;
2311
2312         return eth_err(port_id, diag);
2313 }
2314
2315 int
2316 rte_eth_allmulticast_disable(uint16_t port_id)
2317 {
2318         struct rte_eth_dev *dev;
2319         int diag;
2320
2321         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2322         dev = &rte_eth_devices[port_id];
2323
2324         if (dev->data->all_multicast == 0)
2325                 return 0;
2326
2327         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2328         dev->data->all_multicast = 0;
2329         diag = (*dev->dev_ops->allmulticast_disable)(dev);
2330         if (diag != 0)
2331                 dev->data->all_multicast = 1;
2332
2333         return eth_err(port_id, diag);
2334 }
2335
2336 int
2337 rte_eth_allmulticast_get(uint16_t port_id)
2338 {
2339         struct rte_eth_dev *dev;
2340
2341         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2342
2343         dev = &rte_eth_devices[port_id];
2344         return dev->data->all_multicast;
2345 }
2346
2347 int
2348 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2349 {
2350         struct rte_eth_dev *dev;
2351
2352         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2353         dev = &rte_eth_devices[port_id];
2354
2355         if (dev->data->dev_conf.intr_conf.lsc &&
2356             dev->data->dev_started)
2357                 rte_eth_linkstatus_get(dev, eth_link);
2358         else {
2359                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2360                 (*dev->dev_ops->link_update)(dev, 1);
2361                 *eth_link = dev->data->dev_link;
2362         }
2363
2364         return 0;
2365 }
2366
2367 int
2368 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2369 {
2370         struct rte_eth_dev *dev;
2371
2372         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2373         dev = &rte_eth_devices[port_id];
2374
2375         if (dev->data->dev_conf.intr_conf.lsc &&
2376             dev->data->dev_started)
2377                 rte_eth_linkstatus_get(dev, eth_link);
2378         else {
2379                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2380                 (*dev->dev_ops->link_update)(dev, 0);
2381                 *eth_link = dev->data->dev_link;
2382         }
2383
2384         return 0;
2385 }
2386
2387 int
2388 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2389 {
2390         struct rte_eth_dev *dev;
2391
2392         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2393
2394         dev = &rte_eth_devices[port_id];
2395         memset(stats, 0, sizeof(*stats));
2396
2397         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2398         stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2399         return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2400 }
2401
2402 int
2403 rte_eth_stats_reset(uint16_t port_id)
2404 {
2405         struct rte_eth_dev *dev;
2406         int ret;
2407
2408         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2409         dev = &rte_eth_devices[port_id];
2410
2411         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2412         ret = (*dev->dev_ops->stats_reset)(dev);
2413         if (ret != 0)
2414                 return eth_err(port_id, ret);
2415
2416         dev->data->rx_mbuf_alloc_failed = 0;
2417
2418         return 0;
2419 }
2420
2421 static inline int
2422 get_xstats_basic_count(struct rte_eth_dev *dev)
2423 {
2424         uint16_t nb_rxqs, nb_txqs;
2425         int count;
2426
2427         nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2428         nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2429
2430         count = RTE_NB_STATS;
2431         count += nb_rxqs * RTE_NB_RXQ_STATS;
2432         count += nb_txqs * RTE_NB_TXQ_STATS;
2433
2434         return count;
2435 }
2436
2437 static int
2438 get_xstats_count(uint16_t port_id)
2439 {
2440         struct rte_eth_dev *dev;
2441         int count;
2442
2443         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2444         dev = &rte_eth_devices[port_id];
2445         if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2446                 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2447                                 NULL, 0);
2448                 if (count < 0)
2449                         return eth_err(port_id, count);
2450         }
2451         if (dev->dev_ops->xstats_get_names != NULL) {
2452                 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2453                 if (count < 0)
2454                         return eth_err(port_id, count);
2455         } else
2456                 count = 0;
2457
2458
2459         count += get_xstats_basic_count(dev);
2460
2461         return count;
2462 }
2463
2464 int
2465 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2466                 uint64_t *id)
2467 {
2468         int cnt_xstats, idx_xstat;
2469
2470         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2471
2472         if (!id) {
2473                 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2474                 return -ENOMEM;
2475         }
2476
2477         if (!xstat_name) {
2478                 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2479                 return -ENOMEM;
2480         }
2481
2482         /* Get count */
2483         cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2484         if (cnt_xstats  < 0) {
2485                 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2486                 return -ENODEV;
2487         }
2488
2489         /* Get id-name lookup table */
2490         struct rte_eth_xstat_name xstats_names[cnt_xstats];
2491
2492         if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2493                         port_id, xstats_names, cnt_xstats, NULL)) {
2494                 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2495                 return -1;
2496         }
2497
2498         for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2499                 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2500                         *id = idx_xstat;
2501                         return 0;
2502                 };
2503         }
2504
2505         return -EINVAL;
2506 }
2507
2508 /* retrieve basic stats names */
2509 static int
2510 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2511         struct rte_eth_xstat_name *xstats_names)
2512 {
2513         int cnt_used_entries = 0;
2514         uint32_t idx, id_queue;
2515         uint16_t num_q;
2516
2517         for (idx = 0; idx < RTE_NB_STATS; idx++) {
2518                 strlcpy(xstats_names[cnt_used_entries].name,
2519                         rte_stats_strings[idx].name,
2520                         sizeof(xstats_names[0].name));
2521                 cnt_used_entries++;
2522         }
2523         num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2524         for (id_queue = 0; id_queue < num_q; id_queue++) {
2525                 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2526                         snprintf(xstats_names[cnt_used_entries].name,
2527                                 sizeof(xstats_names[0].name),
2528                                 "rx_q%u%s",
2529                                 id_queue, rte_rxq_stats_strings[idx].name);
2530                         cnt_used_entries++;
2531                 }
2532
2533         }
2534         num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2535         for (id_queue = 0; id_queue < num_q; id_queue++) {
2536                 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2537                         snprintf(xstats_names[cnt_used_entries].name,
2538                                 sizeof(xstats_names[0].name),
2539                                 "tx_q%u%s",
2540                                 id_queue, rte_txq_stats_strings[idx].name);
2541                         cnt_used_entries++;
2542                 }
2543         }
2544         return cnt_used_entries;
2545 }
2546
2547 /* retrieve ethdev extended statistics names */
2548 int
2549 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2550         struct rte_eth_xstat_name *xstats_names, unsigned int size,
2551         uint64_t *ids)
2552 {
2553         struct rte_eth_xstat_name *xstats_names_copy;
2554         unsigned int no_basic_stat_requested = 1;
2555         unsigned int no_ext_stat_requested = 1;
2556         unsigned int expected_entries;
2557         unsigned int basic_count;
2558         struct rte_eth_dev *dev;
2559         unsigned int i;
2560         int ret;
2561
2562         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2563         dev = &rte_eth_devices[port_id];
2564
2565         basic_count = get_xstats_basic_count(dev);
2566         ret = get_xstats_count(port_id);
2567         if (ret < 0)
2568                 return ret;
2569         expected_entries = (unsigned int)ret;
2570
2571         /* Return max number of stats if no ids given */
2572         if (!ids) {
2573                 if (!xstats_names)
2574                         return expected_entries;
2575                 else if (xstats_names && size < expected_entries)
2576                         return expected_entries;
2577         }
2578
2579         if (ids && !xstats_names)
2580                 return -EINVAL;
2581
2582         if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2583                 uint64_t ids_copy[size];
2584
2585                 for (i = 0; i < size; i++) {
2586                         if (ids[i] < basic_count) {
2587                                 no_basic_stat_requested = 0;
2588                                 break;
2589                         }
2590
2591                         /*
2592                          * Convert ids to xstats ids that PMD knows.
2593                          * ids known by user are basic + extended stats.
2594                          */
2595                         ids_copy[i] = ids[i] - basic_count;
2596                 }
2597
2598                 if (no_basic_stat_requested)
2599                         return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2600                                         xstats_names, ids_copy, size);
2601         }
2602
2603         /* Retrieve all stats */
2604         if (!ids) {
2605                 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2606                                 expected_entries);
2607                 if (num_stats < 0 || num_stats > (int)expected_entries)
2608                         return num_stats;
2609                 else
2610                         return expected_entries;
2611         }
2612
2613         xstats_names_copy = calloc(expected_entries,
2614                 sizeof(struct rte_eth_xstat_name));
2615
2616         if (!xstats_names_copy) {
2617                 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2618                 return -ENOMEM;
2619         }
2620
2621         if (ids) {
2622                 for (i = 0; i < size; i++) {
2623                         if (ids[i] >= basic_count) {
2624                                 no_ext_stat_requested = 0;
2625                                 break;
2626                         }
2627                 }
2628         }
2629
2630         /* Fill xstats_names_copy structure */
2631         if (ids && no_ext_stat_requested) {
2632                 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2633         } else {
2634                 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2635                         expected_entries);
2636                 if (ret < 0) {
2637                         free(xstats_names_copy);
2638                         return ret;
2639                 }
2640         }
2641
2642         /* Filter stats */
2643         for (i = 0; i < size; i++) {
2644                 if (ids[i] >= expected_entries) {
2645                         RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2646                         free(xstats_names_copy);
2647                         return -1;
2648                 }
2649                 xstats_names[i] = xstats_names_copy[ids[i]];
2650         }
2651
2652         free(xstats_names_copy);
2653         return size;
2654 }
2655
2656 int
2657 rte_eth_xstats_get_names(uint16_t port_id,
2658         struct rte_eth_xstat_name *xstats_names,
2659         unsigned int size)
2660 {
2661         struct rte_eth_dev *dev;
2662         int cnt_used_entries;
2663         int cnt_expected_entries;
2664         int cnt_driver_entries;
2665
2666         cnt_expected_entries = get_xstats_count(port_id);
2667         if (xstats_names == NULL || cnt_expected_entries < 0 ||
2668                         (int)size < cnt_expected_entries)
2669                 return cnt_expected_entries;
2670
2671         /* port_id checked in get_xstats_count() */
2672         dev = &rte_eth_devices[port_id];
2673
2674         cnt_used_entries = rte_eth_basic_stats_get_names(
2675                 dev, xstats_names);
2676
2677         if (dev->dev_ops->xstats_get_names != NULL) {
2678                 /* If there are any driver-specific xstats, append them
2679                  * to end of list.
2680                  */
2681                 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2682                         dev,
2683                         xstats_names + cnt_used_entries,
2684                         size - cnt_used_entries);
2685                 if (cnt_driver_entries < 0)
2686                         return eth_err(port_id, cnt_driver_entries);
2687                 cnt_used_entries += cnt_driver_entries;
2688         }
2689
2690         return cnt_used_entries;
2691 }
2692
2693
2694 static int
2695 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2696 {
2697         struct rte_eth_dev *dev;
2698         struct rte_eth_stats eth_stats;
2699         unsigned int count = 0, i, q;
2700         uint64_t val, *stats_ptr;
2701         uint16_t nb_rxqs, nb_txqs;
2702         int ret;
2703
2704         ret = rte_eth_stats_get(port_id, &eth_stats);
2705         if (ret < 0)
2706                 return ret;
2707
2708         dev = &rte_eth_devices[port_id];
2709
2710         nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2711         nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2712
2713         /* global stats */
2714         for (i = 0; i < RTE_NB_STATS; i++) {
2715                 stats_ptr = RTE_PTR_ADD(&eth_stats,
2716                                         rte_stats_strings[i].offset);
2717                 val = *stats_ptr;
2718                 xstats[count++].value = val;
2719         }
2720
2721         /* per-rxq stats */
2722         for (q = 0; q < nb_rxqs; q++) {
2723                 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2724                         stats_ptr = RTE_PTR_ADD(&eth_stats,
2725                                         rte_rxq_stats_strings[i].offset +
2726                                         q * sizeof(uint64_t));
2727                         val = *stats_ptr;
2728                         xstats[count++].value = val;
2729                 }
2730         }
2731
2732         /* per-txq stats */
2733         for (q = 0; q < nb_txqs; q++) {
2734                 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2735                         stats_ptr = RTE_PTR_ADD(&eth_stats,
2736                                         rte_txq_stats_strings[i].offset +
2737                                         q * sizeof(uint64_t));
2738                         val = *stats_ptr;
2739                         xstats[count++].value = val;
2740                 }
2741         }
2742         return count;
2743 }
2744
2745 /* retrieve ethdev extended statistics */
2746 int
2747 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2748                          uint64_t *values, unsigned int size)
2749 {
2750         unsigned int no_basic_stat_requested = 1;
2751         unsigned int no_ext_stat_requested = 1;
2752         unsigned int num_xstats_filled;
2753         unsigned int basic_count;
2754         uint16_t expected_entries;
2755         struct rte_eth_dev *dev;
2756         unsigned int i;
2757         int ret;
2758
2759         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2760         ret = get_xstats_count(port_id);
2761         if (ret < 0)
2762                 return ret;
2763         expected_entries = (uint16_t)ret;
2764         struct rte_eth_xstat xstats[expected_entries];
2765         dev = &rte_eth_devices[port_id];
2766         basic_count = get_xstats_basic_count(dev);
2767
2768         /* Return max number of stats if no ids given */
2769         if (!ids) {
2770                 if (!values)
2771                         return expected_entries;
2772                 else if (values && size < expected_entries)
2773                         return expected_entries;
2774         }
2775
2776         if (ids && !values)
2777                 return -EINVAL;
2778
2779         if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2780                 unsigned int basic_count = get_xstats_basic_count(dev);
2781                 uint64_t ids_copy[size];
2782
2783                 for (i = 0; i < size; i++) {
2784                         if (ids[i] < basic_count) {
2785                                 no_basic_stat_requested = 0;
2786                                 break;
2787                         }
2788
2789                         /*
2790                          * Convert ids to xstats ids that PMD knows.
2791                          * ids known by user are basic + extended stats.
2792                          */
2793                         ids_copy[i] = ids[i] - basic_count;
2794                 }
2795
2796                 if (no_basic_stat_requested)
2797                         return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2798                                         values, size);
2799         }
2800
2801         if (ids) {
2802                 for (i = 0; i < size; i++) {
2803                         if (ids[i] >= basic_count) {
2804                                 no_ext_stat_requested = 0;
2805                                 break;
2806                         }
2807                 }
2808         }
2809
2810         /* Fill the xstats structure */
2811         if (ids && no_ext_stat_requested)
2812                 ret = rte_eth_basic_stats_get(port_id, xstats);
2813         else
2814                 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2815
2816         if (ret < 0)
2817                 return ret;
2818         num_xstats_filled = (unsigned int)ret;
2819
2820         /* Return all stats */
2821         if (!ids) {
2822                 for (i = 0; i < num_xstats_filled; i++)
2823                         values[i] = xstats[i].value;
2824                 return expected_entries;
2825         }
2826
2827         /* Filter stats */
2828         for (i = 0; i < size; i++) {
2829                 if (ids[i] >= expected_entries) {
2830                         RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2831                         return -1;
2832                 }
2833                 values[i] = xstats[ids[i]].value;
2834         }
2835         return size;
2836 }
2837
2838 int
2839 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2840         unsigned int n)
2841 {
2842         struct rte_eth_dev *dev;
2843         unsigned int count = 0, i;
2844         signed int xcount = 0;
2845         uint16_t nb_rxqs, nb_txqs;
2846         int ret;
2847
2848         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2849
2850         dev = &rte_eth_devices[port_id];
2851
2852         nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2853         nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2854
2855         /* Return generic statistics */
2856         count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2857                 (nb_txqs * RTE_NB_TXQ_STATS);
2858
2859         /* implemented by the driver */
2860         if (dev->dev_ops->xstats_get != NULL) {
2861                 /* Retrieve the xstats from the driver at the end of the
2862                  * xstats struct.
2863                  */
2864                 xcount = (*dev->dev_ops->xstats_get)(dev,
2865                                      xstats ? xstats + count : NULL,
2866                                      (n > count) ? n - count : 0);
2867
2868                 if (xcount < 0)
2869                         return eth_err(port_id, xcount);
2870         }
2871
2872         if (n < count + xcount || xstats == NULL)
2873                 return count + xcount;
2874
2875         /* now fill the xstats structure */
2876         ret = rte_eth_basic_stats_get(port_id, xstats);
2877         if (ret < 0)
2878                 return ret;
2879         count = ret;
2880
2881         for (i = 0; i < count; i++)
2882                 xstats[i].id = i;
2883         /* add an offset to driver-specific stats */
2884         for ( ; i < count + xcount; i++)
2885                 xstats[i].id += count;
2886
2887         return count + xcount;
2888 }
2889
2890 /* reset ethdev extended statistics */
2891 int
2892 rte_eth_xstats_reset(uint16_t port_id)
2893 {
2894         struct rte_eth_dev *dev;
2895
2896         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2897         dev = &rte_eth_devices[port_id];
2898
2899         /* implemented by the driver */
2900         if (dev->dev_ops->xstats_reset != NULL)
2901                 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
2902
2903         /* fallback to default */
2904         return rte_eth_stats_reset(port_id);
2905 }
2906
2907 static int
2908 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2909                 uint8_t is_rx)
2910 {
2911         struct rte_eth_dev *dev;
2912
2913         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2914
2915         dev = &rte_eth_devices[port_id];
2916
2917         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2918
2919         if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2920                 return -EINVAL;
2921
2922         if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2923                 return -EINVAL;
2924
2925         if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2926                 return -EINVAL;
2927
2928         return (*dev->dev_ops->queue_stats_mapping_set)
2929                         (dev, queue_id, stat_idx, is_rx);
2930 }
2931
2932
2933 int
2934 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2935                 uint8_t stat_idx)
2936 {
2937         return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2938                                                 stat_idx, STAT_QMAP_TX));
2939 }
2940
2941
2942 int
2943 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2944                 uint8_t stat_idx)
2945 {
2946         return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2947                                                 stat_idx, STAT_QMAP_RX));
2948 }
2949
2950 int
2951 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2952 {
2953         struct rte_eth_dev *dev;
2954
2955         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2956         dev = &rte_eth_devices[port_id];
2957
2958         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2959         return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2960                                                         fw_version, fw_size));
2961 }
2962
2963 int
2964 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2965 {
2966         struct rte_eth_dev *dev;
2967         const struct rte_eth_desc_lim lim = {
2968                 .nb_max = UINT16_MAX,
2969                 .nb_min = 0,
2970                 .nb_align = 1,
2971                 .nb_seg_max = UINT16_MAX,
2972                 .nb_mtu_seg_max = UINT16_MAX,
2973         };
2974         int diag;
2975
2976         /*
2977          * Init dev_info before port_id check since caller does not have
2978          * return status and does not know if get is successful or not.
2979          */
2980         memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2981         dev_info->switch_info.domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
2982
2983         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2984         dev = &rte_eth_devices[port_id];
2985
2986         dev_info->rx_desc_lim = lim;
2987         dev_info->tx_desc_lim = lim;
2988         dev_info->device = dev->device;
2989         dev_info->min_mtu = RTE_ETHER_MIN_MTU;
2990         dev_info->max_mtu = UINT16_MAX;
2991
2992         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
2993         diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2994         if (diag != 0) {
2995                 /* Cleanup already filled in device information */
2996                 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2997                 return eth_err(port_id, diag);
2998         }
2999
3000         /* Maximum number of queues should be <= RTE_MAX_QUEUES_PER_PORT */
3001         dev_info->max_rx_queues = RTE_MIN(dev_info->max_rx_queues,
3002                         RTE_MAX_QUEUES_PER_PORT);
3003         dev_info->max_tx_queues = RTE_MIN(dev_info->max_tx_queues,
3004                         RTE_MAX_QUEUES_PER_PORT);
3005
3006         dev_info->driver_name = dev->device->driver->name;
3007         dev_info->nb_rx_queues = dev->data->nb_rx_queues;
3008         dev_info->nb_tx_queues = dev->data->nb_tx_queues;
3009
3010         dev_info->dev_flags = &dev->data->dev_flags;
3011
3012         return 0;
3013 }
3014
3015 int
3016 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
3017                                  uint32_t *ptypes, int num)
3018 {
3019         int i, j;
3020         struct rte_eth_dev *dev;
3021         const uint32_t *all_ptypes;
3022
3023         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3024         dev = &rte_eth_devices[port_id];
3025         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
3026         all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3027
3028         if (!all_ptypes)
3029                 return 0;
3030
3031         for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
3032                 if (all_ptypes[i] & ptype_mask) {
3033                         if (j < num)
3034                                 ptypes[j] = all_ptypes[i];
3035                         j++;
3036                 }
3037
3038         return j;
3039 }
3040
3041 int
3042 rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
3043                                  uint32_t *set_ptypes, unsigned int num)
3044 {
3045         const uint32_t valid_ptype_masks[] = {
3046                 RTE_PTYPE_L2_MASK,
3047                 RTE_PTYPE_L3_MASK,
3048                 RTE_PTYPE_L4_MASK,
3049                 RTE_PTYPE_TUNNEL_MASK,
3050                 RTE_PTYPE_INNER_L2_MASK,
3051                 RTE_PTYPE_INNER_L3_MASK,
3052                 RTE_PTYPE_INNER_L4_MASK,
3053         };
3054         const uint32_t *all_ptypes;
3055         struct rte_eth_dev *dev;
3056         uint32_t unused_mask;
3057         unsigned int i, j;
3058         int ret;
3059
3060         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3061         dev = &rte_eth_devices[port_id];
3062
3063         if (num > 0 && set_ptypes == NULL)
3064                 return -EINVAL;
3065
3066         if (*dev->dev_ops->dev_supported_ptypes_get == NULL ||
3067                         *dev->dev_ops->dev_ptypes_set == NULL) {
3068                 ret = 0;
3069                 goto ptype_unknown;
3070         }
3071
3072         if (ptype_mask == 0) {
3073                 ret = (*dev->dev_ops->dev_ptypes_set)(dev,
3074                                 ptype_mask);
3075                 goto ptype_unknown;
3076         }
3077
3078         unused_mask = ptype_mask;
3079         for (i = 0; i < RTE_DIM(valid_ptype_masks); i++) {
3080                 uint32_t mask = ptype_mask & valid_ptype_masks[i];
3081                 if (mask && mask != valid_ptype_masks[i]) {
3082                         ret = -EINVAL;
3083                         goto ptype_unknown;
3084                 }
3085                 unused_mask &= ~valid_ptype_masks[i];
3086         }
3087
3088         if (unused_mask) {
3089                 ret = -EINVAL;
3090                 goto ptype_unknown;
3091         }
3092
3093         all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3094         if (all_ptypes == NULL) {
3095                 ret = 0;
3096                 goto ptype_unknown;
3097         }
3098
3099         /*
3100          * Accommodate as many set_ptypes as possible. If the supplied
3101          * set_ptypes array is insufficient fill it partially.
3102          */
3103         for (i = 0, j = 0; set_ptypes != NULL &&
3104                                 (all_ptypes[i] != RTE_PTYPE_UNKNOWN); ++i) {
3105                 if (ptype_mask & all_ptypes[i]) {
3106                         if (j < num - 1) {
3107                                 set_ptypes[j] = all_ptypes[i];
3108                                 j++;
3109                                 continue;
3110                         }
3111                         break;
3112                 }
3113         }
3114
3115         if (set_ptypes != NULL && j < num)
3116                 set_ptypes[j] = RTE_PTYPE_UNKNOWN;
3117
3118         return (*dev->dev_ops->dev_ptypes_set)(dev, ptype_mask);
3119
3120 ptype_unknown:
3121         if (num > 0)
3122                 set_ptypes[0] = RTE_PTYPE_UNKNOWN;
3123
3124         return ret;
3125 }
3126
3127 int
3128 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
3129 {
3130         struct rte_eth_dev *dev;
3131
3132         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3133         dev = &rte_eth_devices[port_id];
3134         rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
3135
3136         return 0;
3137 }
3138
3139 int
3140 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
3141 {
3142         struct rte_eth_dev *dev;
3143
3144         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3145
3146         dev = &rte_eth_devices[port_id];
3147         *mtu = dev->data->mtu;
3148         return 0;
3149 }
3150
3151 int
3152 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
3153 {
3154         int ret;
3155         struct rte_eth_dev_info dev_info;
3156         struct rte_eth_dev *dev;
3157
3158         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3159         dev = &rte_eth_devices[port_id];
3160         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
3161
3162         /*
3163          * Check if the device supports dev_infos_get, if it does not
3164          * skip min_mtu/max_mtu validation here as this requires values
3165          * that are populated within the call to rte_eth_dev_info_get()
3166          * which relies on dev->dev_ops->dev_infos_get.
3167          */
3168         if (*dev->dev_ops->dev_infos_get != NULL) {
3169                 ret = rte_eth_dev_info_get(port_id, &dev_info);
3170                 if (ret != 0)
3171                         return ret;
3172
3173                 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
3174                         return -EINVAL;
3175         }
3176
3177         ret = (*dev->dev_ops->mtu_set)(dev, mtu);
3178         if (!ret)
3179                 dev->data->mtu = mtu;
3180
3181         return eth_err(port_id, ret);
3182 }
3183
3184 int
3185 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
3186 {
3187         struct rte_eth_dev *dev;
3188         int ret;
3189
3190         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3191         dev = &rte_eth_devices[port_id];
3192         if (!(dev->data->dev_conf.rxmode.offloads &
3193               DEV_RX_OFFLOAD_VLAN_FILTER)) {
3194                 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
3195                         port_id);
3196                 return -ENOSYS;
3197         }
3198
3199         if (vlan_id > 4095) {
3200                 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
3201                         port_id, vlan_id);
3202                 return -EINVAL;
3203         }
3204         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
3205
3206         ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
3207         if (ret == 0) {
3208                 struct rte_vlan_filter_conf *vfc;
3209                 int vidx;
3210                 int vbit;
3211
3212                 vfc = &dev->data->vlan_filter_conf;
3213                 vidx = vlan_id / 64;
3214                 vbit = vlan_id % 64;
3215
3216                 if (on)
3217                         vfc->ids[vidx] |= UINT64_C(1) << vbit;
3218                 else
3219                         vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
3220         }
3221
3222         return eth_err(port_id, ret);
3223 }
3224
3225 int
3226 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3227                                     int on)
3228 {
3229         struct rte_eth_dev *dev;
3230
3231         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3232         dev = &rte_eth_devices[port_id];
3233         if (rx_queue_id >= dev->data->nb_rx_queues) {
3234                 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
3235                 return -EINVAL;
3236         }
3237
3238         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
3239         (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
3240
3241         return 0;
3242 }
3243
3244 int
3245 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3246                                 enum rte_vlan_type vlan_type,
3247                                 uint16_t tpid)
3248 {
3249         struct rte_eth_dev *dev;
3250
3251         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3252         dev = &rte_eth_devices[port_id];
3253         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
3254
3255         return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
3256                                                                tpid));
3257 }
3258
3259 int
3260 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
3261 {
3262         struct rte_eth_dev_info dev_info;
3263         struct rte_eth_dev *dev;
3264         int ret = 0;
3265         int mask = 0;
3266         int cur, org = 0;
3267         uint64_t orig_offloads;
3268         uint64_t dev_offloads;
3269         uint64_t new_offloads;
3270
3271         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3272         dev = &rte_eth_devices[port_id];
3273
3274         /* save original values in case of failure */
3275         orig_offloads = dev->data->dev_conf.rxmode.offloads;
3276         dev_offloads = orig_offloads;
3277
3278         /* check which option changed by application */
3279         cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
3280         org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
3281         if (cur != org) {
3282                 if (cur)
3283                         dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
3284                 else
3285                         dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
3286                 mask |= ETH_VLAN_STRIP_MASK;
3287         }
3288
3289         cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
3290         org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
3291         if (cur != org) {
3292                 if (cur)
3293                         dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
3294                 else
3295                         dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
3296                 mask |= ETH_VLAN_FILTER_MASK;
3297         }
3298
3299         cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
3300         org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
3301         if (cur != org) {
3302                 if (cur)
3303                         dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
3304                 else
3305                         dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
3306                 mask |= ETH_VLAN_EXTEND_MASK;
3307         }
3308
3309         cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
3310         org = !!(dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
3311         if (cur != org) {
3312                 if (cur)
3313                         dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
3314                 else
3315                         dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
3316                 mask |= ETH_QINQ_STRIP_MASK;
3317         }
3318
3319         /*no change*/
3320         if (mask == 0)
3321                 return ret;
3322
3323         ret = rte_eth_dev_info_get(port_id, &dev_info);
3324         if (ret != 0)
3325                 return ret;
3326
3327         /* Rx VLAN offloading must be within its device capabilities */
3328         if ((dev_offloads & dev_info.rx_offload_capa) != dev_offloads) {
3329                 new_offloads = dev_offloads & ~orig_offloads;
3330                 RTE_ETHDEV_LOG(ERR,
3331                         "Ethdev port_id=%u requested new added VLAN offloads "
3332                         "0x%" PRIx64 " must be within Rx offloads capabilities "
3333                         "0x%" PRIx64 " in %s()\n",
3334                         port_id, new_offloads, dev_info.rx_offload_capa,
3335                         __func__);
3336                 return -EINVAL;
3337         }
3338
3339         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
3340         dev->data->dev_conf.rxmode.offloads = dev_offloads;
3341         ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
3342         if (ret) {
3343                 /* hit an error restore  original values */
3344                 dev->data->dev_conf.rxmode.offloads = orig_offloads;
3345         }
3346
3347         return eth_err(port_id, ret);
3348 }
3349
3350 int
3351 rte_eth_dev_get_vlan_offload(uint16_t port_id)
3352 {
3353         struct rte_eth_dev *dev;
3354         uint64_t *dev_offloads;
3355         int ret = 0;
3356
3357         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3358         dev = &rte_eth_devices[port_id];
3359         dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3360
3361         if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
3362                 ret |= ETH_VLAN_STRIP_OFFLOAD;
3363
3364         if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
3365                 ret |= ETH_VLAN_FILTER_OFFLOAD;
3366
3367         if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
3368                 ret |= ETH_VLAN_EXTEND_OFFLOAD;
3369
3370         if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
3371                 ret |= ETH_QINQ_STRIP_OFFLOAD;
3372
3373         return ret;
3374 }
3375
3376 int
3377 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
3378 {
3379         struct rte_eth_dev *dev;
3380
3381         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3382         dev = &rte_eth_devices[port_id];
3383         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
3384
3385         return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
3386 }
3387
3388 int
3389 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3390 {
3391         struct rte_eth_dev *dev;
3392
3393         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3394         dev = &rte_eth_devices[port_id];
3395         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
3396         memset(fc_conf, 0, sizeof(*fc_conf));
3397         return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
3398 }
3399
3400 int
3401 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3402 {
3403         struct rte_eth_dev *dev;
3404
3405         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3406         if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
3407                 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
3408                 return -EINVAL;
3409         }
3410
3411         dev = &rte_eth_devices[port_id];
3412         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3413         return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3414 }
3415
3416 int
3417 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3418                                    struct rte_eth_pfc_conf *pfc_conf)
3419 {
3420         struct rte_eth_dev *dev;
3421
3422         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3423         if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
3424                 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
3425                 return -EINVAL;
3426         }
3427
3428         dev = &rte_eth_devices[port_id];
3429         /* High water, low water validation are device specific */
3430         if  (*dev->dev_ops->priority_flow_ctrl_set)
3431                 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
3432                                         (dev, pfc_conf));
3433         return -ENOTSUP;
3434 }
3435
3436 static int
3437 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
3438                         uint16_t reta_size)
3439 {
3440         uint16_t i, num;
3441
3442         if (!reta_conf)
3443                 return -EINVAL;
3444
3445         num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
3446         for (i = 0; i < num; i++) {
3447                 if (reta_conf[i].mask)
3448                         return 0;
3449         }
3450
3451         return -EINVAL;
3452 }
3453
3454 static int
3455 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
3456                          uint16_t reta_size,
3457                          uint16_t max_rxq)
3458 {
3459         uint16_t i, idx, shift;
3460
3461         if (!reta_conf)
3462                 return -EINVAL;
3463
3464         if (max_rxq == 0) {
3465                 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3466                 return -EINVAL;
3467         }
3468
3469         for (i = 0; i < reta_size; i++) {
3470                 idx = i / RTE_RETA_GROUP_SIZE;
3471                 shift = i % RTE_RETA_GROUP_SIZE;
3472                 if ((reta_conf[idx].mask & (1ULL << shift)) &&
3473                         (reta_conf[idx].reta[shift] >= max_rxq)) {
3474                         RTE_ETHDEV_LOG(ERR,
3475                                 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
3476                                 idx, shift,
3477                                 reta_conf[idx].reta[shift], max_rxq);
3478                         return -EINVAL;
3479                 }
3480         }
3481
3482         return 0;
3483 }
3484
3485 int
3486 rte_eth_dev_rss_reta_update(uint16_t port_id,
3487                             struct rte_eth_rss_reta_entry64 *reta_conf,
3488                             uint16_t reta_size)
3489 {
3490         struct rte_eth_dev *dev;
3491         int ret;
3492
3493         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3494         /* Check mask bits */
3495         ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3496         if (ret < 0)
3497                 return ret;
3498
3499         dev = &rte_eth_devices[port_id];
3500
3501         /* Check entry value */
3502         ret = rte_eth_check_reta_entry(reta_conf, reta_size,
3503                                 dev->data->nb_rx_queues);
3504         if (ret < 0)
3505                 return ret;
3506
3507         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
3508         return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
3509                                                              reta_size));
3510 }
3511
3512 int
3513 rte_eth_dev_rss_reta_query(uint16_t port_id,
3514                            struct rte_eth_rss_reta_entry64 *reta_conf,
3515                            uint16_t reta_size)
3516 {
3517         struct rte_eth_dev *dev;
3518         int ret;
3519
3520         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3521
3522         /* Check mask bits */
3523         ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3524         if (ret < 0)
3525                 return ret;
3526
3527         dev = &rte_eth_devices[port_id];
3528         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
3529         return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
3530                                                             reta_size));
3531 }
3532
3533 int
3534 rte_eth_dev_rss_hash_update(uint16_t port_id,
3535                             struct rte_eth_rss_conf *rss_conf)
3536 {
3537         struct rte_eth_dev *dev;
3538         struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
3539         int ret;
3540
3541         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3542
3543         ret = rte_eth_dev_info_get(port_id, &dev_info);
3544         if (ret != 0)
3545                 return ret;
3546
3547         rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
3548
3549         dev = &rte_eth_devices[port_id];
3550         if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
3551             dev_info.flow_type_rss_offloads) {
3552                 RTE_ETHDEV_LOG(ERR,
3553                         "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
3554                         port_id, rss_conf->rss_hf,
3555                         dev_info.flow_type_rss_offloads);
3556                 return -EINVAL;
3557         }
3558         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
3559         return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
3560                                                                  rss_conf));
3561 }
3562
3563 int
3564 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
3565                               struct rte_eth_rss_conf *rss_conf)
3566 {
3567         struct rte_eth_dev *dev;
3568
3569         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3570         dev = &rte_eth_devices[port_id];
3571         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
3572         return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
3573                                                                    rss_conf));
3574 }
3575
3576 int
3577 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
3578                                 struct rte_eth_udp_tunnel *udp_tunnel)
3579 {
3580         struct rte_eth_dev *dev;
3581
3582         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3583         if (udp_tunnel == NULL) {
3584                 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3585                 return -EINVAL;
3586         }
3587
3588         if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3589                 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3590                 return -EINVAL;
3591         }
3592
3593         dev = &rte_eth_devices[port_id];
3594         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
3595         return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
3596                                                                 udp_tunnel));
3597 }
3598
3599 int
3600 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
3601                                    struct rte_eth_udp_tunnel *udp_tunnel)
3602 {
3603         struct rte_eth_dev *dev;
3604
3605         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3606         dev = &rte_eth_devices[port_id];
3607
3608         if (udp_tunnel == NULL) {
3609                 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3610                 return -EINVAL;
3611         }
3612
3613         if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3614                 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3615                 return -EINVAL;
3616         }
3617
3618         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3619         return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3620                                                                 udp_tunnel));
3621 }
3622
3623 int
3624 rte_eth_led_on(uint16_t port_id)
3625 {
3626         struct rte_eth_dev *dev;
3627
3628         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3629         dev = &rte_eth_devices[port_id];
3630         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3631         return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3632 }
3633
3634 int
3635 rte_eth_led_off(uint16_t port_id)
3636 {
3637         struct rte_eth_dev *dev;
3638
3639         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3640         dev = &rte_eth_devices[port_id];
3641         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3642         return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3643 }
3644
3645 /*
3646  * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3647  * an empty spot.
3648  */
3649 static int
3650 get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3651 {
3652         struct rte_eth_dev_info dev_info;
3653         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3654         unsigned i;
3655         int ret;
3656
3657         ret = rte_eth_dev_info_get(port_id, &dev_info);
3658         if (ret != 0)
3659                 return -1;
3660
3661         for (i = 0; i < dev_info.max_mac_addrs; i++)
3662                 if (memcmp(addr, &dev->data->mac_addrs[i],
3663                                 RTE_ETHER_ADDR_LEN) == 0)
3664                         return i;
3665
3666         return -1;
3667 }
3668
3669 static const struct rte_ether_addr null_mac_addr;
3670
3671 int
3672 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
3673                         uint32_t pool)
3674 {
3675         struct rte_eth_dev *dev;
3676         int index;
3677         uint64_t pool_mask;
3678         int ret;
3679
3680         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3681         dev = &rte_eth_devices[port_id];
3682         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3683
3684         if (rte_is_zero_ether_addr(addr)) {
3685                 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3686                         port_id);
3687                 return -EINVAL;
3688         }
3689         if (pool >= ETH_64_POOLS) {
3690                 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3691                 return -EINVAL;
3692         }
3693
3694         index = get_mac_addr_index(port_id, addr);
3695         if (index < 0) {
3696                 index = get_mac_addr_index(port_id, &null_mac_addr);
3697                 if (index < 0) {
3698                         RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3699                                 port_id);
3700                         return -ENOSPC;
3701                 }
3702         } else {
3703                 pool_mask = dev->data->mac_pool_sel[index];
3704
3705                 /* Check if both MAC address and pool is already there, and do nothing */
3706                 if (pool_mask & (1ULL << pool))
3707                         return 0;
3708         }
3709
3710         /* Update NIC */
3711         ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3712
3713         if (ret == 0) {
3714                 /* Update address in NIC data structure */
3715                 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3716
3717                 /* Update pool bitmap in NIC data structure */
3718                 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3719         }
3720
3721         return eth_err(port_id, ret);
3722 }
3723
3724 int
3725 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
3726 {
3727         struct rte_eth_dev *dev;
3728         int index;
3729
3730         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3731         dev = &rte_eth_devices[port_id];
3732         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3733
3734         index = get_mac_addr_index(port_id, addr);
3735         if (index == 0) {
3736                 RTE_ETHDEV_LOG(ERR,
3737                         "Port %u: Cannot remove default MAC address\n",
3738                         port_id);
3739                 return -EADDRINUSE;
3740         } else if (index < 0)
3741                 return 0;  /* Do nothing if address wasn't found */
3742
3743         /* Update NIC */
3744         (*dev->dev_ops->mac_addr_remove)(dev, index);
3745
3746         /* Update address in NIC data structure */
3747         rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3748
3749         /* reset pool bitmap */
3750         dev->data->mac_pool_sel[index] = 0;
3751
3752         return 0;
3753 }
3754
3755 int
3756 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
3757 {
3758         struct rte_eth_dev *dev;
3759         int ret;
3760
3761         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3762
3763         if (!rte_is_valid_assigned_ether_addr(addr))
3764                 return -EINVAL;
3765
3766         dev = &rte_eth_devices[port_id];
3767         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3768
3769         ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3770         if (ret < 0)
3771                 return ret;
3772
3773         /* Update default address in NIC data structure */
3774         rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3775
3776         return 0;
3777 }
3778
3779
3780 /*
3781  * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3782  * an empty spot.
3783  */
3784 static int
3785 get_hash_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3786 {
3787         struct rte_eth_dev_info dev_info;
3788         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3789         unsigned i;
3790         int ret;
3791
3792         ret = rte_eth_dev_info_get(port_id, &dev_info);
3793         if (ret != 0)
3794                 return -1;
3795
3796         if (!dev->data->hash_mac_addrs)
3797                 return -1;
3798
3799         for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3800                 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3801                         RTE_ETHER_ADDR_LEN) == 0)
3802                         return i;
3803
3804         return -1;
3805 }
3806
3807 int
3808 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
3809                                 uint8_t on)
3810 {
3811         int index;
3812         int ret;
3813         struct rte_eth_dev *dev;
3814
3815         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3816
3817         dev = &rte_eth_devices[port_id];
3818         if (rte_is_zero_ether_addr(addr)) {
3819                 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3820                         port_id);
3821                 return -EINVAL;
3822         }
3823
3824         index = get_hash_mac_addr_index(port_id, addr);
3825         /* Check if it's already there, and do nothing */
3826         if ((index >= 0) && on)
3827                 return 0;
3828
3829         if (index < 0) {
3830                 if (!on) {
3831                         RTE_ETHDEV_LOG(ERR,
3832                                 "Port %u: the MAC address was not set in UTA\n",
3833                                 port_id);
3834                         return -EINVAL;
3835                 }
3836
3837                 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3838                 if (index < 0) {
3839                         RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3840                                 port_id);
3841                         return -ENOSPC;
3842                 }
3843         }
3844
3845         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3846         ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3847         if (ret == 0) {
3848                 /* Update address in NIC data structure */
3849                 if (on)
3850                         rte_ether_addr_copy(addr,
3851                                         &dev->data->hash_mac_addrs[index]);
3852                 else
3853                         rte_ether_addr_copy(&null_mac_addr,
3854                                         &dev->data->hash_mac_addrs[index]);
3855         }
3856
3857         return eth_err(port_id, ret);
3858 }
3859
3860 int
3861 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3862 {
3863         struct rte_eth_dev *dev;
3864
3865         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3866
3867         dev = &rte_eth_devices[port_id];
3868
3869         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3870         return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3871                                                                        on));
3872 }
3873
3874 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3875                                         uint16_t tx_rate)
3876 {
3877         struct rte_eth_dev *dev;
3878         struct rte_eth_dev_info dev_info;
3879         struct rte_eth_link link;
3880         int ret;
3881
3882         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3883
3884         ret = rte_eth_dev_info_get(port_id, &dev_info);
3885         if (ret != 0)
3886                 return ret;
3887
3888         dev = &rte_eth_devices[port_id];
3889         link = dev->data->dev_link;
3890
3891         if (queue_idx > dev_info.max_tx_queues) {
3892                 RTE_ETHDEV_LOG(ERR,
3893                         "Set queue rate limit:port %u: invalid queue id=%u\n",
3894                         port_id, queue_idx);
3895                 return -EINVAL;
3896         }
3897
3898         if (tx_rate > link.link_speed) {
3899                 RTE_ETHDEV_LOG(ERR,
3900                         "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3901                         tx_rate, link.link_speed);
3902                 return -EINVAL;
3903         }
3904
3905         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3906         return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3907                                                         queue_idx, tx_rate));
3908 }
3909
3910 int
3911 rte_eth_mirror_rule_set(uint16_t port_id,
3912                         struct rte_eth_mirror_conf *mirror_conf,
3913                         uint8_t rule_id, uint8_t on)
3914 {
3915         struct rte_eth_dev *dev;
3916
3917         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3918         if (mirror_conf->rule_type == 0) {
3919                 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3920                 return -EINVAL;
3921         }
3922
3923         if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3924                 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3925                         ETH_64_POOLS - 1);
3926                 return -EINVAL;
3927         }
3928
3929         if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3930              ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3931             (mirror_conf->pool_mask == 0)) {
3932                 RTE_ETHDEV_LOG(ERR,
3933                         "Invalid mirror pool, pool mask can not be 0\n");
3934                 return -EINVAL;
3935         }
3936
3937         if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3938             mirror_conf->vlan.vlan_mask == 0) {
3939                 RTE_ETHDEV_LOG(ERR,
3940                         "Invalid vlan mask, vlan mask can not be 0\n");
3941                 return -EINVAL;
3942         }
3943
3944         dev = &rte_eth_devices[port_id];
3945         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3946
3947         return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3948                                                 mirror_conf, rule_id, on));
3949 }
3950
3951 int
3952 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3953 {
3954         struct rte_eth_dev *dev;
3955
3956         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3957
3958         dev = &rte_eth_devices[port_id];
3959         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3960
3961         return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3962                                                                    rule_id));
3963 }
3964
3965 RTE_INIT(eth_dev_init_cb_lists)
3966 {
3967         int i;
3968
3969         for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3970                 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3971 }
3972
3973 int
3974 rte_eth_dev_callback_register(uint16_t port_id,
3975                         enum rte_eth_event_type event,
3976                         rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3977 {
3978         struct rte_eth_dev *dev;
3979         struct rte_eth_dev_callback *user_cb;
3980         uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3981         uint16_t last_port;
3982
3983         if (!cb_fn)
3984                 return -EINVAL;
3985
3986         if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3987                 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3988                 return -EINVAL;
3989         }
3990
3991         if (port_id == RTE_ETH_ALL) {
3992                 next_port = 0;
3993                 last_port = RTE_MAX_ETHPORTS - 1;
3994         } else {
3995                 next_port = last_port = port_id;
3996         }
3997
3998         rte_spinlock_lock(&rte_eth_dev_cb_lock);
3999
4000         do {
4001                 dev = &rte_eth_devices[next_port];
4002
4003                 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
4004                         if (user_cb->cb_fn == cb_fn &&
4005                                 user_cb->cb_arg == cb_arg &&
4006                                 user_cb->event == event) {
4007                                 break;
4008                         }
4009                 }
4010
4011                 /* create a new callback. */
4012                 if (user_cb == NULL) {
4013                         user_cb = rte_zmalloc("INTR_USER_CALLBACK",
4014                                 sizeof(struct rte_eth_dev_callback), 0);
4015                         if (user_cb != NULL) {
4016                                 user_cb->cb_fn = cb_fn;
4017                                 user_cb->cb_arg = cb_arg;
4018                                 user_cb->event = event;
4019                                 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
4020                                                   user_cb, next);
4021                         } else {
4022                                 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4023                                 rte_eth_dev_callback_unregister(port_id, event,
4024                                                                 cb_fn, cb_arg);
4025                                 return -ENOMEM;
4026                         }
4027
4028                 }
4029         } while (++next_port <= last_port);
4030
4031         rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4032         return 0;
4033 }
4034
4035 int
4036 rte_eth_dev_callback_unregister(uint16_t port_id,
4037                         enum rte_eth_event_type event,
4038                         rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4039 {
4040         int ret;
4041         struct rte_eth_dev *dev;
4042         struct rte_eth_dev_callback *cb, *next;
4043         uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
4044         uint16_t last_port;
4045
4046         if (!cb_fn)
4047                 return -EINVAL;
4048
4049         if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4050                 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4051                 return -EINVAL;
4052         }
4053
4054         if (port_id == RTE_ETH_ALL) {
4055                 next_port = 0;
4056                 last_port = RTE_MAX_ETHPORTS - 1;
4057         } else {
4058                 next_port = last_port = port_id;
4059         }
4060
4061         rte_spinlock_lock(&rte_eth_dev_cb_lock);
4062
4063         do {
4064                 dev = &rte_eth_devices[next_port];
4065                 ret = 0;
4066                 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
4067                      cb = next) {
4068
4069                         next = TAILQ_NEXT(cb, next);
4070
4071                         if (cb->cb_fn != cb_fn || cb->event != event ||
4072                             (cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
4073                                 continue;
4074
4075                         /*
4076                          * if this callback is not executing right now,
4077                          * then remove it.
4078                          */
4079                         if (cb->active == 0) {
4080                                 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
4081                                 rte_free(cb);
4082                         } else {
4083                                 ret = -EAGAIN;
4084                         }
4085                 }
4086         } while (++next_port <= last_port);
4087
4088         rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4089         return ret;
4090 }
4091
4092 int
4093 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
4094         enum rte_eth_event_type event, void *ret_param)
4095 {
4096         struct rte_eth_dev_callback *cb_lst;
4097         struct rte_eth_dev_callback dev_cb;
4098         int rc = 0;
4099
4100         rte_spinlock_lock(&rte_eth_dev_cb_lock);
4101         TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
4102                 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
4103                         continue;
4104                 dev_cb = *cb_lst;
4105                 cb_lst->active = 1;
4106                 if (ret_param != NULL)
4107                         dev_cb.ret_param = ret_param;
4108
4109                 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4110                 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
4111                                 dev_cb.cb_arg, dev_cb.ret_param);
4112                 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4113                 cb_lst->active = 0;
4114         }
4115         rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4116         return rc;
4117 }
4118
4119 void
4120 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
4121 {
4122         if (dev == NULL)
4123                 return;
4124
4125         _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
4126
4127         dev->state = RTE_ETH_DEV_ATTACHED;
4128 }
4129
4130 int
4131 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
4132 {
4133         uint32_t vec;
4134         struct rte_eth_dev *dev;
4135         struct rte_intr_handle *intr_handle;
4136         uint16_t qid;
4137         int rc;
4138
4139         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4140
4141         dev = &rte_eth_devices[port_id];
4142
4143         if (!dev->intr_handle) {
4144                 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4145                 return -ENOTSUP;
4146         }
4147
4148         intr_handle = dev->intr_handle;
4149         if (!intr_handle->intr_vec) {
4150                 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4151                 return -EPERM;
4152         }
4153
4154         for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
4155                 vec = intr_handle->intr_vec[qid];
4156                 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4157                 if (rc && rc != -EEXIST) {
4158                         RTE_ETHDEV_LOG(ERR,
4159                                 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4160                                 port_id, qid, op, epfd, vec);
4161                 }
4162         }
4163
4164         return 0;
4165 }
4166
4167 int
4168 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
4169 {
4170         struct rte_intr_handle *intr_handle;
4171         struct rte_eth_dev *dev;
4172         unsigned int efd_idx;
4173         uint32_t vec;
4174         int fd;
4175
4176         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
4177
4178         dev = &rte_eth_devices[port_id];
4179
4180         if (queue_id >= dev->data->nb_rx_queues) {
4181                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4182                 return -1;
4183         }
4184
4185         if (!dev->intr_handle) {
4186                 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4187                 return -1;
4188         }
4189
4190         intr_handle = dev->intr_handle;
4191         if (!intr_handle->intr_vec) {
4192                 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4193                 return -1;
4194         }
4195
4196         vec = intr_handle->intr_vec[queue_id];
4197         efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
4198                 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
4199         fd = intr_handle->efds[efd_idx];
4200
4201         return fd;
4202 }
4203
4204 const struct rte_memzone *
4205 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
4206                          uint16_t queue_id, size_t size, unsigned align,
4207                          int socket_id)
4208 {
4209         char z_name[RTE_MEMZONE_NAMESIZE];
4210         const struct rte_memzone *mz;
4211         int rc;
4212
4213         rc = snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
4214                       dev->data->port_id, queue_id, ring_name);
4215         if (rc >= RTE_MEMZONE_NAMESIZE) {
4216                 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4217                 rte_errno = ENAMETOOLONG;
4218                 return NULL;
4219         }
4220
4221         mz = rte_memzone_lookup(z_name);
4222         if (mz) {
4223                 if ((socket_id != SOCKET_ID_ANY && socket_id != mz->socket_id) ||
4224                                 size > mz->len ||
4225                                 ((uintptr_t)mz->addr & (align - 1)) != 0) {
4226                         RTE_ETHDEV_LOG(ERR,
4227                                 "memzone %s does not justify the requested attributes\n",
4228                                 mz->name);
4229                         return NULL;
4230                 }
4231
4232                 return mz;
4233         }
4234
4235         return rte_memzone_reserve_aligned(z_name, size, socket_id,
4236                         RTE_MEMZONE_IOVA_CONTIG, align);
4237 }
4238
4239 int
4240 rte_eth_dev_create(struct rte_device *device, const char *name,
4241         size_t priv_data_size,
4242         ethdev_bus_specific_init ethdev_bus_specific_init,
4243         void *bus_init_params,
4244         ethdev_init_t ethdev_init, void *init_params)
4245 {
4246         struct rte_eth_dev *ethdev;
4247         int retval;
4248
4249         RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
4250
4251         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
4252                 ethdev = rte_eth_dev_allocate(name);
4253                 if (!ethdev)
4254                         return -ENODEV;
4255
4256                 if (priv_data_size) {
4257                         ethdev->data->dev_private = rte_zmalloc_socket(
4258                                 name, priv_data_size, RTE_CACHE_LINE_SIZE,
4259                                 device->numa_node);
4260
4261                         if (!ethdev->data->dev_private) {
4262                                 RTE_ETHDEV_LOG(ERR,
4263                                         "failed to allocate private data\n");
4264                                 retval = -ENOMEM;
4265                                 goto probe_failed;
4266                         }
4267                 }
4268         } else {
4269                 ethdev = rte_eth_dev_attach_secondary(name);
4270                 if (!ethdev) {
4271                         RTE_ETHDEV_LOG(ERR,
4272                                 "secondary process attach failed, ethdev doesn't exist\n");
4273                         return  -ENODEV;
4274                 }
4275         }
4276
4277         ethdev->device = device;
4278
4279         if (ethdev_bus_specific_init) {
4280                 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
4281                 if (retval) {
4282                         RTE_ETHDEV_LOG(ERR,
4283                                 "ethdev bus specific initialisation failed\n");
4284                         goto probe_failed;
4285                 }
4286         }
4287
4288         retval = ethdev_init(ethdev, init_params);
4289         if (retval) {
4290                 RTE_ETHDEV_LOG(ERR, "ethdev initialisation failed\n");
4291                 goto probe_failed;
4292         }
4293
4294         rte_eth_dev_probing_finish(ethdev);
4295
4296         return retval;
4297
4298 probe_failed:
4299         rte_eth_dev_release_port(ethdev);
4300         return retval;
4301 }
4302
4303 int
4304 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
4305         ethdev_uninit_t ethdev_uninit)
4306 {
4307         int ret;
4308
4309         ethdev = rte_eth_dev_allocated(ethdev->data->name);
4310         if (!ethdev)
4311                 return -ENODEV;
4312
4313         RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
4314
4315         ret = ethdev_uninit(ethdev);
4316         if (ret)
4317                 return ret;
4318
4319         return rte_eth_dev_release_port(ethdev);
4320 }
4321
4322 int
4323 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
4324                           int epfd, int op, void *data)
4325 {
4326         uint32_t vec;
4327         struct rte_eth_dev *dev;
4328         struct rte_intr_handle *intr_handle;
4329         int rc;
4330
4331         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4332
4333         dev = &rte_eth_devices[port_id];
4334         if (queue_id >= dev->data->nb_rx_queues) {
4335                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4336                 return -EINVAL;
4337         }
4338
4339         if (!dev->intr_handle) {
4340                 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4341                 return -ENOTSUP;
4342         }
4343
4344         intr_handle = dev->intr_handle;
4345         if (!intr_handle->intr_vec) {
4346                 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4347                 return -EPERM;
4348         }
4349
4350         vec = intr_handle->intr_vec[queue_id];
4351         rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4352         if (rc && rc != -EEXIST) {
4353                 RTE_ETHDEV_LOG(ERR,
4354                         "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4355                         port_id, queue_id, op, epfd, vec);
4356                 return rc;
4357         }
4358
4359         return 0;
4360 }
4361
4362 int
4363 rte_eth_dev_rx_intr_enable(uint16_t port_id,
4364                            uint16_t queue_id)
4365 {
4366         struct rte_eth_dev *dev;
4367
4368         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4369
4370         dev = &rte_eth_devices[port_id];
4371
4372         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
4373         return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
4374                                                                 queue_id));
4375 }
4376
4377 int
4378 rte_eth_dev_rx_intr_disable(uint16_t port_id,
4379                             uint16_t queue_id)
4380 {
4381         struct rte_eth_dev *dev;
4382
4383         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4384
4385         dev = &rte_eth_devices[port_id];
4386
4387         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
4388         return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
4389                                                                 queue_id));
4390 }
4391
4392
4393 int
4394 rte_eth_dev_filter_supported(uint16_t port_id,
4395                              enum rte_filter_type filter_type)
4396 {
4397         struct rte_eth_dev *dev;
4398
4399         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4400
4401         dev = &rte_eth_devices[port_id];
4402         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4403         return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4404                                 RTE_ETH_FILTER_NOP, NULL);
4405 }
4406
4407 int
4408 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
4409                         enum rte_filter_op filter_op, void *arg)
4410 {
4411         struct rte_eth_dev *dev;
4412
4413         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4414
4415         dev = &rte_eth_devices[port_id];
4416         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4417         return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4418                                                              filter_op, arg));
4419 }
4420
4421 const struct rte_eth_rxtx_callback *
4422 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
4423                 rte_rx_callback_fn fn, void *user_param)
4424 {
4425 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4426         rte_errno = ENOTSUP;
4427         return NULL;
4428 #endif
4429         struct rte_eth_dev *dev;
4430
4431         /* check input parameters */
4432         if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4433                     queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4434                 rte_errno = EINVAL;
4435                 return NULL;
4436         }
4437         dev = &rte_eth_devices[port_id];
4438         if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4439                 rte_errno = EINVAL;
4440                 return NULL;
4441         }
4442         struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4443
4444         if (cb == NULL) {
4445                 rte_errno = ENOMEM;
4446                 return NULL;
4447         }
4448
4449         cb->fn.rx = fn;
4450         cb->param = user_param;
4451
4452         rte_spinlock_lock(&rte_eth_rx_cb_lock);
4453         /* Add the callbacks in fifo order. */
4454         struct rte_eth_rxtx_callback *tail =
4455                 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4456
4457         if (!tail) {
4458                 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4459
4460         } else {
4461                 while (tail->next)
4462                         tail = tail->next;
4463                 tail->next = cb;
4464         }
4465         rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4466
4467         return cb;
4468 }
4469
4470 const struct rte_eth_rxtx_callback *
4471 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
4472                 rte_rx_callback_fn fn, void *user_param)
4473 {
4474 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4475         rte_errno = ENOTSUP;
4476         return NULL;
4477 #endif
4478         /* check input parameters */
4479         if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4480                 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4481                 rte_errno = EINVAL;
4482                 return NULL;
4483         }
4484
4485         struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4486
4487         if (cb == NULL) {
4488                 rte_errno = ENOMEM;
4489                 return NULL;
4490         }
4491
4492         cb->fn.rx = fn;
4493         cb->param = user_param;
4494
4495         rte_spinlock_lock(&rte_eth_rx_cb_lock);
4496         /* Add the callbacks at first position */
4497         cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4498         rte_smp_wmb();
4499         rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4500         rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4501
4502         return cb;
4503 }
4504
4505 const struct rte_eth_rxtx_callback *
4506 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
4507                 rte_tx_callback_fn fn, void *user_param)
4508 {
4509 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4510         rte_errno = ENOTSUP;
4511         return NULL;
4512 #endif
4513         struct rte_eth_dev *dev;
4514
4515         /* check input parameters */
4516         if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4517                     queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
4518                 rte_errno = EINVAL;
4519                 return NULL;
4520         }
4521
4522         dev = &rte_eth_devices[port_id];
4523         if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4524                 rte_errno = EINVAL;
4525                 return NULL;
4526         }
4527
4528         struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4529
4530         if (cb == NULL) {
4531                 rte_errno = ENOMEM;
4532                 return NULL;
4533         }
4534
4535         cb->fn.tx = fn;
4536         cb->param = user_param;
4537
4538         rte_spinlock_lock(&rte_eth_tx_cb_lock);
4539         /* Add the callbacks in fifo order. */
4540         struct rte_eth_rxtx_callback *tail =
4541                 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
4542
4543         if (!tail) {
4544                 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
4545
4546         } else {
4547                 while (tail->next)
4548                         tail = tail->next;
4549                 tail->next = cb;
4550         }
4551         rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4552
4553         return cb;
4554 }
4555
4556 int
4557 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4558                 const struct rte_eth_rxtx_callback *user_cb)
4559 {
4560 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4561         return -ENOTSUP;
4562 #endif
4563         /* Check input parameters. */
4564         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4565         if (user_cb == NULL ||
4566                         queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
4567                 return -EINVAL;
4568
4569         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4570         struct rte_eth_rxtx_callback *cb;
4571         struct rte_eth_rxtx_callback **prev_cb;
4572         int ret = -EINVAL;
4573
4574         rte_spinlock_lock(&rte_eth_rx_cb_lock);
4575         prev_cb = &dev->post_rx_burst_cbs[queue_id];
4576         for (; *prev_cb != NULL; prev_cb = &cb->next) {
4577                 cb = *prev_cb;
4578                 if (cb == user_cb) {
4579                         /* Remove the user cb from the callback list. */
4580                         *prev_cb = cb->next;
4581                         ret = 0;
4582                         break;
4583                 }
4584         }
4585         rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4586
4587         return ret;
4588 }
4589
4590 int
4591 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4592                 const struct rte_eth_rxtx_callback *user_cb)
4593 {
4594 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4595         return -ENOTSUP;
4596 #endif
4597         /* Check input parameters. */
4598         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4599         if (user_cb == NULL ||
4600                         queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
4601                 return -EINVAL;
4602
4603         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4604         int ret = -EINVAL;
4605         struct rte_eth_rxtx_callback *cb;
4606         struct rte_eth_rxtx_callback **prev_cb;
4607
4608         rte_spinlock_lock(&rte_eth_tx_cb_lock);
4609         prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4610         for (; *prev_cb != NULL; prev_cb = &cb->next) {
4611                 cb = *prev_cb;
4612                 if (cb == user_cb) {
4613                         /* Remove the user cb from the callback list. */
4614                         *prev_cb = cb->next;
4615                         ret = 0;
4616                         break;
4617                 }
4618         }
4619         rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4620
4621         return ret;
4622 }
4623
4624 int
4625 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4626         struct rte_eth_rxq_info *qinfo)
4627 {
4628         struct rte_eth_dev *dev;
4629
4630         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4631
4632         if (qinfo == NULL)
4633                 return -EINVAL;
4634
4635         dev = &rte_eth_devices[port_id];
4636         if (queue_id >= dev->data->nb_rx_queues) {
4637                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4638                 return -EINVAL;
4639         }
4640
4641         if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4642                 RTE_ETHDEV_LOG(INFO,
4643                         "Can't get hairpin Rx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4644                         queue_id, port_id);
4645                 return -EINVAL;
4646         }
4647
4648         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
4649
4650         memset(qinfo, 0, sizeof(*qinfo));
4651         dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4652         return 0;
4653 }
4654
4655 int
4656 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4657         struct rte_eth_txq_info *qinfo)
4658 {
4659         struct rte_eth_dev *dev;
4660
4661         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4662
4663         if (qinfo == NULL)
4664                 return -EINVAL;
4665
4666         dev = &rte_eth_devices[port_id];
4667         if (queue_id >= dev->data->nb_tx_queues) {
4668                 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4669                 return -EINVAL;
4670         }
4671
4672         if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4673                 RTE_ETHDEV_LOG(INFO,
4674                         "Can't get hairpin Tx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4675                         queue_id, port_id);
4676                 return -EINVAL;
4677         }
4678
4679         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4680
4681         memset(qinfo, 0, sizeof(*qinfo));
4682         dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4683
4684         return 0;
4685 }
4686
4687 int
4688 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4689                           struct rte_eth_burst_mode *mode)
4690 {
4691         struct rte_eth_dev *dev;
4692
4693         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4694
4695         if (mode == NULL)
4696                 return -EINVAL;
4697
4698         dev = &rte_eth_devices[port_id];
4699
4700         if (queue_id >= dev->data->nb_rx_queues) {
4701                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4702                 return -EINVAL;
4703         }
4704
4705         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
4706         memset(mode, 0, sizeof(*mode));
4707         return eth_err(port_id,
4708                        dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
4709 }
4710
4711 int
4712 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4713                           struct rte_eth_burst_mode *mode)
4714 {
4715         struct rte_eth_dev *dev;
4716
4717         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4718
4719         if (mode == NULL)
4720                 return -EINVAL;
4721
4722         dev = &rte_eth_devices[port_id];
4723
4724         if (queue_id >= dev->data->nb_tx_queues) {
4725                 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4726                 return -EINVAL;
4727         }
4728
4729         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
4730         memset(mode, 0, sizeof(*mode));
4731         return eth_err(port_id,
4732                        dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
4733 }
4734
4735 int
4736 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4737                              struct rte_ether_addr *mc_addr_set,
4738                              uint32_t nb_mc_addr)
4739 {
4740         struct rte_eth_dev *dev;
4741
4742         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4743
4744         dev = &rte_eth_devices[port_id];
4745         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4746         return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4747                                                 mc_addr_set, nb_mc_addr));
4748 }
4749
4750 int
4751 rte_eth_timesync_enable(uint16_t port_id)
4752 {
4753         struct rte_eth_dev *dev;
4754
4755         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4756         dev = &rte_eth_devices[port_id];
4757
4758         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4759         return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4760 }
4761
4762 int
4763 rte_eth_timesync_disable(uint16_t port_id)
4764 {
4765         struct rte_eth_dev *dev;
4766
4767         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4768         dev = &rte_eth_devices[port_id];
4769
4770         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4771         return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4772 }
4773
4774 int
4775 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4776                                    uint32_t flags)
4777 {
4778         struct rte_eth_dev *dev;
4779
4780         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4781         dev = &rte_eth_devices[port_id];
4782
4783         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4784         return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4785                                 (dev, timestamp, flags));
4786 }
4787
4788 int
4789 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4790                                    struct timespec *timestamp)
4791 {
4792         struct rte_eth_dev *dev;
4793
4794         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4795         dev = &rte_eth_devices[port_id];
4796
4797         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4798         return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4799                                 (dev, timestamp));
4800 }
4801
4802 int
4803 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4804 {
4805         struct rte_eth_dev *dev;
4806
4807         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4808         dev = &rte_eth_devices[port_id];
4809
4810         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4811         return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4812                                                                       delta));
4813 }
4814
4815 int
4816 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4817 {
4818         struct rte_eth_dev *dev;
4819
4820         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4821         dev = &rte_eth_devices[port_id];
4822
4823         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4824         return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4825                                                                 timestamp));
4826 }
4827
4828 int
4829 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4830 {
4831         struct rte_eth_dev *dev;
4832
4833         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4834         dev = &rte_eth_devices[port_id];
4835
4836         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4837         return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4838                                                                 timestamp));
4839 }
4840
4841 int
4842 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
4843 {
4844         struct rte_eth_dev *dev;
4845
4846         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4847         dev = &rte_eth_devices[port_id];
4848
4849         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
4850         return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
4851 }
4852
4853 int
4854 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4855 {
4856         struct rte_eth_dev *dev;
4857
4858         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4859
4860         dev = &rte_eth_devices[port_id];
4861         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4862         return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4863 }
4864
4865 int
4866 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4867 {
4868         struct rte_eth_dev *dev;
4869
4870         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4871
4872         dev = &rte_eth_devices[port_id];
4873         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4874         return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4875 }
4876
4877 int
4878 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4879 {
4880         struct rte_eth_dev *dev;
4881
4882         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4883
4884         dev = &rte_eth_devices[port_id];
4885         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4886         return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4887 }
4888
4889 int
4890 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4891 {
4892         struct rte_eth_dev *dev;
4893
4894         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4895
4896         dev = &rte_eth_devices[port_id];
4897         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4898         return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4899 }
4900
4901 int
4902 rte_eth_dev_get_module_info(uint16_t port_id,
4903                             struct rte_eth_dev_module_info *modinfo)
4904 {
4905         struct rte_eth_dev *dev;
4906
4907         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4908
4909         dev = &rte_eth_devices[port_id];
4910         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4911         return (*dev->dev_ops->get_module_info)(dev, modinfo);
4912 }
4913
4914 int
4915 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4916                               struct rte_dev_eeprom_info *info)
4917 {
4918         struct rte_eth_dev *dev;
4919
4920         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4921
4922         dev = &rte_eth_devices[port_id];
4923         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4924         return (*dev->dev_ops->get_module_eeprom)(dev, info);
4925 }
4926
4927 int
4928 rte_eth_dev_get_dcb_info(uint16_t port_id,
4929                              struct rte_eth_dcb_info *dcb_info)
4930 {
4931         struct rte_eth_dev *dev;
4932
4933         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4934
4935         dev = &rte_eth_devices[port_id];
4936         memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4937
4938         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4939         return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4940 }
4941
4942 int
4943 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4944                                     struct rte_eth_l2_tunnel_conf *l2_tunnel)
4945 {
4946         struct rte_eth_dev *dev;
4947
4948         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4949         if (l2_tunnel == NULL) {
4950                 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4951                 return -EINVAL;
4952         }
4953
4954         if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4955                 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4956                 return -EINVAL;
4957         }
4958
4959         dev = &rte_eth_devices[port_id];
4960         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4961                                 -ENOTSUP);
4962         return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4963                                                                 l2_tunnel));
4964 }
4965
4966 int
4967 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4968                                   struct rte_eth_l2_tunnel_conf *l2_tunnel,
4969                                   uint32_t mask,
4970                                   uint8_t en)
4971 {
4972         struct rte_eth_dev *dev;
4973
4974         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4975
4976         if (l2_tunnel == NULL) {
4977                 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4978                 return -EINVAL;
4979         }
4980
4981         if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4982                 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4983                 return -EINVAL;
4984         }
4985
4986         if (mask == 0) {
4987                 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4988                 return -EINVAL;
4989         }
4990
4991         dev = &rte_eth_devices[port_id];
4992         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4993                                 -ENOTSUP);
4994         return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4995                                                         l2_tunnel, mask, en));
4996 }
4997
4998 static void
4999 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
5000                            const struct rte_eth_desc_lim *desc_lim)
5001 {
5002         if (desc_lim->nb_align != 0)
5003                 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
5004
5005         if (desc_lim->nb_max != 0)
5006                 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
5007
5008         *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
5009 }
5010
5011 int
5012 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
5013                                  uint16_t *nb_rx_desc,
5014                                  uint16_t *nb_tx_desc)
5015 {
5016         struct rte_eth_dev_info dev_info;
5017         int ret;
5018
5019         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5020
5021         ret = rte_eth_dev_info_get(port_id, &dev_info);
5022         if (ret != 0)
5023                 return ret;
5024
5025         if (nb_rx_desc != NULL)
5026                 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
5027
5028         if (nb_tx_desc != NULL)
5029                 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
5030
5031         return 0;
5032 }
5033
5034 int
5035 rte_eth_dev_hairpin_capability_get(uint16_t port_id,
5036                                    struct rte_eth_hairpin_cap *cap)
5037 {
5038         struct rte_eth_dev *dev;
5039
5040         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
5041
5042         dev = &rte_eth_devices[port_id];
5043         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_cap_get, -ENOTSUP);
5044         memset(cap, 0, sizeof(*cap));
5045         return eth_err(port_id, (*dev->dev_ops->hairpin_cap_get)(dev, cap));
5046 }
5047
5048 int
5049 rte_eth_dev_is_rx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5050 {
5051         if (dev->data->rx_queue_state[queue_id] ==
5052             RTE_ETH_QUEUE_STATE_HAIRPIN)
5053                 return 1;
5054         return 0;
5055 }
5056
5057 int
5058 rte_eth_dev_is_tx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5059 {
5060         if (dev->data->tx_queue_state[queue_id] ==
5061             RTE_ETH_QUEUE_STATE_HAIRPIN)
5062                 return 1;
5063         return 0;
5064 }
5065
5066 int
5067 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
5068 {
5069         struct rte_eth_dev *dev;
5070
5071         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5072
5073         if (pool == NULL)
5074                 return -EINVAL;
5075
5076         dev = &rte_eth_devices[port_id];
5077
5078         if (*dev->dev_ops->pool_ops_supported == NULL)
5079                 return 1; /* all pools are supported */
5080
5081         return (*dev->dev_ops->pool_ops_supported)(dev, pool);
5082 }
5083
5084 /**
5085  * A set of values to describe the possible states of a switch domain.
5086  */
5087 enum rte_eth_switch_domain_state {
5088         RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
5089         RTE_ETH_SWITCH_DOMAIN_ALLOCATED
5090 };
5091
5092 /**
5093  * Array of switch domains available for allocation. Array is sized to
5094  * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
5095  * ethdev ports in a single process.
5096  */
5097 static struct rte_eth_dev_switch {
5098         enum rte_eth_switch_domain_state state;
5099 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
5100
5101 int
5102 rte_eth_switch_domain_alloc(uint16_t *domain_id)
5103 {
5104         unsigned int i;
5105
5106         *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
5107
5108         for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
5109                 if (rte_eth_switch_domains[i].state ==
5110                         RTE_ETH_SWITCH_DOMAIN_UNUSED) {
5111                         rte_eth_switch_domains[i].state =
5112                                 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
5113                         *domain_id = i;
5114                         return 0;
5115                 }
5116         }
5117
5118         return -ENOSPC;
5119 }
5120
5121 int
5122 rte_eth_switch_domain_free(uint16_t domain_id)
5123 {
5124         if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
5125                 domain_id >= RTE_MAX_ETHPORTS)
5126                 return -EINVAL;
5127
5128         if (rte_eth_switch_domains[domain_id].state !=
5129                 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
5130                 return -EINVAL;
5131
5132         rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
5133
5134         return 0;
5135 }
5136
5137 static int
5138 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
5139 {
5140         int state;
5141         struct rte_kvargs_pair *pair;
5142         char *letter;
5143
5144         arglist->str = strdup(str_in);
5145         if (arglist->str == NULL)
5146                 return -ENOMEM;
5147
5148         letter = arglist->str;
5149         state = 0;
5150         arglist->count = 0;
5151         pair = &arglist->pairs[0];
5152         while (1) {
5153                 switch (state) {
5154                 case 0: /* Initial */
5155                         if (*letter == '=')
5156                                 return -EINVAL;
5157                         else if (*letter == '\0')
5158                                 return 0;
5159
5160                         state = 1;
5161                         pair->key = letter;
5162                         /* fall-thru */
5163
5164                 case 1: /* Parsing key */
5165                         if (*letter == '=') {
5166                                 *letter = '\0';
5167                                 pair->value = letter + 1;
5168                                 state = 2;
5169                         } else if (*letter == ',' || *letter == '\0')
5170                                 return -EINVAL;
5171                         break;
5172
5173
5174                 case 2: /* Parsing value */
5175                         if (*letter == '[')
5176                                 state = 3;
5177                         else if (*letter == ',') {
5178                                 *letter = '\0';
5179                                 arglist->count++;
5180                                 pair = &arglist->pairs[arglist->count];
5181                                 state = 0;
5182                         } else if (*letter == '\0') {
5183                                 letter--;
5184                                 arglist->count++;
5185                                 pair = &arglist->pairs[arglist->count];
5186                                 state = 0;
5187                         }
5188                         break;
5189
5190                 case 3: /* Parsing list */
5191                         if (*letter == ']')
5192                                 state = 2;
5193                         else if (*letter == '\0')
5194                                 return -EINVAL;
5195                         break;
5196                 }
5197                 letter++;
5198         }
5199 }
5200
5201 int
5202 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
5203 {
5204         struct rte_kvargs args;
5205         struct rte_kvargs_pair *pair;
5206         unsigned int i;
5207         int result = 0;
5208
5209         memset(eth_da, 0, sizeof(*eth_da));
5210
5211         result = rte_eth_devargs_tokenise(&args, dargs);
5212         if (result < 0)
5213                 goto parse_cleanup;
5214
5215         for (i = 0; i < args.count; i++) {
5216                 pair = &args.pairs[i];
5217                 if (strcmp("representor", pair->key) == 0) {
5218                         result = rte_eth_devargs_parse_list(pair->value,
5219                                 rte_eth_devargs_parse_representor_ports,
5220                                 eth_da);
5221                         if (result < 0)
5222                                 goto parse_cleanup;
5223                 }
5224         }
5225
5226 parse_cleanup:
5227         if (args.str)
5228                 free(args.str);
5229
5230         return result;
5231 }
5232
5233 static int
5234 handle_port_list(const char *cmd __rte_unused,
5235                 const char *params __rte_unused,
5236                 struct rte_tel_data *d)
5237 {
5238         int port_id;
5239
5240         rte_tel_data_start_array(d, RTE_TEL_INT_VAL);
5241         RTE_ETH_FOREACH_DEV(port_id)
5242                 rte_tel_data_add_array_int(d, port_id);
5243         return 0;
5244 }
5245
5246 static int
5247 handle_port_xstats(const char *cmd __rte_unused,
5248                 const char *params,
5249                 struct rte_tel_data *d)
5250 {
5251         struct rte_eth_xstat *eth_xstats;
5252         struct rte_eth_xstat_name *xstat_names;
5253         int port_id, num_xstats;
5254         int i, ret;
5255
5256         if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5257                 return -1;
5258
5259         port_id = atoi(params);
5260         if (!rte_eth_dev_is_valid_port(port_id))
5261                 return -1;
5262
5263         num_xstats = rte_eth_xstats_get(port_id, NULL, 0);
5264         if (num_xstats < 0)
5265                 return -1;
5266
5267         /* use one malloc for both names and stats */
5268         eth_xstats = malloc((sizeof(struct rte_eth_xstat) +
5269                         sizeof(struct rte_eth_xstat_name)) * num_xstats);
5270         if (eth_xstats == NULL)
5271                 return -1;
5272         xstat_names = (void *)&eth_xstats[num_xstats];
5273
5274         ret = rte_eth_xstats_get_names(port_id, xstat_names, num_xstats);
5275         if (ret < 0 || ret > num_xstats) {
5276                 free(eth_xstats);
5277                 return -1;
5278         }
5279
5280         ret = rte_eth_xstats_get(port_id, eth_xstats, num_xstats);
5281         if (ret < 0 || ret > num_xstats) {
5282                 free(eth_xstats);
5283                 return -1;
5284         }
5285
5286         rte_tel_data_start_dict(d);
5287         for (i = 0; i < num_xstats; i++)
5288                 rte_tel_data_add_dict_u64(d, xstat_names[i].name,
5289                                 eth_xstats[i].value);
5290         return 0;
5291 }
5292
5293 static int
5294 handle_port_link_status(const char *cmd __rte_unused,
5295                 const char *params,
5296                 struct rte_tel_data *d)
5297 {
5298         static const char *status_str = "status";
5299         int ret, port_id;
5300         struct rte_eth_link link;
5301
5302         if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5303                 return -1;
5304
5305         port_id = atoi(params);
5306         if (!rte_eth_dev_is_valid_port(port_id))
5307                 return -1;
5308
5309         ret = rte_eth_link_get(port_id, &link);
5310         if (ret < 0)
5311                 return -1;
5312
5313         rte_tel_data_start_dict(d);
5314         if (!link.link_status) {
5315                 rte_tel_data_add_dict_string(d, status_str, "DOWN");
5316                 return 0;
5317         }
5318         rte_tel_data_add_dict_string(d, status_str, "UP");
5319         rte_tel_data_add_dict_u64(d, "speed", link.link_speed);
5320         rte_tel_data_add_dict_string(d, "duplex",
5321                         (link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
5322                                 "full-duplex" : "half-duplex");
5323         return 0;
5324 }
5325
5326 RTE_LOG_REGISTER(rte_eth_dev_logtype, lib.ethdev, INFO);
5327
5328 RTE_INIT(ethdev_init_telemetry)
5329 {
5330         rte_telemetry_register_cmd("/ethdev/list", handle_port_list,
5331                         "Returns list of available ethdev ports. Takes no parameters");
5332         rte_telemetry_register_cmd("/ethdev/xstats", handle_port_xstats,
5333                         "Returns the extended stats for a port. Parameters: int port_id");
5334         rte_telemetry_register_cmd("/ethdev/link_status",
5335                         handle_port_link_status,
5336                         "Returns the link status for a port. Parameters: int port_id");
5337 }