1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
41 #include "rte_ether.h"
42 #include "rte_ethdev.h"
43 #include "rte_ethdev_driver.h"
44 #include "ethdev_profile.h"
45 #include "ethdev_private.h"
47 int rte_eth_dev_logtype;
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
64 /* store statistics names and its offset in stats structure */
65 struct rte_eth_xstats_name_off {
66 char name[RTE_ETH_XSTATS_NAME_SIZE];
70 /* Shared memory between primary and secondary processes. */
72 uint64_t next_owner_id;
73 rte_spinlock_t ownership_lock;
74 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
89 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94 {"errors", offsetof(struct rte_eth_stats, q_errors)},
97 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
98 sizeof(rte_rxq_stats_strings[0]))
100 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
101 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
102 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
104 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
105 sizeof(rte_txq_stats_strings[0]))
107 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
108 { DEV_RX_OFFLOAD_##_name, #_name }
110 static const struct {
113 } rte_rx_offload_names[] = {
114 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
115 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
119 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
120 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
121 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
122 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
125 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
126 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
127 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
128 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
129 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
130 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
131 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
134 #undef RTE_RX_OFFLOAD_BIT2STR
136 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
137 { DEV_TX_OFFLOAD_##_name, #_name }
139 static const struct {
142 } rte_tx_offload_names[] = {
143 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
144 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
151 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
152 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
157 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
158 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
159 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
160 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
161 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
163 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
164 RTE_TX_OFFLOAD_BIT2STR(MATCH_METADATA),
167 #undef RTE_TX_OFFLOAD_BIT2STR
170 * The user application callback description.
172 * It contains callback address to be registered by user application,
173 * the pointer to the parameters for callback, and the event type.
175 struct rte_eth_dev_callback {
176 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
177 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
178 void *cb_arg; /**< Parameter for callback */
179 void *ret_param; /**< Return parameter */
180 enum rte_eth_event_type event; /**< Interrupt event type */
181 uint32_t active; /**< Callback is executing */
190 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
193 struct rte_devargs devargs = {.args = NULL};
194 const char *bus_param_key;
195 char *bus_str = NULL;
196 char *cls_str = NULL;
199 memset(iter, 0, sizeof(*iter));
202 * The devargs string may use various syntaxes:
203 * - 0000:08:00.0,representor=[1-3]
204 * - pci:0000:06:00.0,representor=[0,5]
205 * - class=eth,mac=00:11:22:33:44:55
206 * A new syntax is in development (not yet supported):
207 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
211 * Handle pure class filter (i.e. without any bus-level argument),
212 * from future new syntax.
213 * rte_devargs_parse() is not yet supporting the new syntax,
214 * that's why this simple case is temporarily parsed here.
216 #define iter_anybus_str "class=eth,"
217 if (strncmp(devargs_str, iter_anybus_str,
218 strlen(iter_anybus_str)) == 0) {
219 iter->cls_str = devargs_str + strlen(iter_anybus_str);
223 /* Split bus, device and parameters. */
224 ret = rte_devargs_parse(&devargs, devargs_str);
229 * Assume parameters of old syntax can match only at ethdev level.
230 * Extra parameters will be ignored, thanks to "+" prefix.
232 str_size = strlen(devargs.args) + 2;
233 cls_str = malloc(str_size);
234 if (cls_str == NULL) {
238 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
239 if (ret != str_size - 1) {
243 iter->cls_str = cls_str;
244 free(devargs.args); /* allocated by rte_devargs_parse() */
247 iter->bus = devargs.bus;
248 if (iter->bus->dev_iterate == NULL) {
253 /* Convert bus args to new syntax for use with new API dev_iterate. */
254 if (strcmp(iter->bus->name, "vdev") == 0) {
255 bus_param_key = "name";
256 } else if (strcmp(iter->bus->name, "pci") == 0) {
257 bus_param_key = "addr";
262 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
263 bus_str = malloc(str_size);
264 if (bus_str == NULL) {
268 ret = snprintf(bus_str, str_size, "%s=%s",
269 bus_param_key, devargs.name);
270 if (ret != str_size - 1) {
274 iter->bus_str = bus_str;
277 iter->cls = rte_class_find_by_name("eth");
282 RTE_LOG(ERR, EAL, "Bus %s does not support iterating.\n",
291 rte_eth_iterator_next(struct rte_dev_iterator *iter)
293 if (iter->cls == NULL) /* invalid ethdev iterator */
294 return RTE_MAX_ETHPORTS;
296 do { /* loop to try all matching rte_device */
297 /* If not pure ethdev filter and */
298 if (iter->bus != NULL &&
299 /* not in middle of rte_eth_dev iteration, */
300 iter->class_device == NULL) {
301 /* get next rte_device to try. */
302 iter->device = iter->bus->dev_iterate(
303 iter->device, iter->bus_str, iter);
304 if (iter->device == NULL)
305 break; /* no more rte_device candidate */
307 /* A device is matching bus part, need to check ethdev part. */
308 iter->class_device = iter->cls->dev_iterate(
309 iter->class_device, iter->cls_str, iter);
310 if (iter->class_device != NULL)
311 return eth_dev_to_id(iter->class_device); /* match */
312 } while (iter->bus != NULL); /* need to try next rte_device */
314 /* No more ethdev port to iterate. */
315 rte_eth_iterator_cleanup(iter);
316 return RTE_MAX_ETHPORTS;
320 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
322 if (iter->bus_str == NULL)
323 return; /* nothing to free in pure class filter */
324 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
325 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
326 memset(iter, 0, sizeof(*iter));
330 rte_eth_find_next(uint16_t port_id)
332 while (port_id < RTE_MAX_ETHPORTS &&
333 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
336 if (port_id >= RTE_MAX_ETHPORTS)
337 return RTE_MAX_ETHPORTS;
343 * Macro to iterate over all valid ports for internal usage.
344 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
346 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
347 for (port_id = rte_eth_find_next(0); \
348 port_id < RTE_MAX_ETHPORTS; \
349 port_id = rte_eth_find_next(port_id + 1))
352 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
354 port_id = rte_eth_find_next(port_id);
355 while (port_id < RTE_MAX_ETHPORTS &&
356 rte_eth_devices[port_id].device != parent)
357 port_id = rte_eth_find_next(port_id + 1);
363 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
365 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
366 return rte_eth_find_next_of(port_id,
367 rte_eth_devices[ref_port_id].device);
371 rte_eth_dev_shared_data_prepare(void)
373 const unsigned flags = 0;
374 const struct rte_memzone *mz;
376 rte_spinlock_lock(&rte_eth_shared_data_lock);
378 if (rte_eth_dev_shared_data == NULL) {
379 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
380 /* Allocate port data and ownership shared memory. */
381 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
382 sizeof(*rte_eth_dev_shared_data),
383 rte_socket_id(), flags);
385 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
387 rte_panic("Cannot allocate ethdev shared data\n");
389 rte_eth_dev_shared_data = mz->addr;
390 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
391 rte_eth_dev_shared_data->next_owner_id =
392 RTE_ETH_DEV_NO_OWNER + 1;
393 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
394 memset(rte_eth_dev_shared_data->data, 0,
395 sizeof(rte_eth_dev_shared_data->data));
399 rte_spinlock_unlock(&rte_eth_shared_data_lock);
403 is_allocated(const struct rte_eth_dev *ethdev)
405 return ethdev->data->name[0] != '\0';
408 static struct rte_eth_dev *
409 _rte_eth_dev_allocated(const char *name)
413 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
414 if (rte_eth_devices[i].data != NULL &&
415 strcmp(rte_eth_devices[i].data->name, name) == 0)
416 return &rte_eth_devices[i];
422 rte_eth_dev_allocated(const char *name)
424 struct rte_eth_dev *ethdev;
426 rte_eth_dev_shared_data_prepare();
428 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
430 ethdev = _rte_eth_dev_allocated(name);
432 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
438 rte_eth_dev_find_free_port(void)
442 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
443 /* Using shared name field to find a free port. */
444 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
445 RTE_ASSERT(rte_eth_devices[i].state ==
450 return RTE_MAX_ETHPORTS;
453 static struct rte_eth_dev *
454 eth_dev_get(uint16_t port_id)
456 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
458 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
464 rte_eth_dev_allocate(const char *name)
467 struct rte_eth_dev *eth_dev = NULL;
470 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
472 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
476 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
477 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
481 rte_eth_dev_shared_data_prepare();
483 /* Synchronize port creation between primary and secondary threads. */
484 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
486 if (_rte_eth_dev_allocated(name) != NULL) {
488 "Ethernet device with name %s already allocated\n",
493 port_id = rte_eth_dev_find_free_port();
494 if (port_id == RTE_MAX_ETHPORTS) {
496 "Reached maximum number of Ethernet ports\n");
500 eth_dev = eth_dev_get(port_id);
501 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
502 eth_dev->data->port_id = port_id;
503 eth_dev->data->mtu = RTE_ETHER_MTU;
506 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
512 * Attach to a port already registered by the primary process, which
513 * makes sure that the same device would have the same port id both
514 * in the primary and secondary process.
517 rte_eth_dev_attach_secondary(const char *name)
520 struct rte_eth_dev *eth_dev = NULL;
522 rte_eth_dev_shared_data_prepare();
524 /* Synchronize port attachment to primary port creation and release. */
525 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
527 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
528 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
531 if (i == RTE_MAX_ETHPORTS) {
533 "Device %s is not driven by the primary process\n",
536 eth_dev = eth_dev_get(i);
537 RTE_ASSERT(eth_dev->data->port_id == i);
540 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
545 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
550 rte_eth_dev_shared_data_prepare();
552 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
553 _rte_eth_dev_callback_process(eth_dev,
554 RTE_ETH_EVENT_DESTROY, NULL);
556 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
558 eth_dev->state = RTE_ETH_DEV_UNUSED;
560 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
561 rte_free(eth_dev->data->rx_queues);
562 rte_free(eth_dev->data->tx_queues);
563 rte_free(eth_dev->data->mac_addrs);
564 rte_free(eth_dev->data->hash_mac_addrs);
565 rte_free(eth_dev->data->dev_private);
566 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
569 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
575 rte_eth_dev_is_valid_port(uint16_t port_id)
577 if (port_id >= RTE_MAX_ETHPORTS ||
578 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
585 rte_eth_is_valid_owner_id(uint64_t owner_id)
587 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
588 rte_eth_dev_shared_data->next_owner_id <= owner_id)
594 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
596 port_id = rte_eth_find_next(port_id);
597 while (port_id < RTE_MAX_ETHPORTS &&
598 rte_eth_devices[port_id].data->owner.id != owner_id)
599 port_id = rte_eth_find_next(port_id + 1);
605 rte_eth_dev_owner_new(uint64_t *owner_id)
607 rte_eth_dev_shared_data_prepare();
609 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
611 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
613 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
618 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
619 const struct rte_eth_dev_owner *new_owner)
621 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
622 struct rte_eth_dev_owner *port_owner;
624 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
625 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
630 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
631 !rte_eth_is_valid_owner_id(old_owner_id)) {
633 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
634 old_owner_id, new_owner->id);
638 port_owner = &rte_eth_devices[port_id].data->owner;
639 if (port_owner->id != old_owner_id) {
641 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
642 port_id, port_owner->name, port_owner->id);
646 /* can not truncate (same structure) */
647 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
649 port_owner->id = new_owner->id;
651 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
652 port_id, new_owner->name, new_owner->id);
658 rte_eth_dev_owner_set(const uint16_t port_id,
659 const struct rte_eth_dev_owner *owner)
663 rte_eth_dev_shared_data_prepare();
665 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
667 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
669 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
674 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
676 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
677 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
680 rte_eth_dev_shared_data_prepare();
682 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
684 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
686 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
691 rte_eth_dev_owner_delete(const uint64_t owner_id)
695 rte_eth_dev_shared_data_prepare();
697 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
699 if (rte_eth_is_valid_owner_id(owner_id)) {
700 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
701 if (rte_eth_devices[port_id].data->owner.id == owner_id)
702 memset(&rte_eth_devices[port_id].data->owner, 0,
703 sizeof(struct rte_eth_dev_owner));
704 RTE_ETHDEV_LOG(NOTICE,
705 "All port owners owned by %016"PRIx64" identifier have removed\n",
709 "Invalid owner id=%016"PRIx64"\n",
713 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
717 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
720 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
722 rte_eth_dev_shared_data_prepare();
724 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
726 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
727 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
731 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
734 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
739 rte_eth_dev_socket_id(uint16_t port_id)
741 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
742 return rte_eth_devices[port_id].data->numa_node;
746 rte_eth_dev_get_sec_ctx(uint16_t port_id)
748 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
749 return rte_eth_devices[port_id].security_ctx;
753 rte_eth_dev_count(void)
755 return rte_eth_dev_count_avail();
759 rte_eth_dev_count_avail(void)
766 RTE_ETH_FOREACH_DEV(p)
773 rte_eth_dev_count_total(void)
775 uint16_t port, count = 0;
777 RTE_ETH_FOREACH_VALID_DEV(port)
784 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
788 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
791 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
795 /* shouldn't check 'rte_eth_devices[i].data',
796 * because it might be overwritten by VDEV PMD */
797 tmp = rte_eth_dev_shared_data->data[port_id].name;
803 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
808 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
812 RTE_ETH_FOREACH_VALID_DEV(pid)
813 if (!strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
822 eth_err(uint16_t port_id, int ret)
826 if (rte_eth_dev_is_removed(port_id))
832 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
834 uint16_t old_nb_queues = dev->data->nb_rx_queues;
838 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
839 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
840 sizeof(dev->data->rx_queues[0]) * nb_queues,
841 RTE_CACHE_LINE_SIZE);
842 if (dev->data->rx_queues == NULL) {
843 dev->data->nb_rx_queues = 0;
846 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
847 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
849 rxq = dev->data->rx_queues;
851 for (i = nb_queues; i < old_nb_queues; i++)
852 (*dev->dev_ops->rx_queue_release)(rxq[i]);
853 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
854 RTE_CACHE_LINE_SIZE);
857 if (nb_queues > old_nb_queues) {
858 uint16_t new_qs = nb_queues - old_nb_queues;
860 memset(rxq + old_nb_queues, 0,
861 sizeof(rxq[0]) * new_qs);
864 dev->data->rx_queues = rxq;
866 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
867 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
869 rxq = dev->data->rx_queues;
871 for (i = nb_queues; i < old_nb_queues; i++)
872 (*dev->dev_ops->rx_queue_release)(rxq[i]);
874 rte_free(dev->data->rx_queues);
875 dev->data->rx_queues = NULL;
877 dev->data->nb_rx_queues = nb_queues;
882 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
884 struct rte_eth_dev *dev;
886 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
888 dev = &rte_eth_devices[port_id];
889 if (!dev->data->dev_started) {
891 "Port %u must be started before start any queue\n",
896 if (rx_queue_id >= dev->data->nb_rx_queues) {
897 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
901 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
903 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
905 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
906 rx_queue_id, port_id);
910 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
916 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
918 struct rte_eth_dev *dev;
920 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
922 dev = &rte_eth_devices[port_id];
923 if (rx_queue_id >= dev->data->nb_rx_queues) {
924 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
928 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
930 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
932 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
933 rx_queue_id, port_id);
937 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
942 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
944 struct rte_eth_dev *dev;
946 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
948 dev = &rte_eth_devices[port_id];
949 if (!dev->data->dev_started) {
951 "Port %u must be started before start any queue\n",
956 if (tx_queue_id >= dev->data->nb_tx_queues) {
957 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
961 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
963 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
965 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
966 tx_queue_id, port_id);
970 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
974 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
976 struct rte_eth_dev *dev;
978 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
980 dev = &rte_eth_devices[port_id];
981 if (tx_queue_id >= dev->data->nb_tx_queues) {
982 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
986 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
988 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
990 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
991 tx_queue_id, port_id);
995 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1000 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1002 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1006 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1007 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1008 sizeof(dev->data->tx_queues[0]) * nb_queues,
1009 RTE_CACHE_LINE_SIZE);
1010 if (dev->data->tx_queues == NULL) {
1011 dev->data->nb_tx_queues = 0;
1014 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1015 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1017 txq = dev->data->tx_queues;
1019 for (i = nb_queues; i < old_nb_queues; i++)
1020 (*dev->dev_ops->tx_queue_release)(txq[i]);
1021 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1022 RTE_CACHE_LINE_SIZE);
1025 if (nb_queues > old_nb_queues) {
1026 uint16_t new_qs = nb_queues - old_nb_queues;
1028 memset(txq + old_nb_queues, 0,
1029 sizeof(txq[0]) * new_qs);
1032 dev->data->tx_queues = txq;
1034 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1035 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1037 txq = dev->data->tx_queues;
1039 for (i = nb_queues; i < old_nb_queues; i++)
1040 (*dev->dev_ops->tx_queue_release)(txq[i]);
1042 rte_free(dev->data->tx_queues);
1043 dev->data->tx_queues = NULL;
1045 dev->data->nb_tx_queues = nb_queues;
1050 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1053 case ETH_SPEED_NUM_10M:
1054 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1055 case ETH_SPEED_NUM_100M:
1056 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1057 case ETH_SPEED_NUM_1G:
1058 return ETH_LINK_SPEED_1G;
1059 case ETH_SPEED_NUM_2_5G:
1060 return ETH_LINK_SPEED_2_5G;
1061 case ETH_SPEED_NUM_5G:
1062 return ETH_LINK_SPEED_5G;
1063 case ETH_SPEED_NUM_10G:
1064 return ETH_LINK_SPEED_10G;
1065 case ETH_SPEED_NUM_20G:
1066 return ETH_LINK_SPEED_20G;
1067 case ETH_SPEED_NUM_25G:
1068 return ETH_LINK_SPEED_25G;
1069 case ETH_SPEED_NUM_40G:
1070 return ETH_LINK_SPEED_40G;
1071 case ETH_SPEED_NUM_50G:
1072 return ETH_LINK_SPEED_50G;
1073 case ETH_SPEED_NUM_56G:
1074 return ETH_LINK_SPEED_56G;
1075 case ETH_SPEED_NUM_100G:
1076 return ETH_LINK_SPEED_100G;
1083 rte_eth_dev_rx_offload_name(uint64_t offload)
1085 const char *name = "UNKNOWN";
1088 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1089 if (offload == rte_rx_offload_names[i].offload) {
1090 name = rte_rx_offload_names[i].name;
1099 rte_eth_dev_tx_offload_name(uint64_t offload)
1101 const char *name = "UNKNOWN";
1104 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1105 if (offload == rte_tx_offload_names[i].offload) {
1106 name = rte_tx_offload_names[i].name;
1115 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1116 const struct rte_eth_conf *dev_conf)
1118 struct rte_eth_dev *dev;
1119 struct rte_eth_dev_info dev_info;
1120 struct rte_eth_conf orig_conf;
1124 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1126 dev = &rte_eth_devices[port_id];
1128 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1130 if (dev->data->dev_started) {
1132 "Port %u must be stopped to allow configuration\n",
1137 /* Store original config, as rollback required on failure */
1138 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1141 * Copy the dev_conf parameter into the dev structure.
1142 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1144 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
1146 ret = rte_eth_dev_info_get(port_id, &dev_info);
1150 /* If number of queues specified by application for both Rx and Tx is
1151 * zero, use driver preferred values. This cannot be done individually
1152 * as it is valid for either Tx or Rx (but not both) to be zero.
1153 * If driver does not provide any preferred valued, fall back on
1156 if (nb_rx_q == 0 && nb_tx_q == 0) {
1157 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1159 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1160 nb_tx_q = dev_info.default_txportconf.nb_queues;
1162 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1165 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1167 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1168 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1173 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1175 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1176 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1182 * Check that the numbers of RX and TX queues are not greater
1183 * than the maximum number of RX and TX queues supported by the
1184 * configured device.
1186 if (nb_rx_q > dev_info.max_rx_queues) {
1187 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1188 port_id, nb_rx_q, dev_info.max_rx_queues);
1193 if (nb_tx_q > dev_info.max_tx_queues) {
1194 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1195 port_id, nb_tx_q, dev_info.max_tx_queues);
1200 /* Check that the device supports requested interrupts */
1201 if ((dev_conf->intr_conf.lsc == 1) &&
1202 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1203 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1204 dev->device->driver->name);
1208 if ((dev_conf->intr_conf.rmv == 1) &&
1209 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1210 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1211 dev->device->driver->name);
1217 * If jumbo frames are enabled, check that the maximum RX packet
1218 * length is supported by the configured device.
1220 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1221 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1223 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1224 port_id, dev_conf->rxmode.max_rx_pkt_len,
1225 dev_info.max_rx_pktlen);
1228 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1230 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1231 port_id, dev_conf->rxmode.max_rx_pkt_len,
1232 (unsigned int)RTE_ETHER_MIN_LEN);
1237 if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN ||
1238 dev_conf->rxmode.max_rx_pkt_len > RTE_ETHER_MAX_LEN)
1239 /* Use default value */
1240 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1244 /* Any requested offloading must be within its device capabilities */
1245 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1246 dev_conf->rxmode.offloads) {
1248 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1249 "capabilities 0x%"PRIx64" in %s()\n",
1250 port_id, dev_conf->rxmode.offloads,
1251 dev_info.rx_offload_capa,
1256 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1257 dev_conf->txmode.offloads) {
1259 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1260 "capabilities 0x%"PRIx64" in %s()\n",
1261 port_id, dev_conf->txmode.offloads,
1262 dev_info.tx_offload_capa,
1268 /* Check that device supports requested rss hash functions. */
1269 if ((dev_info.flow_type_rss_offloads |
1270 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1271 dev_info.flow_type_rss_offloads) {
1273 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1274 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1275 dev_info.flow_type_rss_offloads);
1281 * Setup new number of RX/TX queues and reconfigure device.
1283 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1286 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1292 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1295 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1297 rte_eth_dev_rx_queue_config(dev, 0);
1302 diag = (*dev->dev_ops->dev_configure)(dev);
1304 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1306 rte_eth_dev_rx_queue_config(dev, 0);
1307 rte_eth_dev_tx_queue_config(dev, 0);
1308 ret = eth_err(port_id, diag);
1312 /* Initialize Rx profiling if enabled at compilation time. */
1313 diag = __rte_eth_dev_profile_init(port_id, dev);
1315 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1317 rte_eth_dev_rx_queue_config(dev, 0);
1318 rte_eth_dev_tx_queue_config(dev, 0);
1319 ret = eth_err(port_id, diag);
1326 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1332 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1334 if (dev->data->dev_started) {
1335 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1336 dev->data->port_id);
1340 rte_eth_dev_rx_queue_config(dev, 0);
1341 rte_eth_dev_tx_queue_config(dev, 0);
1343 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1347 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1348 struct rte_eth_dev_info *dev_info)
1350 struct rte_ether_addr *addr;
1355 /* replay MAC address configuration including default MAC */
1356 addr = &dev->data->mac_addrs[0];
1357 if (*dev->dev_ops->mac_addr_set != NULL)
1358 (*dev->dev_ops->mac_addr_set)(dev, addr);
1359 else if (*dev->dev_ops->mac_addr_add != NULL)
1360 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1362 if (*dev->dev_ops->mac_addr_add != NULL) {
1363 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1364 addr = &dev->data->mac_addrs[i];
1366 /* skip zero address */
1367 if (rte_is_zero_ether_addr(addr))
1371 pool_mask = dev->data->mac_pool_sel[i];
1374 if (pool_mask & 1ULL)
1375 (*dev->dev_ops->mac_addr_add)(dev,
1379 } while (pool_mask);
1385 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1386 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1390 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1391 rte_eth_dev_mac_restore(dev, dev_info);
1393 /* replay promiscuous configuration */
1394 if (rte_eth_promiscuous_get(port_id) == 1) {
1395 ret = rte_eth_promiscuous_enable(port_id);
1396 if (ret != 0 && ret != -ENOTSUP) {
1398 "Failed to enable promiscuous mode for device (port %u): %s\n",
1399 port_id, rte_strerror(-ret));
1402 } else if (rte_eth_promiscuous_get(port_id) == 0) {
1403 ret = rte_eth_promiscuous_disable(port_id);
1404 if (ret != 0 && ret != -ENOTSUP) {
1406 "Failed to disable promiscuous mode for device (port %u): %s\n",
1407 port_id, rte_strerror(-ret));
1412 /* replay all multicast configuration */
1413 if (rte_eth_allmulticast_get(port_id) == 1)
1414 rte_eth_allmulticast_enable(port_id);
1415 else if (rte_eth_allmulticast_get(port_id) == 0)
1416 rte_eth_allmulticast_disable(port_id);
1422 rte_eth_dev_start(uint16_t port_id)
1424 struct rte_eth_dev *dev;
1425 struct rte_eth_dev_info dev_info;
1429 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1431 dev = &rte_eth_devices[port_id];
1433 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1435 if (dev->data->dev_started != 0) {
1436 RTE_ETHDEV_LOG(INFO,
1437 "Device with port_id=%"PRIu16" already started\n",
1442 ret = rte_eth_dev_info_get(port_id, &dev_info);
1446 /* Lets restore MAC now if device does not support live change */
1447 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1448 rte_eth_dev_mac_restore(dev, &dev_info);
1450 diag = (*dev->dev_ops->dev_start)(dev);
1452 dev->data->dev_started = 1;
1454 return eth_err(port_id, diag);
1456 ret = rte_eth_dev_config_restore(dev, &dev_info, port_id);
1459 "Error during restoring configuration for device (port %u): %s\n",
1460 port_id, rte_strerror(-ret));
1461 rte_eth_dev_stop(port_id);
1465 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1466 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1467 (*dev->dev_ops->link_update)(dev, 0);
1473 rte_eth_dev_stop(uint16_t port_id)
1475 struct rte_eth_dev *dev;
1477 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1478 dev = &rte_eth_devices[port_id];
1480 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1482 if (dev->data->dev_started == 0) {
1483 RTE_ETHDEV_LOG(INFO,
1484 "Device with port_id=%"PRIu16" already stopped\n",
1489 dev->data->dev_started = 0;
1490 (*dev->dev_ops->dev_stop)(dev);
1494 rte_eth_dev_set_link_up(uint16_t port_id)
1496 struct rte_eth_dev *dev;
1498 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1500 dev = &rte_eth_devices[port_id];
1502 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1503 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1507 rte_eth_dev_set_link_down(uint16_t port_id)
1509 struct rte_eth_dev *dev;
1511 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1513 dev = &rte_eth_devices[port_id];
1515 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1516 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1520 rte_eth_dev_close(uint16_t port_id)
1522 struct rte_eth_dev *dev;
1524 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1525 dev = &rte_eth_devices[port_id];
1527 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1528 dev->data->dev_started = 0;
1529 (*dev->dev_ops->dev_close)(dev);
1531 /* check behaviour flag - temporary for PMD migration */
1532 if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1533 /* new behaviour: send event + reset state + free all data */
1534 rte_eth_dev_release_port(dev);
1537 RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1538 "The driver %s should migrate to the new behaviour.\n",
1539 dev->device->driver->name);
1540 /* old behaviour: only free queue arrays */
1541 dev->data->nb_rx_queues = 0;
1542 rte_free(dev->data->rx_queues);
1543 dev->data->rx_queues = NULL;
1544 dev->data->nb_tx_queues = 0;
1545 rte_free(dev->data->tx_queues);
1546 dev->data->tx_queues = NULL;
1550 rte_eth_dev_reset(uint16_t port_id)
1552 struct rte_eth_dev *dev;
1555 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1556 dev = &rte_eth_devices[port_id];
1558 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1560 rte_eth_dev_stop(port_id);
1561 ret = dev->dev_ops->dev_reset(dev);
1563 return eth_err(port_id, ret);
1567 rte_eth_dev_is_removed(uint16_t port_id)
1569 struct rte_eth_dev *dev;
1572 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1574 dev = &rte_eth_devices[port_id];
1576 if (dev->state == RTE_ETH_DEV_REMOVED)
1579 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1581 ret = dev->dev_ops->is_removed(dev);
1583 /* Device is physically removed. */
1584 dev->state = RTE_ETH_DEV_REMOVED;
1590 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1591 uint16_t nb_rx_desc, unsigned int socket_id,
1592 const struct rte_eth_rxconf *rx_conf,
1593 struct rte_mempool *mp)
1596 uint32_t mbp_buf_size;
1597 struct rte_eth_dev *dev;
1598 struct rte_eth_dev_info dev_info;
1599 struct rte_eth_rxconf local_conf;
1602 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1604 dev = &rte_eth_devices[port_id];
1605 if (rx_queue_id >= dev->data->nb_rx_queues) {
1606 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1611 RTE_ETHDEV_LOG(ERR, "Invalid null mempool pointer\n");
1615 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1618 * Check the size of the mbuf data buffer.
1619 * This value must be provided in the private data of the memory pool.
1620 * First check that the memory pool has a valid private data.
1622 ret = rte_eth_dev_info_get(port_id, &dev_info);
1626 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1627 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1628 mp->name, (int)mp->private_data_size,
1629 (int)sizeof(struct rte_pktmbuf_pool_private));
1632 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1634 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1636 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1637 mp->name, (int)mbp_buf_size,
1638 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1639 (int)RTE_PKTMBUF_HEADROOM,
1640 (int)dev_info.min_rx_bufsize);
1644 /* Use default specified by driver, if nb_rx_desc is zero */
1645 if (nb_rx_desc == 0) {
1646 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1647 /* If driver default is also zero, fall back on EAL default */
1648 if (nb_rx_desc == 0)
1649 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1652 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1653 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1654 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1657 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1658 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1659 dev_info.rx_desc_lim.nb_min,
1660 dev_info.rx_desc_lim.nb_align);
1664 if (dev->data->dev_started &&
1665 !(dev_info.dev_capa &
1666 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1669 if (dev->data->dev_started &&
1670 (dev->data->rx_queue_state[rx_queue_id] !=
1671 RTE_ETH_QUEUE_STATE_STOPPED))
1674 rxq = dev->data->rx_queues;
1675 if (rxq[rx_queue_id]) {
1676 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1678 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1679 rxq[rx_queue_id] = NULL;
1682 if (rx_conf == NULL)
1683 rx_conf = &dev_info.default_rxconf;
1685 local_conf = *rx_conf;
1688 * If an offloading has already been enabled in
1689 * rte_eth_dev_configure(), it has been enabled on all queues,
1690 * so there is no need to enable it in this queue again.
1691 * The local_conf.offloads input to underlying PMD only carries
1692 * those offloadings which are only enabled on this queue and
1693 * not enabled on all queues.
1695 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1698 * New added offloadings for this queue are those not enabled in
1699 * rte_eth_dev_configure() and they must be per-queue type.
1700 * A pure per-port offloading can't be enabled on a queue while
1701 * disabled on another queue. A pure per-port offloading can't
1702 * be enabled for any queue as new added one if it hasn't been
1703 * enabled in rte_eth_dev_configure().
1705 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1706 local_conf.offloads) {
1708 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1709 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1710 port_id, rx_queue_id, local_conf.offloads,
1711 dev_info.rx_queue_offload_capa,
1716 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1717 socket_id, &local_conf, mp);
1719 if (!dev->data->min_rx_buf_size ||
1720 dev->data->min_rx_buf_size > mbp_buf_size)
1721 dev->data->min_rx_buf_size = mbp_buf_size;
1724 return eth_err(port_id, ret);
1728 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1729 uint16_t nb_tx_desc, unsigned int socket_id,
1730 const struct rte_eth_txconf *tx_conf)
1732 struct rte_eth_dev *dev;
1733 struct rte_eth_dev_info dev_info;
1734 struct rte_eth_txconf local_conf;
1738 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1740 dev = &rte_eth_devices[port_id];
1741 if (tx_queue_id >= dev->data->nb_tx_queues) {
1742 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1746 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1748 ret = rte_eth_dev_info_get(port_id, &dev_info);
1752 /* Use default specified by driver, if nb_tx_desc is zero */
1753 if (nb_tx_desc == 0) {
1754 nb_tx_desc = dev_info.default_txportconf.ring_size;
1755 /* If driver default is zero, fall back on EAL default */
1756 if (nb_tx_desc == 0)
1757 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1759 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1760 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1761 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1763 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1764 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1765 dev_info.tx_desc_lim.nb_min,
1766 dev_info.tx_desc_lim.nb_align);
1770 if (dev->data->dev_started &&
1771 !(dev_info.dev_capa &
1772 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1775 if (dev->data->dev_started &&
1776 (dev->data->tx_queue_state[tx_queue_id] !=
1777 RTE_ETH_QUEUE_STATE_STOPPED))
1780 txq = dev->data->tx_queues;
1781 if (txq[tx_queue_id]) {
1782 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1784 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1785 txq[tx_queue_id] = NULL;
1788 if (tx_conf == NULL)
1789 tx_conf = &dev_info.default_txconf;
1791 local_conf = *tx_conf;
1794 * If an offloading has already been enabled in
1795 * rte_eth_dev_configure(), it has been enabled on all queues,
1796 * so there is no need to enable it in this queue again.
1797 * The local_conf.offloads input to underlying PMD only carries
1798 * those offloadings which are only enabled on this queue and
1799 * not enabled on all queues.
1801 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1804 * New added offloadings for this queue are those not enabled in
1805 * rte_eth_dev_configure() and they must be per-queue type.
1806 * A pure per-port offloading can't be enabled on a queue while
1807 * disabled on another queue. A pure per-port offloading can't
1808 * be enabled for any queue as new added one if it hasn't been
1809 * enabled in rte_eth_dev_configure().
1811 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1812 local_conf.offloads) {
1814 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1815 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1816 port_id, tx_queue_id, local_conf.offloads,
1817 dev_info.tx_queue_offload_capa,
1822 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1823 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1827 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1828 void *userdata __rte_unused)
1832 for (i = 0; i < unsent; i++)
1833 rte_pktmbuf_free(pkts[i]);
1837 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1840 uint64_t *count = userdata;
1843 for (i = 0; i < unsent; i++)
1844 rte_pktmbuf_free(pkts[i]);
1850 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1851 buffer_tx_error_fn cbfn, void *userdata)
1853 buffer->error_callback = cbfn;
1854 buffer->error_userdata = userdata;
1859 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1866 buffer->size = size;
1867 if (buffer->error_callback == NULL) {
1868 ret = rte_eth_tx_buffer_set_err_callback(
1869 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1876 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1878 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1881 /* Validate Input Data. Bail if not valid or not supported. */
1882 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1883 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1885 /* Call driver to free pending mbufs. */
1886 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1888 return eth_err(port_id, ret);
1892 rte_eth_promiscuous_enable(uint16_t port_id)
1894 struct rte_eth_dev *dev;
1895 uint8_t old_promiscuous;
1898 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1899 dev = &rte_eth_devices[port_id];
1901 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
1902 old_promiscuous = dev->data->promiscuous;
1903 diag = (*dev->dev_ops->promiscuous_enable)(dev);
1904 dev->data->promiscuous = (diag == 0) ? 1 : old_promiscuous;
1906 return eth_err(port_id, diag);
1910 rte_eth_promiscuous_disable(uint16_t port_id)
1912 struct rte_eth_dev *dev;
1913 uint8_t old_promiscuous;
1916 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1917 dev = &rte_eth_devices[port_id];
1919 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
1920 old_promiscuous = dev->data->promiscuous;
1921 dev->data->promiscuous = 0;
1922 diag = (*dev->dev_ops->promiscuous_disable)(dev);
1924 dev->data->promiscuous = old_promiscuous;
1926 return eth_err(port_id, diag);
1930 rte_eth_promiscuous_get(uint16_t port_id)
1932 struct rte_eth_dev *dev;
1934 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1936 dev = &rte_eth_devices[port_id];
1937 return dev->data->promiscuous;
1941 rte_eth_allmulticast_enable(uint16_t port_id)
1943 struct rte_eth_dev *dev;
1945 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1946 dev = &rte_eth_devices[port_id];
1948 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1949 (*dev->dev_ops->allmulticast_enable)(dev);
1950 dev->data->all_multicast = 1;
1954 rte_eth_allmulticast_disable(uint16_t port_id)
1956 struct rte_eth_dev *dev;
1958 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1959 dev = &rte_eth_devices[port_id];
1961 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1962 dev->data->all_multicast = 0;
1963 (*dev->dev_ops->allmulticast_disable)(dev);
1967 rte_eth_allmulticast_get(uint16_t port_id)
1969 struct rte_eth_dev *dev;
1971 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1973 dev = &rte_eth_devices[port_id];
1974 return dev->data->all_multicast;
1978 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1980 struct rte_eth_dev *dev;
1982 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1983 dev = &rte_eth_devices[port_id];
1985 if (dev->data->dev_conf.intr_conf.lsc &&
1986 dev->data->dev_started)
1987 rte_eth_linkstatus_get(dev, eth_link);
1989 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1990 (*dev->dev_ops->link_update)(dev, 1);
1991 *eth_link = dev->data->dev_link;
1996 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1998 struct rte_eth_dev *dev;
2000 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2001 dev = &rte_eth_devices[port_id];
2003 if (dev->data->dev_conf.intr_conf.lsc &&
2004 dev->data->dev_started)
2005 rte_eth_linkstatus_get(dev, eth_link);
2007 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
2008 (*dev->dev_ops->link_update)(dev, 0);
2009 *eth_link = dev->data->dev_link;
2014 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2016 struct rte_eth_dev *dev;
2018 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2020 dev = &rte_eth_devices[port_id];
2021 memset(stats, 0, sizeof(*stats));
2023 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2024 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2025 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2029 rte_eth_stats_reset(uint16_t port_id)
2031 struct rte_eth_dev *dev;
2033 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2034 dev = &rte_eth_devices[port_id];
2036 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2037 (*dev->dev_ops->stats_reset)(dev);
2038 dev->data->rx_mbuf_alloc_failed = 0;
2044 get_xstats_basic_count(struct rte_eth_dev *dev)
2046 uint16_t nb_rxqs, nb_txqs;
2049 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2050 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2052 count = RTE_NB_STATS;
2053 count += nb_rxqs * RTE_NB_RXQ_STATS;
2054 count += nb_txqs * RTE_NB_TXQ_STATS;
2060 get_xstats_count(uint16_t port_id)
2062 struct rte_eth_dev *dev;
2065 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2066 dev = &rte_eth_devices[port_id];
2067 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2068 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2071 return eth_err(port_id, count);
2073 if (dev->dev_ops->xstats_get_names != NULL) {
2074 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2076 return eth_err(port_id, count);
2081 count += get_xstats_basic_count(dev);
2087 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2090 int cnt_xstats, idx_xstat;
2092 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2095 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2100 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2105 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2106 if (cnt_xstats < 0) {
2107 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2111 /* Get id-name lookup table */
2112 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2114 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2115 port_id, xstats_names, cnt_xstats, NULL)) {
2116 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2120 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2121 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2130 /* retrieve basic stats names */
2132 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2133 struct rte_eth_xstat_name *xstats_names)
2135 int cnt_used_entries = 0;
2136 uint32_t idx, id_queue;
2139 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2140 strlcpy(xstats_names[cnt_used_entries].name,
2141 rte_stats_strings[idx].name,
2142 sizeof(xstats_names[0].name));
2145 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2146 for (id_queue = 0; id_queue < num_q; id_queue++) {
2147 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2148 snprintf(xstats_names[cnt_used_entries].name,
2149 sizeof(xstats_names[0].name),
2151 id_queue, rte_rxq_stats_strings[idx].name);
2156 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2157 for (id_queue = 0; id_queue < num_q; id_queue++) {
2158 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2159 snprintf(xstats_names[cnt_used_entries].name,
2160 sizeof(xstats_names[0].name),
2162 id_queue, rte_txq_stats_strings[idx].name);
2166 return cnt_used_entries;
2169 /* retrieve ethdev extended statistics names */
2171 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2172 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2175 struct rte_eth_xstat_name *xstats_names_copy;
2176 unsigned int no_basic_stat_requested = 1;
2177 unsigned int no_ext_stat_requested = 1;
2178 unsigned int expected_entries;
2179 unsigned int basic_count;
2180 struct rte_eth_dev *dev;
2184 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2185 dev = &rte_eth_devices[port_id];
2187 basic_count = get_xstats_basic_count(dev);
2188 ret = get_xstats_count(port_id);
2191 expected_entries = (unsigned int)ret;
2193 /* Return max number of stats if no ids given */
2196 return expected_entries;
2197 else if (xstats_names && size < expected_entries)
2198 return expected_entries;
2201 if (ids && !xstats_names)
2204 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2205 uint64_t ids_copy[size];
2207 for (i = 0; i < size; i++) {
2208 if (ids[i] < basic_count) {
2209 no_basic_stat_requested = 0;
2214 * Convert ids to xstats ids that PMD knows.
2215 * ids known by user are basic + extended stats.
2217 ids_copy[i] = ids[i] - basic_count;
2220 if (no_basic_stat_requested)
2221 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2222 xstats_names, ids_copy, size);
2225 /* Retrieve all stats */
2227 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2229 if (num_stats < 0 || num_stats > (int)expected_entries)
2232 return expected_entries;
2235 xstats_names_copy = calloc(expected_entries,
2236 sizeof(struct rte_eth_xstat_name));
2238 if (!xstats_names_copy) {
2239 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2244 for (i = 0; i < size; i++) {
2245 if (ids[i] >= basic_count) {
2246 no_ext_stat_requested = 0;
2252 /* Fill xstats_names_copy structure */
2253 if (ids && no_ext_stat_requested) {
2254 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2256 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2259 free(xstats_names_copy);
2265 for (i = 0; i < size; i++) {
2266 if (ids[i] >= expected_entries) {
2267 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2268 free(xstats_names_copy);
2271 xstats_names[i] = xstats_names_copy[ids[i]];
2274 free(xstats_names_copy);
2279 rte_eth_xstats_get_names(uint16_t port_id,
2280 struct rte_eth_xstat_name *xstats_names,
2283 struct rte_eth_dev *dev;
2284 int cnt_used_entries;
2285 int cnt_expected_entries;
2286 int cnt_driver_entries;
2288 cnt_expected_entries = get_xstats_count(port_id);
2289 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2290 (int)size < cnt_expected_entries)
2291 return cnt_expected_entries;
2293 /* port_id checked in get_xstats_count() */
2294 dev = &rte_eth_devices[port_id];
2296 cnt_used_entries = rte_eth_basic_stats_get_names(
2299 if (dev->dev_ops->xstats_get_names != NULL) {
2300 /* If there are any driver-specific xstats, append them
2303 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2305 xstats_names + cnt_used_entries,
2306 size - cnt_used_entries);
2307 if (cnt_driver_entries < 0)
2308 return eth_err(port_id, cnt_driver_entries);
2309 cnt_used_entries += cnt_driver_entries;
2312 return cnt_used_entries;
2317 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2319 struct rte_eth_dev *dev;
2320 struct rte_eth_stats eth_stats;
2321 unsigned int count = 0, i, q;
2322 uint64_t val, *stats_ptr;
2323 uint16_t nb_rxqs, nb_txqs;
2326 ret = rte_eth_stats_get(port_id, ð_stats);
2330 dev = &rte_eth_devices[port_id];
2332 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2333 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2336 for (i = 0; i < RTE_NB_STATS; i++) {
2337 stats_ptr = RTE_PTR_ADD(ð_stats,
2338 rte_stats_strings[i].offset);
2340 xstats[count++].value = val;
2344 for (q = 0; q < nb_rxqs; q++) {
2345 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2346 stats_ptr = RTE_PTR_ADD(ð_stats,
2347 rte_rxq_stats_strings[i].offset +
2348 q * sizeof(uint64_t));
2350 xstats[count++].value = val;
2355 for (q = 0; q < nb_txqs; q++) {
2356 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2357 stats_ptr = RTE_PTR_ADD(ð_stats,
2358 rte_txq_stats_strings[i].offset +
2359 q * sizeof(uint64_t));
2361 xstats[count++].value = val;
2367 /* retrieve ethdev extended statistics */
2369 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2370 uint64_t *values, unsigned int size)
2372 unsigned int no_basic_stat_requested = 1;
2373 unsigned int no_ext_stat_requested = 1;
2374 unsigned int num_xstats_filled;
2375 unsigned int basic_count;
2376 uint16_t expected_entries;
2377 struct rte_eth_dev *dev;
2381 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2382 ret = get_xstats_count(port_id);
2385 expected_entries = (uint16_t)ret;
2386 struct rte_eth_xstat xstats[expected_entries];
2387 dev = &rte_eth_devices[port_id];
2388 basic_count = get_xstats_basic_count(dev);
2390 /* Return max number of stats if no ids given */
2393 return expected_entries;
2394 else if (values && size < expected_entries)
2395 return expected_entries;
2401 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2402 unsigned int basic_count = get_xstats_basic_count(dev);
2403 uint64_t ids_copy[size];
2405 for (i = 0; i < size; i++) {
2406 if (ids[i] < basic_count) {
2407 no_basic_stat_requested = 0;
2412 * Convert ids to xstats ids that PMD knows.
2413 * ids known by user are basic + extended stats.
2415 ids_copy[i] = ids[i] - basic_count;
2418 if (no_basic_stat_requested)
2419 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2424 for (i = 0; i < size; i++) {
2425 if (ids[i] >= basic_count) {
2426 no_ext_stat_requested = 0;
2432 /* Fill the xstats structure */
2433 if (ids && no_ext_stat_requested)
2434 ret = rte_eth_basic_stats_get(port_id, xstats);
2436 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2440 num_xstats_filled = (unsigned int)ret;
2442 /* Return all stats */
2444 for (i = 0; i < num_xstats_filled; i++)
2445 values[i] = xstats[i].value;
2446 return expected_entries;
2450 for (i = 0; i < size; i++) {
2451 if (ids[i] >= expected_entries) {
2452 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2455 values[i] = xstats[ids[i]].value;
2461 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2464 struct rte_eth_dev *dev;
2465 unsigned int count = 0, i;
2466 signed int xcount = 0;
2467 uint16_t nb_rxqs, nb_txqs;
2470 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2472 dev = &rte_eth_devices[port_id];
2474 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2475 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2477 /* Return generic statistics */
2478 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2479 (nb_txqs * RTE_NB_TXQ_STATS);
2481 /* implemented by the driver */
2482 if (dev->dev_ops->xstats_get != NULL) {
2483 /* Retrieve the xstats from the driver at the end of the
2486 xcount = (*dev->dev_ops->xstats_get)(dev,
2487 xstats ? xstats + count : NULL,
2488 (n > count) ? n - count : 0);
2491 return eth_err(port_id, xcount);
2494 if (n < count + xcount || xstats == NULL)
2495 return count + xcount;
2497 /* now fill the xstats structure */
2498 ret = rte_eth_basic_stats_get(port_id, xstats);
2503 for (i = 0; i < count; i++)
2505 /* add an offset to driver-specific stats */
2506 for ( ; i < count + xcount; i++)
2507 xstats[i].id += count;
2509 return count + xcount;
2512 /* reset ethdev extended statistics */
2514 rte_eth_xstats_reset(uint16_t port_id)
2516 struct rte_eth_dev *dev;
2518 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2519 dev = &rte_eth_devices[port_id];
2521 /* implemented by the driver */
2522 if (dev->dev_ops->xstats_reset != NULL) {
2523 (*dev->dev_ops->xstats_reset)(dev);
2527 /* fallback to default */
2528 rte_eth_stats_reset(port_id);
2532 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2535 struct rte_eth_dev *dev;
2537 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2539 dev = &rte_eth_devices[port_id];
2541 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2543 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2546 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2549 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2552 return (*dev->dev_ops->queue_stats_mapping_set)
2553 (dev, queue_id, stat_idx, is_rx);
2558 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2561 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2562 stat_idx, STAT_QMAP_TX));
2567 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2570 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2571 stat_idx, STAT_QMAP_RX));
2575 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2577 struct rte_eth_dev *dev;
2579 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2580 dev = &rte_eth_devices[port_id];
2582 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2583 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2584 fw_version, fw_size));
2588 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2590 struct rte_eth_dev *dev;
2591 const struct rte_eth_desc_lim lim = {
2592 .nb_max = UINT16_MAX,
2595 .nb_seg_max = UINT16_MAX,
2596 .nb_mtu_seg_max = UINT16_MAX,
2601 * Init dev_info before port_id check since caller does not have
2602 * return status and does not know if get is successful or not.
2604 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2606 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2607 dev = &rte_eth_devices[port_id];
2609 dev_info->rx_desc_lim = lim;
2610 dev_info->tx_desc_lim = lim;
2611 dev_info->device = dev->device;
2612 dev_info->min_mtu = RTE_ETHER_MIN_MTU;
2613 dev_info->max_mtu = UINT16_MAX;
2615 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
2616 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2618 /* Cleanup already filled in device information */
2619 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2620 return eth_err(port_id, diag);
2623 dev_info->driver_name = dev->device->driver->name;
2624 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2625 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2627 dev_info->dev_flags = &dev->data->dev_flags;
2633 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2634 uint32_t *ptypes, int num)
2637 struct rte_eth_dev *dev;
2638 const uint32_t *all_ptypes;
2640 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2641 dev = &rte_eth_devices[port_id];
2642 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2643 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2648 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2649 if (all_ptypes[i] & ptype_mask) {
2651 ptypes[j] = all_ptypes[i];
2659 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
2661 struct rte_eth_dev *dev;
2663 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2664 dev = &rte_eth_devices[port_id];
2665 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2670 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2672 struct rte_eth_dev *dev;
2674 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2676 dev = &rte_eth_devices[port_id];
2677 *mtu = dev->data->mtu;
2682 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2685 struct rte_eth_dev_info dev_info;
2686 struct rte_eth_dev *dev;
2688 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2689 dev = &rte_eth_devices[port_id];
2690 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2693 * Check if the device supports dev_infos_get, if it does not
2694 * skip min_mtu/max_mtu validation here as this requires values
2695 * that are populated within the call to rte_eth_dev_info_get()
2696 * which relies on dev->dev_ops->dev_infos_get.
2698 if (*dev->dev_ops->dev_infos_get != NULL) {
2699 ret = rte_eth_dev_info_get(port_id, &dev_info);
2703 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
2707 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2709 dev->data->mtu = mtu;
2711 return eth_err(port_id, ret);
2715 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2717 struct rte_eth_dev *dev;
2720 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2721 dev = &rte_eth_devices[port_id];
2722 if (!(dev->data->dev_conf.rxmode.offloads &
2723 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2724 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2729 if (vlan_id > 4095) {
2730 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2734 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2736 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2738 struct rte_vlan_filter_conf *vfc;
2742 vfc = &dev->data->vlan_filter_conf;
2743 vidx = vlan_id / 64;
2744 vbit = vlan_id % 64;
2747 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2749 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2752 return eth_err(port_id, ret);
2756 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2759 struct rte_eth_dev *dev;
2761 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2762 dev = &rte_eth_devices[port_id];
2763 if (rx_queue_id >= dev->data->nb_rx_queues) {
2764 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2768 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2769 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2775 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2776 enum rte_vlan_type vlan_type,
2779 struct rte_eth_dev *dev;
2781 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2782 dev = &rte_eth_devices[port_id];
2783 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2785 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2790 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2792 struct rte_eth_dev *dev;
2796 uint64_t orig_offloads;
2797 uint64_t *dev_offloads;
2799 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2800 dev = &rte_eth_devices[port_id];
2802 /* save original values in case of failure */
2803 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2804 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
2806 /*check which option changed by application*/
2807 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2808 org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
2811 *dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
2813 *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
2814 mask |= ETH_VLAN_STRIP_MASK;
2817 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2818 org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
2821 *dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
2823 *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
2824 mask |= ETH_VLAN_FILTER_MASK;
2827 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2828 org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
2831 *dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
2833 *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2834 mask |= ETH_VLAN_EXTEND_MASK;
2837 cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
2838 org = !!(*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
2841 *dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
2843 *dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
2844 mask |= ETH_QINQ_STRIP_MASK;
2851 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2852 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2854 /* hit an error restore original values */
2855 *dev_offloads = orig_offloads;
2858 return eth_err(port_id, ret);
2862 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2864 struct rte_eth_dev *dev;
2865 uint64_t *dev_offloads;
2868 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2869 dev = &rte_eth_devices[port_id];
2870 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
2872 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
2873 ret |= ETH_VLAN_STRIP_OFFLOAD;
2875 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
2876 ret |= ETH_VLAN_FILTER_OFFLOAD;
2878 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
2879 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2881 if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
2882 ret |= DEV_RX_OFFLOAD_QINQ_STRIP;
2888 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2890 struct rte_eth_dev *dev;
2892 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2893 dev = &rte_eth_devices[port_id];
2894 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2896 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2900 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2902 struct rte_eth_dev *dev;
2904 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2905 dev = &rte_eth_devices[port_id];
2906 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2907 memset(fc_conf, 0, sizeof(*fc_conf));
2908 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2912 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2914 struct rte_eth_dev *dev;
2916 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2917 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2918 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
2922 dev = &rte_eth_devices[port_id];
2923 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2924 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2928 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2929 struct rte_eth_pfc_conf *pfc_conf)
2931 struct rte_eth_dev *dev;
2933 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2934 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2935 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
2939 dev = &rte_eth_devices[port_id];
2940 /* High water, low water validation are device specific */
2941 if (*dev->dev_ops->priority_flow_ctrl_set)
2942 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2948 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2956 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2957 for (i = 0; i < num; i++) {
2958 if (reta_conf[i].mask)
2966 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2970 uint16_t i, idx, shift;
2976 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
2980 for (i = 0; i < reta_size; i++) {
2981 idx = i / RTE_RETA_GROUP_SIZE;
2982 shift = i % RTE_RETA_GROUP_SIZE;
2983 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2984 (reta_conf[idx].reta[shift] >= max_rxq)) {
2986 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
2988 reta_conf[idx].reta[shift], max_rxq);
2997 rte_eth_dev_rss_reta_update(uint16_t port_id,
2998 struct rte_eth_rss_reta_entry64 *reta_conf,
3001 struct rte_eth_dev *dev;
3004 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3005 /* Check mask bits */
3006 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3010 dev = &rte_eth_devices[port_id];
3012 /* Check entry value */
3013 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
3014 dev->data->nb_rx_queues);
3018 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
3019 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
3024 rte_eth_dev_rss_reta_query(uint16_t port_id,
3025 struct rte_eth_rss_reta_entry64 *reta_conf,
3028 struct rte_eth_dev *dev;
3031 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3033 /* Check mask bits */
3034 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3038 dev = &rte_eth_devices[port_id];
3039 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
3040 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
3045 rte_eth_dev_rss_hash_update(uint16_t port_id,
3046 struct rte_eth_rss_conf *rss_conf)
3048 struct rte_eth_dev *dev;
3049 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
3052 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3054 ret = rte_eth_dev_info_get(port_id, &dev_info);
3058 dev = &rte_eth_devices[port_id];
3059 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
3060 dev_info.flow_type_rss_offloads) {
3062 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
3063 port_id, rss_conf->rss_hf,
3064 dev_info.flow_type_rss_offloads);
3067 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
3068 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
3073 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
3074 struct rte_eth_rss_conf *rss_conf)
3076 struct rte_eth_dev *dev;
3078 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3079 dev = &rte_eth_devices[port_id];
3080 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
3081 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
3086 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
3087 struct rte_eth_udp_tunnel *udp_tunnel)
3089 struct rte_eth_dev *dev;
3091 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3092 if (udp_tunnel == NULL) {
3093 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3097 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3098 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3102 dev = &rte_eth_devices[port_id];
3103 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
3104 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
3109 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
3110 struct rte_eth_udp_tunnel *udp_tunnel)
3112 struct rte_eth_dev *dev;
3114 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3115 dev = &rte_eth_devices[port_id];
3117 if (udp_tunnel == NULL) {
3118 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3122 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3123 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3127 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3128 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3133 rte_eth_led_on(uint16_t port_id)
3135 struct rte_eth_dev *dev;
3137 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3138 dev = &rte_eth_devices[port_id];
3139 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3140 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3144 rte_eth_led_off(uint16_t port_id)
3146 struct rte_eth_dev *dev;
3148 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3149 dev = &rte_eth_devices[port_id];
3150 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3151 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3155 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3159 get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3161 struct rte_eth_dev_info dev_info;
3162 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3166 ret = rte_eth_dev_info_get(port_id, &dev_info);
3170 for (i = 0; i < dev_info.max_mac_addrs; i++)
3171 if (memcmp(addr, &dev->data->mac_addrs[i],
3172 RTE_ETHER_ADDR_LEN) == 0)
3178 static const struct rte_ether_addr null_mac_addr;
3181 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
3184 struct rte_eth_dev *dev;
3189 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3190 dev = &rte_eth_devices[port_id];
3191 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3193 if (rte_is_zero_ether_addr(addr)) {
3194 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3198 if (pool >= ETH_64_POOLS) {
3199 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3203 index = get_mac_addr_index(port_id, addr);
3205 index = get_mac_addr_index(port_id, &null_mac_addr);
3207 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3212 pool_mask = dev->data->mac_pool_sel[index];
3214 /* Check if both MAC address and pool is already there, and do nothing */
3215 if (pool_mask & (1ULL << pool))
3220 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3223 /* Update address in NIC data structure */
3224 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3226 /* Update pool bitmap in NIC data structure */
3227 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3230 return eth_err(port_id, ret);
3234 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
3236 struct rte_eth_dev *dev;
3239 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3240 dev = &rte_eth_devices[port_id];
3241 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3243 index = get_mac_addr_index(port_id, addr);
3246 "Port %u: Cannot remove default MAC address\n",
3249 } else if (index < 0)
3250 return 0; /* Do nothing if address wasn't found */
3253 (*dev->dev_ops->mac_addr_remove)(dev, index);
3255 /* Update address in NIC data structure */
3256 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3258 /* reset pool bitmap */
3259 dev->data->mac_pool_sel[index] = 0;
3265 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
3267 struct rte_eth_dev *dev;
3270 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3272 if (!rte_is_valid_assigned_ether_addr(addr))
3275 dev = &rte_eth_devices[port_id];
3276 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3278 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3282 /* Update default address in NIC data structure */
3283 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3290 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3294 get_hash_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3296 struct rte_eth_dev_info dev_info;
3297 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3301 ret = rte_eth_dev_info_get(port_id, &dev_info);
3305 if (!dev->data->hash_mac_addrs)
3308 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3309 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3310 RTE_ETHER_ADDR_LEN) == 0)
3317 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
3322 struct rte_eth_dev *dev;
3324 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3326 dev = &rte_eth_devices[port_id];
3327 if (rte_is_zero_ether_addr(addr)) {
3328 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3333 index = get_hash_mac_addr_index(port_id, addr);
3334 /* Check if it's already there, and do nothing */
3335 if ((index >= 0) && on)
3341 "Port %u: the MAC address was not set in UTA\n",
3346 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3348 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3354 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3355 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3357 /* Update address in NIC data structure */
3359 rte_ether_addr_copy(addr,
3360 &dev->data->hash_mac_addrs[index]);
3362 rte_ether_addr_copy(&null_mac_addr,
3363 &dev->data->hash_mac_addrs[index]);
3366 return eth_err(port_id, ret);
3370 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3372 struct rte_eth_dev *dev;
3374 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3376 dev = &rte_eth_devices[port_id];
3378 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3379 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3383 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3386 struct rte_eth_dev *dev;
3387 struct rte_eth_dev_info dev_info;
3388 struct rte_eth_link link;
3391 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3393 ret = rte_eth_dev_info_get(port_id, &dev_info);
3397 dev = &rte_eth_devices[port_id];
3398 link = dev->data->dev_link;
3400 if (queue_idx > dev_info.max_tx_queues) {
3402 "Set queue rate limit:port %u: invalid queue id=%u\n",
3403 port_id, queue_idx);
3407 if (tx_rate > link.link_speed) {
3409 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3410 tx_rate, link.link_speed);
3414 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3415 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3416 queue_idx, tx_rate));
3420 rte_eth_mirror_rule_set(uint16_t port_id,
3421 struct rte_eth_mirror_conf *mirror_conf,
3422 uint8_t rule_id, uint8_t on)
3424 struct rte_eth_dev *dev;
3426 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3427 if (mirror_conf->rule_type == 0) {
3428 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3432 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3433 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3438 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3439 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3440 (mirror_conf->pool_mask == 0)) {
3442 "Invalid mirror pool, pool mask can not be 0\n");
3446 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3447 mirror_conf->vlan.vlan_mask == 0) {
3449 "Invalid vlan mask, vlan mask can not be 0\n");
3453 dev = &rte_eth_devices[port_id];
3454 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3456 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3457 mirror_conf, rule_id, on));
3461 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3463 struct rte_eth_dev *dev;
3465 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3467 dev = &rte_eth_devices[port_id];
3468 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3470 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3474 RTE_INIT(eth_dev_init_cb_lists)
3478 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3479 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3483 rte_eth_dev_callback_register(uint16_t port_id,
3484 enum rte_eth_event_type event,
3485 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3487 struct rte_eth_dev *dev;
3488 struct rte_eth_dev_callback *user_cb;
3489 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3495 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3496 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3500 if (port_id == RTE_ETH_ALL) {
3502 last_port = RTE_MAX_ETHPORTS - 1;
3504 next_port = last_port = port_id;
3507 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3510 dev = &rte_eth_devices[next_port];
3512 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3513 if (user_cb->cb_fn == cb_fn &&
3514 user_cb->cb_arg == cb_arg &&
3515 user_cb->event == event) {
3520 /* create a new callback. */
3521 if (user_cb == NULL) {
3522 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3523 sizeof(struct rte_eth_dev_callback), 0);
3524 if (user_cb != NULL) {
3525 user_cb->cb_fn = cb_fn;
3526 user_cb->cb_arg = cb_arg;
3527 user_cb->event = event;
3528 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3531 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3532 rte_eth_dev_callback_unregister(port_id, event,
3538 } while (++next_port <= last_port);
3540 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3545 rte_eth_dev_callback_unregister(uint16_t port_id,
3546 enum rte_eth_event_type event,
3547 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3550 struct rte_eth_dev *dev;
3551 struct rte_eth_dev_callback *cb, *next;
3552 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3558 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3559 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3563 if (port_id == RTE_ETH_ALL) {
3565 last_port = RTE_MAX_ETHPORTS - 1;
3567 next_port = last_port = port_id;
3570 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3573 dev = &rte_eth_devices[next_port];
3575 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3578 next = TAILQ_NEXT(cb, next);
3580 if (cb->cb_fn != cb_fn || cb->event != event ||
3581 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3585 * if this callback is not executing right now,
3588 if (cb->active == 0) {
3589 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3595 } while (++next_port <= last_port);
3597 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3602 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3603 enum rte_eth_event_type event, void *ret_param)
3605 struct rte_eth_dev_callback *cb_lst;
3606 struct rte_eth_dev_callback dev_cb;
3609 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3610 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3611 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3615 if (ret_param != NULL)
3616 dev_cb.ret_param = ret_param;
3618 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3619 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3620 dev_cb.cb_arg, dev_cb.ret_param);
3621 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3624 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3629 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3634 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3636 dev->state = RTE_ETH_DEV_ATTACHED;
3640 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3643 struct rte_eth_dev *dev;
3644 struct rte_intr_handle *intr_handle;
3648 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3650 dev = &rte_eth_devices[port_id];
3652 if (!dev->intr_handle) {
3653 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3657 intr_handle = dev->intr_handle;
3658 if (!intr_handle->intr_vec) {
3659 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3663 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3664 vec = intr_handle->intr_vec[qid];
3665 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3666 if (rc && rc != -EEXIST) {
3668 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3669 port_id, qid, op, epfd, vec);
3677 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
3679 struct rte_intr_handle *intr_handle;
3680 struct rte_eth_dev *dev;
3681 unsigned int efd_idx;
3685 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
3687 dev = &rte_eth_devices[port_id];
3689 if (queue_id >= dev->data->nb_rx_queues) {
3690 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3694 if (!dev->intr_handle) {
3695 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3699 intr_handle = dev->intr_handle;
3700 if (!intr_handle->intr_vec) {
3701 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3705 vec = intr_handle->intr_vec[queue_id];
3706 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
3707 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
3708 fd = intr_handle->efds[efd_idx];
3713 const struct rte_memzone *
3714 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3715 uint16_t queue_id, size_t size, unsigned align,
3718 char z_name[RTE_MEMZONE_NAMESIZE];
3719 const struct rte_memzone *mz;
3722 rc = snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
3723 dev->data->port_id, queue_id, ring_name);
3724 if (rc >= RTE_MEMZONE_NAMESIZE) {
3725 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
3726 rte_errno = ENAMETOOLONG;
3730 mz = rte_memzone_lookup(z_name);
3734 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3735 RTE_MEMZONE_IOVA_CONTIG, align);
3739 rte_eth_dev_create(struct rte_device *device, const char *name,
3740 size_t priv_data_size,
3741 ethdev_bus_specific_init ethdev_bus_specific_init,
3742 void *bus_init_params,
3743 ethdev_init_t ethdev_init, void *init_params)
3745 struct rte_eth_dev *ethdev;
3748 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3750 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3751 ethdev = rte_eth_dev_allocate(name);
3755 if (priv_data_size) {
3756 ethdev->data->dev_private = rte_zmalloc_socket(
3757 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3760 if (!ethdev->data->dev_private) {
3761 RTE_LOG(ERR, EAL, "failed to allocate private data");
3767 ethdev = rte_eth_dev_attach_secondary(name);
3769 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3770 "ethdev doesn't exist");
3775 ethdev->device = device;
3777 if (ethdev_bus_specific_init) {
3778 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3781 "ethdev bus specific initialisation failed");
3786 retval = ethdev_init(ethdev, init_params);
3788 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3792 rte_eth_dev_probing_finish(ethdev);
3797 rte_eth_dev_release_port(ethdev);
3802 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3803 ethdev_uninit_t ethdev_uninit)
3807 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3811 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3813 ret = ethdev_uninit(ethdev);
3817 return rte_eth_dev_release_port(ethdev);
3821 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3822 int epfd, int op, void *data)
3825 struct rte_eth_dev *dev;
3826 struct rte_intr_handle *intr_handle;
3829 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3831 dev = &rte_eth_devices[port_id];
3832 if (queue_id >= dev->data->nb_rx_queues) {
3833 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3837 if (!dev->intr_handle) {
3838 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3842 intr_handle = dev->intr_handle;
3843 if (!intr_handle->intr_vec) {
3844 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3848 vec = intr_handle->intr_vec[queue_id];
3849 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3850 if (rc && rc != -EEXIST) {
3852 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3853 port_id, queue_id, op, epfd, vec);
3861 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3864 struct rte_eth_dev *dev;
3866 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3868 dev = &rte_eth_devices[port_id];
3870 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3871 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3876 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3879 struct rte_eth_dev *dev;
3881 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3883 dev = &rte_eth_devices[port_id];
3885 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3886 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3892 rte_eth_dev_filter_supported(uint16_t port_id,
3893 enum rte_filter_type filter_type)
3895 struct rte_eth_dev *dev;
3897 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3899 dev = &rte_eth_devices[port_id];
3900 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3901 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3902 RTE_ETH_FILTER_NOP, NULL);
3906 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3907 enum rte_filter_op filter_op, void *arg)
3909 struct rte_eth_dev *dev;
3911 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3913 dev = &rte_eth_devices[port_id];
3914 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3915 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3919 const struct rte_eth_rxtx_callback *
3920 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3921 rte_rx_callback_fn fn, void *user_param)
3923 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3924 rte_errno = ENOTSUP;
3927 /* check input parameters */
3928 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3929 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3933 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3941 cb->param = user_param;
3943 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3944 /* Add the callbacks in fifo order. */
3945 struct rte_eth_rxtx_callback *tail =
3946 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3949 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3956 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3961 const struct rte_eth_rxtx_callback *
3962 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3963 rte_rx_callback_fn fn, void *user_param)
3965 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3966 rte_errno = ENOTSUP;
3969 /* check input parameters */
3970 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3971 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3976 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3984 cb->param = user_param;
3986 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3987 /* Add the callbacks at fisrt position*/
3988 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3990 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3991 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3996 const struct rte_eth_rxtx_callback *
3997 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3998 rte_tx_callback_fn fn, void *user_param)
4000 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4001 rte_errno = ENOTSUP;
4004 /* check input parameters */
4005 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4006 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
4011 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4019 cb->param = user_param;
4021 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4022 /* Add the callbacks in fifo order. */
4023 struct rte_eth_rxtx_callback *tail =
4024 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
4027 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
4034 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4040 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4041 const struct rte_eth_rxtx_callback *user_cb)
4043 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4046 /* Check input parameters. */
4047 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4048 if (user_cb == NULL ||
4049 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
4052 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4053 struct rte_eth_rxtx_callback *cb;
4054 struct rte_eth_rxtx_callback **prev_cb;
4057 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4058 prev_cb = &dev->post_rx_burst_cbs[queue_id];
4059 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4061 if (cb == user_cb) {
4062 /* Remove the user cb from the callback list. */
4063 *prev_cb = cb->next;
4068 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4074 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4075 const struct rte_eth_rxtx_callback *user_cb)
4077 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4080 /* Check input parameters. */
4081 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4082 if (user_cb == NULL ||
4083 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
4086 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4088 struct rte_eth_rxtx_callback *cb;
4089 struct rte_eth_rxtx_callback **prev_cb;
4091 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4092 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4093 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4095 if (cb == user_cb) {
4096 /* Remove the user cb from the callback list. */
4097 *prev_cb = cb->next;
4102 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4108 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4109 struct rte_eth_rxq_info *qinfo)
4111 struct rte_eth_dev *dev;
4113 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4118 dev = &rte_eth_devices[port_id];
4119 if (queue_id >= dev->data->nb_rx_queues) {
4120 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4124 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
4126 memset(qinfo, 0, sizeof(*qinfo));
4127 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4132 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4133 struct rte_eth_txq_info *qinfo)
4135 struct rte_eth_dev *dev;
4137 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4142 dev = &rte_eth_devices[port_id];
4143 if (queue_id >= dev->data->nb_tx_queues) {
4144 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4148 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4150 memset(qinfo, 0, sizeof(*qinfo));
4151 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4157 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4158 struct rte_ether_addr *mc_addr_set,
4159 uint32_t nb_mc_addr)
4161 struct rte_eth_dev *dev;
4163 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4165 dev = &rte_eth_devices[port_id];
4166 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4167 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4168 mc_addr_set, nb_mc_addr));
4172 rte_eth_timesync_enable(uint16_t port_id)
4174 struct rte_eth_dev *dev;
4176 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4177 dev = &rte_eth_devices[port_id];
4179 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4180 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4184 rte_eth_timesync_disable(uint16_t port_id)
4186 struct rte_eth_dev *dev;
4188 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4189 dev = &rte_eth_devices[port_id];
4191 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4192 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4196 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4199 struct rte_eth_dev *dev;
4201 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4202 dev = &rte_eth_devices[port_id];
4204 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4205 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4206 (dev, timestamp, flags));
4210 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4211 struct timespec *timestamp)
4213 struct rte_eth_dev *dev;
4215 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4216 dev = &rte_eth_devices[port_id];
4218 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4219 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4224 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4226 struct rte_eth_dev *dev;
4228 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4229 dev = &rte_eth_devices[port_id];
4231 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4232 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4237 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4239 struct rte_eth_dev *dev;
4241 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4242 dev = &rte_eth_devices[port_id];
4244 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4245 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4250 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4252 struct rte_eth_dev *dev;
4254 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4255 dev = &rte_eth_devices[port_id];
4257 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4258 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4263 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
4265 struct rte_eth_dev *dev;
4267 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4268 dev = &rte_eth_devices[port_id];
4270 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
4271 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
4275 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4277 struct rte_eth_dev *dev;
4279 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4281 dev = &rte_eth_devices[port_id];
4282 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4283 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4287 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4289 struct rte_eth_dev *dev;
4291 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4293 dev = &rte_eth_devices[port_id];
4294 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4295 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4299 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4301 struct rte_eth_dev *dev;
4303 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4305 dev = &rte_eth_devices[port_id];
4306 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4307 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4311 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4313 struct rte_eth_dev *dev;
4315 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4317 dev = &rte_eth_devices[port_id];
4318 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4319 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4323 rte_eth_dev_get_module_info(uint16_t port_id,
4324 struct rte_eth_dev_module_info *modinfo)
4326 struct rte_eth_dev *dev;
4328 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4330 dev = &rte_eth_devices[port_id];
4331 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4332 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4336 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4337 struct rte_dev_eeprom_info *info)
4339 struct rte_eth_dev *dev;
4341 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4343 dev = &rte_eth_devices[port_id];
4344 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4345 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4349 rte_eth_dev_get_dcb_info(uint16_t port_id,
4350 struct rte_eth_dcb_info *dcb_info)
4352 struct rte_eth_dev *dev;
4354 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4356 dev = &rte_eth_devices[port_id];
4357 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4359 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4360 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4364 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4365 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4367 struct rte_eth_dev *dev;
4369 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4370 if (l2_tunnel == NULL) {
4371 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4375 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4376 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4380 dev = &rte_eth_devices[port_id];
4381 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4383 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4388 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4389 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4393 struct rte_eth_dev *dev;
4395 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4397 if (l2_tunnel == NULL) {
4398 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4402 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4403 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4408 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4412 dev = &rte_eth_devices[port_id];
4413 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4415 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4416 l2_tunnel, mask, en));
4420 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4421 const struct rte_eth_desc_lim *desc_lim)
4423 if (desc_lim->nb_align != 0)
4424 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4426 if (desc_lim->nb_max != 0)
4427 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4429 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4433 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4434 uint16_t *nb_rx_desc,
4435 uint16_t *nb_tx_desc)
4437 struct rte_eth_dev_info dev_info;
4440 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4442 ret = rte_eth_dev_info_get(port_id, &dev_info);
4446 if (nb_rx_desc != NULL)
4447 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4449 if (nb_tx_desc != NULL)
4450 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4456 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4458 struct rte_eth_dev *dev;
4460 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4465 dev = &rte_eth_devices[port_id];
4467 if (*dev->dev_ops->pool_ops_supported == NULL)
4468 return 1; /* all pools are supported */
4470 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4474 * A set of values to describe the possible states of a switch domain.
4476 enum rte_eth_switch_domain_state {
4477 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4478 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4482 * Array of switch domains available for allocation. Array is sized to
4483 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4484 * ethdev ports in a single process.
4486 static struct rte_eth_dev_switch {
4487 enum rte_eth_switch_domain_state state;
4488 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4491 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4495 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4497 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4498 i < RTE_MAX_ETHPORTS; i++) {
4499 if (rte_eth_switch_domains[i].state ==
4500 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4501 rte_eth_switch_domains[i].state =
4502 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4512 rte_eth_switch_domain_free(uint16_t domain_id)
4514 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4515 domain_id >= RTE_MAX_ETHPORTS)
4518 if (rte_eth_switch_domains[domain_id].state !=
4519 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4522 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4528 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4531 struct rte_kvargs_pair *pair;
4534 arglist->str = strdup(str_in);
4535 if (arglist->str == NULL)
4538 letter = arglist->str;
4541 pair = &arglist->pairs[0];
4544 case 0: /* Initial */
4547 else if (*letter == '\0')
4554 case 1: /* Parsing key */
4555 if (*letter == '=') {
4557 pair->value = letter + 1;
4559 } else if (*letter == ',' || *letter == '\0')
4564 case 2: /* Parsing value */
4567 else if (*letter == ',') {
4570 pair = &arglist->pairs[arglist->count];
4572 } else if (*letter == '\0') {
4575 pair = &arglist->pairs[arglist->count];
4580 case 3: /* Parsing list */
4583 else if (*letter == '\0')
4592 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4594 struct rte_kvargs args;
4595 struct rte_kvargs_pair *pair;
4599 memset(eth_da, 0, sizeof(*eth_da));
4601 result = rte_eth_devargs_tokenise(&args, dargs);
4605 for (i = 0; i < args.count; i++) {
4606 pair = &args.pairs[i];
4607 if (strcmp("representor", pair->key) == 0) {
4608 result = rte_eth_devargs_parse_list(pair->value,
4609 rte_eth_devargs_parse_representor_ports,
4623 RTE_INIT(ethdev_init_log)
4625 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4626 if (rte_eth_dev_logtype >= 0)
4627 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);