1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
15 #include <netinet/in.h>
17 #include <rte_byteorder.h>
19 #include <rte_debug.h>
20 #include <rte_interrupts.h>
21 #include <rte_memory.h>
22 #include <rte_memcpy.h>
23 #include <rte_memzone.h>
24 #include <rte_launch.h>
26 #include <rte_per_lcore.h>
27 #include <rte_lcore.h>
28 #include <rte_atomic.h>
29 #include <rte_branch_prediction.h>
30 #include <rte_common.h>
31 #include <rte_mempool.h>
32 #include <rte_malloc.h>
34 #include <rte_errno.h>
35 #include <rte_spinlock.h>
36 #include <rte_string_fns.h>
37 #include <rte_kvargs.h>
39 #include "rte_ether.h"
40 #include "rte_ethdev.h"
41 #include "rte_ethdev_driver.h"
42 #include "ethdev_profile.h"
44 static int ethdev_logtype;
46 #define ethdev_log(level, fmt, ...) \
47 rte_log(RTE_LOG_ ## level, ethdev_logtype, fmt "\n", ## __VA_ARGS__)
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
51 static uint8_t eth_dev_last_created_port;
53 /* spinlock for eth device callbacks */
54 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
56 /* spinlock for add/remove rx callbacks */
57 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
59 /* spinlock for add/remove tx callbacks */
60 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
62 /* spinlock for shared data allocation */
63 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
65 /* store statistics names and its offset in stats structure */
66 struct rte_eth_xstats_name_off {
67 char name[RTE_ETH_XSTATS_NAME_SIZE];
71 /* Shared memory between primary and secondary processes. */
73 uint64_t next_owner_id;
74 rte_spinlock_t ownership_lock;
75 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
76 } *rte_eth_dev_shared_data;
78 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
79 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
80 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
81 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
82 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
83 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
84 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
85 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
86 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
90 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
92 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
93 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
94 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
95 {"errors", offsetof(struct rte_eth_stats, q_errors)},
98 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
99 sizeof(rte_rxq_stats_strings[0]))
101 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
102 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
103 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
105 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
106 sizeof(rte_txq_stats_strings[0]))
108 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
109 { DEV_RX_OFFLOAD_##_name, #_name }
111 static const struct {
114 } rte_rx_offload_names[] = {
115 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
116 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
119 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
120 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
121 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
122 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
123 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
125 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
126 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
127 RTE_RX_OFFLOAD_BIT2STR(CRC_STRIP),
128 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
129 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
130 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
133 #undef RTE_RX_OFFLOAD_BIT2STR
135 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
136 { DEV_TX_OFFLOAD_##_name, #_name }
138 static const struct {
141 } rte_tx_offload_names[] = {
142 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
143 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
150 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
151 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
156 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
157 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
158 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
159 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
162 #undef RTE_TX_OFFLOAD_BIT2STR
165 * The user application callback description.
167 * It contains callback address to be registered by user application,
168 * the pointer to the parameters for callback, and the event type.
170 struct rte_eth_dev_callback {
171 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
172 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
173 void *cb_arg; /**< Parameter for callback */
174 void *ret_param; /**< Return parameter */
175 enum rte_eth_event_type event; /**< Interrupt event type */
176 uint32_t active; /**< Callback is executing */
185 rte_eth_find_next(uint16_t port_id)
187 while (port_id < RTE_MAX_ETHPORTS &&
188 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
189 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
192 if (port_id >= RTE_MAX_ETHPORTS)
193 return RTE_MAX_ETHPORTS;
199 rte_eth_dev_shared_data_prepare(void)
201 const unsigned flags = 0;
202 const struct rte_memzone *mz;
204 rte_spinlock_lock(&rte_eth_shared_data_lock);
206 if (rte_eth_dev_shared_data == NULL) {
207 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
208 /* Allocate port data and ownership shared memory. */
209 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
210 sizeof(*rte_eth_dev_shared_data),
211 rte_socket_id(), flags);
213 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
215 rte_panic("Cannot allocate ethdev shared data\n");
217 rte_eth_dev_shared_data = mz->addr;
218 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
219 rte_eth_dev_shared_data->next_owner_id =
220 RTE_ETH_DEV_NO_OWNER + 1;
221 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
222 memset(rte_eth_dev_shared_data->data, 0,
223 sizeof(rte_eth_dev_shared_data->data));
227 rte_spinlock_unlock(&rte_eth_shared_data_lock);
231 rte_eth_dev_allocated(const char *name)
235 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
236 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
237 strcmp(rte_eth_devices[i].data->name, name) == 0)
238 return &rte_eth_devices[i];
244 rte_eth_dev_find_free_port(void)
248 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
249 /* Using shared name field to find a free port. */
250 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
251 RTE_ASSERT(rte_eth_devices[i].state ==
256 return RTE_MAX_ETHPORTS;
259 static struct rte_eth_dev *
260 eth_dev_get(uint16_t port_id)
262 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
264 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
265 eth_dev->state = RTE_ETH_DEV_ATTACHED;
267 eth_dev_last_created_port = port_id;
273 rte_eth_dev_allocate(const char *name)
276 struct rte_eth_dev *eth_dev = NULL;
278 rte_eth_dev_shared_data_prepare();
280 /* Synchronize port creation between primary and secondary threads. */
281 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
283 port_id = rte_eth_dev_find_free_port();
284 if (port_id == RTE_MAX_ETHPORTS) {
285 ethdev_log(ERR, "Reached maximum number of Ethernet ports");
289 if (rte_eth_dev_allocated(name) != NULL) {
291 "Ethernet Device with name %s already allocated!",
296 eth_dev = eth_dev_get(port_id);
297 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
298 eth_dev->data->port_id = port_id;
299 eth_dev->data->mtu = ETHER_MTU;
302 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
305 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_NEW, NULL);
311 * Attach to a port already registered by the primary process, which
312 * makes sure that the same device would have the same port id both
313 * in the primary and secondary process.
316 rte_eth_dev_attach_secondary(const char *name)
319 struct rte_eth_dev *eth_dev = NULL;
321 rte_eth_dev_shared_data_prepare();
323 /* Synchronize port attachment to primary port creation and release. */
324 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
326 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
327 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
330 if (i == RTE_MAX_ETHPORTS) {
332 "device %s is not driven by the primary process\n",
335 eth_dev = eth_dev_get(i);
336 RTE_ASSERT(eth_dev->data->port_id == i);
339 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
344 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
349 rte_eth_dev_shared_data_prepare();
351 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
353 eth_dev->state = RTE_ETH_DEV_UNUSED;
355 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
357 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
359 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
365 rte_eth_dev_is_valid_port(uint16_t port_id)
367 if (port_id >= RTE_MAX_ETHPORTS ||
368 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
375 rte_eth_is_valid_owner_id(uint64_t owner_id)
377 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
378 rte_eth_dev_shared_data->next_owner_id <= owner_id) {
379 RTE_PMD_DEBUG_TRACE("Invalid owner_id=%016lX.\n", owner_id);
386 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
388 while (port_id < RTE_MAX_ETHPORTS &&
389 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
390 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
391 rte_eth_devices[port_id].data->owner.id != owner_id))
394 if (port_id >= RTE_MAX_ETHPORTS)
395 return RTE_MAX_ETHPORTS;
400 int __rte_experimental
401 rte_eth_dev_owner_new(uint64_t *owner_id)
403 rte_eth_dev_shared_data_prepare();
405 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
407 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
409 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
414 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
415 const struct rte_eth_dev_owner *new_owner)
417 struct rte_eth_dev_owner *port_owner;
420 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
422 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
423 !rte_eth_is_valid_owner_id(old_owner_id))
426 port_owner = &rte_eth_devices[port_id].data->owner;
427 if (port_owner->id != old_owner_id) {
428 RTE_PMD_DEBUG_TRACE("Cannot set owner to port %d already owned"
429 " by %s_%016lX.\n", port_id,
430 port_owner->name, port_owner->id);
434 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
436 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
437 RTE_PMD_DEBUG_TRACE("Port %d owner name was truncated.\n",
440 port_owner->id = new_owner->id;
442 RTE_PMD_DEBUG_TRACE("Port %d owner is %s_%016lX.\n", port_id,
443 new_owner->name, new_owner->id);
448 int __rte_experimental
449 rte_eth_dev_owner_set(const uint16_t port_id,
450 const struct rte_eth_dev_owner *owner)
454 rte_eth_dev_shared_data_prepare();
456 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
458 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
460 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
464 int __rte_experimental
465 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
467 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
468 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
471 rte_eth_dev_shared_data_prepare();
473 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
475 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
477 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
481 void __rte_experimental
482 rte_eth_dev_owner_delete(const uint64_t owner_id)
486 rte_eth_dev_shared_data_prepare();
488 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
490 if (rte_eth_is_valid_owner_id(owner_id)) {
491 RTE_ETH_FOREACH_DEV_OWNED_BY(port_id, owner_id)
492 memset(&rte_eth_devices[port_id].data->owner, 0,
493 sizeof(struct rte_eth_dev_owner));
494 RTE_PMD_DEBUG_TRACE("All port owners owned by %016X identifier"
495 " have removed.\n", owner_id);
498 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
501 int __rte_experimental
502 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
506 rte_eth_dev_shared_data_prepare();
508 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
510 if (!rte_eth_dev_is_valid_port(port_id)) {
511 RTE_PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id);
514 rte_memcpy(owner, &rte_eth_devices[port_id].data->owner,
518 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
523 rte_eth_dev_socket_id(uint16_t port_id)
525 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
526 return rte_eth_devices[port_id].data->numa_node;
530 rte_eth_dev_get_sec_ctx(uint16_t port_id)
532 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
533 return rte_eth_devices[port_id].security_ctx;
537 rte_eth_dev_count(void)
539 return rte_eth_dev_count_avail();
543 rte_eth_dev_count_avail(void)
550 RTE_ETH_FOREACH_DEV(p)
556 uint16_t __rte_experimental
557 rte_eth_dev_count_total(void)
559 uint16_t port, count = 0;
561 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
562 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
569 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
573 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
576 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
580 /* shouldn't check 'rte_eth_devices[i].data',
581 * because it might be overwritten by VDEV PMD */
582 tmp = rte_eth_dev_shared_data->data[port_id].name;
588 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
593 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
597 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
598 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
599 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
609 eth_err(uint16_t port_id, int ret)
613 if (rte_eth_dev_is_removed(port_id))
618 /* attach the new device, then store port_id of the device */
620 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
622 int current = rte_eth_dev_count_total();
623 struct rte_devargs da;
626 memset(&da, 0, sizeof(da));
628 if ((devargs == NULL) || (port_id == NULL)) {
634 if (rte_devargs_parse(&da, "%s", devargs))
637 ret = rte_eal_hotplug_add(da.bus->name, da.name, da.args);
641 /* no point looking at the port count if no port exists */
642 if (!rte_eth_dev_count_total()) {
643 ethdev_log(ERR, "No port found for device (%s)", da.name);
648 /* if nothing happened, there is a bug here, since some driver told us
649 * it did attach a device, but did not create a port.
650 * FIXME: race condition in case of plug-out of another device
652 if (current == rte_eth_dev_count_total()) {
657 *port_id = eth_dev_last_created_port;
665 /* detach the device, then store the name of the device */
667 rte_eth_dev_detach(uint16_t port_id, char *name __rte_unused)
669 struct rte_device *dev;
674 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
676 dev_flags = rte_eth_devices[port_id].data->dev_flags;
677 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
679 "Port %" PRIu16 " is bonded, cannot detach", port_id);
683 dev = rte_eth_devices[port_id].device;
687 bus = rte_bus_find_by_device(dev);
691 ret = rte_eal_hotplug_remove(bus->name, dev->name);
695 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
700 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
702 uint16_t old_nb_queues = dev->data->nb_rx_queues;
706 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
707 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
708 sizeof(dev->data->rx_queues[0]) * nb_queues,
709 RTE_CACHE_LINE_SIZE);
710 if (dev->data->rx_queues == NULL) {
711 dev->data->nb_rx_queues = 0;
714 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
715 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
717 rxq = dev->data->rx_queues;
719 for (i = nb_queues; i < old_nb_queues; i++)
720 (*dev->dev_ops->rx_queue_release)(rxq[i]);
721 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
722 RTE_CACHE_LINE_SIZE);
725 if (nb_queues > old_nb_queues) {
726 uint16_t new_qs = nb_queues - old_nb_queues;
728 memset(rxq + old_nb_queues, 0,
729 sizeof(rxq[0]) * new_qs);
732 dev->data->rx_queues = rxq;
734 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
735 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
737 rxq = dev->data->rx_queues;
739 for (i = nb_queues; i < old_nb_queues; i++)
740 (*dev->dev_ops->rx_queue_release)(rxq[i]);
742 rte_free(dev->data->rx_queues);
743 dev->data->rx_queues = NULL;
745 dev->data->nb_rx_queues = nb_queues;
750 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
752 struct rte_eth_dev *dev;
754 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
756 dev = &rte_eth_devices[port_id];
757 if (!dev->data->dev_started) {
759 "port %d must be started before start any queue\n", port_id);
763 if (rx_queue_id >= dev->data->nb_rx_queues) {
764 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
768 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
770 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
771 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
772 " already started\n",
773 rx_queue_id, port_id);
777 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
783 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
785 struct rte_eth_dev *dev;
787 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
789 dev = &rte_eth_devices[port_id];
790 if (rx_queue_id >= dev->data->nb_rx_queues) {
791 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
795 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
797 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
798 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
799 " already stopped\n",
800 rx_queue_id, port_id);
804 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
809 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
811 struct rte_eth_dev *dev;
813 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
815 dev = &rte_eth_devices[port_id];
816 if (!dev->data->dev_started) {
818 "port %d must be started before start any queue\n", port_id);
822 if (tx_queue_id >= dev->data->nb_tx_queues) {
823 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
827 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
829 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
830 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
831 " already started\n",
832 tx_queue_id, port_id);
836 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev,
842 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
844 struct rte_eth_dev *dev;
846 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
848 dev = &rte_eth_devices[port_id];
849 if (tx_queue_id >= dev->data->nb_tx_queues) {
850 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
854 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
856 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
857 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
858 " already stopped\n",
859 tx_queue_id, port_id);
863 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
868 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
870 uint16_t old_nb_queues = dev->data->nb_tx_queues;
874 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
875 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
876 sizeof(dev->data->tx_queues[0]) * nb_queues,
877 RTE_CACHE_LINE_SIZE);
878 if (dev->data->tx_queues == NULL) {
879 dev->data->nb_tx_queues = 0;
882 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
883 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
885 txq = dev->data->tx_queues;
887 for (i = nb_queues; i < old_nb_queues; i++)
888 (*dev->dev_ops->tx_queue_release)(txq[i]);
889 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
890 RTE_CACHE_LINE_SIZE);
893 if (nb_queues > old_nb_queues) {
894 uint16_t new_qs = nb_queues - old_nb_queues;
896 memset(txq + old_nb_queues, 0,
897 sizeof(txq[0]) * new_qs);
900 dev->data->tx_queues = txq;
902 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
903 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
905 txq = dev->data->tx_queues;
907 for (i = nb_queues; i < old_nb_queues; i++)
908 (*dev->dev_ops->tx_queue_release)(txq[i]);
910 rte_free(dev->data->tx_queues);
911 dev->data->tx_queues = NULL;
913 dev->data->nb_tx_queues = nb_queues;
918 rte_eth_speed_bitflag(uint32_t speed, int duplex)
921 case ETH_SPEED_NUM_10M:
922 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
923 case ETH_SPEED_NUM_100M:
924 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
925 case ETH_SPEED_NUM_1G:
926 return ETH_LINK_SPEED_1G;
927 case ETH_SPEED_NUM_2_5G:
928 return ETH_LINK_SPEED_2_5G;
929 case ETH_SPEED_NUM_5G:
930 return ETH_LINK_SPEED_5G;
931 case ETH_SPEED_NUM_10G:
932 return ETH_LINK_SPEED_10G;
933 case ETH_SPEED_NUM_20G:
934 return ETH_LINK_SPEED_20G;
935 case ETH_SPEED_NUM_25G:
936 return ETH_LINK_SPEED_25G;
937 case ETH_SPEED_NUM_40G:
938 return ETH_LINK_SPEED_40G;
939 case ETH_SPEED_NUM_50G:
940 return ETH_LINK_SPEED_50G;
941 case ETH_SPEED_NUM_56G:
942 return ETH_LINK_SPEED_56G;
943 case ETH_SPEED_NUM_100G:
944 return ETH_LINK_SPEED_100G;
951 * A conversion function from rxmode bitfield API.
954 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
955 uint64_t *rx_offloads)
957 uint64_t offloads = 0;
959 if (rxmode->header_split == 1)
960 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
961 if (rxmode->hw_ip_checksum == 1)
962 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
963 if (rxmode->hw_vlan_filter == 1)
964 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
965 if (rxmode->hw_vlan_strip == 1)
966 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
967 if (rxmode->hw_vlan_extend == 1)
968 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
969 if (rxmode->jumbo_frame == 1)
970 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
971 if (rxmode->hw_strip_crc == 1)
972 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
973 if (rxmode->enable_scatter == 1)
974 offloads |= DEV_RX_OFFLOAD_SCATTER;
975 if (rxmode->enable_lro == 1)
976 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
977 if (rxmode->hw_timestamp == 1)
978 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
979 if (rxmode->security == 1)
980 offloads |= DEV_RX_OFFLOAD_SECURITY;
982 *rx_offloads = offloads;
985 const char * __rte_experimental
986 rte_eth_dev_rx_offload_name(uint64_t offload)
988 const char *name = "UNKNOWN";
991 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
992 if (offload == rte_rx_offload_names[i].offload) {
993 name = rte_rx_offload_names[i].name;
1001 const char * __rte_experimental
1002 rte_eth_dev_tx_offload_name(uint64_t offload)
1004 const char *name = "UNKNOWN";
1007 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1008 if (offload == rte_tx_offload_names[i].offload) {
1009 name = rte_tx_offload_names[i].name;
1018 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1019 const struct rte_eth_conf *dev_conf)
1021 struct rte_eth_dev *dev;
1022 struct rte_eth_dev_info dev_info;
1023 struct rte_eth_conf local_conf = *dev_conf;
1026 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1028 dev = &rte_eth_devices[port_id];
1030 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1031 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
1033 /* If number of queues specified by application for both Rx and Tx is
1034 * zero, use driver preferred values. This cannot be done individually
1035 * as it is valid for either Tx or Rx (but not both) to be zero.
1036 * If driver does not provide any preferred valued, fall back on
1039 if (nb_rx_q == 0 && nb_tx_q == 0) {
1040 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1042 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1043 nb_tx_q = dev_info.default_txportconf.nb_queues;
1045 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1048 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1049 RTE_PMD_DEBUG_TRACE(
1050 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1051 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1055 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1056 RTE_PMD_DEBUG_TRACE(
1057 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1058 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1062 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1063 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1065 if (dev->data->dev_started) {
1066 RTE_PMD_DEBUG_TRACE(
1067 "port %d must be stopped to allow configuration\n", port_id);
1072 * Convert between the offloads API to enable PMDs to support
1075 if (dev_conf->rxmode.ignore_offload_bitfield == 0)
1076 rte_eth_convert_rx_offload_bitfield(
1077 &dev_conf->rxmode, &local_conf.rxmode.offloads);
1079 /* Copy the dev_conf parameter into the dev structure */
1080 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1083 * Check that the numbers of RX and TX queues are not greater
1084 * than the maximum number of RX and TX queues supported by the
1085 * configured device.
1087 if (nb_rx_q > dev_info.max_rx_queues) {
1088 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
1089 port_id, nb_rx_q, dev_info.max_rx_queues);
1093 if (nb_tx_q > dev_info.max_tx_queues) {
1094 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
1095 port_id, nb_tx_q, dev_info.max_tx_queues);
1099 /* Check that the device supports requested interrupts */
1100 if ((dev_conf->intr_conf.lsc == 1) &&
1101 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1102 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
1103 dev->device->driver->name);
1106 if ((dev_conf->intr_conf.rmv == 1) &&
1107 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1108 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
1109 dev->device->driver->name);
1114 * If jumbo frames are enabled, check that the maximum RX packet
1115 * length is supported by the configured device.
1117 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1118 if (dev_conf->rxmode.max_rx_pkt_len >
1119 dev_info.max_rx_pktlen) {
1120 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1121 " > max valid value %u\n",
1123 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1124 (unsigned)dev_info.max_rx_pktlen);
1126 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1127 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1128 " < min valid value %u\n",
1130 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1131 (unsigned)ETHER_MIN_LEN);
1135 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1136 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1137 /* Use default value */
1138 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1142 /* Check that device supports requested rss hash functions. */
1143 if ((dev_info.flow_type_rss_offloads |
1144 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1145 dev_info.flow_type_rss_offloads) {
1146 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d invalid rss_hf: "
1147 "0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1149 dev_conf->rx_adv_conf.rss_conf.rss_hf,
1150 dev_info.flow_type_rss_offloads);
1155 * Setup new number of RX/TX queues and reconfigure device.
1157 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1159 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
1164 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1166 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
1168 rte_eth_dev_rx_queue_config(dev, 0);
1172 diag = (*dev->dev_ops->dev_configure)(dev);
1174 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
1176 rte_eth_dev_rx_queue_config(dev, 0);
1177 rte_eth_dev_tx_queue_config(dev, 0);
1178 return eth_err(port_id, diag);
1181 /* Initialize Rx profiling if enabled at compilation time. */
1182 diag = __rte_eth_profile_rx_init(port_id, dev);
1184 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
1186 rte_eth_dev_rx_queue_config(dev, 0);
1187 rte_eth_dev_tx_queue_config(dev, 0);
1188 return eth_err(port_id, diag);
1195 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1197 if (dev->data->dev_started) {
1198 RTE_PMD_DEBUG_TRACE(
1199 "port %d must be stopped to allow reset\n",
1200 dev->data->port_id);
1204 rte_eth_dev_rx_queue_config(dev, 0);
1205 rte_eth_dev_tx_queue_config(dev, 0);
1207 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1211 rte_eth_dev_config_restore(uint16_t port_id)
1213 struct rte_eth_dev *dev;
1214 struct rte_eth_dev_info dev_info;
1215 struct ether_addr *addr;
1220 dev = &rte_eth_devices[port_id];
1222 rte_eth_dev_info_get(port_id, &dev_info);
1224 /* replay MAC address configuration including default MAC */
1225 addr = &dev->data->mac_addrs[0];
1226 if (*dev->dev_ops->mac_addr_set != NULL)
1227 (*dev->dev_ops->mac_addr_set)(dev, addr);
1228 else if (*dev->dev_ops->mac_addr_add != NULL)
1229 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1231 if (*dev->dev_ops->mac_addr_add != NULL) {
1232 for (i = 1; i < dev_info.max_mac_addrs; i++) {
1233 addr = &dev->data->mac_addrs[i];
1235 /* skip zero address */
1236 if (is_zero_ether_addr(addr))
1240 pool_mask = dev->data->mac_pool_sel[i];
1243 if (pool_mask & 1ULL)
1244 (*dev->dev_ops->mac_addr_add)(dev,
1248 } while (pool_mask);
1252 /* replay promiscuous configuration */
1253 if (rte_eth_promiscuous_get(port_id) == 1)
1254 rte_eth_promiscuous_enable(port_id);
1255 else if (rte_eth_promiscuous_get(port_id) == 0)
1256 rte_eth_promiscuous_disable(port_id);
1258 /* replay all multicast configuration */
1259 if (rte_eth_allmulticast_get(port_id) == 1)
1260 rte_eth_allmulticast_enable(port_id);
1261 else if (rte_eth_allmulticast_get(port_id) == 0)
1262 rte_eth_allmulticast_disable(port_id);
1266 rte_eth_dev_start(uint16_t port_id)
1268 struct rte_eth_dev *dev;
1271 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1273 dev = &rte_eth_devices[port_id];
1275 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1277 if (dev->data->dev_started != 0) {
1278 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1279 " already started\n",
1284 diag = (*dev->dev_ops->dev_start)(dev);
1286 dev->data->dev_started = 1;
1288 return eth_err(port_id, diag);
1290 rte_eth_dev_config_restore(port_id);
1292 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1293 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1294 (*dev->dev_ops->link_update)(dev, 0);
1300 rte_eth_dev_stop(uint16_t port_id)
1302 struct rte_eth_dev *dev;
1304 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1305 dev = &rte_eth_devices[port_id];
1307 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1309 if (dev->data->dev_started == 0) {
1310 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1311 " already stopped\n",
1316 dev->data->dev_started = 0;
1317 (*dev->dev_ops->dev_stop)(dev);
1321 rte_eth_dev_set_link_up(uint16_t port_id)
1323 struct rte_eth_dev *dev;
1325 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1327 dev = &rte_eth_devices[port_id];
1329 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1330 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1334 rte_eth_dev_set_link_down(uint16_t port_id)
1336 struct rte_eth_dev *dev;
1338 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1340 dev = &rte_eth_devices[port_id];
1342 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1343 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1347 rte_eth_dev_close(uint16_t port_id)
1349 struct rte_eth_dev *dev;
1351 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1352 dev = &rte_eth_devices[port_id];
1354 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1355 dev->data->dev_started = 0;
1356 (*dev->dev_ops->dev_close)(dev);
1358 dev->data->nb_rx_queues = 0;
1359 rte_free(dev->data->rx_queues);
1360 dev->data->rx_queues = NULL;
1361 dev->data->nb_tx_queues = 0;
1362 rte_free(dev->data->tx_queues);
1363 dev->data->tx_queues = NULL;
1367 rte_eth_dev_reset(uint16_t port_id)
1369 struct rte_eth_dev *dev;
1372 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1373 dev = &rte_eth_devices[port_id];
1375 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1377 rte_eth_dev_stop(port_id);
1378 ret = dev->dev_ops->dev_reset(dev);
1380 return eth_err(port_id, ret);
1383 int __rte_experimental
1384 rte_eth_dev_is_removed(uint16_t port_id)
1386 struct rte_eth_dev *dev;
1389 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1391 dev = &rte_eth_devices[port_id];
1393 if (dev->state == RTE_ETH_DEV_REMOVED)
1396 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1398 ret = dev->dev_ops->is_removed(dev);
1400 /* Device is physically removed. */
1401 dev->state = RTE_ETH_DEV_REMOVED;
1407 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1408 uint16_t nb_rx_desc, unsigned int socket_id,
1409 const struct rte_eth_rxconf *rx_conf,
1410 struct rte_mempool *mp)
1413 uint32_t mbp_buf_size;
1414 struct rte_eth_dev *dev;
1415 struct rte_eth_dev_info dev_info;
1416 struct rte_eth_rxconf local_conf;
1419 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1421 dev = &rte_eth_devices[port_id];
1422 if (rx_queue_id >= dev->data->nb_rx_queues) {
1423 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1427 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1428 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1431 * Check the size of the mbuf data buffer.
1432 * This value must be provided in the private data of the memory pool.
1433 * First check that the memory pool has a valid private data.
1435 rte_eth_dev_info_get(port_id, &dev_info);
1436 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1437 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1438 mp->name, (int) mp->private_data_size,
1439 (int) sizeof(struct rte_pktmbuf_pool_private));
1442 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1444 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1445 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1446 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1450 (int)(RTE_PKTMBUF_HEADROOM +
1451 dev_info.min_rx_bufsize),
1452 (int)RTE_PKTMBUF_HEADROOM,
1453 (int)dev_info.min_rx_bufsize);
1457 /* Use default specified by driver, if nb_rx_desc is zero */
1458 if (nb_rx_desc == 0) {
1459 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1460 /* If driver default is also zero, fall back on EAL default */
1461 if (nb_rx_desc == 0)
1462 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1465 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1466 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1467 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1469 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1470 "should be: <= %hu, = %hu, and a product of %hu\n",
1472 dev_info.rx_desc_lim.nb_max,
1473 dev_info.rx_desc_lim.nb_min,
1474 dev_info.rx_desc_lim.nb_align);
1478 if (dev->data->dev_started &&
1479 !(dev_info.dev_capa &
1480 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1483 if (dev->data->rx_queue_state[rx_queue_id] !=
1484 RTE_ETH_QUEUE_STATE_STOPPED)
1487 rxq = dev->data->rx_queues;
1488 if (rxq[rx_queue_id]) {
1489 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1491 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1492 rxq[rx_queue_id] = NULL;
1495 if (rx_conf == NULL)
1496 rx_conf = &dev_info.default_rxconf;
1498 local_conf = *rx_conf;
1499 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1501 * Reflect port offloads to queue offloads in order for
1502 * offloads to not be discarded.
1504 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1505 &local_conf.offloads);
1508 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1509 socket_id, &local_conf, mp);
1511 if (!dev->data->min_rx_buf_size ||
1512 dev->data->min_rx_buf_size > mbp_buf_size)
1513 dev->data->min_rx_buf_size = mbp_buf_size;
1516 return eth_err(port_id, ret);
1520 * A conversion function from txq_flags API.
1523 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1525 uint64_t offloads = 0;
1527 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1528 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1529 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1530 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1531 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1532 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1533 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1534 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1535 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1536 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1537 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1538 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1539 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1541 *tx_offloads = offloads;
1545 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1546 uint16_t nb_tx_desc, unsigned int socket_id,
1547 const struct rte_eth_txconf *tx_conf)
1549 struct rte_eth_dev *dev;
1550 struct rte_eth_dev_info dev_info;
1551 struct rte_eth_txconf local_conf;
1554 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1556 dev = &rte_eth_devices[port_id];
1557 if (tx_queue_id >= dev->data->nb_tx_queues) {
1558 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1562 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1563 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1565 rte_eth_dev_info_get(port_id, &dev_info);
1567 /* Use default specified by driver, if nb_tx_desc is zero */
1568 if (nb_tx_desc == 0) {
1569 nb_tx_desc = dev_info.default_txportconf.ring_size;
1570 /* If driver default is zero, fall back on EAL default */
1571 if (nb_tx_desc == 0)
1572 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1574 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1575 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1576 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1577 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1578 "should be: <= %hu, = %hu, and a product of %hu\n",
1580 dev_info.tx_desc_lim.nb_max,
1581 dev_info.tx_desc_lim.nb_min,
1582 dev_info.tx_desc_lim.nb_align);
1586 if (dev->data->dev_started &&
1587 !(dev_info.dev_capa &
1588 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1591 if (dev->data->tx_queue_state[tx_queue_id] !=
1592 RTE_ETH_QUEUE_STATE_STOPPED)
1595 txq = dev->data->tx_queues;
1596 if (txq[tx_queue_id]) {
1597 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1599 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1600 txq[tx_queue_id] = NULL;
1603 if (tx_conf == NULL)
1604 tx_conf = &dev_info.default_txconf;
1607 * Convert between the offloads API to enable PMDs to support
1610 local_conf = *tx_conf;
1611 if (!(tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE)) {
1612 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1613 &local_conf.offloads);
1616 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1617 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1621 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1622 void *userdata __rte_unused)
1626 for (i = 0; i < unsent; i++)
1627 rte_pktmbuf_free(pkts[i]);
1631 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1634 uint64_t *count = userdata;
1637 for (i = 0; i < unsent; i++)
1638 rte_pktmbuf_free(pkts[i]);
1644 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1645 buffer_tx_error_fn cbfn, void *userdata)
1647 buffer->error_callback = cbfn;
1648 buffer->error_userdata = userdata;
1653 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1660 buffer->size = size;
1661 if (buffer->error_callback == NULL) {
1662 ret = rte_eth_tx_buffer_set_err_callback(
1663 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1670 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1672 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1675 /* Validate Input Data. Bail if not valid or not supported. */
1676 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1677 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1679 /* Call driver to free pending mbufs. */
1680 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1682 return eth_err(port_id, ret);
1686 rte_eth_promiscuous_enable(uint16_t port_id)
1688 struct rte_eth_dev *dev;
1690 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1691 dev = &rte_eth_devices[port_id];
1693 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1694 (*dev->dev_ops->promiscuous_enable)(dev);
1695 dev->data->promiscuous = 1;
1699 rte_eth_promiscuous_disable(uint16_t port_id)
1701 struct rte_eth_dev *dev;
1703 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1704 dev = &rte_eth_devices[port_id];
1706 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1707 dev->data->promiscuous = 0;
1708 (*dev->dev_ops->promiscuous_disable)(dev);
1712 rte_eth_promiscuous_get(uint16_t port_id)
1714 struct rte_eth_dev *dev;
1716 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1718 dev = &rte_eth_devices[port_id];
1719 return dev->data->promiscuous;
1723 rte_eth_allmulticast_enable(uint16_t port_id)
1725 struct rte_eth_dev *dev;
1727 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1728 dev = &rte_eth_devices[port_id];
1730 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1731 (*dev->dev_ops->allmulticast_enable)(dev);
1732 dev->data->all_multicast = 1;
1736 rte_eth_allmulticast_disable(uint16_t port_id)
1738 struct rte_eth_dev *dev;
1740 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1741 dev = &rte_eth_devices[port_id];
1743 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1744 dev->data->all_multicast = 0;
1745 (*dev->dev_ops->allmulticast_disable)(dev);
1749 rte_eth_allmulticast_get(uint16_t port_id)
1751 struct rte_eth_dev *dev;
1753 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1755 dev = &rte_eth_devices[port_id];
1756 return dev->data->all_multicast;
1760 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1762 struct rte_eth_dev *dev;
1764 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1765 dev = &rte_eth_devices[port_id];
1767 if (dev->data->dev_conf.intr_conf.lsc &&
1768 dev->data->dev_started)
1769 rte_eth_linkstatus_get(dev, eth_link);
1771 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1772 (*dev->dev_ops->link_update)(dev, 1);
1773 *eth_link = dev->data->dev_link;
1778 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1780 struct rte_eth_dev *dev;
1782 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1783 dev = &rte_eth_devices[port_id];
1785 if (dev->data->dev_conf.intr_conf.lsc &&
1786 dev->data->dev_started)
1787 rte_eth_linkstatus_get(dev, eth_link);
1789 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1790 (*dev->dev_ops->link_update)(dev, 0);
1791 *eth_link = dev->data->dev_link;
1796 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1798 struct rte_eth_dev *dev;
1800 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1802 dev = &rte_eth_devices[port_id];
1803 memset(stats, 0, sizeof(*stats));
1805 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1806 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1807 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1811 rte_eth_stats_reset(uint16_t port_id)
1813 struct rte_eth_dev *dev;
1815 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1816 dev = &rte_eth_devices[port_id];
1818 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1819 (*dev->dev_ops->stats_reset)(dev);
1820 dev->data->rx_mbuf_alloc_failed = 0;
1826 get_xstats_basic_count(struct rte_eth_dev *dev)
1828 uint16_t nb_rxqs, nb_txqs;
1831 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1832 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1834 count = RTE_NB_STATS;
1835 count += nb_rxqs * RTE_NB_RXQ_STATS;
1836 count += nb_txqs * RTE_NB_TXQ_STATS;
1842 get_xstats_count(uint16_t port_id)
1844 struct rte_eth_dev *dev;
1847 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1848 dev = &rte_eth_devices[port_id];
1849 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1850 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1853 return eth_err(port_id, count);
1855 if (dev->dev_ops->xstats_get_names != NULL) {
1856 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1858 return eth_err(port_id, count);
1863 count += get_xstats_basic_count(dev);
1869 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1872 int cnt_xstats, idx_xstat;
1874 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1877 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1882 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1887 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1888 if (cnt_xstats < 0) {
1889 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1893 /* Get id-name lookup table */
1894 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1896 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1897 port_id, xstats_names, cnt_xstats, NULL)) {
1898 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1902 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1903 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1912 /* retrieve basic stats names */
1914 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1915 struct rte_eth_xstat_name *xstats_names)
1917 int cnt_used_entries = 0;
1918 uint32_t idx, id_queue;
1921 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1922 snprintf(xstats_names[cnt_used_entries].name,
1923 sizeof(xstats_names[0].name),
1924 "%s", rte_stats_strings[idx].name);
1927 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1928 for (id_queue = 0; id_queue < num_q; id_queue++) {
1929 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1930 snprintf(xstats_names[cnt_used_entries].name,
1931 sizeof(xstats_names[0].name),
1933 id_queue, rte_rxq_stats_strings[idx].name);
1938 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1939 for (id_queue = 0; id_queue < num_q; id_queue++) {
1940 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1941 snprintf(xstats_names[cnt_used_entries].name,
1942 sizeof(xstats_names[0].name),
1944 id_queue, rte_txq_stats_strings[idx].name);
1948 return cnt_used_entries;
1951 /* retrieve ethdev extended statistics names */
1953 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1954 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1957 struct rte_eth_xstat_name *xstats_names_copy;
1958 unsigned int no_basic_stat_requested = 1;
1959 unsigned int no_ext_stat_requested = 1;
1960 unsigned int expected_entries;
1961 unsigned int basic_count;
1962 struct rte_eth_dev *dev;
1966 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1967 dev = &rte_eth_devices[port_id];
1969 basic_count = get_xstats_basic_count(dev);
1970 ret = get_xstats_count(port_id);
1973 expected_entries = (unsigned int)ret;
1975 /* Return max number of stats if no ids given */
1978 return expected_entries;
1979 else if (xstats_names && size < expected_entries)
1980 return expected_entries;
1983 if (ids && !xstats_names)
1986 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
1987 uint64_t ids_copy[size];
1989 for (i = 0; i < size; i++) {
1990 if (ids[i] < basic_count) {
1991 no_basic_stat_requested = 0;
1996 * Convert ids to xstats ids that PMD knows.
1997 * ids known by user are basic + extended stats.
1999 ids_copy[i] = ids[i] - basic_count;
2002 if (no_basic_stat_requested)
2003 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2004 xstats_names, ids_copy, size);
2007 /* Retrieve all stats */
2009 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2011 if (num_stats < 0 || num_stats > (int)expected_entries)
2014 return expected_entries;
2017 xstats_names_copy = calloc(expected_entries,
2018 sizeof(struct rte_eth_xstat_name));
2020 if (!xstats_names_copy) {
2021 RTE_PMD_DEBUG_TRACE("ERROR: can't allocate memory");
2026 for (i = 0; i < size; i++) {
2027 if (ids[i] >= basic_count) {
2028 no_ext_stat_requested = 0;
2034 /* Fill xstats_names_copy structure */
2035 if (ids && no_ext_stat_requested) {
2036 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2038 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2041 free(xstats_names_copy);
2047 for (i = 0; i < size; i++) {
2048 if (ids[i] >= expected_entries) {
2049 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2050 free(xstats_names_copy);
2053 xstats_names[i] = xstats_names_copy[ids[i]];
2056 free(xstats_names_copy);
2061 rte_eth_xstats_get_names(uint16_t port_id,
2062 struct rte_eth_xstat_name *xstats_names,
2065 struct rte_eth_dev *dev;
2066 int cnt_used_entries;
2067 int cnt_expected_entries;
2068 int cnt_driver_entries;
2070 cnt_expected_entries = get_xstats_count(port_id);
2071 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2072 (int)size < cnt_expected_entries)
2073 return cnt_expected_entries;
2075 /* port_id checked in get_xstats_count() */
2076 dev = &rte_eth_devices[port_id];
2078 cnt_used_entries = rte_eth_basic_stats_get_names(
2081 if (dev->dev_ops->xstats_get_names != NULL) {
2082 /* If there are any driver-specific xstats, append them
2085 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2087 xstats_names + cnt_used_entries,
2088 size - cnt_used_entries);
2089 if (cnt_driver_entries < 0)
2090 return eth_err(port_id, cnt_driver_entries);
2091 cnt_used_entries += cnt_driver_entries;
2094 return cnt_used_entries;
2099 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2101 struct rte_eth_dev *dev;
2102 struct rte_eth_stats eth_stats;
2103 unsigned int count = 0, i, q;
2104 uint64_t val, *stats_ptr;
2105 uint16_t nb_rxqs, nb_txqs;
2108 ret = rte_eth_stats_get(port_id, ð_stats);
2112 dev = &rte_eth_devices[port_id];
2114 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2115 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2118 for (i = 0; i < RTE_NB_STATS; i++) {
2119 stats_ptr = RTE_PTR_ADD(ð_stats,
2120 rte_stats_strings[i].offset);
2122 xstats[count++].value = val;
2126 for (q = 0; q < nb_rxqs; q++) {
2127 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2128 stats_ptr = RTE_PTR_ADD(ð_stats,
2129 rte_rxq_stats_strings[i].offset +
2130 q * sizeof(uint64_t));
2132 xstats[count++].value = val;
2137 for (q = 0; q < nb_txqs; q++) {
2138 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2139 stats_ptr = RTE_PTR_ADD(ð_stats,
2140 rte_txq_stats_strings[i].offset +
2141 q * sizeof(uint64_t));
2143 xstats[count++].value = val;
2149 /* retrieve ethdev extended statistics */
2151 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2152 uint64_t *values, unsigned int size)
2154 unsigned int no_basic_stat_requested = 1;
2155 unsigned int no_ext_stat_requested = 1;
2156 unsigned int num_xstats_filled;
2157 unsigned int basic_count;
2158 uint16_t expected_entries;
2159 struct rte_eth_dev *dev;
2163 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2164 ret = get_xstats_count(port_id);
2167 expected_entries = (uint16_t)ret;
2168 struct rte_eth_xstat xstats[expected_entries];
2169 dev = &rte_eth_devices[port_id];
2170 basic_count = get_xstats_basic_count(dev);
2172 /* Return max number of stats if no ids given */
2175 return expected_entries;
2176 else if (values && size < expected_entries)
2177 return expected_entries;
2183 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2184 unsigned int basic_count = get_xstats_basic_count(dev);
2185 uint64_t ids_copy[size];
2187 for (i = 0; i < size; i++) {
2188 if (ids[i] < basic_count) {
2189 no_basic_stat_requested = 0;
2194 * Convert ids to xstats ids that PMD knows.
2195 * ids known by user are basic + extended stats.
2197 ids_copy[i] = ids[i] - basic_count;
2200 if (no_basic_stat_requested)
2201 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2206 for (i = 0; i < size; i++) {
2207 if (ids[i] >= basic_count) {
2208 no_ext_stat_requested = 0;
2214 /* Fill the xstats structure */
2215 if (ids && no_ext_stat_requested)
2216 ret = rte_eth_basic_stats_get(port_id, xstats);
2218 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2222 num_xstats_filled = (unsigned int)ret;
2224 /* Return all stats */
2226 for (i = 0; i < num_xstats_filled; i++)
2227 values[i] = xstats[i].value;
2228 return expected_entries;
2232 for (i = 0; i < size; i++) {
2233 if (ids[i] >= expected_entries) {
2234 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2237 values[i] = xstats[ids[i]].value;
2243 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2246 struct rte_eth_dev *dev;
2247 unsigned int count = 0, i;
2248 signed int xcount = 0;
2249 uint16_t nb_rxqs, nb_txqs;
2252 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2254 dev = &rte_eth_devices[port_id];
2256 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2257 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2259 /* Return generic statistics */
2260 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2261 (nb_txqs * RTE_NB_TXQ_STATS);
2263 /* implemented by the driver */
2264 if (dev->dev_ops->xstats_get != NULL) {
2265 /* Retrieve the xstats from the driver at the end of the
2268 xcount = (*dev->dev_ops->xstats_get)(dev,
2269 xstats ? xstats + count : NULL,
2270 (n > count) ? n - count : 0);
2273 return eth_err(port_id, xcount);
2276 if (n < count + xcount || xstats == NULL)
2277 return count + xcount;
2279 /* now fill the xstats structure */
2280 ret = rte_eth_basic_stats_get(port_id, xstats);
2285 for (i = 0; i < count; i++)
2287 /* add an offset to driver-specific stats */
2288 for ( ; i < count + xcount; i++)
2289 xstats[i].id += count;
2291 return count + xcount;
2294 /* reset ethdev extended statistics */
2296 rte_eth_xstats_reset(uint16_t port_id)
2298 struct rte_eth_dev *dev;
2300 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2301 dev = &rte_eth_devices[port_id];
2303 /* implemented by the driver */
2304 if (dev->dev_ops->xstats_reset != NULL) {
2305 (*dev->dev_ops->xstats_reset)(dev);
2309 /* fallback to default */
2310 rte_eth_stats_reset(port_id);
2314 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2317 struct rte_eth_dev *dev;
2319 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2321 dev = &rte_eth_devices[port_id];
2323 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2324 return (*dev->dev_ops->queue_stats_mapping_set)
2325 (dev, queue_id, stat_idx, is_rx);
2330 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2333 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2334 stat_idx, STAT_QMAP_TX));
2339 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2342 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2343 stat_idx, STAT_QMAP_RX));
2347 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2349 struct rte_eth_dev *dev;
2351 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2352 dev = &rte_eth_devices[port_id];
2354 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2355 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2356 fw_version, fw_size));
2360 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2362 struct rte_eth_dev *dev;
2363 const struct rte_eth_desc_lim lim = {
2364 .nb_max = UINT16_MAX,
2369 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2370 dev = &rte_eth_devices[port_id];
2372 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2373 dev_info->rx_desc_lim = lim;
2374 dev_info->tx_desc_lim = lim;
2375 dev_info->device = dev->device;
2377 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2378 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2379 dev_info->driver_name = dev->device->driver->name;
2380 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2381 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2383 dev_info->dev_flags = &dev->data->dev_flags;
2387 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2388 uint32_t *ptypes, int num)
2391 struct rte_eth_dev *dev;
2392 const uint32_t *all_ptypes;
2394 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2395 dev = &rte_eth_devices[port_id];
2396 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2397 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2402 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2403 if (all_ptypes[i] & ptype_mask) {
2405 ptypes[j] = all_ptypes[i];
2413 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2415 struct rte_eth_dev *dev;
2417 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2418 dev = &rte_eth_devices[port_id];
2419 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2424 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2426 struct rte_eth_dev *dev;
2428 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2430 dev = &rte_eth_devices[port_id];
2431 *mtu = dev->data->mtu;
2436 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2439 struct rte_eth_dev *dev;
2441 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2442 dev = &rte_eth_devices[port_id];
2443 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2445 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2447 dev->data->mtu = mtu;
2449 return eth_err(port_id, ret);
2453 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2455 struct rte_eth_dev *dev;
2458 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2459 dev = &rte_eth_devices[port_id];
2460 if (!(dev->data->dev_conf.rxmode.offloads &
2461 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2462 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2466 if (vlan_id > 4095) {
2467 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2468 port_id, (unsigned) vlan_id);
2471 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2473 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2475 struct rte_vlan_filter_conf *vfc;
2479 vfc = &dev->data->vlan_filter_conf;
2480 vidx = vlan_id / 64;
2481 vbit = vlan_id % 64;
2484 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2486 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2489 return eth_err(port_id, ret);
2493 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2496 struct rte_eth_dev *dev;
2498 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2499 dev = &rte_eth_devices[port_id];
2500 if (rx_queue_id >= dev->data->nb_rx_queues) {
2501 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2505 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2506 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2512 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2513 enum rte_vlan_type vlan_type,
2516 struct rte_eth_dev *dev;
2518 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2519 dev = &rte_eth_devices[port_id];
2520 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2522 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2527 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2529 struct rte_eth_dev *dev;
2533 uint64_t orig_offloads;
2535 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2536 dev = &rte_eth_devices[port_id];
2538 /* save original values in case of failure */
2539 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2541 /*check which option changed by application*/
2542 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2543 org = !!(dev->data->dev_conf.rxmode.offloads &
2544 DEV_RX_OFFLOAD_VLAN_STRIP);
2547 dev->data->dev_conf.rxmode.offloads |=
2548 DEV_RX_OFFLOAD_VLAN_STRIP;
2550 dev->data->dev_conf.rxmode.offloads &=
2551 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2552 mask |= ETH_VLAN_STRIP_MASK;
2555 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2556 org = !!(dev->data->dev_conf.rxmode.offloads &
2557 DEV_RX_OFFLOAD_VLAN_FILTER);
2560 dev->data->dev_conf.rxmode.offloads |=
2561 DEV_RX_OFFLOAD_VLAN_FILTER;
2563 dev->data->dev_conf.rxmode.offloads &=
2564 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2565 mask |= ETH_VLAN_FILTER_MASK;
2568 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2569 org = !!(dev->data->dev_conf.rxmode.offloads &
2570 DEV_RX_OFFLOAD_VLAN_EXTEND);
2573 dev->data->dev_conf.rxmode.offloads |=
2574 DEV_RX_OFFLOAD_VLAN_EXTEND;
2576 dev->data->dev_conf.rxmode.offloads &=
2577 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2578 mask |= ETH_VLAN_EXTEND_MASK;
2585 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2586 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2588 /* hit an error restore original values */
2589 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2592 return eth_err(port_id, ret);
2596 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2598 struct rte_eth_dev *dev;
2601 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2602 dev = &rte_eth_devices[port_id];
2604 if (dev->data->dev_conf.rxmode.offloads &
2605 DEV_RX_OFFLOAD_VLAN_STRIP)
2606 ret |= ETH_VLAN_STRIP_OFFLOAD;
2608 if (dev->data->dev_conf.rxmode.offloads &
2609 DEV_RX_OFFLOAD_VLAN_FILTER)
2610 ret |= ETH_VLAN_FILTER_OFFLOAD;
2612 if (dev->data->dev_conf.rxmode.offloads &
2613 DEV_RX_OFFLOAD_VLAN_EXTEND)
2614 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2620 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2622 struct rte_eth_dev *dev;
2624 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2625 dev = &rte_eth_devices[port_id];
2626 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2628 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2632 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2634 struct rte_eth_dev *dev;
2636 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2637 dev = &rte_eth_devices[port_id];
2638 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2639 memset(fc_conf, 0, sizeof(*fc_conf));
2640 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2644 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2646 struct rte_eth_dev *dev;
2648 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2649 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2650 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2654 dev = &rte_eth_devices[port_id];
2655 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2656 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2660 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2661 struct rte_eth_pfc_conf *pfc_conf)
2663 struct rte_eth_dev *dev;
2665 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2666 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2667 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2671 dev = &rte_eth_devices[port_id];
2672 /* High water, low water validation are device specific */
2673 if (*dev->dev_ops->priority_flow_ctrl_set)
2674 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2680 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2688 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2689 for (i = 0; i < num; i++) {
2690 if (reta_conf[i].mask)
2698 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2702 uint16_t i, idx, shift;
2708 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2712 for (i = 0; i < reta_size; i++) {
2713 idx = i / RTE_RETA_GROUP_SIZE;
2714 shift = i % RTE_RETA_GROUP_SIZE;
2715 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2716 (reta_conf[idx].reta[shift] >= max_rxq)) {
2717 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2718 "the maximum rxq index: %u\n", idx, shift,
2719 reta_conf[idx].reta[shift], max_rxq);
2728 rte_eth_dev_rss_reta_update(uint16_t port_id,
2729 struct rte_eth_rss_reta_entry64 *reta_conf,
2732 struct rte_eth_dev *dev;
2735 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2736 /* Check mask bits */
2737 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2741 dev = &rte_eth_devices[port_id];
2743 /* Check entry value */
2744 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2745 dev->data->nb_rx_queues);
2749 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2750 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2755 rte_eth_dev_rss_reta_query(uint16_t port_id,
2756 struct rte_eth_rss_reta_entry64 *reta_conf,
2759 struct rte_eth_dev *dev;
2762 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2764 /* Check mask bits */
2765 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2769 dev = &rte_eth_devices[port_id];
2770 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2771 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2776 rte_eth_dev_rss_hash_update(uint16_t port_id,
2777 struct rte_eth_rss_conf *rss_conf)
2779 struct rte_eth_dev *dev;
2780 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2782 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2783 dev = &rte_eth_devices[port_id];
2784 rte_eth_dev_info_get(port_id, &dev_info);
2785 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2786 dev_info.flow_type_rss_offloads) {
2787 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d invalid rss_hf: "
2788 "0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2791 dev_info.flow_type_rss_offloads);
2794 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2795 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2800 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2801 struct rte_eth_rss_conf *rss_conf)
2803 struct rte_eth_dev *dev;
2805 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2806 dev = &rte_eth_devices[port_id];
2807 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2808 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2813 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2814 struct rte_eth_udp_tunnel *udp_tunnel)
2816 struct rte_eth_dev *dev;
2818 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2819 if (udp_tunnel == NULL) {
2820 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2824 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2825 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2829 dev = &rte_eth_devices[port_id];
2830 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2831 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2836 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2837 struct rte_eth_udp_tunnel *udp_tunnel)
2839 struct rte_eth_dev *dev;
2841 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2842 dev = &rte_eth_devices[port_id];
2844 if (udp_tunnel == NULL) {
2845 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2849 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2850 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2854 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2855 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2860 rte_eth_led_on(uint16_t port_id)
2862 struct rte_eth_dev *dev;
2864 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2865 dev = &rte_eth_devices[port_id];
2866 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2867 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
2871 rte_eth_led_off(uint16_t port_id)
2873 struct rte_eth_dev *dev;
2875 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2876 dev = &rte_eth_devices[port_id];
2877 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2878 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
2882 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2886 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2888 struct rte_eth_dev_info dev_info;
2889 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2892 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2893 rte_eth_dev_info_get(port_id, &dev_info);
2895 for (i = 0; i < dev_info.max_mac_addrs; i++)
2896 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2902 static const struct ether_addr null_mac_addr;
2905 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2908 struct rte_eth_dev *dev;
2913 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2914 dev = &rte_eth_devices[port_id];
2915 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2917 if (is_zero_ether_addr(addr)) {
2918 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2922 if (pool >= ETH_64_POOLS) {
2923 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2927 index = get_mac_addr_index(port_id, addr);
2929 index = get_mac_addr_index(port_id, &null_mac_addr);
2931 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2936 pool_mask = dev->data->mac_pool_sel[index];
2938 /* Check if both MAC address and pool is already there, and do nothing */
2939 if (pool_mask & (1ULL << pool))
2944 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2947 /* Update address in NIC data structure */
2948 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2950 /* Update pool bitmap in NIC data structure */
2951 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2954 return eth_err(port_id, ret);
2958 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
2960 struct rte_eth_dev *dev;
2963 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2964 dev = &rte_eth_devices[port_id];
2965 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2967 index = get_mac_addr_index(port_id, addr);
2969 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2971 } else if (index < 0)
2972 return 0; /* Do nothing if address wasn't found */
2975 (*dev->dev_ops->mac_addr_remove)(dev, index);
2977 /* Update address in NIC data structure */
2978 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2980 /* reset pool bitmap */
2981 dev->data->mac_pool_sel[index] = 0;
2987 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
2989 struct rte_eth_dev *dev;
2992 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2994 if (!is_valid_assigned_ether_addr(addr))
2997 dev = &rte_eth_devices[port_id];
2998 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3000 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3004 /* Update default address in NIC data structure */
3005 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3012 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3016 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3018 struct rte_eth_dev_info dev_info;
3019 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3022 rte_eth_dev_info_get(port_id, &dev_info);
3023 if (!dev->data->hash_mac_addrs)
3026 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3027 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3028 ETHER_ADDR_LEN) == 0)
3035 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3040 struct rte_eth_dev *dev;
3042 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3044 dev = &rte_eth_devices[port_id];
3045 if (is_zero_ether_addr(addr)) {
3046 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
3051 index = get_hash_mac_addr_index(port_id, addr);
3052 /* Check if it's already there, and do nothing */
3053 if ((index >= 0) && on)
3058 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
3059 "set in UTA\n", port_id);
3063 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3065 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
3071 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3072 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3074 /* Update address in NIC data structure */
3076 ether_addr_copy(addr,
3077 &dev->data->hash_mac_addrs[index]);
3079 ether_addr_copy(&null_mac_addr,
3080 &dev->data->hash_mac_addrs[index]);
3083 return eth_err(port_id, ret);
3087 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3089 struct rte_eth_dev *dev;
3091 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3093 dev = &rte_eth_devices[port_id];
3095 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3096 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3100 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3103 struct rte_eth_dev *dev;
3104 struct rte_eth_dev_info dev_info;
3105 struct rte_eth_link link;
3107 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3109 dev = &rte_eth_devices[port_id];
3110 rte_eth_dev_info_get(port_id, &dev_info);
3111 link = dev->data->dev_link;
3113 if (queue_idx > dev_info.max_tx_queues) {
3114 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
3115 "invalid queue id=%d\n", port_id, queue_idx);
3119 if (tx_rate > link.link_speed) {
3120 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
3121 "bigger than link speed= %d\n",
3122 tx_rate, link.link_speed);
3126 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3127 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3128 queue_idx, tx_rate));
3132 rte_eth_mirror_rule_set(uint16_t port_id,
3133 struct rte_eth_mirror_conf *mirror_conf,
3134 uint8_t rule_id, uint8_t on)
3136 struct rte_eth_dev *dev;
3138 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3139 if (mirror_conf->rule_type == 0) {
3140 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
3144 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3145 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
3150 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3151 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3152 (mirror_conf->pool_mask == 0)) {
3153 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
3157 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3158 mirror_conf->vlan.vlan_mask == 0) {
3159 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
3163 dev = &rte_eth_devices[port_id];
3164 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3166 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3167 mirror_conf, rule_id, on));
3171 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3173 struct rte_eth_dev *dev;
3175 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3177 dev = &rte_eth_devices[port_id];
3178 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3180 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3184 RTE_INIT(eth_dev_init_cb_lists)
3188 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3189 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3193 rte_eth_dev_callback_register(uint16_t port_id,
3194 enum rte_eth_event_type event,
3195 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3197 struct rte_eth_dev *dev;
3198 struct rte_eth_dev_callback *user_cb;
3199 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3205 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3206 ethdev_log(ERR, "Invalid port_id=%d", port_id);
3210 if (port_id == RTE_ETH_ALL) {
3212 last_port = RTE_MAX_ETHPORTS - 1;
3214 next_port = last_port = port_id;
3217 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3220 dev = &rte_eth_devices[next_port];
3222 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3223 if (user_cb->cb_fn == cb_fn &&
3224 user_cb->cb_arg == cb_arg &&
3225 user_cb->event == event) {
3230 /* create a new callback. */
3231 if (user_cb == NULL) {
3232 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3233 sizeof(struct rte_eth_dev_callback), 0);
3234 if (user_cb != NULL) {
3235 user_cb->cb_fn = cb_fn;
3236 user_cb->cb_arg = cb_arg;
3237 user_cb->event = event;
3238 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3241 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3242 rte_eth_dev_callback_unregister(port_id, event,
3248 } while (++next_port <= last_port);
3250 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3255 rte_eth_dev_callback_unregister(uint16_t port_id,
3256 enum rte_eth_event_type event,
3257 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3260 struct rte_eth_dev *dev;
3261 struct rte_eth_dev_callback *cb, *next;
3262 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3268 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3269 ethdev_log(ERR, "Invalid port_id=%d", port_id);
3273 if (port_id == RTE_ETH_ALL) {
3275 last_port = RTE_MAX_ETHPORTS - 1;
3277 next_port = last_port = port_id;
3280 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3283 dev = &rte_eth_devices[next_port];
3285 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3288 next = TAILQ_NEXT(cb, next);
3290 if (cb->cb_fn != cb_fn || cb->event != event ||
3291 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3295 * if this callback is not executing right now,
3298 if (cb->active == 0) {
3299 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3305 } while (++next_port <= last_port);
3307 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3312 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3313 enum rte_eth_event_type event, void *ret_param)
3315 struct rte_eth_dev_callback *cb_lst;
3316 struct rte_eth_dev_callback dev_cb;
3319 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3320 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3321 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3325 if (ret_param != NULL)
3326 dev_cb.ret_param = ret_param;
3328 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3329 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3330 dev_cb.cb_arg, dev_cb.ret_param);
3331 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3334 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3339 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3342 struct rte_eth_dev *dev;
3343 struct rte_intr_handle *intr_handle;
3347 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3349 dev = &rte_eth_devices[port_id];
3351 if (!dev->intr_handle) {
3352 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3356 intr_handle = dev->intr_handle;
3357 if (!intr_handle->intr_vec) {
3358 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3362 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3363 vec = intr_handle->intr_vec[qid];
3364 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3365 if (rc && rc != -EEXIST) {
3366 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3367 " op %d epfd %d vec %u\n",
3368 port_id, qid, op, epfd, vec);
3375 const struct rte_memzone *
3376 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3377 uint16_t queue_id, size_t size, unsigned align,
3380 char z_name[RTE_MEMZONE_NAMESIZE];
3381 const struct rte_memzone *mz;
3383 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3384 dev->device->driver->name, ring_name,
3385 dev->data->port_id, queue_id);
3387 mz = rte_memzone_lookup(z_name);
3391 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3392 RTE_MEMZONE_IOVA_CONTIG, align);
3395 int __rte_experimental
3396 rte_eth_dev_create(struct rte_device *device, const char *name,
3397 size_t priv_data_size,
3398 ethdev_bus_specific_init ethdev_bus_specific_init,
3399 void *bus_init_params,
3400 ethdev_init_t ethdev_init, void *init_params)
3402 struct rte_eth_dev *ethdev;
3405 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3407 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3408 ethdev = rte_eth_dev_allocate(name);
3414 if (priv_data_size) {
3415 ethdev->data->dev_private = rte_zmalloc_socket(
3416 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3419 if (!ethdev->data->dev_private) {
3420 RTE_LOG(ERR, EAL, "failed to allocate private data");
3426 ethdev = rte_eth_dev_attach_secondary(name);
3428 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3429 "ethdev doesn't exist");
3435 ethdev->device = device;
3437 if (ethdev_bus_specific_init) {
3438 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3441 "ethdev bus specific initialisation failed");
3446 retval = ethdev_init(ethdev, init_params);
3448 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3454 /* free ports private data if primary process */
3455 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3456 rte_free(ethdev->data->dev_private);
3458 rte_eth_dev_release_port(ethdev);
3463 int __rte_experimental
3464 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3465 ethdev_uninit_t ethdev_uninit)
3469 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3473 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3474 if (ethdev_uninit) {
3475 ret = ethdev_uninit(ethdev);
3480 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3481 rte_free(ethdev->data->dev_private);
3483 ethdev->data->dev_private = NULL;
3485 return rte_eth_dev_release_port(ethdev);
3489 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3490 int epfd, int op, void *data)
3493 struct rte_eth_dev *dev;
3494 struct rte_intr_handle *intr_handle;
3497 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3499 dev = &rte_eth_devices[port_id];
3500 if (queue_id >= dev->data->nb_rx_queues) {
3501 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3505 if (!dev->intr_handle) {
3506 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3510 intr_handle = dev->intr_handle;
3511 if (!intr_handle->intr_vec) {
3512 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3516 vec = intr_handle->intr_vec[queue_id];
3517 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3518 if (rc && rc != -EEXIST) {
3519 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3520 " op %d epfd %d vec %u\n",
3521 port_id, queue_id, op, epfd, vec);
3529 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3532 struct rte_eth_dev *dev;
3534 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3536 dev = &rte_eth_devices[port_id];
3538 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3539 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3544 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3547 struct rte_eth_dev *dev;
3549 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3551 dev = &rte_eth_devices[port_id];
3553 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3554 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3560 rte_eth_dev_filter_supported(uint16_t port_id,
3561 enum rte_filter_type filter_type)
3563 struct rte_eth_dev *dev;
3565 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3567 dev = &rte_eth_devices[port_id];
3568 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3569 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3570 RTE_ETH_FILTER_NOP, NULL);
3574 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3575 enum rte_filter_op filter_op, void *arg)
3577 struct rte_eth_dev *dev;
3579 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3581 dev = &rte_eth_devices[port_id];
3582 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3583 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3587 const struct rte_eth_rxtx_callback *
3588 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3589 rte_rx_callback_fn fn, void *user_param)
3591 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3592 rte_errno = ENOTSUP;
3595 /* check input parameters */
3596 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3597 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3601 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3609 cb->param = user_param;
3611 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3612 /* Add the callbacks in fifo order. */
3613 struct rte_eth_rxtx_callback *tail =
3614 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3617 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3624 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3629 const struct rte_eth_rxtx_callback *
3630 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3631 rte_rx_callback_fn fn, void *user_param)
3633 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3634 rte_errno = ENOTSUP;
3637 /* check input parameters */
3638 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3639 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3644 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3652 cb->param = user_param;
3654 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3655 /* Add the callbacks at fisrt position*/
3656 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3658 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3659 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3664 const struct rte_eth_rxtx_callback *
3665 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3666 rte_tx_callback_fn fn, void *user_param)
3668 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3669 rte_errno = ENOTSUP;
3672 /* check input parameters */
3673 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3674 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3679 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3687 cb->param = user_param;
3689 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3690 /* Add the callbacks in fifo order. */
3691 struct rte_eth_rxtx_callback *tail =
3692 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3695 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3702 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3708 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3709 const struct rte_eth_rxtx_callback *user_cb)
3711 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3714 /* Check input parameters. */
3715 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3716 if (user_cb == NULL ||
3717 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3720 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3721 struct rte_eth_rxtx_callback *cb;
3722 struct rte_eth_rxtx_callback **prev_cb;
3725 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3726 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3727 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3729 if (cb == user_cb) {
3730 /* Remove the user cb from the callback list. */
3731 *prev_cb = cb->next;
3736 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3742 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3743 const struct rte_eth_rxtx_callback *user_cb)
3745 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3748 /* Check input parameters. */
3749 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3750 if (user_cb == NULL ||
3751 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3754 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3756 struct rte_eth_rxtx_callback *cb;
3757 struct rte_eth_rxtx_callback **prev_cb;
3759 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3760 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3761 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3763 if (cb == user_cb) {
3764 /* Remove the user cb from the callback list. */
3765 *prev_cb = cb->next;
3770 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3776 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3777 struct rte_eth_rxq_info *qinfo)
3779 struct rte_eth_dev *dev;
3781 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3786 dev = &rte_eth_devices[port_id];
3787 if (queue_id >= dev->data->nb_rx_queues) {
3788 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3792 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3794 memset(qinfo, 0, sizeof(*qinfo));
3795 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3800 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3801 struct rte_eth_txq_info *qinfo)
3803 struct rte_eth_dev *dev;
3805 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3810 dev = &rte_eth_devices[port_id];
3811 if (queue_id >= dev->data->nb_tx_queues) {
3812 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3816 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3818 memset(qinfo, 0, sizeof(*qinfo));
3819 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3824 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3825 struct ether_addr *mc_addr_set,
3826 uint32_t nb_mc_addr)
3828 struct rte_eth_dev *dev;
3830 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3832 dev = &rte_eth_devices[port_id];
3833 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3834 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3835 mc_addr_set, nb_mc_addr));
3839 rte_eth_timesync_enable(uint16_t port_id)
3841 struct rte_eth_dev *dev;
3843 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3844 dev = &rte_eth_devices[port_id];
3846 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3847 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
3851 rte_eth_timesync_disable(uint16_t port_id)
3853 struct rte_eth_dev *dev;
3855 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3856 dev = &rte_eth_devices[port_id];
3858 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3859 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
3863 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3866 struct rte_eth_dev *dev;
3868 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3869 dev = &rte_eth_devices[port_id];
3871 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3872 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
3873 (dev, timestamp, flags));
3877 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3878 struct timespec *timestamp)
3880 struct rte_eth_dev *dev;
3882 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3883 dev = &rte_eth_devices[port_id];
3885 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3886 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
3891 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3893 struct rte_eth_dev *dev;
3895 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3896 dev = &rte_eth_devices[port_id];
3898 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3899 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
3904 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3906 struct rte_eth_dev *dev;
3908 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3909 dev = &rte_eth_devices[port_id];
3911 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3912 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
3917 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3919 struct rte_eth_dev *dev;
3921 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3922 dev = &rte_eth_devices[port_id];
3924 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3925 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
3930 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
3932 struct rte_eth_dev *dev;
3934 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3936 dev = &rte_eth_devices[port_id];
3937 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3938 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
3942 rte_eth_dev_get_eeprom_length(uint16_t port_id)
3944 struct rte_eth_dev *dev;
3946 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3948 dev = &rte_eth_devices[port_id];
3949 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3950 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
3954 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3956 struct rte_eth_dev *dev;
3958 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3960 dev = &rte_eth_devices[port_id];
3961 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3962 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
3966 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3968 struct rte_eth_dev *dev;
3970 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3972 dev = &rte_eth_devices[port_id];
3973 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3974 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
3977 int __rte_experimental
3978 rte_eth_dev_get_module_info(uint16_t port_id,
3979 struct rte_eth_dev_module_info *modinfo)
3981 struct rte_eth_dev *dev;
3983 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3985 dev = &rte_eth_devices[port_id];
3986 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
3987 return (*dev->dev_ops->get_module_info)(dev, modinfo);
3990 int __rte_experimental
3991 rte_eth_dev_get_module_eeprom(uint16_t port_id,
3992 struct rte_dev_eeprom_info *info)
3994 struct rte_eth_dev *dev;
3996 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3998 dev = &rte_eth_devices[port_id];
3999 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4000 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4004 rte_eth_dev_get_dcb_info(uint16_t port_id,
4005 struct rte_eth_dcb_info *dcb_info)
4007 struct rte_eth_dev *dev;
4009 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4011 dev = &rte_eth_devices[port_id];
4012 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4014 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4015 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4019 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4020 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4022 struct rte_eth_dev *dev;
4024 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4025 if (l2_tunnel == NULL) {
4026 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
4030 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4031 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
4035 dev = &rte_eth_devices[port_id];
4036 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4038 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4043 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4044 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4048 struct rte_eth_dev *dev;
4050 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4052 if (l2_tunnel == NULL) {
4053 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
4057 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4058 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
4063 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
4067 dev = &rte_eth_devices[port_id];
4068 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4070 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4071 l2_tunnel, mask, en));
4075 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4076 const struct rte_eth_desc_lim *desc_lim)
4078 if (desc_lim->nb_align != 0)
4079 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4081 if (desc_lim->nb_max != 0)
4082 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4084 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4088 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4089 uint16_t *nb_rx_desc,
4090 uint16_t *nb_tx_desc)
4092 struct rte_eth_dev *dev;
4093 struct rte_eth_dev_info dev_info;
4095 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4097 dev = &rte_eth_devices[port_id];
4098 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4100 rte_eth_dev_info_get(port_id, &dev_info);
4102 if (nb_rx_desc != NULL)
4103 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4105 if (nb_tx_desc != NULL)
4106 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4112 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4114 struct rte_eth_dev *dev;
4116 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4121 dev = &rte_eth_devices[port_id];
4123 if (*dev->dev_ops->pool_ops_supported == NULL)
4124 return 1; /* all pools are supported */
4126 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4130 * A set of values to describe the possible states of a switch domain.
4132 enum rte_eth_switch_domain_state {
4133 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4134 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4138 * Array of switch domains available for allocation. Array is sized to
4139 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4140 * ethdev ports in a single process.
4142 struct rte_eth_dev_switch {
4143 enum rte_eth_switch_domain_state state;
4144 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4146 int __rte_experimental
4147 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4151 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4153 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4154 i < RTE_MAX_ETHPORTS; i++) {
4155 if (rte_eth_switch_domains[i].state ==
4156 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4157 rte_eth_switch_domains[i].state =
4158 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4167 int __rte_experimental
4168 rte_eth_switch_domain_free(uint16_t domain_id)
4170 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4171 domain_id >= RTE_MAX_ETHPORTS)
4174 if (rte_eth_switch_domains[domain_id].state !=
4175 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4178 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4183 typedef int (*rte_eth_devargs_callback_t)(char *str, void *data);
4186 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4189 struct rte_kvargs_pair *pair;
4192 arglist->str = strdup(str_in);
4193 if (arglist->str == NULL)
4196 letter = arglist->str;
4199 pair = &arglist->pairs[0];
4202 case 0: /* Initial */
4205 else if (*letter == '\0')
4212 case 1: /* Parsing key */
4213 if (*letter == '=') {
4215 pair->value = letter + 1;
4217 } else if (*letter == ',' || *letter == '\0')
4222 case 2: /* Parsing value */
4225 else if (*letter == ',') {
4228 pair = &arglist->pairs[arglist->count];
4230 } else if (*letter == '\0') {
4233 pair = &arglist->pairs[arglist->count];
4238 case 3: /* Parsing list */
4241 else if (*letter == '\0')
4250 rte_eth_devargs_parse_list(char *str, rte_eth_devargs_callback_t callback,
4258 /* Single element, not a list */
4259 return callback(str, data);
4261 /* Sanity check, then strip the brackets */
4262 str_start = &str[strlen(str) - 1];
4263 if (*str_start != ']') {
4264 RTE_LOG(ERR, EAL, "(%s): List does not end with ']'", str);
4270 /* Process list elements */
4280 } else if (state == 1) {
4281 if (*str == ',' || *str == '\0') {
4282 if (str > str_start) {
4283 /* Non-empty string fragment */
4285 result = callback(str_start, data);
4298 rte_eth_devargs_process_range(char *str, uint16_t *list, uint16_t *len_list,
4299 const uint16_t max_list)
4301 uint16_t lo, hi, val;
4304 result = sscanf(str, "%hu-%hu", &lo, &hi);
4306 if (*len_list >= max_list)
4308 list[(*len_list)++] = lo;
4309 } else if (result == 2) {
4310 if (lo >= hi || lo > RTE_MAX_ETHPORTS || hi > RTE_MAX_ETHPORTS)
4312 for (val = lo; val <= hi; val++) {
4313 if (*len_list >= max_list)
4315 list[(*len_list)++] = val;
4324 rte_eth_devargs_parse_representor_ports(char *str, void *data)
4326 struct rte_eth_devargs *eth_da = data;
4328 return rte_eth_devargs_process_range(str, eth_da->representor_ports,
4329 ð_da->nb_representor_ports, RTE_MAX_ETHPORTS);
4332 int __rte_experimental
4333 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4335 struct rte_kvargs args;
4336 struct rte_kvargs_pair *pair;
4340 memset(eth_da, 0, sizeof(*eth_da));
4342 result = rte_eth_devargs_tokenise(&args, dargs);
4346 for (i = 0; i < args.count; i++) {
4347 pair = &args.pairs[i];
4348 if (strcmp("representor", pair->key) == 0) {
4349 result = rte_eth_devargs_parse_list(pair->value,
4350 rte_eth_devargs_parse_representor_ports,
4364 RTE_INIT(ethdev_init_log);
4366 ethdev_init_log(void)
4368 ethdev_logtype = rte_log_register("lib.ethdev");
4369 if (ethdev_logtype >= 0)
4370 rte_log_set_level(ethdev_logtype, RTE_LOG_INFO);