1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
40 #include "rte_ether.h"
41 #include "rte_ethdev.h"
42 #include "rte_ethdev_driver.h"
43 #include "ethdev_profile.h"
45 int rte_eth_dev_logtype;
47 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
48 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
49 static uint16_t eth_dev_last_created_port;
51 /* spinlock for eth device callbacks */
52 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
54 /* spinlock for add/remove rx callbacks */
55 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
57 /* spinlock for add/remove tx callbacks */
58 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
60 /* spinlock for shared data allocation */
61 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
63 /* store statistics names and its offset in stats structure */
64 struct rte_eth_xstats_name_off {
65 char name[RTE_ETH_XSTATS_NAME_SIZE];
69 /* Shared memory between primary and secondary processes. */
71 uint64_t next_owner_id;
72 rte_spinlock_t ownership_lock;
73 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
74 } *rte_eth_dev_shared_data;
76 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
77 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
78 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
79 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
80 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
81 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
82 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
83 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
84 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
88 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
90 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
91 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
92 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
93 {"errors", offsetof(struct rte_eth_stats, q_errors)},
96 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
97 sizeof(rte_rxq_stats_strings[0]))
99 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
100 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
101 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
103 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
104 sizeof(rte_txq_stats_strings[0]))
106 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
107 { DEV_RX_OFFLOAD_##_name, #_name }
109 static const struct {
112 } rte_rx_offload_names[] = {
113 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
114 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
115 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
118 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
119 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
120 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
121 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
122 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
124 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
125 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
126 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
127 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
128 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
129 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
130 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
133 #undef RTE_RX_OFFLOAD_BIT2STR
135 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
136 { DEV_TX_OFFLOAD_##_name, #_name }
138 static const struct {
141 } rte_tx_offload_names[] = {
142 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
143 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
150 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
151 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
156 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
157 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
158 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
159 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
160 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
161 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
165 #undef RTE_TX_OFFLOAD_BIT2STR
168 * The user application callback description.
170 * It contains callback address to be registered by user application,
171 * the pointer to the parameters for callback, and the event type.
173 struct rte_eth_dev_callback {
174 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
175 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
176 void *cb_arg; /**< Parameter for callback */
177 void *ret_param; /**< Return parameter */
178 enum rte_eth_event_type event; /**< Interrupt event type */
179 uint32_t active; /**< Callback is executing */
188 rte_eth_find_next(uint16_t port_id)
190 while (port_id < RTE_MAX_ETHPORTS &&
191 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
192 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
195 if (port_id >= RTE_MAX_ETHPORTS)
196 return RTE_MAX_ETHPORTS;
202 rte_eth_dev_shared_data_prepare(void)
204 const unsigned flags = 0;
205 const struct rte_memzone *mz;
207 rte_spinlock_lock(&rte_eth_shared_data_lock);
209 if (rte_eth_dev_shared_data == NULL) {
210 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
211 /* Allocate port data and ownership shared memory. */
212 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
213 sizeof(*rte_eth_dev_shared_data),
214 rte_socket_id(), flags);
216 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
218 rte_panic("Cannot allocate ethdev shared data\n");
220 rte_eth_dev_shared_data = mz->addr;
221 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
222 rte_eth_dev_shared_data->next_owner_id =
223 RTE_ETH_DEV_NO_OWNER + 1;
224 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
225 memset(rte_eth_dev_shared_data->data, 0,
226 sizeof(rte_eth_dev_shared_data->data));
230 rte_spinlock_unlock(&rte_eth_shared_data_lock);
234 is_allocated(const struct rte_eth_dev *ethdev)
236 return ethdev->data->name[0] != '\0';
239 static struct rte_eth_dev *
240 _rte_eth_dev_allocated(const char *name)
244 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
245 if (rte_eth_devices[i].data != NULL &&
246 strcmp(rte_eth_devices[i].data->name, name) == 0)
247 return &rte_eth_devices[i];
253 rte_eth_dev_allocated(const char *name)
255 struct rte_eth_dev *ethdev;
257 rte_eth_dev_shared_data_prepare();
259 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
261 ethdev = _rte_eth_dev_allocated(name);
263 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
269 rte_eth_dev_find_free_port(void)
273 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
274 /* Using shared name field to find a free port. */
275 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
276 RTE_ASSERT(rte_eth_devices[i].state ==
281 return RTE_MAX_ETHPORTS;
284 static struct rte_eth_dev *
285 eth_dev_get(uint16_t port_id)
287 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
289 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
291 eth_dev_last_created_port = port_id;
297 rte_eth_dev_allocate(const char *name)
300 struct rte_eth_dev *eth_dev = NULL;
302 rte_eth_dev_shared_data_prepare();
304 /* Synchronize port creation between primary and secondary threads. */
305 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
307 if (_rte_eth_dev_allocated(name) != NULL) {
309 "Ethernet device with name %s already allocated\n",
314 port_id = rte_eth_dev_find_free_port();
315 if (port_id == RTE_MAX_ETHPORTS) {
317 "Reached maximum number of Ethernet ports\n");
321 eth_dev = eth_dev_get(port_id);
322 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
323 eth_dev->data->port_id = port_id;
324 eth_dev->data->mtu = ETHER_MTU;
327 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
333 * Attach to a port already registered by the primary process, which
334 * makes sure that the same device would have the same port id both
335 * in the primary and secondary process.
338 rte_eth_dev_attach_secondary(const char *name)
341 struct rte_eth_dev *eth_dev = NULL;
343 rte_eth_dev_shared_data_prepare();
345 /* Synchronize port attachment to primary port creation and release. */
346 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
348 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
349 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
352 if (i == RTE_MAX_ETHPORTS) {
354 "Device %s is not driven by the primary process\n",
357 eth_dev = eth_dev_get(i);
358 RTE_ASSERT(eth_dev->data->port_id == i);
361 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
366 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
371 rte_eth_dev_shared_data_prepare();
373 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
375 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
377 eth_dev->state = RTE_ETH_DEV_UNUSED;
379 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
380 rte_free(eth_dev->data->rx_queues);
381 rte_free(eth_dev->data->tx_queues);
382 rte_free(eth_dev->data->mac_addrs);
383 rte_free(eth_dev->data->hash_mac_addrs);
384 rte_free(eth_dev->data->dev_private);
385 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
388 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
394 rte_eth_dev_is_valid_port(uint16_t port_id)
396 if (port_id >= RTE_MAX_ETHPORTS ||
397 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
404 rte_eth_is_valid_owner_id(uint64_t owner_id)
406 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
407 rte_eth_dev_shared_data->next_owner_id <= owner_id)
413 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
415 while (port_id < RTE_MAX_ETHPORTS &&
416 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
417 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
418 rte_eth_devices[port_id].data->owner.id != owner_id))
421 if (port_id >= RTE_MAX_ETHPORTS)
422 return RTE_MAX_ETHPORTS;
427 int __rte_experimental
428 rte_eth_dev_owner_new(uint64_t *owner_id)
430 rte_eth_dev_shared_data_prepare();
432 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
434 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
436 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
441 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
442 const struct rte_eth_dev_owner *new_owner)
444 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
445 struct rte_eth_dev_owner *port_owner;
448 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
449 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
454 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
455 !rte_eth_is_valid_owner_id(old_owner_id)) {
457 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
458 old_owner_id, new_owner->id);
462 port_owner = &rte_eth_devices[port_id].data->owner;
463 if (port_owner->id != old_owner_id) {
465 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
466 port_id, port_owner->name, port_owner->id);
470 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
472 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
473 RTE_ETHDEV_LOG(ERR, "Port %u owner name was truncated\n",
476 port_owner->id = new_owner->id;
478 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
479 port_id, new_owner->name, new_owner->id);
484 int __rte_experimental
485 rte_eth_dev_owner_set(const uint16_t port_id,
486 const struct rte_eth_dev_owner *owner)
490 rte_eth_dev_shared_data_prepare();
492 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
494 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
496 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
500 int __rte_experimental
501 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
503 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
504 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
507 rte_eth_dev_shared_data_prepare();
509 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
511 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
513 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
517 void __rte_experimental
518 rte_eth_dev_owner_delete(const uint64_t owner_id)
522 rte_eth_dev_shared_data_prepare();
524 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
526 if (rte_eth_is_valid_owner_id(owner_id)) {
527 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
528 if (rte_eth_devices[port_id].data->owner.id == owner_id)
529 memset(&rte_eth_devices[port_id].data->owner, 0,
530 sizeof(struct rte_eth_dev_owner));
531 RTE_ETHDEV_LOG(NOTICE,
532 "All port owners owned by %016"PRIx64" identifier have removed\n",
536 "Invalid owner id=%016"PRIx64"\n",
540 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
543 int __rte_experimental
544 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
547 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
549 rte_eth_dev_shared_data_prepare();
551 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
553 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
554 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
558 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
561 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
566 rte_eth_dev_socket_id(uint16_t port_id)
568 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
569 return rte_eth_devices[port_id].data->numa_node;
573 rte_eth_dev_get_sec_ctx(uint16_t port_id)
575 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
576 return rte_eth_devices[port_id].security_ctx;
580 rte_eth_dev_count(void)
582 return rte_eth_dev_count_avail();
586 rte_eth_dev_count_avail(void)
593 RTE_ETH_FOREACH_DEV(p)
599 uint16_t __rte_experimental
600 rte_eth_dev_count_total(void)
602 uint16_t port, count = 0;
604 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
605 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
612 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
616 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
619 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
623 /* shouldn't check 'rte_eth_devices[i].data',
624 * because it might be overwritten by VDEV PMD */
625 tmp = rte_eth_dev_shared_data->data[port_id].name;
631 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
636 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
640 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
641 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
642 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
652 eth_err(uint16_t port_id, int ret)
656 if (rte_eth_dev_is_removed(port_id))
661 /* attach the new device, then store port_id of the device */
663 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
665 int current = rte_eth_dev_count_total();
666 struct rte_devargs da;
669 memset(&da, 0, sizeof(da));
671 if ((devargs == NULL) || (port_id == NULL)) {
677 if (rte_devargs_parse(&da, devargs))
680 ret = rte_eal_hotplug_add(da.bus->name, da.name, da.args);
684 /* no point looking at the port count if no port exists */
685 if (!rte_eth_dev_count_total()) {
686 RTE_ETHDEV_LOG(ERR, "No port found for device (%s)\n", da.name);
691 /* if nothing happened, there is a bug here, since some driver told us
692 * it did attach a device, but did not create a port.
693 * FIXME: race condition in case of plug-out of another device
695 if (current == rte_eth_dev_count_total()) {
700 *port_id = eth_dev_last_created_port;
708 /* detach the device, then store the name of the device */
710 rte_eth_dev_detach(uint16_t port_id, char *name __rte_unused)
712 struct rte_device *dev;
717 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
719 dev_flags = rte_eth_devices[port_id].data->dev_flags;
720 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
722 "Port %"PRIu16" is bonded, cannot detach\n", port_id);
726 dev = rte_eth_devices[port_id].device;
730 bus = rte_bus_find_by_device(dev);
734 ret = rte_eal_hotplug_remove(bus->name, dev->name);
738 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
743 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
745 uint16_t old_nb_queues = dev->data->nb_rx_queues;
749 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
750 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
751 sizeof(dev->data->rx_queues[0]) * nb_queues,
752 RTE_CACHE_LINE_SIZE);
753 if (dev->data->rx_queues == NULL) {
754 dev->data->nb_rx_queues = 0;
757 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
758 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
760 rxq = dev->data->rx_queues;
762 for (i = nb_queues; i < old_nb_queues; i++)
763 (*dev->dev_ops->rx_queue_release)(rxq[i]);
764 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
765 RTE_CACHE_LINE_SIZE);
768 if (nb_queues > old_nb_queues) {
769 uint16_t new_qs = nb_queues - old_nb_queues;
771 memset(rxq + old_nb_queues, 0,
772 sizeof(rxq[0]) * new_qs);
775 dev->data->rx_queues = rxq;
777 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
778 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
780 rxq = dev->data->rx_queues;
782 for (i = nb_queues; i < old_nb_queues; i++)
783 (*dev->dev_ops->rx_queue_release)(rxq[i]);
785 rte_free(dev->data->rx_queues);
786 dev->data->rx_queues = NULL;
788 dev->data->nb_rx_queues = nb_queues;
793 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
795 struct rte_eth_dev *dev;
797 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
799 dev = &rte_eth_devices[port_id];
800 if (!dev->data->dev_started) {
802 "Port %u must be started before start any queue\n",
807 if (rx_queue_id >= dev->data->nb_rx_queues) {
808 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
812 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
814 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
816 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
817 rx_queue_id, port_id);
821 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
827 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
829 struct rte_eth_dev *dev;
831 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
833 dev = &rte_eth_devices[port_id];
834 if (rx_queue_id >= dev->data->nb_rx_queues) {
835 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
839 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
841 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
843 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
844 rx_queue_id, port_id);
848 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
853 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
855 struct rte_eth_dev *dev;
857 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
859 dev = &rte_eth_devices[port_id];
860 if (!dev->data->dev_started) {
862 "Port %u must be started before start any queue\n",
867 if (tx_queue_id >= dev->data->nb_tx_queues) {
868 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
872 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
874 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
876 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
877 tx_queue_id, port_id);
881 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
885 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
887 struct rte_eth_dev *dev;
889 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
891 dev = &rte_eth_devices[port_id];
892 if (tx_queue_id >= dev->data->nb_tx_queues) {
893 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
897 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
899 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
901 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
902 tx_queue_id, port_id);
906 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
911 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
913 uint16_t old_nb_queues = dev->data->nb_tx_queues;
917 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
918 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
919 sizeof(dev->data->tx_queues[0]) * nb_queues,
920 RTE_CACHE_LINE_SIZE);
921 if (dev->data->tx_queues == NULL) {
922 dev->data->nb_tx_queues = 0;
925 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
926 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
928 txq = dev->data->tx_queues;
930 for (i = nb_queues; i < old_nb_queues; i++)
931 (*dev->dev_ops->tx_queue_release)(txq[i]);
932 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
933 RTE_CACHE_LINE_SIZE);
936 if (nb_queues > old_nb_queues) {
937 uint16_t new_qs = nb_queues - old_nb_queues;
939 memset(txq + old_nb_queues, 0,
940 sizeof(txq[0]) * new_qs);
943 dev->data->tx_queues = txq;
945 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
946 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
948 txq = dev->data->tx_queues;
950 for (i = nb_queues; i < old_nb_queues; i++)
951 (*dev->dev_ops->tx_queue_release)(txq[i]);
953 rte_free(dev->data->tx_queues);
954 dev->data->tx_queues = NULL;
956 dev->data->nb_tx_queues = nb_queues;
961 rte_eth_speed_bitflag(uint32_t speed, int duplex)
964 case ETH_SPEED_NUM_10M:
965 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
966 case ETH_SPEED_NUM_100M:
967 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
968 case ETH_SPEED_NUM_1G:
969 return ETH_LINK_SPEED_1G;
970 case ETH_SPEED_NUM_2_5G:
971 return ETH_LINK_SPEED_2_5G;
972 case ETH_SPEED_NUM_5G:
973 return ETH_LINK_SPEED_5G;
974 case ETH_SPEED_NUM_10G:
975 return ETH_LINK_SPEED_10G;
976 case ETH_SPEED_NUM_20G:
977 return ETH_LINK_SPEED_20G;
978 case ETH_SPEED_NUM_25G:
979 return ETH_LINK_SPEED_25G;
980 case ETH_SPEED_NUM_40G:
981 return ETH_LINK_SPEED_40G;
982 case ETH_SPEED_NUM_50G:
983 return ETH_LINK_SPEED_50G;
984 case ETH_SPEED_NUM_56G:
985 return ETH_LINK_SPEED_56G;
986 case ETH_SPEED_NUM_100G:
987 return ETH_LINK_SPEED_100G;
993 const char * __rte_experimental
994 rte_eth_dev_rx_offload_name(uint64_t offload)
996 const char *name = "UNKNOWN";
999 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1000 if (offload == rte_rx_offload_names[i].offload) {
1001 name = rte_rx_offload_names[i].name;
1009 const char * __rte_experimental
1010 rte_eth_dev_tx_offload_name(uint64_t offload)
1012 const char *name = "UNKNOWN";
1015 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1016 if (offload == rte_tx_offload_names[i].offload) {
1017 name = rte_tx_offload_names[i].name;
1026 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1027 const struct rte_eth_conf *dev_conf)
1029 struct rte_eth_dev *dev;
1030 struct rte_eth_dev_info dev_info;
1031 struct rte_eth_conf local_conf = *dev_conf;
1034 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1036 dev = &rte_eth_devices[port_id];
1038 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1039 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1041 rte_eth_dev_info_get(port_id, &dev_info);
1043 /* If number of queues specified by application for both Rx and Tx is
1044 * zero, use driver preferred values. This cannot be done individually
1045 * as it is valid for either Tx or Rx (but not both) to be zero.
1046 * If driver does not provide any preferred valued, fall back on
1049 if (nb_rx_q == 0 && nb_tx_q == 0) {
1050 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1052 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1053 nb_tx_q = dev_info.default_txportconf.nb_queues;
1055 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1058 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1060 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1061 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1065 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1067 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1068 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1072 if (dev->data->dev_started) {
1074 "Port %u must be stopped to allow configuration\n",
1079 /* Copy the dev_conf parameter into the dev structure */
1080 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1083 * Check that the numbers of RX and TX queues are not greater
1084 * than the maximum number of RX and TX queues supported by the
1085 * configured device.
1087 if (nb_rx_q > dev_info.max_rx_queues) {
1088 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1089 port_id, nb_rx_q, dev_info.max_rx_queues);
1093 if (nb_tx_q > dev_info.max_tx_queues) {
1094 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1095 port_id, nb_tx_q, dev_info.max_tx_queues);
1099 /* Check that the device supports requested interrupts */
1100 if ((dev_conf->intr_conf.lsc == 1) &&
1101 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1102 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1103 dev->device->driver->name);
1106 if ((dev_conf->intr_conf.rmv == 1) &&
1107 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1108 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1109 dev->device->driver->name);
1114 * If jumbo frames are enabled, check that the maximum RX packet
1115 * length is supported by the configured device.
1117 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1118 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1120 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1121 port_id, dev_conf->rxmode.max_rx_pkt_len,
1122 dev_info.max_rx_pktlen);
1124 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1126 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1127 port_id, dev_conf->rxmode.max_rx_pkt_len,
1128 (unsigned)ETHER_MIN_LEN);
1132 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1133 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1134 /* Use default value */
1135 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1139 /* Any requested offloading must be within its device capabilities */
1140 if ((local_conf.rxmode.offloads & dev_info.rx_offload_capa) !=
1141 local_conf.rxmode.offloads) {
1143 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1144 "capabilities 0x%"PRIx64" in %s()\n",
1145 port_id, local_conf.rxmode.offloads,
1146 dev_info.rx_offload_capa,
1150 if ((local_conf.txmode.offloads & dev_info.tx_offload_capa) !=
1151 local_conf.txmode.offloads) {
1153 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1154 "capabilities 0x%"PRIx64" in %s()\n",
1155 port_id, local_conf.txmode.offloads,
1156 dev_info.tx_offload_capa,
1161 /* Check that device supports requested rss hash functions. */
1162 if ((dev_info.flow_type_rss_offloads |
1163 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1164 dev_info.flow_type_rss_offloads) {
1166 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1167 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1168 dev_info.flow_type_rss_offloads);
1173 * Setup new number of RX/TX queues and reconfigure device.
1175 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1178 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1183 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1186 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1188 rte_eth_dev_rx_queue_config(dev, 0);
1192 diag = (*dev->dev_ops->dev_configure)(dev);
1194 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1196 rte_eth_dev_rx_queue_config(dev, 0);
1197 rte_eth_dev_tx_queue_config(dev, 0);
1198 return eth_err(port_id, diag);
1201 /* Initialize Rx profiling if enabled at compilation time. */
1202 diag = __rte_eth_dev_profile_init(port_id, dev);
1204 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1206 rte_eth_dev_rx_queue_config(dev, 0);
1207 rte_eth_dev_tx_queue_config(dev, 0);
1208 return eth_err(port_id, diag);
1215 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1217 if (dev->data->dev_started) {
1218 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1219 dev->data->port_id);
1223 rte_eth_dev_rx_queue_config(dev, 0);
1224 rte_eth_dev_tx_queue_config(dev, 0);
1226 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1230 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1231 struct rte_eth_dev_info *dev_info)
1233 struct ether_addr *addr;
1238 /* replay MAC address configuration including default MAC */
1239 addr = &dev->data->mac_addrs[0];
1240 if (*dev->dev_ops->mac_addr_set != NULL)
1241 (*dev->dev_ops->mac_addr_set)(dev, addr);
1242 else if (*dev->dev_ops->mac_addr_add != NULL)
1243 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1245 if (*dev->dev_ops->mac_addr_add != NULL) {
1246 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1247 addr = &dev->data->mac_addrs[i];
1249 /* skip zero address */
1250 if (is_zero_ether_addr(addr))
1254 pool_mask = dev->data->mac_pool_sel[i];
1257 if (pool_mask & 1ULL)
1258 (*dev->dev_ops->mac_addr_add)(dev,
1262 } while (pool_mask);
1268 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1269 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1271 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1272 rte_eth_dev_mac_restore(dev, dev_info);
1274 /* replay promiscuous configuration */
1275 if (rte_eth_promiscuous_get(port_id) == 1)
1276 rte_eth_promiscuous_enable(port_id);
1277 else if (rte_eth_promiscuous_get(port_id) == 0)
1278 rte_eth_promiscuous_disable(port_id);
1280 /* replay all multicast configuration */
1281 if (rte_eth_allmulticast_get(port_id) == 1)
1282 rte_eth_allmulticast_enable(port_id);
1283 else if (rte_eth_allmulticast_get(port_id) == 0)
1284 rte_eth_allmulticast_disable(port_id);
1288 rte_eth_dev_start(uint16_t port_id)
1290 struct rte_eth_dev *dev;
1291 struct rte_eth_dev_info dev_info;
1294 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1296 dev = &rte_eth_devices[port_id];
1298 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1300 if (dev->data->dev_started != 0) {
1301 RTE_ETHDEV_LOG(INFO,
1302 "Device with port_id=%"PRIu16" already started\n",
1307 rte_eth_dev_info_get(port_id, &dev_info);
1309 /* Lets restore MAC now if device does not support live change */
1310 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1311 rte_eth_dev_mac_restore(dev, &dev_info);
1313 diag = (*dev->dev_ops->dev_start)(dev);
1315 dev->data->dev_started = 1;
1317 return eth_err(port_id, diag);
1319 rte_eth_dev_config_restore(dev, &dev_info, port_id);
1321 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1322 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1323 (*dev->dev_ops->link_update)(dev, 0);
1329 rte_eth_dev_stop(uint16_t port_id)
1331 struct rte_eth_dev *dev;
1333 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1334 dev = &rte_eth_devices[port_id];
1336 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1338 if (dev->data->dev_started == 0) {
1339 RTE_ETHDEV_LOG(INFO,
1340 "Device with port_id=%"PRIu16" already stopped\n",
1345 dev->data->dev_started = 0;
1346 (*dev->dev_ops->dev_stop)(dev);
1350 rte_eth_dev_set_link_up(uint16_t port_id)
1352 struct rte_eth_dev *dev;
1354 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1356 dev = &rte_eth_devices[port_id];
1358 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1359 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1363 rte_eth_dev_set_link_down(uint16_t port_id)
1365 struct rte_eth_dev *dev;
1367 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1369 dev = &rte_eth_devices[port_id];
1371 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1372 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1376 rte_eth_dev_close(uint16_t port_id)
1378 struct rte_eth_dev *dev;
1380 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1381 dev = &rte_eth_devices[port_id];
1383 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1384 dev->data->dev_started = 0;
1385 (*dev->dev_ops->dev_close)(dev);
1387 /* check behaviour flag - temporary for PMD migration */
1388 if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1389 /* new behaviour: send event + reset state + free all data */
1390 rte_eth_dev_release_port(dev);
1393 RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1394 "The driver %s should migrate to the new behaviour.\n",
1395 dev->device->driver->name);
1396 /* old behaviour: only free queue arrays */
1397 dev->data->nb_rx_queues = 0;
1398 rte_free(dev->data->rx_queues);
1399 dev->data->rx_queues = NULL;
1400 dev->data->nb_tx_queues = 0;
1401 rte_free(dev->data->tx_queues);
1402 dev->data->tx_queues = NULL;
1406 rte_eth_dev_reset(uint16_t port_id)
1408 struct rte_eth_dev *dev;
1411 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1412 dev = &rte_eth_devices[port_id];
1414 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1416 rte_eth_dev_stop(port_id);
1417 ret = dev->dev_ops->dev_reset(dev);
1419 return eth_err(port_id, ret);
1422 int __rte_experimental
1423 rte_eth_dev_is_removed(uint16_t port_id)
1425 struct rte_eth_dev *dev;
1428 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1430 dev = &rte_eth_devices[port_id];
1432 if (dev->state == RTE_ETH_DEV_REMOVED)
1435 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1437 ret = dev->dev_ops->is_removed(dev);
1439 /* Device is physically removed. */
1440 dev->state = RTE_ETH_DEV_REMOVED;
1446 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1447 uint16_t nb_rx_desc, unsigned int socket_id,
1448 const struct rte_eth_rxconf *rx_conf,
1449 struct rte_mempool *mp)
1452 uint32_t mbp_buf_size;
1453 struct rte_eth_dev *dev;
1454 struct rte_eth_dev_info dev_info;
1455 struct rte_eth_rxconf local_conf;
1458 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1460 dev = &rte_eth_devices[port_id];
1461 if (rx_queue_id >= dev->data->nb_rx_queues) {
1462 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1466 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1467 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1470 * Check the size of the mbuf data buffer.
1471 * This value must be provided in the private data of the memory pool.
1472 * First check that the memory pool has a valid private data.
1474 rte_eth_dev_info_get(port_id, &dev_info);
1475 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1476 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1477 mp->name, (int)mp->private_data_size,
1478 (int)sizeof(struct rte_pktmbuf_pool_private));
1481 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1483 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1485 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1486 mp->name, (int)mbp_buf_size,
1487 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1488 (int)RTE_PKTMBUF_HEADROOM,
1489 (int)dev_info.min_rx_bufsize);
1493 /* Use default specified by driver, if nb_rx_desc is zero */
1494 if (nb_rx_desc == 0) {
1495 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1496 /* If driver default is also zero, fall back on EAL default */
1497 if (nb_rx_desc == 0)
1498 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1501 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1502 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1503 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1506 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1507 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1508 dev_info.rx_desc_lim.nb_min,
1509 dev_info.rx_desc_lim.nb_align);
1513 if (dev->data->dev_started &&
1514 !(dev_info.dev_capa &
1515 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1518 if (dev->data->dev_started &&
1519 (dev->data->rx_queue_state[rx_queue_id] !=
1520 RTE_ETH_QUEUE_STATE_STOPPED))
1523 rxq = dev->data->rx_queues;
1524 if (rxq[rx_queue_id]) {
1525 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1527 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1528 rxq[rx_queue_id] = NULL;
1531 if (rx_conf == NULL)
1532 rx_conf = &dev_info.default_rxconf;
1534 local_conf = *rx_conf;
1537 * If an offloading has already been enabled in
1538 * rte_eth_dev_configure(), it has been enabled on all queues,
1539 * so there is no need to enable it in this queue again.
1540 * The local_conf.offloads input to underlying PMD only carries
1541 * those offloadings which are only enabled on this queue and
1542 * not enabled on all queues.
1544 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1547 * New added offloadings for this queue are those not enabled in
1548 * rte_eth_dev_configure() and they must be per-queue type.
1549 * A pure per-port offloading can't be enabled on a queue while
1550 * disabled on another queue. A pure per-port offloading can't
1551 * be enabled for any queue as new added one if it hasn't been
1552 * enabled in rte_eth_dev_configure().
1554 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1555 local_conf.offloads) {
1557 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1558 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1559 port_id, rx_queue_id, local_conf.offloads,
1560 dev_info.rx_queue_offload_capa,
1565 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1566 socket_id, &local_conf, mp);
1568 if (!dev->data->min_rx_buf_size ||
1569 dev->data->min_rx_buf_size > mbp_buf_size)
1570 dev->data->min_rx_buf_size = mbp_buf_size;
1573 return eth_err(port_id, ret);
1577 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1578 uint16_t nb_tx_desc, unsigned int socket_id,
1579 const struct rte_eth_txconf *tx_conf)
1581 struct rte_eth_dev *dev;
1582 struct rte_eth_dev_info dev_info;
1583 struct rte_eth_txconf local_conf;
1586 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1588 dev = &rte_eth_devices[port_id];
1589 if (tx_queue_id >= dev->data->nb_tx_queues) {
1590 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1594 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1595 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1597 rte_eth_dev_info_get(port_id, &dev_info);
1599 /* Use default specified by driver, if nb_tx_desc is zero */
1600 if (nb_tx_desc == 0) {
1601 nb_tx_desc = dev_info.default_txportconf.ring_size;
1602 /* If driver default is zero, fall back on EAL default */
1603 if (nb_tx_desc == 0)
1604 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1606 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1607 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1608 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1610 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1611 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1612 dev_info.tx_desc_lim.nb_min,
1613 dev_info.tx_desc_lim.nb_align);
1617 if (dev->data->dev_started &&
1618 !(dev_info.dev_capa &
1619 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1622 if (dev->data->dev_started &&
1623 (dev->data->tx_queue_state[tx_queue_id] !=
1624 RTE_ETH_QUEUE_STATE_STOPPED))
1627 txq = dev->data->tx_queues;
1628 if (txq[tx_queue_id]) {
1629 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1631 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1632 txq[tx_queue_id] = NULL;
1635 if (tx_conf == NULL)
1636 tx_conf = &dev_info.default_txconf;
1638 local_conf = *tx_conf;
1641 * If an offloading has already been enabled in
1642 * rte_eth_dev_configure(), it has been enabled on all queues,
1643 * so there is no need to enable it in this queue again.
1644 * The local_conf.offloads input to underlying PMD only carries
1645 * those offloadings which are only enabled on this queue and
1646 * not enabled on all queues.
1648 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1651 * New added offloadings for this queue are those not enabled in
1652 * rte_eth_dev_configure() and they must be per-queue type.
1653 * A pure per-port offloading can't be enabled on a queue while
1654 * disabled on another queue. A pure per-port offloading can't
1655 * be enabled for any queue as new added one if it hasn't been
1656 * enabled in rte_eth_dev_configure().
1658 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1659 local_conf.offloads) {
1661 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1662 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1663 port_id, tx_queue_id, local_conf.offloads,
1664 dev_info.tx_queue_offload_capa,
1669 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1670 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1674 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1675 void *userdata __rte_unused)
1679 for (i = 0; i < unsent; i++)
1680 rte_pktmbuf_free(pkts[i]);
1684 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1687 uint64_t *count = userdata;
1690 for (i = 0; i < unsent; i++)
1691 rte_pktmbuf_free(pkts[i]);
1697 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1698 buffer_tx_error_fn cbfn, void *userdata)
1700 buffer->error_callback = cbfn;
1701 buffer->error_userdata = userdata;
1706 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1713 buffer->size = size;
1714 if (buffer->error_callback == NULL) {
1715 ret = rte_eth_tx_buffer_set_err_callback(
1716 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1723 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1725 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1728 /* Validate Input Data. Bail if not valid or not supported. */
1729 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1730 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1732 /* Call driver to free pending mbufs. */
1733 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1735 return eth_err(port_id, ret);
1739 rte_eth_promiscuous_enable(uint16_t port_id)
1741 struct rte_eth_dev *dev;
1743 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1744 dev = &rte_eth_devices[port_id];
1746 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1747 (*dev->dev_ops->promiscuous_enable)(dev);
1748 dev->data->promiscuous = 1;
1752 rte_eth_promiscuous_disable(uint16_t port_id)
1754 struct rte_eth_dev *dev;
1756 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1757 dev = &rte_eth_devices[port_id];
1759 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1760 dev->data->promiscuous = 0;
1761 (*dev->dev_ops->promiscuous_disable)(dev);
1765 rte_eth_promiscuous_get(uint16_t port_id)
1767 struct rte_eth_dev *dev;
1769 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1771 dev = &rte_eth_devices[port_id];
1772 return dev->data->promiscuous;
1776 rte_eth_allmulticast_enable(uint16_t port_id)
1778 struct rte_eth_dev *dev;
1780 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1781 dev = &rte_eth_devices[port_id];
1783 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1784 (*dev->dev_ops->allmulticast_enable)(dev);
1785 dev->data->all_multicast = 1;
1789 rte_eth_allmulticast_disable(uint16_t port_id)
1791 struct rte_eth_dev *dev;
1793 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1794 dev = &rte_eth_devices[port_id];
1796 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1797 dev->data->all_multicast = 0;
1798 (*dev->dev_ops->allmulticast_disable)(dev);
1802 rte_eth_allmulticast_get(uint16_t port_id)
1804 struct rte_eth_dev *dev;
1806 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1808 dev = &rte_eth_devices[port_id];
1809 return dev->data->all_multicast;
1813 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1815 struct rte_eth_dev *dev;
1817 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1818 dev = &rte_eth_devices[port_id];
1820 if (dev->data->dev_conf.intr_conf.lsc &&
1821 dev->data->dev_started)
1822 rte_eth_linkstatus_get(dev, eth_link);
1824 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1825 (*dev->dev_ops->link_update)(dev, 1);
1826 *eth_link = dev->data->dev_link;
1831 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1833 struct rte_eth_dev *dev;
1835 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1836 dev = &rte_eth_devices[port_id];
1838 if (dev->data->dev_conf.intr_conf.lsc &&
1839 dev->data->dev_started)
1840 rte_eth_linkstatus_get(dev, eth_link);
1842 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1843 (*dev->dev_ops->link_update)(dev, 0);
1844 *eth_link = dev->data->dev_link;
1849 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1851 struct rte_eth_dev *dev;
1853 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1855 dev = &rte_eth_devices[port_id];
1856 memset(stats, 0, sizeof(*stats));
1858 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1859 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1860 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1864 rte_eth_stats_reset(uint16_t port_id)
1866 struct rte_eth_dev *dev;
1868 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1869 dev = &rte_eth_devices[port_id];
1871 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1872 (*dev->dev_ops->stats_reset)(dev);
1873 dev->data->rx_mbuf_alloc_failed = 0;
1879 get_xstats_basic_count(struct rte_eth_dev *dev)
1881 uint16_t nb_rxqs, nb_txqs;
1884 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1885 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1887 count = RTE_NB_STATS;
1888 count += nb_rxqs * RTE_NB_RXQ_STATS;
1889 count += nb_txqs * RTE_NB_TXQ_STATS;
1895 get_xstats_count(uint16_t port_id)
1897 struct rte_eth_dev *dev;
1900 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1901 dev = &rte_eth_devices[port_id];
1902 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1903 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1906 return eth_err(port_id, count);
1908 if (dev->dev_ops->xstats_get_names != NULL) {
1909 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1911 return eth_err(port_id, count);
1916 count += get_xstats_basic_count(dev);
1922 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1925 int cnt_xstats, idx_xstat;
1927 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1930 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
1935 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
1940 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1941 if (cnt_xstats < 0) {
1942 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
1946 /* Get id-name lookup table */
1947 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1949 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1950 port_id, xstats_names, cnt_xstats, NULL)) {
1951 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
1955 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1956 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1965 /* retrieve basic stats names */
1967 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1968 struct rte_eth_xstat_name *xstats_names)
1970 int cnt_used_entries = 0;
1971 uint32_t idx, id_queue;
1974 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1975 snprintf(xstats_names[cnt_used_entries].name,
1976 sizeof(xstats_names[0].name),
1977 "%s", rte_stats_strings[idx].name);
1980 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1981 for (id_queue = 0; id_queue < num_q; id_queue++) {
1982 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1983 snprintf(xstats_names[cnt_used_entries].name,
1984 sizeof(xstats_names[0].name),
1986 id_queue, rte_rxq_stats_strings[idx].name);
1991 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1992 for (id_queue = 0; id_queue < num_q; id_queue++) {
1993 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1994 snprintf(xstats_names[cnt_used_entries].name,
1995 sizeof(xstats_names[0].name),
1997 id_queue, rte_txq_stats_strings[idx].name);
2001 return cnt_used_entries;
2004 /* retrieve ethdev extended statistics names */
2006 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2007 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2010 struct rte_eth_xstat_name *xstats_names_copy;
2011 unsigned int no_basic_stat_requested = 1;
2012 unsigned int no_ext_stat_requested = 1;
2013 unsigned int expected_entries;
2014 unsigned int basic_count;
2015 struct rte_eth_dev *dev;
2019 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2020 dev = &rte_eth_devices[port_id];
2022 basic_count = get_xstats_basic_count(dev);
2023 ret = get_xstats_count(port_id);
2026 expected_entries = (unsigned int)ret;
2028 /* Return max number of stats if no ids given */
2031 return expected_entries;
2032 else if (xstats_names && size < expected_entries)
2033 return expected_entries;
2036 if (ids && !xstats_names)
2039 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2040 uint64_t ids_copy[size];
2042 for (i = 0; i < size; i++) {
2043 if (ids[i] < basic_count) {
2044 no_basic_stat_requested = 0;
2049 * Convert ids to xstats ids that PMD knows.
2050 * ids known by user are basic + extended stats.
2052 ids_copy[i] = ids[i] - basic_count;
2055 if (no_basic_stat_requested)
2056 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2057 xstats_names, ids_copy, size);
2060 /* Retrieve all stats */
2062 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2064 if (num_stats < 0 || num_stats > (int)expected_entries)
2067 return expected_entries;
2070 xstats_names_copy = calloc(expected_entries,
2071 sizeof(struct rte_eth_xstat_name));
2073 if (!xstats_names_copy) {
2074 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2079 for (i = 0; i < size; i++) {
2080 if (ids[i] >= basic_count) {
2081 no_ext_stat_requested = 0;
2087 /* Fill xstats_names_copy structure */
2088 if (ids && no_ext_stat_requested) {
2089 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2091 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2094 free(xstats_names_copy);
2100 for (i = 0; i < size; i++) {
2101 if (ids[i] >= expected_entries) {
2102 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2103 free(xstats_names_copy);
2106 xstats_names[i] = xstats_names_copy[ids[i]];
2109 free(xstats_names_copy);
2114 rte_eth_xstats_get_names(uint16_t port_id,
2115 struct rte_eth_xstat_name *xstats_names,
2118 struct rte_eth_dev *dev;
2119 int cnt_used_entries;
2120 int cnt_expected_entries;
2121 int cnt_driver_entries;
2123 cnt_expected_entries = get_xstats_count(port_id);
2124 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2125 (int)size < cnt_expected_entries)
2126 return cnt_expected_entries;
2128 /* port_id checked in get_xstats_count() */
2129 dev = &rte_eth_devices[port_id];
2131 cnt_used_entries = rte_eth_basic_stats_get_names(
2134 if (dev->dev_ops->xstats_get_names != NULL) {
2135 /* If there are any driver-specific xstats, append them
2138 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2140 xstats_names + cnt_used_entries,
2141 size - cnt_used_entries);
2142 if (cnt_driver_entries < 0)
2143 return eth_err(port_id, cnt_driver_entries);
2144 cnt_used_entries += cnt_driver_entries;
2147 return cnt_used_entries;
2152 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2154 struct rte_eth_dev *dev;
2155 struct rte_eth_stats eth_stats;
2156 unsigned int count = 0, i, q;
2157 uint64_t val, *stats_ptr;
2158 uint16_t nb_rxqs, nb_txqs;
2161 ret = rte_eth_stats_get(port_id, ð_stats);
2165 dev = &rte_eth_devices[port_id];
2167 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2168 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2171 for (i = 0; i < RTE_NB_STATS; i++) {
2172 stats_ptr = RTE_PTR_ADD(ð_stats,
2173 rte_stats_strings[i].offset);
2175 xstats[count++].value = val;
2179 for (q = 0; q < nb_rxqs; q++) {
2180 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2181 stats_ptr = RTE_PTR_ADD(ð_stats,
2182 rte_rxq_stats_strings[i].offset +
2183 q * sizeof(uint64_t));
2185 xstats[count++].value = val;
2190 for (q = 0; q < nb_txqs; q++) {
2191 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2192 stats_ptr = RTE_PTR_ADD(ð_stats,
2193 rte_txq_stats_strings[i].offset +
2194 q * sizeof(uint64_t));
2196 xstats[count++].value = val;
2202 /* retrieve ethdev extended statistics */
2204 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2205 uint64_t *values, unsigned int size)
2207 unsigned int no_basic_stat_requested = 1;
2208 unsigned int no_ext_stat_requested = 1;
2209 unsigned int num_xstats_filled;
2210 unsigned int basic_count;
2211 uint16_t expected_entries;
2212 struct rte_eth_dev *dev;
2216 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2217 ret = get_xstats_count(port_id);
2220 expected_entries = (uint16_t)ret;
2221 struct rte_eth_xstat xstats[expected_entries];
2222 dev = &rte_eth_devices[port_id];
2223 basic_count = get_xstats_basic_count(dev);
2225 /* Return max number of stats if no ids given */
2228 return expected_entries;
2229 else if (values && size < expected_entries)
2230 return expected_entries;
2236 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2237 unsigned int basic_count = get_xstats_basic_count(dev);
2238 uint64_t ids_copy[size];
2240 for (i = 0; i < size; i++) {
2241 if (ids[i] < basic_count) {
2242 no_basic_stat_requested = 0;
2247 * Convert ids to xstats ids that PMD knows.
2248 * ids known by user are basic + extended stats.
2250 ids_copy[i] = ids[i] - basic_count;
2253 if (no_basic_stat_requested)
2254 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2259 for (i = 0; i < size; i++) {
2260 if (ids[i] >= basic_count) {
2261 no_ext_stat_requested = 0;
2267 /* Fill the xstats structure */
2268 if (ids && no_ext_stat_requested)
2269 ret = rte_eth_basic_stats_get(port_id, xstats);
2271 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2275 num_xstats_filled = (unsigned int)ret;
2277 /* Return all stats */
2279 for (i = 0; i < num_xstats_filled; i++)
2280 values[i] = xstats[i].value;
2281 return expected_entries;
2285 for (i = 0; i < size; i++) {
2286 if (ids[i] >= expected_entries) {
2287 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2290 values[i] = xstats[ids[i]].value;
2296 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2299 struct rte_eth_dev *dev;
2300 unsigned int count = 0, i;
2301 signed int xcount = 0;
2302 uint16_t nb_rxqs, nb_txqs;
2305 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2307 dev = &rte_eth_devices[port_id];
2309 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2310 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2312 /* Return generic statistics */
2313 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2314 (nb_txqs * RTE_NB_TXQ_STATS);
2316 /* implemented by the driver */
2317 if (dev->dev_ops->xstats_get != NULL) {
2318 /* Retrieve the xstats from the driver at the end of the
2321 xcount = (*dev->dev_ops->xstats_get)(dev,
2322 xstats ? xstats + count : NULL,
2323 (n > count) ? n - count : 0);
2326 return eth_err(port_id, xcount);
2329 if (n < count + xcount || xstats == NULL)
2330 return count + xcount;
2332 /* now fill the xstats structure */
2333 ret = rte_eth_basic_stats_get(port_id, xstats);
2338 for (i = 0; i < count; i++)
2340 /* add an offset to driver-specific stats */
2341 for ( ; i < count + xcount; i++)
2342 xstats[i].id += count;
2344 return count + xcount;
2347 /* reset ethdev extended statistics */
2349 rte_eth_xstats_reset(uint16_t port_id)
2351 struct rte_eth_dev *dev;
2353 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2354 dev = &rte_eth_devices[port_id];
2356 /* implemented by the driver */
2357 if (dev->dev_ops->xstats_reset != NULL) {
2358 (*dev->dev_ops->xstats_reset)(dev);
2362 /* fallback to default */
2363 rte_eth_stats_reset(port_id);
2367 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2370 struct rte_eth_dev *dev;
2372 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2374 dev = &rte_eth_devices[port_id];
2376 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2378 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2381 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2384 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2387 return (*dev->dev_ops->queue_stats_mapping_set)
2388 (dev, queue_id, stat_idx, is_rx);
2393 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2396 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2397 stat_idx, STAT_QMAP_TX));
2402 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2405 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2406 stat_idx, STAT_QMAP_RX));
2410 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2412 struct rte_eth_dev *dev;
2414 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2415 dev = &rte_eth_devices[port_id];
2417 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2418 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2419 fw_version, fw_size));
2423 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2425 struct rte_eth_dev *dev;
2426 const struct rte_eth_desc_lim lim = {
2427 .nb_max = UINT16_MAX,
2432 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2433 dev = &rte_eth_devices[port_id];
2435 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2436 dev_info->rx_desc_lim = lim;
2437 dev_info->tx_desc_lim = lim;
2438 dev_info->device = dev->device;
2440 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2441 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2442 dev_info->driver_name = dev->device->driver->name;
2443 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2444 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2446 dev_info->dev_flags = &dev->data->dev_flags;
2450 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2451 uint32_t *ptypes, int num)
2454 struct rte_eth_dev *dev;
2455 const uint32_t *all_ptypes;
2457 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2458 dev = &rte_eth_devices[port_id];
2459 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2460 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2465 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2466 if (all_ptypes[i] & ptype_mask) {
2468 ptypes[j] = all_ptypes[i];
2476 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2478 struct rte_eth_dev *dev;
2480 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2481 dev = &rte_eth_devices[port_id];
2482 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2487 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2489 struct rte_eth_dev *dev;
2491 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2493 dev = &rte_eth_devices[port_id];
2494 *mtu = dev->data->mtu;
2499 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2502 struct rte_eth_dev *dev;
2504 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2505 dev = &rte_eth_devices[port_id];
2506 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2508 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2510 dev->data->mtu = mtu;
2512 return eth_err(port_id, ret);
2516 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2518 struct rte_eth_dev *dev;
2521 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2522 dev = &rte_eth_devices[port_id];
2523 if (!(dev->data->dev_conf.rxmode.offloads &
2524 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2525 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2530 if (vlan_id > 4095) {
2531 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2535 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2537 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2539 struct rte_vlan_filter_conf *vfc;
2543 vfc = &dev->data->vlan_filter_conf;
2544 vidx = vlan_id / 64;
2545 vbit = vlan_id % 64;
2548 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2550 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2553 return eth_err(port_id, ret);
2557 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2560 struct rte_eth_dev *dev;
2562 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2563 dev = &rte_eth_devices[port_id];
2564 if (rx_queue_id >= dev->data->nb_rx_queues) {
2565 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2569 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2570 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2576 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2577 enum rte_vlan_type vlan_type,
2580 struct rte_eth_dev *dev;
2582 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2583 dev = &rte_eth_devices[port_id];
2584 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2586 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2591 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2593 struct rte_eth_dev *dev;
2597 uint64_t orig_offloads;
2599 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2600 dev = &rte_eth_devices[port_id];
2602 /* save original values in case of failure */
2603 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2605 /*check which option changed by application*/
2606 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2607 org = !!(dev->data->dev_conf.rxmode.offloads &
2608 DEV_RX_OFFLOAD_VLAN_STRIP);
2611 dev->data->dev_conf.rxmode.offloads |=
2612 DEV_RX_OFFLOAD_VLAN_STRIP;
2614 dev->data->dev_conf.rxmode.offloads &=
2615 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2616 mask |= ETH_VLAN_STRIP_MASK;
2619 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2620 org = !!(dev->data->dev_conf.rxmode.offloads &
2621 DEV_RX_OFFLOAD_VLAN_FILTER);
2624 dev->data->dev_conf.rxmode.offloads |=
2625 DEV_RX_OFFLOAD_VLAN_FILTER;
2627 dev->data->dev_conf.rxmode.offloads &=
2628 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2629 mask |= ETH_VLAN_FILTER_MASK;
2632 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2633 org = !!(dev->data->dev_conf.rxmode.offloads &
2634 DEV_RX_OFFLOAD_VLAN_EXTEND);
2637 dev->data->dev_conf.rxmode.offloads |=
2638 DEV_RX_OFFLOAD_VLAN_EXTEND;
2640 dev->data->dev_conf.rxmode.offloads &=
2641 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2642 mask |= ETH_VLAN_EXTEND_MASK;
2649 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2650 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2652 /* hit an error restore original values */
2653 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2656 return eth_err(port_id, ret);
2660 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2662 struct rte_eth_dev *dev;
2665 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2666 dev = &rte_eth_devices[port_id];
2668 if (dev->data->dev_conf.rxmode.offloads &
2669 DEV_RX_OFFLOAD_VLAN_STRIP)
2670 ret |= ETH_VLAN_STRIP_OFFLOAD;
2672 if (dev->data->dev_conf.rxmode.offloads &
2673 DEV_RX_OFFLOAD_VLAN_FILTER)
2674 ret |= ETH_VLAN_FILTER_OFFLOAD;
2676 if (dev->data->dev_conf.rxmode.offloads &
2677 DEV_RX_OFFLOAD_VLAN_EXTEND)
2678 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2684 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2686 struct rte_eth_dev *dev;
2688 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2689 dev = &rte_eth_devices[port_id];
2690 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2692 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2696 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2698 struct rte_eth_dev *dev;
2700 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2701 dev = &rte_eth_devices[port_id];
2702 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2703 memset(fc_conf, 0, sizeof(*fc_conf));
2704 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2708 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2710 struct rte_eth_dev *dev;
2712 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2713 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2714 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
2718 dev = &rte_eth_devices[port_id];
2719 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2720 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2724 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2725 struct rte_eth_pfc_conf *pfc_conf)
2727 struct rte_eth_dev *dev;
2729 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2730 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2731 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
2735 dev = &rte_eth_devices[port_id];
2736 /* High water, low water validation are device specific */
2737 if (*dev->dev_ops->priority_flow_ctrl_set)
2738 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2744 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2752 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2753 for (i = 0; i < num; i++) {
2754 if (reta_conf[i].mask)
2762 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2766 uint16_t i, idx, shift;
2772 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
2776 for (i = 0; i < reta_size; i++) {
2777 idx = i / RTE_RETA_GROUP_SIZE;
2778 shift = i % RTE_RETA_GROUP_SIZE;
2779 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2780 (reta_conf[idx].reta[shift] >= max_rxq)) {
2782 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
2784 reta_conf[idx].reta[shift], max_rxq);
2793 rte_eth_dev_rss_reta_update(uint16_t port_id,
2794 struct rte_eth_rss_reta_entry64 *reta_conf,
2797 struct rte_eth_dev *dev;
2800 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2801 /* Check mask bits */
2802 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2806 dev = &rte_eth_devices[port_id];
2808 /* Check entry value */
2809 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2810 dev->data->nb_rx_queues);
2814 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2815 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2820 rte_eth_dev_rss_reta_query(uint16_t port_id,
2821 struct rte_eth_rss_reta_entry64 *reta_conf,
2824 struct rte_eth_dev *dev;
2827 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2829 /* Check mask bits */
2830 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2834 dev = &rte_eth_devices[port_id];
2835 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2836 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2841 rte_eth_dev_rss_hash_update(uint16_t port_id,
2842 struct rte_eth_rss_conf *rss_conf)
2844 struct rte_eth_dev *dev;
2845 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2847 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2848 dev = &rte_eth_devices[port_id];
2849 rte_eth_dev_info_get(port_id, &dev_info);
2850 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2851 dev_info.flow_type_rss_offloads) {
2853 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2854 port_id, rss_conf->rss_hf,
2855 dev_info.flow_type_rss_offloads);
2858 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2859 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2864 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2865 struct rte_eth_rss_conf *rss_conf)
2867 struct rte_eth_dev *dev;
2869 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2870 dev = &rte_eth_devices[port_id];
2871 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2872 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2877 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2878 struct rte_eth_udp_tunnel *udp_tunnel)
2880 struct rte_eth_dev *dev;
2882 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2883 if (udp_tunnel == NULL) {
2884 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2888 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2889 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2893 dev = &rte_eth_devices[port_id];
2894 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2895 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2900 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2901 struct rte_eth_udp_tunnel *udp_tunnel)
2903 struct rte_eth_dev *dev;
2905 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2906 dev = &rte_eth_devices[port_id];
2908 if (udp_tunnel == NULL) {
2909 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2913 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2914 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2918 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2919 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2924 rte_eth_led_on(uint16_t port_id)
2926 struct rte_eth_dev *dev;
2928 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2929 dev = &rte_eth_devices[port_id];
2930 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2931 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
2935 rte_eth_led_off(uint16_t port_id)
2937 struct rte_eth_dev *dev;
2939 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2940 dev = &rte_eth_devices[port_id];
2941 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2942 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
2946 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2950 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2952 struct rte_eth_dev_info dev_info;
2953 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2956 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2957 rte_eth_dev_info_get(port_id, &dev_info);
2959 for (i = 0; i < dev_info.max_mac_addrs; i++)
2960 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2966 static const struct ether_addr null_mac_addr;
2969 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2972 struct rte_eth_dev *dev;
2977 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2978 dev = &rte_eth_devices[port_id];
2979 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2981 if (is_zero_ether_addr(addr)) {
2982 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
2986 if (pool >= ETH_64_POOLS) {
2987 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
2991 index = get_mac_addr_index(port_id, addr);
2993 index = get_mac_addr_index(port_id, &null_mac_addr);
2995 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3000 pool_mask = dev->data->mac_pool_sel[index];
3002 /* Check if both MAC address and pool is already there, and do nothing */
3003 if (pool_mask & (1ULL << pool))
3008 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3011 /* Update address in NIC data structure */
3012 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3014 /* Update pool bitmap in NIC data structure */
3015 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3018 return eth_err(port_id, ret);
3022 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
3024 struct rte_eth_dev *dev;
3027 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3028 dev = &rte_eth_devices[port_id];
3029 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3031 index = get_mac_addr_index(port_id, addr);
3034 "Port %u: Cannot remove default MAC address\n",
3037 } else if (index < 0)
3038 return 0; /* Do nothing if address wasn't found */
3041 (*dev->dev_ops->mac_addr_remove)(dev, index);
3043 /* Update address in NIC data structure */
3044 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3046 /* reset pool bitmap */
3047 dev->data->mac_pool_sel[index] = 0;
3053 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3055 struct rte_eth_dev *dev;
3058 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3060 if (!is_valid_assigned_ether_addr(addr))
3063 dev = &rte_eth_devices[port_id];
3064 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3066 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3070 /* Update default address in NIC data structure */
3071 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3078 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3082 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3084 struct rte_eth_dev_info dev_info;
3085 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3088 rte_eth_dev_info_get(port_id, &dev_info);
3089 if (!dev->data->hash_mac_addrs)
3092 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3093 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3094 ETHER_ADDR_LEN) == 0)
3101 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3106 struct rte_eth_dev *dev;
3108 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3110 dev = &rte_eth_devices[port_id];
3111 if (is_zero_ether_addr(addr)) {
3112 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3117 index = get_hash_mac_addr_index(port_id, addr);
3118 /* Check if it's already there, and do nothing */
3119 if ((index >= 0) && on)
3125 "Port %u: the MAC address was not set in UTA\n",
3130 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3132 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3138 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3139 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3141 /* Update address in NIC data structure */
3143 ether_addr_copy(addr,
3144 &dev->data->hash_mac_addrs[index]);
3146 ether_addr_copy(&null_mac_addr,
3147 &dev->data->hash_mac_addrs[index]);
3150 return eth_err(port_id, ret);
3154 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3156 struct rte_eth_dev *dev;
3158 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3160 dev = &rte_eth_devices[port_id];
3162 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3163 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3167 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3170 struct rte_eth_dev *dev;
3171 struct rte_eth_dev_info dev_info;
3172 struct rte_eth_link link;
3174 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3176 dev = &rte_eth_devices[port_id];
3177 rte_eth_dev_info_get(port_id, &dev_info);
3178 link = dev->data->dev_link;
3180 if (queue_idx > dev_info.max_tx_queues) {
3182 "Set queue rate limit:port %u: invalid queue id=%u\n",
3183 port_id, queue_idx);
3187 if (tx_rate > link.link_speed) {
3189 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3190 tx_rate, link.link_speed);
3194 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3195 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3196 queue_idx, tx_rate));
3200 rte_eth_mirror_rule_set(uint16_t port_id,
3201 struct rte_eth_mirror_conf *mirror_conf,
3202 uint8_t rule_id, uint8_t on)
3204 struct rte_eth_dev *dev;
3206 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3207 if (mirror_conf->rule_type == 0) {
3208 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3212 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3213 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3218 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3219 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3220 (mirror_conf->pool_mask == 0)) {
3222 "Invalid mirror pool, pool mask can not be 0\n");
3226 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3227 mirror_conf->vlan.vlan_mask == 0) {
3229 "Invalid vlan mask, vlan mask can not be 0\n");
3233 dev = &rte_eth_devices[port_id];
3234 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3236 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3237 mirror_conf, rule_id, on));
3241 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3243 struct rte_eth_dev *dev;
3245 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3247 dev = &rte_eth_devices[port_id];
3248 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3250 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3254 RTE_INIT(eth_dev_init_cb_lists)
3258 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3259 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3263 rte_eth_dev_callback_register(uint16_t port_id,
3264 enum rte_eth_event_type event,
3265 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3267 struct rte_eth_dev *dev;
3268 struct rte_eth_dev_callback *user_cb;
3269 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3275 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3276 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3280 if (port_id == RTE_ETH_ALL) {
3282 last_port = RTE_MAX_ETHPORTS - 1;
3284 next_port = last_port = port_id;
3287 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3290 dev = &rte_eth_devices[next_port];
3292 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3293 if (user_cb->cb_fn == cb_fn &&
3294 user_cb->cb_arg == cb_arg &&
3295 user_cb->event == event) {
3300 /* create a new callback. */
3301 if (user_cb == NULL) {
3302 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3303 sizeof(struct rte_eth_dev_callback), 0);
3304 if (user_cb != NULL) {
3305 user_cb->cb_fn = cb_fn;
3306 user_cb->cb_arg = cb_arg;
3307 user_cb->event = event;
3308 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3311 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3312 rte_eth_dev_callback_unregister(port_id, event,
3318 } while (++next_port <= last_port);
3320 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3325 rte_eth_dev_callback_unregister(uint16_t port_id,
3326 enum rte_eth_event_type event,
3327 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3330 struct rte_eth_dev *dev;
3331 struct rte_eth_dev_callback *cb, *next;
3332 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3338 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3339 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3343 if (port_id == RTE_ETH_ALL) {
3345 last_port = RTE_MAX_ETHPORTS - 1;
3347 next_port = last_port = port_id;
3350 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3353 dev = &rte_eth_devices[next_port];
3355 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3358 next = TAILQ_NEXT(cb, next);
3360 if (cb->cb_fn != cb_fn || cb->event != event ||
3361 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3365 * if this callback is not executing right now,
3368 if (cb->active == 0) {
3369 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3375 } while (++next_port <= last_port);
3377 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3382 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3383 enum rte_eth_event_type event, void *ret_param)
3385 struct rte_eth_dev_callback *cb_lst;
3386 struct rte_eth_dev_callback dev_cb;
3389 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3390 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3391 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3395 if (ret_param != NULL)
3396 dev_cb.ret_param = ret_param;
3398 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3399 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3400 dev_cb.cb_arg, dev_cb.ret_param);
3401 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3404 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3409 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3414 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3416 dev->state = RTE_ETH_DEV_ATTACHED;
3420 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3423 struct rte_eth_dev *dev;
3424 struct rte_intr_handle *intr_handle;
3428 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3430 dev = &rte_eth_devices[port_id];
3432 if (!dev->intr_handle) {
3433 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3437 intr_handle = dev->intr_handle;
3438 if (!intr_handle->intr_vec) {
3439 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3443 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3444 vec = intr_handle->intr_vec[qid];
3445 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3446 if (rc && rc != -EEXIST) {
3448 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3449 port_id, qid, op, epfd, vec);
3456 int __rte_experimental
3457 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
3459 struct rte_intr_handle *intr_handle;
3460 struct rte_eth_dev *dev;
3461 unsigned int efd_idx;
3465 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
3467 dev = &rte_eth_devices[port_id];
3469 if (queue_id >= dev->data->nb_rx_queues) {
3470 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3474 if (!dev->intr_handle) {
3475 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3479 intr_handle = dev->intr_handle;
3480 if (!intr_handle->intr_vec) {
3481 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3485 vec = intr_handle->intr_vec[queue_id];
3486 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
3487 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
3488 fd = intr_handle->efds[efd_idx];
3493 const struct rte_memzone *
3494 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3495 uint16_t queue_id, size_t size, unsigned align,
3498 char z_name[RTE_MEMZONE_NAMESIZE];
3499 const struct rte_memzone *mz;
3501 snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
3502 dev->data->port_id, queue_id, ring_name);
3504 mz = rte_memzone_lookup(z_name);
3508 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3509 RTE_MEMZONE_IOVA_CONTIG, align);
3512 int __rte_experimental
3513 rte_eth_dev_create(struct rte_device *device, const char *name,
3514 size_t priv_data_size,
3515 ethdev_bus_specific_init ethdev_bus_specific_init,
3516 void *bus_init_params,
3517 ethdev_init_t ethdev_init, void *init_params)
3519 struct rte_eth_dev *ethdev;
3522 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3524 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3525 ethdev = rte_eth_dev_allocate(name);
3529 if (priv_data_size) {
3530 ethdev->data->dev_private = rte_zmalloc_socket(
3531 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3534 if (!ethdev->data->dev_private) {
3535 RTE_LOG(ERR, EAL, "failed to allocate private data");
3541 ethdev = rte_eth_dev_attach_secondary(name);
3543 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3544 "ethdev doesn't exist");
3549 ethdev->device = device;
3551 if (ethdev_bus_specific_init) {
3552 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3555 "ethdev bus specific initialisation failed");
3560 retval = ethdev_init(ethdev, init_params);
3562 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3566 rte_eth_dev_probing_finish(ethdev);
3571 rte_eth_dev_release_port(ethdev);
3575 int __rte_experimental
3576 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3577 ethdev_uninit_t ethdev_uninit)
3581 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3585 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3586 if (ethdev_uninit) {
3587 ret = ethdev_uninit(ethdev);
3592 return rte_eth_dev_release_port(ethdev);
3596 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3597 int epfd, int op, void *data)
3600 struct rte_eth_dev *dev;
3601 struct rte_intr_handle *intr_handle;
3604 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3606 dev = &rte_eth_devices[port_id];
3607 if (queue_id >= dev->data->nb_rx_queues) {
3608 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3612 if (!dev->intr_handle) {
3613 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3617 intr_handle = dev->intr_handle;
3618 if (!intr_handle->intr_vec) {
3619 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3623 vec = intr_handle->intr_vec[queue_id];
3624 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3625 if (rc && rc != -EEXIST) {
3627 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3628 port_id, queue_id, op, epfd, vec);
3636 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3639 struct rte_eth_dev *dev;
3641 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3643 dev = &rte_eth_devices[port_id];
3645 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3646 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3651 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3654 struct rte_eth_dev *dev;
3656 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3658 dev = &rte_eth_devices[port_id];
3660 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3661 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3667 rte_eth_dev_filter_supported(uint16_t port_id,
3668 enum rte_filter_type filter_type)
3670 struct rte_eth_dev *dev;
3672 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3674 dev = &rte_eth_devices[port_id];
3675 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3676 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3677 RTE_ETH_FILTER_NOP, NULL);
3681 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3682 enum rte_filter_op filter_op, void *arg)
3684 struct rte_eth_dev *dev;
3686 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3688 dev = &rte_eth_devices[port_id];
3689 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3690 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3694 const struct rte_eth_rxtx_callback *
3695 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3696 rte_rx_callback_fn fn, void *user_param)
3698 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3699 rte_errno = ENOTSUP;
3702 /* check input parameters */
3703 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3704 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3708 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3716 cb->param = user_param;
3718 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3719 /* Add the callbacks in fifo order. */
3720 struct rte_eth_rxtx_callback *tail =
3721 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3724 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3731 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3736 const struct rte_eth_rxtx_callback *
3737 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3738 rte_rx_callback_fn fn, void *user_param)
3740 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3741 rte_errno = ENOTSUP;
3744 /* check input parameters */
3745 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3746 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3751 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3759 cb->param = user_param;
3761 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3762 /* Add the callbacks at fisrt position*/
3763 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3765 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3766 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3771 const struct rte_eth_rxtx_callback *
3772 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3773 rte_tx_callback_fn fn, void *user_param)
3775 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3776 rte_errno = ENOTSUP;
3779 /* check input parameters */
3780 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3781 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3786 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3794 cb->param = user_param;
3796 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3797 /* Add the callbacks in fifo order. */
3798 struct rte_eth_rxtx_callback *tail =
3799 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3802 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3809 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3815 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3816 const struct rte_eth_rxtx_callback *user_cb)
3818 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3821 /* Check input parameters. */
3822 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3823 if (user_cb == NULL ||
3824 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3827 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3828 struct rte_eth_rxtx_callback *cb;
3829 struct rte_eth_rxtx_callback **prev_cb;
3832 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3833 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3834 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3836 if (cb == user_cb) {
3837 /* Remove the user cb from the callback list. */
3838 *prev_cb = cb->next;
3843 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3849 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3850 const struct rte_eth_rxtx_callback *user_cb)
3852 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3855 /* Check input parameters. */
3856 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3857 if (user_cb == NULL ||
3858 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3861 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3863 struct rte_eth_rxtx_callback *cb;
3864 struct rte_eth_rxtx_callback **prev_cb;
3866 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3867 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3868 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3870 if (cb == user_cb) {
3871 /* Remove the user cb from the callback list. */
3872 *prev_cb = cb->next;
3877 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3883 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3884 struct rte_eth_rxq_info *qinfo)
3886 struct rte_eth_dev *dev;
3888 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3893 dev = &rte_eth_devices[port_id];
3894 if (queue_id >= dev->data->nb_rx_queues) {
3895 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3899 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3901 memset(qinfo, 0, sizeof(*qinfo));
3902 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3907 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3908 struct rte_eth_txq_info *qinfo)
3910 struct rte_eth_dev *dev;
3912 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3917 dev = &rte_eth_devices[port_id];
3918 if (queue_id >= dev->data->nb_tx_queues) {
3919 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
3923 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3925 memset(qinfo, 0, sizeof(*qinfo));
3926 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3932 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3933 struct ether_addr *mc_addr_set,
3934 uint32_t nb_mc_addr)
3936 struct rte_eth_dev *dev;
3938 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3940 dev = &rte_eth_devices[port_id];
3941 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3942 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3943 mc_addr_set, nb_mc_addr));
3947 rte_eth_timesync_enable(uint16_t port_id)
3949 struct rte_eth_dev *dev;
3951 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3952 dev = &rte_eth_devices[port_id];
3954 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3955 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
3959 rte_eth_timesync_disable(uint16_t port_id)
3961 struct rte_eth_dev *dev;
3963 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3964 dev = &rte_eth_devices[port_id];
3966 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3967 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
3971 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3974 struct rte_eth_dev *dev;
3976 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3977 dev = &rte_eth_devices[port_id];
3979 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3980 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
3981 (dev, timestamp, flags));
3985 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3986 struct timespec *timestamp)
3988 struct rte_eth_dev *dev;
3990 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3991 dev = &rte_eth_devices[port_id];
3993 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3994 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
3999 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4001 struct rte_eth_dev *dev;
4003 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4004 dev = &rte_eth_devices[port_id];
4006 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4007 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4012 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4014 struct rte_eth_dev *dev;
4016 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4017 dev = &rte_eth_devices[port_id];
4019 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4020 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4025 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4027 struct rte_eth_dev *dev;
4029 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4030 dev = &rte_eth_devices[port_id];
4032 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4033 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4038 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4040 struct rte_eth_dev *dev;
4042 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4044 dev = &rte_eth_devices[port_id];
4045 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4046 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4050 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4052 struct rte_eth_dev *dev;
4054 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4056 dev = &rte_eth_devices[port_id];
4057 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4058 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4062 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4064 struct rte_eth_dev *dev;
4066 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4068 dev = &rte_eth_devices[port_id];
4069 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4070 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4074 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4076 struct rte_eth_dev *dev;
4078 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4080 dev = &rte_eth_devices[port_id];
4081 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4082 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4085 int __rte_experimental
4086 rte_eth_dev_get_module_info(uint16_t port_id,
4087 struct rte_eth_dev_module_info *modinfo)
4089 struct rte_eth_dev *dev;
4091 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4093 dev = &rte_eth_devices[port_id];
4094 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4095 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4098 int __rte_experimental
4099 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4100 struct rte_dev_eeprom_info *info)
4102 struct rte_eth_dev *dev;
4104 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4106 dev = &rte_eth_devices[port_id];
4107 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4108 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4112 rte_eth_dev_get_dcb_info(uint16_t port_id,
4113 struct rte_eth_dcb_info *dcb_info)
4115 struct rte_eth_dev *dev;
4117 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4119 dev = &rte_eth_devices[port_id];
4120 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4122 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4123 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4127 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4128 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4130 struct rte_eth_dev *dev;
4132 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4133 if (l2_tunnel == NULL) {
4134 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4138 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4139 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4143 dev = &rte_eth_devices[port_id];
4144 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4146 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4151 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4152 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4156 struct rte_eth_dev *dev;
4158 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4160 if (l2_tunnel == NULL) {
4161 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4165 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4166 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4171 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4175 dev = &rte_eth_devices[port_id];
4176 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4178 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4179 l2_tunnel, mask, en));
4183 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4184 const struct rte_eth_desc_lim *desc_lim)
4186 if (desc_lim->nb_align != 0)
4187 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4189 if (desc_lim->nb_max != 0)
4190 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4192 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4196 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4197 uint16_t *nb_rx_desc,
4198 uint16_t *nb_tx_desc)
4200 struct rte_eth_dev *dev;
4201 struct rte_eth_dev_info dev_info;
4203 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4205 dev = &rte_eth_devices[port_id];
4206 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4208 rte_eth_dev_info_get(port_id, &dev_info);
4210 if (nb_rx_desc != NULL)
4211 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4213 if (nb_tx_desc != NULL)
4214 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4220 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4222 struct rte_eth_dev *dev;
4224 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4229 dev = &rte_eth_devices[port_id];
4231 if (*dev->dev_ops->pool_ops_supported == NULL)
4232 return 1; /* all pools are supported */
4234 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4238 * A set of values to describe the possible states of a switch domain.
4240 enum rte_eth_switch_domain_state {
4241 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4242 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4246 * Array of switch domains available for allocation. Array is sized to
4247 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4248 * ethdev ports in a single process.
4250 struct rte_eth_dev_switch {
4251 enum rte_eth_switch_domain_state state;
4252 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4254 int __rte_experimental
4255 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4259 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4261 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4262 i < RTE_MAX_ETHPORTS; i++) {
4263 if (rte_eth_switch_domains[i].state ==
4264 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4265 rte_eth_switch_domains[i].state =
4266 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4275 int __rte_experimental
4276 rte_eth_switch_domain_free(uint16_t domain_id)
4278 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4279 domain_id >= RTE_MAX_ETHPORTS)
4282 if (rte_eth_switch_domains[domain_id].state !=
4283 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4286 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4291 typedef int (*rte_eth_devargs_callback_t)(char *str, void *data);
4294 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4297 struct rte_kvargs_pair *pair;
4300 arglist->str = strdup(str_in);
4301 if (arglist->str == NULL)
4304 letter = arglist->str;
4307 pair = &arglist->pairs[0];
4310 case 0: /* Initial */
4313 else if (*letter == '\0')
4320 case 1: /* Parsing key */
4321 if (*letter == '=') {
4323 pair->value = letter + 1;
4325 } else if (*letter == ',' || *letter == '\0')
4330 case 2: /* Parsing value */
4333 else if (*letter == ',') {
4336 pair = &arglist->pairs[arglist->count];
4338 } else if (*letter == '\0') {
4341 pair = &arglist->pairs[arglist->count];
4346 case 3: /* Parsing list */
4349 else if (*letter == '\0')
4358 rte_eth_devargs_parse_list(char *str, rte_eth_devargs_callback_t callback,
4366 /* Single element, not a list */
4367 return callback(str, data);
4369 /* Sanity check, then strip the brackets */
4370 str_start = &str[strlen(str) - 1];
4371 if (*str_start != ']') {
4372 RTE_LOG(ERR, EAL, "(%s): List does not end with ']'", str);
4378 /* Process list elements */
4388 } else if (state == 1) {
4389 if (*str == ',' || *str == '\0') {
4390 if (str > str_start) {
4391 /* Non-empty string fragment */
4393 result = callback(str_start, data);
4406 rte_eth_devargs_process_range(char *str, uint16_t *list, uint16_t *len_list,
4407 const uint16_t max_list)
4409 uint16_t lo, hi, val;
4412 result = sscanf(str, "%hu-%hu", &lo, &hi);
4414 if (*len_list >= max_list)
4416 list[(*len_list)++] = lo;
4417 } else if (result == 2) {
4418 if (lo >= hi || lo > RTE_MAX_ETHPORTS || hi > RTE_MAX_ETHPORTS)
4420 for (val = lo; val <= hi; val++) {
4421 if (*len_list >= max_list)
4423 list[(*len_list)++] = val;
4432 rte_eth_devargs_parse_representor_ports(char *str, void *data)
4434 struct rte_eth_devargs *eth_da = data;
4436 return rte_eth_devargs_process_range(str, eth_da->representor_ports,
4437 ð_da->nb_representor_ports, RTE_MAX_ETHPORTS);
4440 int __rte_experimental
4441 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4443 struct rte_kvargs args;
4444 struct rte_kvargs_pair *pair;
4448 memset(eth_da, 0, sizeof(*eth_da));
4450 result = rte_eth_devargs_tokenise(&args, dargs);
4454 for (i = 0; i < args.count; i++) {
4455 pair = &args.pairs[i];
4456 if (strcmp("representor", pair->key) == 0) {
4457 result = rte_eth_devargs_parse_list(pair->value,
4458 rte_eth_devargs_parse_representor_ports,
4472 RTE_INIT(ethdev_init_log)
4474 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4475 if (rte_eth_dev_logtype >= 0)
4476 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);