1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
15 #include <netinet/in.h>
17 #include <rte_byteorder.h>
19 #include <rte_debug.h>
20 #include <rte_interrupts.h>
21 #include <rte_memory.h>
22 #include <rte_memcpy.h>
23 #include <rte_memzone.h>
24 #include <rte_launch.h>
26 #include <rte_per_lcore.h>
27 #include <rte_lcore.h>
28 #include <rte_atomic.h>
29 #include <rte_branch_prediction.h>
30 #include <rte_common.h>
31 #include <rte_mempool.h>
32 #include <rte_malloc.h>
34 #include <rte_errno.h>
35 #include <rte_spinlock.h>
36 #include <rte_string_fns.h>
38 #include "rte_ether.h"
39 #include "rte_ethdev.h"
40 #include "ethdev_profile.h"
42 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
43 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
44 static struct rte_eth_dev_data *rte_eth_dev_data;
45 static uint8_t eth_dev_last_created_port;
47 /* spinlock for eth device callbacks */
48 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
50 /* spinlock for add/remove rx callbacks */
51 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
53 /* spinlock for add/remove tx callbacks */
54 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
56 /* store statistics names and its offset in stats structure */
57 struct rte_eth_xstats_name_off {
58 char name[RTE_ETH_XSTATS_NAME_SIZE];
62 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
63 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
64 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
65 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
66 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
67 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
68 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
69 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
70 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
74 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
76 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
77 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
78 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
79 {"errors", offsetof(struct rte_eth_stats, q_errors)},
82 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
83 sizeof(rte_rxq_stats_strings[0]))
85 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
86 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
87 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
89 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
90 sizeof(rte_txq_stats_strings[0]))
94 * The user application callback description.
96 * It contains callback address to be registered by user application,
97 * the pointer to the parameters for callback, and the event type.
99 struct rte_eth_dev_callback {
100 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
101 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
102 void *cb_arg; /**< Parameter for callback */
103 void *ret_param; /**< Return parameter */
104 enum rte_eth_event_type event; /**< Interrupt event type */
105 uint32_t active; /**< Callback is executing */
114 rte_eth_find_next(uint16_t port_id)
116 while (port_id < RTE_MAX_ETHPORTS &&
117 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED)
120 if (port_id >= RTE_MAX_ETHPORTS)
121 return RTE_MAX_ETHPORTS;
127 rte_eth_dev_data_alloc(void)
129 const unsigned flags = 0;
130 const struct rte_memzone *mz;
132 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
133 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
134 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
135 rte_socket_id(), flags);
137 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
139 rte_panic("Cannot allocate memzone for ethernet port data\n");
141 rte_eth_dev_data = mz->addr;
142 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
143 memset(rte_eth_dev_data, 0,
144 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
148 rte_eth_dev_allocated(const char *name)
152 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
153 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
154 strcmp(rte_eth_devices[i].data->name, name) == 0)
155 return &rte_eth_devices[i];
161 rte_eth_dev_find_free_port(void)
165 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
166 if (rte_eth_devices[i].state == RTE_ETH_DEV_UNUSED)
169 return RTE_MAX_ETHPORTS;
172 static struct rte_eth_dev *
173 eth_dev_get(uint16_t port_id)
175 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
177 eth_dev->data = &rte_eth_dev_data[port_id];
178 eth_dev->state = RTE_ETH_DEV_ATTACHED;
179 TAILQ_INIT(&(eth_dev->link_intr_cbs));
181 eth_dev_last_created_port = port_id;
187 rte_eth_dev_allocate(const char *name)
190 struct rte_eth_dev *eth_dev;
192 port_id = rte_eth_dev_find_free_port();
193 if (port_id == RTE_MAX_ETHPORTS) {
194 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
198 if (rte_eth_dev_data == NULL)
199 rte_eth_dev_data_alloc();
201 if (rte_eth_dev_allocated(name) != NULL) {
202 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
207 memset(&rte_eth_dev_data[port_id], 0, sizeof(struct rte_eth_dev_data));
208 eth_dev = eth_dev_get(port_id);
209 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
210 eth_dev->data->port_id = port_id;
211 eth_dev->data->mtu = ETHER_MTU;
217 * Attach to a port already registered by the primary process, which
218 * makes sure that the same device would have the same port id both
219 * in the primary and secondary process.
222 rte_eth_dev_attach_secondary(const char *name)
225 struct rte_eth_dev *eth_dev;
227 if (rte_eth_dev_data == NULL)
228 rte_eth_dev_data_alloc();
230 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
231 if (strcmp(rte_eth_dev_data[i].name, name) == 0)
234 if (i == RTE_MAX_ETHPORTS) {
236 "device %s is not driven by the primary process\n",
241 eth_dev = eth_dev_get(i);
242 RTE_ASSERT(eth_dev->data->port_id == i);
248 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
253 eth_dev->state = RTE_ETH_DEV_UNUSED;
258 rte_eth_dev_is_valid_port(uint16_t port_id)
260 if (port_id >= RTE_MAX_ETHPORTS ||
261 (rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
262 rte_eth_devices[port_id].state != RTE_ETH_DEV_DEFERRED))
269 rte_eth_dev_socket_id(uint16_t port_id)
271 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
272 return rte_eth_devices[port_id].data->numa_node;
276 rte_eth_dev_get_sec_ctx(uint8_t port_id)
278 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
279 return rte_eth_devices[port_id].security_ctx;
283 rte_eth_dev_count(void)
290 RTE_ETH_FOREACH_DEV(p)
297 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
301 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
304 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
308 /* shouldn't check 'rte_eth_devices[i].data',
309 * because it might be overwritten by VDEV PMD */
310 tmp = rte_eth_dev_data[port_id].name;
316 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
321 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
325 RTE_ETH_FOREACH_DEV(i) {
327 rte_eth_dev_data[i].name, strlen(name))) {
337 /* attach the new device, then store port_id of the device */
339 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
342 int current = rte_eth_dev_count();
346 if ((devargs == NULL) || (port_id == NULL)) {
351 /* parse devargs, then retrieve device name and args */
352 if (rte_eal_parse_devargs_str(devargs, &name, &args))
355 ret = rte_eal_dev_attach(name, args);
359 /* no point looking at the port count if no port exists */
360 if (!rte_eth_dev_count()) {
361 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
366 /* if nothing happened, there is a bug here, since some driver told us
367 * it did attach a device, but did not create a port.
369 if (current == rte_eth_dev_count()) {
374 *port_id = eth_dev_last_created_port;
383 /* detach the device, then store the name of the device */
385 rte_eth_dev_detach(uint16_t port_id, char *name)
390 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
397 dev_flags = rte_eth_devices[port_id].data->dev_flags;
398 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
399 RTE_LOG(ERR, EAL, "Port %" PRIu16 " is bonded, cannot detach\n",
405 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
406 "%s", rte_eth_devices[port_id].data->name);
408 ret = rte_eal_dev_detach(rte_eth_devices[port_id].device);
412 rte_eth_devices[port_id].state = RTE_ETH_DEV_UNUSED;
420 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
422 uint16_t old_nb_queues = dev->data->nb_rx_queues;
426 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
427 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
428 sizeof(dev->data->rx_queues[0]) * nb_queues,
429 RTE_CACHE_LINE_SIZE);
430 if (dev->data->rx_queues == NULL) {
431 dev->data->nb_rx_queues = 0;
434 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
435 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
437 rxq = dev->data->rx_queues;
439 for (i = nb_queues; i < old_nb_queues; i++)
440 (*dev->dev_ops->rx_queue_release)(rxq[i]);
441 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
442 RTE_CACHE_LINE_SIZE);
445 if (nb_queues > old_nb_queues) {
446 uint16_t new_qs = nb_queues - old_nb_queues;
448 memset(rxq + old_nb_queues, 0,
449 sizeof(rxq[0]) * new_qs);
452 dev->data->rx_queues = rxq;
454 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
455 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
457 rxq = dev->data->rx_queues;
459 for (i = nb_queues; i < old_nb_queues; i++)
460 (*dev->dev_ops->rx_queue_release)(rxq[i]);
462 rte_free(dev->data->rx_queues);
463 dev->data->rx_queues = NULL;
465 dev->data->nb_rx_queues = nb_queues;
470 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
472 struct rte_eth_dev *dev;
474 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
476 dev = &rte_eth_devices[port_id];
477 if (rx_queue_id >= dev->data->nb_rx_queues) {
478 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
482 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
484 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
485 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
486 " already started\n",
487 rx_queue_id, port_id);
491 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
496 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
498 struct rte_eth_dev *dev;
500 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
502 dev = &rte_eth_devices[port_id];
503 if (rx_queue_id >= dev->data->nb_rx_queues) {
504 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
508 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
510 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
511 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
512 " already stopped\n",
513 rx_queue_id, port_id);
517 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
522 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
524 struct rte_eth_dev *dev;
526 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
528 dev = &rte_eth_devices[port_id];
529 if (tx_queue_id >= dev->data->nb_tx_queues) {
530 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
534 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
536 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
537 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
538 " already started\n",
539 tx_queue_id, port_id);
543 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
548 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
550 struct rte_eth_dev *dev;
552 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
554 dev = &rte_eth_devices[port_id];
555 if (tx_queue_id >= dev->data->nb_tx_queues) {
556 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
560 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
562 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
563 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
564 " already stopped\n",
565 tx_queue_id, port_id);
569 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
574 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
576 uint16_t old_nb_queues = dev->data->nb_tx_queues;
580 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
581 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
582 sizeof(dev->data->tx_queues[0]) * nb_queues,
583 RTE_CACHE_LINE_SIZE);
584 if (dev->data->tx_queues == NULL) {
585 dev->data->nb_tx_queues = 0;
588 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
589 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
591 txq = dev->data->tx_queues;
593 for (i = nb_queues; i < old_nb_queues; i++)
594 (*dev->dev_ops->tx_queue_release)(txq[i]);
595 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
596 RTE_CACHE_LINE_SIZE);
599 if (nb_queues > old_nb_queues) {
600 uint16_t new_qs = nb_queues - old_nb_queues;
602 memset(txq + old_nb_queues, 0,
603 sizeof(txq[0]) * new_qs);
606 dev->data->tx_queues = txq;
608 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
609 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
611 txq = dev->data->tx_queues;
613 for (i = nb_queues; i < old_nb_queues; i++)
614 (*dev->dev_ops->tx_queue_release)(txq[i]);
616 rte_free(dev->data->tx_queues);
617 dev->data->tx_queues = NULL;
619 dev->data->nb_tx_queues = nb_queues;
624 rte_eth_speed_bitflag(uint32_t speed, int duplex)
627 case ETH_SPEED_NUM_10M:
628 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
629 case ETH_SPEED_NUM_100M:
630 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
631 case ETH_SPEED_NUM_1G:
632 return ETH_LINK_SPEED_1G;
633 case ETH_SPEED_NUM_2_5G:
634 return ETH_LINK_SPEED_2_5G;
635 case ETH_SPEED_NUM_5G:
636 return ETH_LINK_SPEED_5G;
637 case ETH_SPEED_NUM_10G:
638 return ETH_LINK_SPEED_10G;
639 case ETH_SPEED_NUM_20G:
640 return ETH_LINK_SPEED_20G;
641 case ETH_SPEED_NUM_25G:
642 return ETH_LINK_SPEED_25G;
643 case ETH_SPEED_NUM_40G:
644 return ETH_LINK_SPEED_40G;
645 case ETH_SPEED_NUM_50G:
646 return ETH_LINK_SPEED_50G;
647 case ETH_SPEED_NUM_56G:
648 return ETH_LINK_SPEED_56G;
649 case ETH_SPEED_NUM_100G:
650 return ETH_LINK_SPEED_100G;
657 * A conversion function from rxmode bitfield API.
660 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
661 uint64_t *rx_offloads)
663 uint64_t offloads = 0;
665 if (rxmode->header_split == 1)
666 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
667 if (rxmode->hw_ip_checksum == 1)
668 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
669 if (rxmode->hw_vlan_filter == 1)
670 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
671 if (rxmode->hw_vlan_strip == 1)
672 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
673 if (rxmode->hw_vlan_extend == 1)
674 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
675 if (rxmode->jumbo_frame == 1)
676 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
677 if (rxmode->hw_strip_crc == 1)
678 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
679 if (rxmode->enable_scatter == 1)
680 offloads |= DEV_RX_OFFLOAD_SCATTER;
681 if (rxmode->enable_lro == 1)
682 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
683 if (rxmode->hw_timestamp == 1)
684 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
685 if (rxmode->security == 1)
686 offloads |= DEV_RX_OFFLOAD_SECURITY;
688 *rx_offloads = offloads;
692 * A conversion function from rxmode offloads API.
695 rte_eth_convert_rx_offloads(const uint64_t rx_offloads,
696 struct rte_eth_rxmode *rxmode)
699 if (rx_offloads & DEV_RX_OFFLOAD_HEADER_SPLIT)
700 rxmode->header_split = 1;
702 rxmode->header_split = 0;
703 if (rx_offloads & DEV_RX_OFFLOAD_CHECKSUM)
704 rxmode->hw_ip_checksum = 1;
706 rxmode->hw_ip_checksum = 0;
707 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
708 rxmode->hw_vlan_filter = 1;
710 rxmode->hw_vlan_filter = 0;
711 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
712 rxmode->hw_vlan_strip = 1;
714 rxmode->hw_vlan_strip = 0;
715 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
716 rxmode->hw_vlan_extend = 1;
718 rxmode->hw_vlan_extend = 0;
719 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
720 rxmode->jumbo_frame = 1;
722 rxmode->jumbo_frame = 0;
723 if (rx_offloads & DEV_RX_OFFLOAD_CRC_STRIP)
724 rxmode->hw_strip_crc = 1;
726 rxmode->hw_strip_crc = 0;
727 if (rx_offloads & DEV_RX_OFFLOAD_SCATTER)
728 rxmode->enable_scatter = 1;
730 rxmode->enable_scatter = 0;
731 if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
732 rxmode->enable_lro = 1;
734 rxmode->enable_lro = 0;
735 if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
736 rxmode->hw_timestamp = 1;
738 rxmode->hw_timestamp = 0;
739 if (rx_offloads & DEV_RX_OFFLOAD_SECURITY)
740 rxmode->security = 1;
742 rxmode->security = 0;
746 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
747 const struct rte_eth_conf *dev_conf)
749 struct rte_eth_dev *dev;
750 struct rte_eth_dev_info dev_info;
751 struct rte_eth_conf local_conf = *dev_conf;
754 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
756 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
758 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
759 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
763 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
765 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
766 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
770 dev = &rte_eth_devices[port_id];
772 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
773 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
775 if (dev->data->dev_started) {
777 "port %d must be stopped to allow configuration\n", port_id);
782 * Convert between the offloads API to enable PMDs to support
785 if (dev_conf->rxmode.ignore_offload_bitfield == 0) {
786 rte_eth_convert_rx_offload_bitfield(
787 &dev_conf->rxmode, &local_conf.rxmode.offloads);
789 rte_eth_convert_rx_offloads(dev_conf->rxmode.offloads,
793 /* Copy the dev_conf parameter into the dev structure */
794 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
797 * Check that the numbers of RX and TX queues are not greater
798 * than the maximum number of RX and TX queues supported by the
801 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
803 if (nb_rx_q == 0 && nb_tx_q == 0) {
804 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
808 if (nb_rx_q > dev_info.max_rx_queues) {
809 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
810 port_id, nb_rx_q, dev_info.max_rx_queues);
814 if (nb_tx_q > dev_info.max_tx_queues) {
815 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
816 port_id, nb_tx_q, dev_info.max_tx_queues);
820 /* Check that the device supports requested interrupts */
821 if ((dev_conf->intr_conf.lsc == 1) &&
822 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
823 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
824 dev->device->driver->name);
827 if ((dev_conf->intr_conf.rmv == 1) &&
828 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
829 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
830 dev->device->driver->name);
835 * If jumbo frames are enabled, check that the maximum RX packet
836 * length is supported by the configured device.
838 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
839 if (dev_conf->rxmode.max_rx_pkt_len >
840 dev_info.max_rx_pktlen) {
841 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
842 " > max valid value %u\n",
844 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
845 (unsigned)dev_info.max_rx_pktlen);
847 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
848 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
849 " < min valid value %u\n",
851 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
852 (unsigned)ETHER_MIN_LEN);
856 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
857 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
858 /* Use default value */
859 dev->data->dev_conf.rxmode.max_rx_pkt_len =
864 * Setup new number of RX/TX queues and reconfigure device.
866 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
868 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
873 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
875 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
877 rte_eth_dev_rx_queue_config(dev, 0);
881 diag = (*dev->dev_ops->dev_configure)(dev);
883 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
885 rte_eth_dev_rx_queue_config(dev, 0);
886 rte_eth_dev_tx_queue_config(dev, 0);
890 /* Initialize Rx profiling if enabled at compilation time. */
891 diag = __rte_eth_profile_rx_init(port_id, dev);
893 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
895 rte_eth_dev_rx_queue_config(dev, 0);
896 rte_eth_dev_tx_queue_config(dev, 0);
904 _rte_eth_dev_reset(struct rte_eth_dev *dev)
906 if (dev->data->dev_started) {
908 "port %d must be stopped to allow reset\n",
913 rte_eth_dev_rx_queue_config(dev, 0);
914 rte_eth_dev_tx_queue_config(dev, 0);
916 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
920 rte_eth_dev_config_restore(uint16_t port_id)
922 struct rte_eth_dev *dev;
923 struct rte_eth_dev_info dev_info;
924 struct ether_addr *addr;
929 dev = &rte_eth_devices[port_id];
931 rte_eth_dev_info_get(port_id, &dev_info);
933 /* replay MAC address configuration including default MAC */
934 addr = &dev->data->mac_addrs[0];
935 if (*dev->dev_ops->mac_addr_set != NULL)
936 (*dev->dev_ops->mac_addr_set)(dev, addr);
937 else if (*dev->dev_ops->mac_addr_add != NULL)
938 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
940 if (*dev->dev_ops->mac_addr_add != NULL) {
941 for (i = 1; i < dev_info.max_mac_addrs; i++) {
942 addr = &dev->data->mac_addrs[i];
944 /* skip zero address */
945 if (is_zero_ether_addr(addr))
949 pool_mask = dev->data->mac_pool_sel[i];
952 if (pool_mask & 1ULL)
953 (*dev->dev_ops->mac_addr_add)(dev,
961 /* replay promiscuous configuration */
962 if (rte_eth_promiscuous_get(port_id) == 1)
963 rte_eth_promiscuous_enable(port_id);
964 else if (rte_eth_promiscuous_get(port_id) == 0)
965 rte_eth_promiscuous_disable(port_id);
967 /* replay all multicast configuration */
968 if (rte_eth_allmulticast_get(port_id) == 1)
969 rte_eth_allmulticast_enable(port_id);
970 else if (rte_eth_allmulticast_get(port_id) == 0)
971 rte_eth_allmulticast_disable(port_id);
975 rte_eth_dev_start(uint16_t port_id)
977 struct rte_eth_dev *dev;
980 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
982 dev = &rte_eth_devices[port_id];
984 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
986 if (dev->data->dev_started != 0) {
987 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
988 " already started\n",
993 diag = (*dev->dev_ops->dev_start)(dev);
995 dev->data->dev_started = 1;
999 rte_eth_dev_config_restore(port_id);
1001 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1002 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1003 (*dev->dev_ops->link_update)(dev, 0);
1009 rte_eth_dev_stop(uint16_t port_id)
1011 struct rte_eth_dev *dev;
1013 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1014 dev = &rte_eth_devices[port_id];
1016 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1018 if (dev->data->dev_started == 0) {
1019 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1020 " already stopped\n",
1025 dev->data->dev_started = 0;
1026 (*dev->dev_ops->dev_stop)(dev);
1030 rte_eth_dev_set_link_up(uint16_t port_id)
1032 struct rte_eth_dev *dev;
1034 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1036 dev = &rte_eth_devices[port_id];
1038 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1039 return (*dev->dev_ops->dev_set_link_up)(dev);
1043 rte_eth_dev_set_link_down(uint16_t port_id)
1045 struct rte_eth_dev *dev;
1047 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1049 dev = &rte_eth_devices[port_id];
1051 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1052 return (*dev->dev_ops->dev_set_link_down)(dev);
1056 rte_eth_dev_close(uint16_t port_id)
1058 struct rte_eth_dev *dev;
1060 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1061 dev = &rte_eth_devices[port_id];
1063 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1064 dev->data->dev_started = 0;
1065 (*dev->dev_ops->dev_close)(dev);
1067 dev->data->nb_rx_queues = 0;
1068 rte_free(dev->data->rx_queues);
1069 dev->data->rx_queues = NULL;
1070 dev->data->nb_tx_queues = 0;
1071 rte_free(dev->data->tx_queues);
1072 dev->data->tx_queues = NULL;
1076 rte_eth_dev_reset(uint16_t port_id)
1078 struct rte_eth_dev *dev;
1081 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1082 dev = &rte_eth_devices[port_id];
1084 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1086 rte_eth_dev_stop(port_id);
1087 ret = dev->dev_ops->dev_reset(dev);
1093 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1094 uint16_t nb_rx_desc, unsigned int socket_id,
1095 const struct rte_eth_rxconf *rx_conf,
1096 struct rte_mempool *mp)
1099 uint32_t mbp_buf_size;
1100 struct rte_eth_dev *dev;
1101 struct rte_eth_dev_info dev_info;
1102 struct rte_eth_rxconf local_conf;
1105 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1107 dev = &rte_eth_devices[port_id];
1108 if (rx_queue_id >= dev->data->nb_rx_queues) {
1109 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1113 if (dev->data->dev_started) {
1114 RTE_PMD_DEBUG_TRACE(
1115 "port %d must be stopped to allow configuration\n", port_id);
1119 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1120 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1123 * Check the size of the mbuf data buffer.
1124 * This value must be provided in the private data of the memory pool.
1125 * First check that the memory pool has a valid private data.
1127 rte_eth_dev_info_get(port_id, &dev_info);
1128 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1129 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1130 mp->name, (int) mp->private_data_size,
1131 (int) sizeof(struct rte_pktmbuf_pool_private));
1134 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1136 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1137 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1138 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1142 (int)(RTE_PKTMBUF_HEADROOM +
1143 dev_info.min_rx_bufsize),
1144 (int)RTE_PKTMBUF_HEADROOM,
1145 (int)dev_info.min_rx_bufsize);
1149 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1150 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1151 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1153 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1154 "should be: <= %hu, = %hu, and a product of %hu\n",
1156 dev_info.rx_desc_lim.nb_max,
1157 dev_info.rx_desc_lim.nb_min,
1158 dev_info.rx_desc_lim.nb_align);
1162 rxq = dev->data->rx_queues;
1163 if (rxq[rx_queue_id]) {
1164 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1166 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1167 rxq[rx_queue_id] = NULL;
1170 if (rx_conf == NULL)
1171 rx_conf = &dev_info.default_rxconf;
1173 local_conf = *rx_conf;
1174 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1176 * Reflect port offloads to queue offloads in order for
1177 * offloads to not be discarded.
1179 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1180 &local_conf.offloads);
1183 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1184 socket_id, &local_conf, mp);
1186 if (!dev->data->min_rx_buf_size ||
1187 dev->data->min_rx_buf_size > mbp_buf_size)
1188 dev->data->min_rx_buf_size = mbp_buf_size;
1195 * A conversion function from txq_flags API.
1198 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1200 uint64_t offloads = 0;
1202 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1203 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1204 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1205 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1206 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1207 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1208 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1209 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1210 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1211 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1212 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1213 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1214 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1216 *tx_offloads = offloads;
1220 * A conversion function from offloads API.
1223 rte_eth_convert_txq_offloads(const uint64_t tx_offloads, uint32_t *txq_flags)
1227 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1228 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1229 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1230 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1231 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1232 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1233 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1234 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1235 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1236 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1237 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1238 flags |= (ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP);
1244 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1245 uint16_t nb_tx_desc, unsigned int socket_id,
1246 const struct rte_eth_txconf *tx_conf)
1248 struct rte_eth_dev *dev;
1249 struct rte_eth_dev_info dev_info;
1250 struct rte_eth_txconf local_conf;
1253 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1255 dev = &rte_eth_devices[port_id];
1256 if (tx_queue_id >= dev->data->nb_tx_queues) {
1257 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1261 if (dev->data->dev_started) {
1262 RTE_PMD_DEBUG_TRACE(
1263 "port %d must be stopped to allow configuration\n", port_id);
1267 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1268 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1270 rte_eth_dev_info_get(port_id, &dev_info);
1272 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1273 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1274 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1275 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1276 "should be: <= %hu, = %hu, and a product of %hu\n",
1278 dev_info.tx_desc_lim.nb_max,
1279 dev_info.tx_desc_lim.nb_min,
1280 dev_info.tx_desc_lim.nb_align);
1284 txq = dev->data->tx_queues;
1285 if (txq[tx_queue_id]) {
1286 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1288 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1289 txq[tx_queue_id] = NULL;
1292 if (tx_conf == NULL)
1293 tx_conf = &dev_info.default_txconf;
1296 * Convert between the offloads API to enable PMDs to support
1299 local_conf = *tx_conf;
1300 if (tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE) {
1301 rte_eth_convert_txq_offloads(tx_conf->offloads,
1302 &local_conf.txq_flags);
1303 /* Keep the ignore flag. */
1304 local_conf.txq_flags |= ETH_TXQ_FLAGS_IGNORE;
1306 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1307 &local_conf.offloads);
1310 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1311 socket_id, &local_conf);
1315 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1316 void *userdata __rte_unused)
1320 for (i = 0; i < unsent; i++)
1321 rte_pktmbuf_free(pkts[i]);
1325 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1328 uint64_t *count = userdata;
1331 for (i = 0; i < unsent; i++)
1332 rte_pktmbuf_free(pkts[i]);
1338 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1339 buffer_tx_error_fn cbfn, void *userdata)
1341 buffer->error_callback = cbfn;
1342 buffer->error_userdata = userdata;
1347 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1354 buffer->size = size;
1355 if (buffer->error_callback == NULL) {
1356 ret = rte_eth_tx_buffer_set_err_callback(
1357 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1364 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1366 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1368 /* Validate Input Data. Bail if not valid or not supported. */
1369 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1370 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1372 /* Call driver to free pending mbufs. */
1373 return (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1378 rte_eth_promiscuous_enable(uint16_t port_id)
1380 struct rte_eth_dev *dev;
1382 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1383 dev = &rte_eth_devices[port_id];
1385 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1386 (*dev->dev_ops->promiscuous_enable)(dev);
1387 dev->data->promiscuous = 1;
1391 rte_eth_promiscuous_disable(uint16_t port_id)
1393 struct rte_eth_dev *dev;
1395 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1396 dev = &rte_eth_devices[port_id];
1398 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1399 dev->data->promiscuous = 0;
1400 (*dev->dev_ops->promiscuous_disable)(dev);
1404 rte_eth_promiscuous_get(uint16_t port_id)
1406 struct rte_eth_dev *dev;
1408 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1410 dev = &rte_eth_devices[port_id];
1411 return dev->data->promiscuous;
1415 rte_eth_allmulticast_enable(uint16_t port_id)
1417 struct rte_eth_dev *dev;
1419 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1420 dev = &rte_eth_devices[port_id];
1422 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1423 (*dev->dev_ops->allmulticast_enable)(dev);
1424 dev->data->all_multicast = 1;
1428 rte_eth_allmulticast_disable(uint16_t port_id)
1430 struct rte_eth_dev *dev;
1432 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1433 dev = &rte_eth_devices[port_id];
1435 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1436 dev->data->all_multicast = 0;
1437 (*dev->dev_ops->allmulticast_disable)(dev);
1441 rte_eth_allmulticast_get(uint16_t port_id)
1443 struct rte_eth_dev *dev;
1445 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1447 dev = &rte_eth_devices[port_id];
1448 return dev->data->all_multicast;
1452 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1453 struct rte_eth_link *link)
1455 struct rte_eth_link *dst = link;
1456 struct rte_eth_link *src = &(dev->data->dev_link);
1458 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1459 *(uint64_t *)src) == 0)
1466 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1468 struct rte_eth_dev *dev;
1470 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1471 dev = &rte_eth_devices[port_id];
1473 if (dev->data->dev_conf.intr_conf.lsc != 0)
1474 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1476 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1477 (*dev->dev_ops->link_update)(dev, 1);
1478 *eth_link = dev->data->dev_link;
1483 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1485 struct rte_eth_dev *dev;
1487 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1488 dev = &rte_eth_devices[port_id];
1490 if (dev->data->dev_conf.intr_conf.lsc != 0)
1491 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1493 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1494 (*dev->dev_ops->link_update)(dev, 0);
1495 *eth_link = dev->data->dev_link;
1500 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1502 struct rte_eth_dev *dev;
1504 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1506 dev = &rte_eth_devices[port_id];
1507 memset(stats, 0, sizeof(*stats));
1509 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1510 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1511 return (*dev->dev_ops->stats_get)(dev, stats);
1515 rte_eth_stats_reset(uint16_t port_id)
1517 struct rte_eth_dev *dev;
1519 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1520 dev = &rte_eth_devices[port_id];
1522 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1523 (*dev->dev_ops->stats_reset)(dev);
1524 dev->data->rx_mbuf_alloc_failed = 0;
1530 get_xstats_basic_count(struct rte_eth_dev *dev)
1532 uint16_t nb_rxqs, nb_txqs;
1535 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1536 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1538 count = RTE_NB_STATS;
1539 count += nb_rxqs * RTE_NB_RXQ_STATS;
1540 count += nb_txqs * RTE_NB_TXQ_STATS;
1546 get_xstats_count(uint16_t port_id)
1548 struct rte_eth_dev *dev;
1551 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1552 dev = &rte_eth_devices[port_id];
1553 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1554 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1559 if (dev->dev_ops->xstats_get_names != NULL) {
1560 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1567 count += get_xstats_basic_count(dev);
1573 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1576 int cnt_xstats, idx_xstat;
1578 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1581 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1586 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1591 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1592 if (cnt_xstats < 0) {
1593 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1597 /* Get id-name lookup table */
1598 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1600 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1601 port_id, xstats_names, cnt_xstats, NULL)) {
1602 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1606 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1607 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1616 /* retrieve basic stats names */
1618 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1619 struct rte_eth_xstat_name *xstats_names)
1621 int cnt_used_entries = 0;
1622 uint32_t idx, id_queue;
1625 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1626 snprintf(xstats_names[cnt_used_entries].name,
1627 sizeof(xstats_names[0].name),
1628 "%s", rte_stats_strings[idx].name);
1631 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1632 for (id_queue = 0; id_queue < num_q; id_queue++) {
1633 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1634 snprintf(xstats_names[cnt_used_entries].name,
1635 sizeof(xstats_names[0].name),
1637 id_queue, rte_rxq_stats_strings[idx].name);
1642 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1643 for (id_queue = 0; id_queue < num_q; id_queue++) {
1644 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1645 snprintf(xstats_names[cnt_used_entries].name,
1646 sizeof(xstats_names[0].name),
1648 id_queue, rte_txq_stats_strings[idx].name);
1652 return cnt_used_entries;
1655 /* retrieve ethdev extended statistics names */
1657 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1658 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1661 struct rte_eth_xstat_name *xstats_names_copy;
1662 unsigned int no_basic_stat_requested = 1;
1663 unsigned int expected_entries;
1664 struct rte_eth_dev *dev;
1668 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1669 dev = &rte_eth_devices[port_id];
1671 ret = get_xstats_count(port_id);
1674 expected_entries = (unsigned int)ret;
1676 /* Return max number of stats if no ids given */
1679 return expected_entries;
1680 else if (xstats_names && size < expected_entries)
1681 return expected_entries;
1684 if (ids && !xstats_names)
1687 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
1688 unsigned int basic_count = get_xstats_basic_count(dev);
1689 uint64_t ids_copy[size];
1691 for (i = 0; i < size; i++) {
1692 if (ids[i] < basic_count) {
1693 no_basic_stat_requested = 0;
1698 * Convert ids to xstats ids that PMD knows.
1699 * ids known by user are basic + extended stats.
1701 ids_copy[i] = ids[i] - basic_count;
1704 if (no_basic_stat_requested)
1705 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
1706 xstats_names, ids_copy, size);
1709 /* Retrieve all stats */
1711 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
1713 if (num_stats < 0 || num_stats > (int)expected_entries)
1716 return expected_entries;
1719 xstats_names_copy = calloc(expected_entries,
1720 sizeof(struct rte_eth_xstat_name));
1722 if (!xstats_names_copy) {
1723 RTE_PMD_DEBUG_TRACE("ERROR: can't allocate memory");
1727 /* Fill xstats_names_copy structure */
1728 rte_eth_xstats_get_names(port_id, xstats_names_copy, expected_entries);
1731 for (i = 0; i < size; i++) {
1732 if (ids[i] >= expected_entries) {
1733 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
1734 free(xstats_names_copy);
1737 xstats_names[i] = xstats_names_copy[ids[i]];
1740 free(xstats_names_copy);
1745 rte_eth_xstats_get_names(uint16_t port_id,
1746 struct rte_eth_xstat_name *xstats_names,
1749 struct rte_eth_dev *dev;
1750 int cnt_used_entries;
1751 int cnt_expected_entries;
1752 int cnt_driver_entries;
1754 cnt_expected_entries = get_xstats_count(port_id);
1755 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1756 (int)size < cnt_expected_entries)
1757 return cnt_expected_entries;
1759 /* port_id checked in get_xstats_count() */
1760 dev = &rte_eth_devices[port_id];
1762 cnt_used_entries = rte_eth_basic_stats_get_names(
1765 if (dev->dev_ops->xstats_get_names != NULL) {
1766 /* If there are any driver-specific xstats, append them
1769 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1771 xstats_names + cnt_used_entries,
1772 size - cnt_used_entries);
1773 if (cnt_driver_entries < 0)
1774 return cnt_driver_entries;
1775 cnt_used_entries += cnt_driver_entries;
1778 return cnt_used_entries;
1783 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
1785 struct rte_eth_dev *dev;
1786 struct rte_eth_stats eth_stats;
1787 unsigned int count = 0, i, q;
1788 uint64_t val, *stats_ptr;
1789 uint16_t nb_rxqs, nb_txqs;
1791 rte_eth_stats_get(port_id, ð_stats);
1792 dev = &rte_eth_devices[port_id];
1794 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1795 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1798 for (i = 0; i < RTE_NB_STATS; i++) {
1799 stats_ptr = RTE_PTR_ADD(ð_stats,
1800 rte_stats_strings[i].offset);
1802 xstats[count++].value = val;
1806 for (q = 0; q < nb_rxqs; q++) {
1807 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1808 stats_ptr = RTE_PTR_ADD(ð_stats,
1809 rte_rxq_stats_strings[i].offset +
1810 q * sizeof(uint64_t));
1812 xstats[count++].value = val;
1817 for (q = 0; q < nb_txqs; q++) {
1818 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1819 stats_ptr = RTE_PTR_ADD(ð_stats,
1820 rte_txq_stats_strings[i].offset +
1821 q * sizeof(uint64_t));
1823 xstats[count++].value = val;
1829 /* retrieve ethdev extended statistics */
1831 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
1832 uint64_t *values, unsigned int size)
1834 unsigned int no_basic_stat_requested = 1;
1835 unsigned int num_xstats_filled;
1836 uint16_t expected_entries;
1837 struct rte_eth_dev *dev;
1841 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1842 expected_entries = get_xstats_count(port_id);
1843 struct rte_eth_xstat xstats[expected_entries];
1844 dev = &rte_eth_devices[port_id];
1846 /* Return max number of stats if no ids given */
1849 return expected_entries;
1850 else if (values && size < expected_entries)
1851 return expected_entries;
1857 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
1858 unsigned int basic_count = get_xstats_basic_count(dev);
1859 uint64_t ids_copy[size];
1861 for (i = 0; i < size; i++) {
1862 if (ids[i] < basic_count) {
1863 no_basic_stat_requested = 0;
1868 * Convert ids to xstats ids that PMD knows.
1869 * ids known by user are basic + extended stats.
1871 ids_copy[i] = ids[i] - basic_count;
1874 if (no_basic_stat_requested)
1875 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
1879 /* Fill the xstats structure */
1880 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
1883 num_xstats_filled = (unsigned int)ret;
1885 /* Return all stats */
1887 for (i = 0; i < num_xstats_filled; i++)
1888 values[i] = xstats[i].value;
1889 return expected_entries;
1893 for (i = 0; i < size; i++) {
1894 if (ids[i] >= expected_entries) {
1895 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
1898 values[i] = xstats[ids[i]].value;
1904 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
1907 struct rte_eth_dev *dev;
1908 unsigned int count = 0, i;
1909 signed int xcount = 0;
1910 uint16_t nb_rxqs, nb_txqs;
1912 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1914 dev = &rte_eth_devices[port_id];
1916 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1917 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1919 /* Return generic statistics */
1920 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1921 (nb_txqs * RTE_NB_TXQ_STATS);
1923 /* implemented by the driver */
1924 if (dev->dev_ops->xstats_get != NULL) {
1925 /* Retrieve the xstats from the driver at the end of the
1928 xcount = (*dev->dev_ops->xstats_get)(dev,
1929 xstats ? xstats + count : NULL,
1930 (n > count) ? n - count : 0);
1936 if (n < count + xcount || xstats == NULL)
1937 return count + xcount;
1939 /* now fill the xstats structure */
1940 count = rte_eth_basic_stats_get(port_id, xstats);
1942 for (i = 0; i < count; i++)
1944 /* add an offset to driver-specific stats */
1945 for ( ; i < count + xcount; i++)
1946 xstats[i].id += count;
1948 return count + xcount;
1951 /* reset ethdev extended statistics */
1953 rte_eth_xstats_reset(uint16_t port_id)
1955 struct rte_eth_dev *dev;
1957 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1958 dev = &rte_eth_devices[port_id];
1960 /* implemented by the driver */
1961 if (dev->dev_ops->xstats_reset != NULL) {
1962 (*dev->dev_ops->xstats_reset)(dev);
1966 /* fallback to default */
1967 rte_eth_stats_reset(port_id);
1971 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
1974 struct rte_eth_dev *dev;
1976 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1978 dev = &rte_eth_devices[port_id];
1980 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
1981 return (*dev->dev_ops->queue_stats_mapping_set)
1982 (dev, queue_id, stat_idx, is_rx);
1987 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
1990 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
1996 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
1999 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
2004 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2006 struct rte_eth_dev *dev;
2008 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2009 dev = &rte_eth_devices[port_id];
2011 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2012 return (*dev->dev_ops->fw_version_get)(dev, fw_version, fw_size);
2016 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2018 struct rte_eth_dev *dev;
2019 const struct rte_eth_desc_lim lim = {
2020 .nb_max = UINT16_MAX,
2025 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2026 dev = &rte_eth_devices[port_id];
2028 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2029 dev_info->rx_desc_lim = lim;
2030 dev_info->tx_desc_lim = lim;
2032 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2033 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2034 dev_info->driver_name = dev->device->driver->name;
2035 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2036 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2040 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2041 uint32_t *ptypes, int num)
2044 struct rte_eth_dev *dev;
2045 const uint32_t *all_ptypes;
2047 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2048 dev = &rte_eth_devices[port_id];
2049 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2050 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2055 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2056 if (all_ptypes[i] & ptype_mask) {
2058 ptypes[j] = all_ptypes[i];
2066 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2068 struct rte_eth_dev *dev;
2070 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2071 dev = &rte_eth_devices[port_id];
2072 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2077 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2079 struct rte_eth_dev *dev;
2081 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2083 dev = &rte_eth_devices[port_id];
2084 *mtu = dev->data->mtu;
2089 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2092 struct rte_eth_dev *dev;
2094 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2095 dev = &rte_eth_devices[port_id];
2096 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2098 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2100 dev->data->mtu = mtu;
2106 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2108 struct rte_eth_dev *dev;
2111 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2112 dev = &rte_eth_devices[port_id];
2113 if (!(dev->data->dev_conf.rxmode.offloads &
2114 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2115 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2119 if (vlan_id > 4095) {
2120 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2121 port_id, (unsigned) vlan_id);
2124 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2126 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2128 struct rte_vlan_filter_conf *vfc;
2132 vfc = &dev->data->vlan_filter_conf;
2133 vidx = vlan_id / 64;
2134 vbit = vlan_id % 64;
2137 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2139 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2146 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2149 struct rte_eth_dev *dev;
2151 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2152 dev = &rte_eth_devices[port_id];
2153 if (rx_queue_id >= dev->data->nb_rx_queues) {
2154 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2158 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2159 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2165 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2166 enum rte_vlan_type vlan_type,
2169 struct rte_eth_dev *dev;
2171 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2172 dev = &rte_eth_devices[port_id];
2173 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2175 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
2179 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2181 struct rte_eth_dev *dev;
2185 uint64_t orig_offloads;
2187 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2188 dev = &rte_eth_devices[port_id];
2190 /* save original values in case of failure */
2191 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2193 /*check which option changed by application*/
2194 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2195 org = !!(dev->data->dev_conf.rxmode.offloads &
2196 DEV_RX_OFFLOAD_VLAN_STRIP);
2199 dev->data->dev_conf.rxmode.offloads |=
2200 DEV_RX_OFFLOAD_VLAN_STRIP;
2202 dev->data->dev_conf.rxmode.offloads &=
2203 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2204 mask |= ETH_VLAN_STRIP_MASK;
2207 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2208 org = !!(dev->data->dev_conf.rxmode.offloads &
2209 DEV_RX_OFFLOAD_VLAN_FILTER);
2212 dev->data->dev_conf.rxmode.offloads |=
2213 DEV_RX_OFFLOAD_VLAN_FILTER;
2215 dev->data->dev_conf.rxmode.offloads &=
2216 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2217 mask |= ETH_VLAN_FILTER_MASK;
2220 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2221 org = !!(dev->data->dev_conf.rxmode.offloads &
2222 DEV_RX_OFFLOAD_VLAN_EXTEND);
2225 dev->data->dev_conf.rxmode.offloads |=
2226 DEV_RX_OFFLOAD_VLAN_EXTEND;
2228 dev->data->dev_conf.rxmode.offloads &=
2229 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2230 mask |= ETH_VLAN_EXTEND_MASK;
2237 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2240 * Convert to the offload bitfield API just in case the underlying PMD
2241 * still supporting it.
2243 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2244 &dev->data->dev_conf.rxmode);
2245 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2247 /* hit an error restore original values */
2248 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2249 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2250 &dev->data->dev_conf.rxmode);
2257 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2259 struct rte_eth_dev *dev;
2262 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2263 dev = &rte_eth_devices[port_id];
2265 if (dev->data->dev_conf.rxmode.offloads &
2266 DEV_RX_OFFLOAD_VLAN_STRIP)
2267 ret |= ETH_VLAN_STRIP_OFFLOAD;
2269 if (dev->data->dev_conf.rxmode.offloads &
2270 DEV_RX_OFFLOAD_VLAN_FILTER)
2271 ret |= ETH_VLAN_FILTER_OFFLOAD;
2273 if (dev->data->dev_conf.rxmode.offloads &
2274 DEV_RX_OFFLOAD_VLAN_EXTEND)
2275 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2281 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2283 struct rte_eth_dev *dev;
2285 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2286 dev = &rte_eth_devices[port_id];
2287 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2288 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
2294 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2296 struct rte_eth_dev *dev;
2298 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2299 dev = &rte_eth_devices[port_id];
2300 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2301 memset(fc_conf, 0, sizeof(*fc_conf));
2302 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
2306 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2308 struct rte_eth_dev *dev;
2310 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2311 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2312 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2316 dev = &rte_eth_devices[port_id];
2317 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2318 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
2322 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2323 struct rte_eth_pfc_conf *pfc_conf)
2325 struct rte_eth_dev *dev;
2327 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2328 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2329 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2333 dev = &rte_eth_devices[port_id];
2334 /* High water, low water validation are device specific */
2335 if (*dev->dev_ops->priority_flow_ctrl_set)
2336 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
2341 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2349 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2350 for (i = 0; i < num; i++) {
2351 if (reta_conf[i].mask)
2359 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2363 uint16_t i, idx, shift;
2369 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2373 for (i = 0; i < reta_size; i++) {
2374 idx = i / RTE_RETA_GROUP_SIZE;
2375 shift = i % RTE_RETA_GROUP_SIZE;
2376 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2377 (reta_conf[idx].reta[shift] >= max_rxq)) {
2378 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2379 "the maximum rxq index: %u\n", idx, shift,
2380 reta_conf[idx].reta[shift], max_rxq);
2389 rte_eth_dev_rss_reta_update(uint16_t port_id,
2390 struct rte_eth_rss_reta_entry64 *reta_conf,
2393 struct rte_eth_dev *dev;
2396 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2397 /* Check mask bits */
2398 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2402 dev = &rte_eth_devices[port_id];
2404 /* Check entry value */
2405 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2406 dev->data->nb_rx_queues);
2410 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2411 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
2415 rte_eth_dev_rss_reta_query(uint16_t port_id,
2416 struct rte_eth_rss_reta_entry64 *reta_conf,
2419 struct rte_eth_dev *dev;
2422 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2424 /* Check mask bits */
2425 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2429 dev = &rte_eth_devices[port_id];
2430 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2431 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
2435 rte_eth_dev_rss_hash_update(uint16_t port_id,
2436 struct rte_eth_rss_conf *rss_conf)
2438 struct rte_eth_dev *dev;
2440 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2441 dev = &rte_eth_devices[port_id];
2442 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2443 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2447 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2448 struct rte_eth_rss_conf *rss_conf)
2450 struct rte_eth_dev *dev;
2452 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2453 dev = &rte_eth_devices[port_id];
2454 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2455 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2459 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2460 struct rte_eth_udp_tunnel *udp_tunnel)
2462 struct rte_eth_dev *dev;
2464 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2465 if (udp_tunnel == NULL) {
2466 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2470 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2471 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2475 dev = &rte_eth_devices[port_id];
2476 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2477 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2481 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2482 struct rte_eth_udp_tunnel *udp_tunnel)
2484 struct rte_eth_dev *dev;
2486 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2487 dev = &rte_eth_devices[port_id];
2489 if (udp_tunnel == NULL) {
2490 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2494 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2495 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2499 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2500 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2504 rte_eth_led_on(uint16_t port_id)
2506 struct rte_eth_dev *dev;
2508 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2509 dev = &rte_eth_devices[port_id];
2510 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2511 return (*dev->dev_ops->dev_led_on)(dev);
2515 rte_eth_led_off(uint16_t port_id)
2517 struct rte_eth_dev *dev;
2519 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2520 dev = &rte_eth_devices[port_id];
2521 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2522 return (*dev->dev_ops->dev_led_off)(dev);
2526 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2530 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2532 struct rte_eth_dev_info dev_info;
2533 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2536 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2537 rte_eth_dev_info_get(port_id, &dev_info);
2539 for (i = 0; i < dev_info.max_mac_addrs; i++)
2540 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2546 static const struct ether_addr null_mac_addr;
2549 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2552 struct rte_eth_dev *dev;
2557 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2558 dev = &rte_eth_devices[port_id];
2559 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2561 if (is_zero_ether_addr(addr)) {
2562 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2566 if (pool >= ETH_64_POOLS) {
2567 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2571 index = get_mac_addr_index(port_id, addr);
2573 index = get_mac_addr_index(port_id, &null_mac_addr);
2575 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2580 pool_mask = dev->data->mac_pool_sel[index];
2582 /* Check if both MAC address and pool is already there, and do nothing */
2583 if (pool_mask & (1ULL << pool))
2588 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2591 /* Update address in NIC data structure */
2592 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2594 /* Update pool bitmap in NIC data structure */
2595 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2602 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
2604 struct rte_eth_dev *dev;
2607 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2608 dev = &rte_eth_devices[port_id];
2609 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2611 index = get_mac_addr_index(port_id, addr);
2613 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2615 } else if (index < 0)
2616 return 0; /* Do nothing if address wasn't found */
2619 (*dev->dev_ops->mac_addr_remove)(dev, index);
2621 /* Update address in NIC data structure */
2622 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2624 /* reset pool bitmap */
2625 dev->data->mac_pool_sel[index] = 0;
2631 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
2633 struct rte_eth_dev *dev;
2635 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2637 if (!is_valid_assigned_ether_addr(addr))
2640 dev = &rte_eth_devices[port_id];
2641 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2643 /* Update default address in NIC data structure */
2644 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2646 (*dev->dev_ops->mac_addr_set)(dev, addr);
2653 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2657 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2659 struct rte_eth_dev_info dev_info;
2660 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2663 rte_eth_dev_info_get(port_id, &dev_info);
2664 if (!dev->data->hash_mac_addrs)
2667 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2668 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2669 ETHER_ADDR_LEN) == 0)
2676 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
2681 struct rte_eth_dev *dev;
2683 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2685 dev = &rte_eth_devices[port_id];
2686 if (is_zero_ether_addr(addr)) {
2687 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2692 index = get_hash_mac_addr_index(port_id, addr);
2693 /* Check if it's already there, and do nothing */
2694 if ((index >= 0) && on)
2699 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2700 "set in UTA\n", port_id);
2704 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2706 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2712 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2713 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2715 /* Update address in NIC data structure */
2717 ether_addr_copy(addr,
2718 &dev->data->hash_mac_addrs[index]);
2720 ether_addr_copy(&null_mac_addr,
2721 &dev->data->hash_mac_addrs[index]);
2728 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
2730 struct rte_eth_dev *dev;
2732 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2734 dev = &rte_eth_devices[port_id];
2736 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2737 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2740 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
2743 struct rte_eth_dev *dev;
2744 struct rte_eth_dev_info dev_info;
2745 struct rte_eth_link link;
2747 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2749 dev = &rte_eth_devices[port_id];
2750 rte_eth_dev_info_get(port_id, &dev_info);
2751 link = dev->data->dev_link;
2753 if (queue_idx > dev_info.max_tx_queues) {
2754 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2755 "invalid queue id=%d\n", port_id, queue_idx);
2759 if (tx_rate > link.link_speed) {
2760 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2761 "bigger than link speed= %d\n",
2762 tx_rate, link.link_speed);
2766 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2767 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2771 rte_eth_mirror_rule_set(uint16_t port_id,
2772 struct rte_eth_mirror_conf *mirror_conf,
2773 uint8_t rule_id, uint8_t on)
2775 struct rte_eth_dev *dev;
2777 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2778 if (mirror_conf->rule_type == 0) {
2779 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2783 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2784 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2789 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2790 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2791 (mirror_conf->pool_mask == 0)) {
2792 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2796 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2797 mirror_conf->vlan.vlan_mask == 0) {
2798 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2802 dev = &rte_eth_devices[port_id];
2803 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2805 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2809 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
2811 struct rte_eth_dev *dev;
2813 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2815 dev = &rte_eth_devices[port_id];
2816 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2818 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2822 rte_eth_dev_callback_register(uint16_t port_id,
2823 enum rte_eth_event_type event,
2824 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2826 struct rte_eth_dev *dev;
2827 struct rte_eth_dev_callback *user_cb;
2832 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2834 dev = &rte_eth_devices[port_id];
2835 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2837 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2838 if (user_cb->cb_fn == cb_fn &&
2839 user_cb->cb_arg == cb_arg &&
2840 user_cb->event == event) {
2845 /* create a new callback. */
2846 if (user_cb == NULL) {
2847 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2848 sizeof(struct rte_eth_dev_callback), 0);
2849 if (user_cb != NULL) {
2850 user_cb->cb_fn = cb_fn;
2851 user_cb->cb_arg = cb_arg;
2852 user_cb->event = event;
2853 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2857 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2858 return (user_cb == NULL) ? -ENOMEM : 0;
2862 rte_eth_dev_callback_unregister(uint16_t port_id,
2863 enum rte_eth_event_type event,
2864 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2867 struct rte_eth_dev *dev;
2868 struct rte_eth_dev_callback *cb, *next;
2873 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2875 dev = &rte_eth_devices[port_id];
2876 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2879 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2881 next = TAILQ_NEXT(cb, next);
2883 if (cb->cb_fn != cb_fn || cb->event != event ||
2884 (cb->cb_arg != (void *)-1 &&
2885 cb->cb_arg != cb_arg))
2889 * if this callback is not executing right now,
2892 if (cb->active == 0) {
2893 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2900 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2905 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2906 enum rte_eth_event_type event, void *cb_arg, void *ret_param)
2908 struct rte_eth_dev_callback *cb_lst;
2909 struct rte_eth_dev_callback dev_cb;
2912 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2913 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2914 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2919 dev_cb.cb_arg = cb_arg;
2920 if (ret_param != NULL)
2921 dev_cb.ret_param = ret_param;
2923 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2924 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2925 dev_cb.cb_arg, dev_cb.ret_param);
2926 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2929 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2934 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
2937 struct rte_eth_dev *dev;
2938 struct rte_intr_handle *intr_handle;
2942 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2944 dev = &rte_eth_devices[port_id];
2946 if (!dev->intr_handle) {
2947 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
2951 intr_handle = dev->intr_handle;
2952 if (!intr_handle->intr_vec) {
2953 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2957 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
2958 vec = intr_handle->intr_vec[qid];
2959 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2960 if (rc && rc != -EEXIST) {
2961 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2962 " op %d epfd %d vec %u\n",
2963 port_id, qid, op, epfd, vec);
2970 const struct rte_memzone *
2971 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
2972 uint16_t queue_id, size_t size, unsigned align,
2975 char z_name[RTE_MEMZONE_NAMESIZE];
2976 const struct rte_memzone *mz;
2978 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
2979 dev->device->driver->name, ring_name,
2980 dev->data->port_id, queue_id);
2982 mz = rte_memzone_lookup(z_name);
2986 return rte_memzone_reserve_aligned(z_name, size, socket_id, 0, align);
2990 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
2991 int epfd, int op, void *data)
2994 struct rte_eth_dev *dev;
2995 struct rte_intr_handle *intr_handle;
2998 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3000 dev = &rte_eth_devices[port_id];
3001 if (queue_id >= dev->data->nb_rx_queues) {
3002 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3006 if (!dev->intr_handle) {
3007 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3011 intr_handle = dev->intr_handle;
3012 if (!intr_handle->intr_vec) {
3013 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3017 vec = intr_handle->intr_vec[queue_id];
3018 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3019 if (rc && rc != -EEXIST) {
3020 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3021 " op %d epfd %d vec %u\n",
3022 port_id, queue_id, op, epfd, vec);
3030 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3033 struct rte_eth_dev *dev;
3035 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3037 dev = &rte_eth_devices[port_id];
3039 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3040 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
3044 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3047 struct rte_eth_dev *dev;
3049 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3051 dev = &rte_eth_devices[port_id];
3053 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3054 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
3059 rte_eth_dev_filter_supported(uint16_t port_id,
3060 enum rte_filter_type filter_type)
3062 struct rte_eth_dev *dev;
3064 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3066 dev = &rte_eth_devices[port_id];
3067 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3068 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3069 RTE_ETH_FILTER_NOP, NULL);
3073 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3074 enum rte_filter_op filter_op, void *arg)
3076 struct rte_eth_dev *dev;
3078 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3080 dev = &rte_eth_devices[port_id];
3081 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3082 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
3086 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3087 rte_rx_callback_fn fn, void *user_param)
3089 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3090 rte_errno = ENOTSUP;
3093 /* check input parameters */
3094 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3095 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3099 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3107 cb->param = user_param;
3109 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3110 /* Add the callbacks in fifo order. */
3111 struct rte_eth_rxtx_callback *tail =
3112 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3115 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3122 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3128 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3129 rte_rx_callback_fn fn, void *user_param)
3131 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3132 rte_errno = ENOTSUP;
3135 /* check input parameters */
3136 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3137 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3142 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3150 cb->param = user_param;
3152 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3153 /* Add the callbacks at fisrt position*/
3154 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3156 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3157 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3163 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3164 rte_tx_callback_fn fn, void *user_param)
3166 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3167 rte_errno = ENOTSUP;
3170 /* check input parameters */
3171 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3172 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3177 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3185 cb->param = user_param;
3187 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3188 /* Add the callbacks in fifo order. */
3189 struct rte_eth_rxtx_callback *tail =
3190 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3193 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3200 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3206 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3207 struct rte_eth_rxtx_callback *user_cb)
3209 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3212 /* Check input parameters. */
3213 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3214 if (user_cb == NULL ||
3215 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3218 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3219 struct rte_eth_rxtx_callback *cb;
3220 struct rte_eth_rxtx_callback **prev_cb;
3223 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3224 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3225 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3227 if (cb == user_cb) {
3228 /* Remove the user cb from the callback list. */
3229 *prev_cb = cb->next;
3234 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3240 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3241 struct rte_eth_rxtx_callback *user_cb)
3243 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3246 /* Check input parameters. */
3247 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3248 if (user_cb == NULL ||
3249 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3252 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3254 struct rte_eth_rxtx_callback *cb;
3255 struct rte_eth_rxtx_callback **prev_cb;
3257 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3258 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3259 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3261 if (cb == user_cb) {
3262 /* Remove the user cb from the callback list. */
3263 *prev_cb = cb->next;
3268 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3274 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3275 struct rte_eth_rxq_info *qinfo)
3277 struct rte_eth_dev *dev;
3279 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3284 dev = &rte_eth_devices[port_id];
3285 if (queue_id >= dev->data->nb_rx_queues) {
3286 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3290 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3292 memset(qinfo, 0, sizeof(*qinfo));
3293 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3298 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3299 struct rte_eth_txq_info *qinfo)
3301 struct rte_eth_dev *dev;
3303 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3308 dev = &rte_eth_devices[port_id];
3309 if (queue_id >= dev->data->nb_tx_queues) {
3310 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3314 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3316 memset(qinfo, 0, sizeof(*qinfo));
3317 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3322 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3323 struct ether_addr *mc_addr_set,
3324 uint32_t nb_mc_addr)
3326 struct rte_eth_dev *dev;
3328 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3330 dev = &rte_eth_devices[port_id];
3331 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3332 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3336 rte_eth_timesync_enable(uint16_t port_id)
3338 struct rte_eth_dev *dev;
3340 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3341 dev = &rte_eth_devices[port_id];
3343 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3344 return (*dev->dev_ops->timesync_enable)(dev);
3348 rte_eth_timesync_disable(uint16_t port_id)
3350 struct rte_eth_dev *dev;
3352 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3353 dev = &rte_eth_devices[port_id];
3355 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3356 return (*dev->dev_ops->timesync_disable)(dev);
3360 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3363 struct rte_eth_dev *dev;
3365 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3366 dev = &rte_eth_devices[port_id];
3368 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3369 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3373 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3374 struct timespec *timestamp)
3376 struct rte_eth_dev *dev;
3378 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3379 dev = &rte_eth_devices[port_id];
3381 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3382 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3386 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3388 struct rte_eth_dev *dev;
3390 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3391 dev = &rte_eth_devices[port_id];
3393 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3394 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3398 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3400 struct rte_eth_dev *dev;
3402 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3403 dev = &rte_eth_devices[port_id];
3405 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3406 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3410 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3412 struct rte_eth_dev *dev;
3414 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3415 dev = &rte_eth_devices[port_id];
3417 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3418 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3422 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
3424 struct rte_eth_dev *dev;
3426 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3428 dev = &rte_eth_devices[port_id];
3429 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3430 return (*dev->dev_ops->get_reg)(dev, info);
3434 rte_eth_dev_get_eeprom_length(uint16_t port_id)
3436 struct rte_eth_dev *dev;
3438 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3440 dev = &rte_eth_devices[port_id];
3441 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3442 return (*dev->dev_ops->get_eeprom_length)(dev);
3446 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3448 struct rte_eth_dev *dev;
3450 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3452 dev = &rte_eth_devices[port_id];
3453 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3454 return (*dev->dev_ops->get_eeprom)(dev, info);
3458 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3460 struct rte_eth_dev *dev;
3462 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3464 dev = &rte_eth_devices[port_id];
3465 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3466 return (*dev->dev_ops->set_eeprom)(dev, info);
3470 rte_eth_dev_get_dcb_info(uint16_t port_id,
3471 struct rte_eth_dcb_info *dcb_info)
3473 struct rte_eth_dev *dev;
3475 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3477 dev = &rte_eth_devices[port_id];
3478 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3480 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3481 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3485 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
3486 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3488 struct rte_eth_dev *dev;
3490 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3491 if (l2_tunnel == NULL) {
3492 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3496 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3497 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3501 dev = &rte_eth_devices[port_id];
3502 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3504 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3508 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
3509 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3513 struct rte_eth_dev *dev;
3515 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3517 if (l2_tunnel == NULL) {
3518 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3522 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3523 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3528 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3532 dev = &rte_eth_devices[port_id];
3533 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3535 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);
3539 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
3540 const struct rte_eth_desc_lim *desc_lim)
3542 if (desc_lim->nb_align != 0)
3543 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
3545 if (desc_lim->nb_max != 0)
3546 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
3548 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
3552 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
3553 uint16_t *nb_rx_desc,
3554 uint16_t *nb_tx_desc)
3556 struct rte_eth_dev *dev;
3557 struct rte_eth_dev_info dev_info;
3559 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3561 dev = &rte_eth_devices[port_id];
3562 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3564 rte_eth_dev_info_get(port_id, &dev_info);
3566 if (nb_rx_desc != NULL)
3567 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
3569 if (nb_tx_desc != NULL)
3570 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
3576 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
3578 struct rte_eth_dev *dev;
3580 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3585 dev = &rte_eth_devices[port_id];
3587 if (*dev->dev_ops->pool_ops_supported == NULL)
3588 return 1; /* all pools are supported */
3590 return (*dev->dev_ops->pool_ops_supported)(dev, pool);