lib/librte_ether/rte_ether_version.map

   1 DPDK_2.0 {
   2         global:
   3
   4         _rte_eth_dev_callback_process;
   5         rte_eth_add_rx_callback;
   6         rte_eth_add_tx_callback;
   7         rte_eth_allmulticast_disable;
   8         rte_eth_allmulticast_enable;
   9         rte_eth_allmulticast_get;
  10         rte_eth_dev_allocate;
  11         rte_eth_dev_allocated;
  12         rte_eth_dev_attach;
  13         rte_eth_dev_bypass_event_show;
  14         rte_eth_dev_bypass_event_store;
  15         rte_eth_dev_bypass_init;
  16         rte_eth_dev_bypass_state_set;
  17         rte_eth_dev_bypass_state_show;
  18         rte_eth_dev_bypass_ver_show;
  19         rte_eth_dev_bypass_wd_reset;
  20         rte_eth_dev_bypass_wd_timeout_show;
  21         rte_eth_dev_callback_process;
  22         rte_eth_dev_callback_register;
  23         rte_eth_dev_callback_unregister;
  24         rte_eth_dev_close;
  25         rte_eth_dev_configure;
  26         rte_eth_dev_count;
  27         rte_eth_dev_detach;
  28         rte_eth_dev_fdir_add_perfect_filter;
  29         rte_eth_dev_fdir_add_signature_filter;
  30         rte_eth_dev_fdir_get_infos;
  31         rte_eth_dev_fdir_remove_perfect_filter;
  32         rte_eth_dev_fdir_remove_signature_filter;
  33         rte_eth_dev_fdir_set_masks;
  34         rte_eth_dev_fdir_update_perfect_filter;
  35         rte_eth_dev_fdir_update_signature_filter;
  36         rte_eth_dev_filter_ctrl;
  37         rte_eth_dev_filter_supported;
  38         rte_eth_dev_flow_ctrl_get;
  39         rte_eth_dev_flow_ctrl_set;
  40         rte_eth_dev_get_mtu;
  41         rte_eth_dev_get_vlan_offload;
  42         rte_eth_dev_info_get;
  43         rte_eth_dev_mac_addr_add;
  44         rte_eth_dev_mac_addr_remove;
  45         rte_eth_dev_priority_flow_ctrl_set;
  46         rte_eth_dev_release_port;
  47         rte_eth_dev_rss_hash_conf_get;
  48         rte_eth_dev_rss_hash_update;
  49         rte_eth_dev_rss_reta_query;
  50         rte_eth_dev_rss_reta_update;
  51         rte_eth_dev_rx_queue_start;
  52         rte_eth_dev_rx_queue_stop;
  53         rte_eth_dev_set_link_down;
  54         rte_eth_dev_set_link_up;
  55         rte_eth_dev_set_mtu;
  56         rte_eth_dev_set_rx_queue_stats_mapping;
  57         rte_eth_dev_set_tx_queue_stats_mapping;
  58         rte_eth_dev_set_vf_rx;
  59         rte_eth_dev_set_vf_rxmode;
  60         rte_eth_dev_set_vf_tx;
  61         rte_eth_dev_set_vf_vlan_filter;
  62         rte_eth_dev_set_vlan_ether_type;
  63         rte_eth_dev_set_vlan_offload;
  64         rte_eth_dev_set_vlan_pvid;
  65         rte_eth_dev_set_vlan_strip_on_queue;
  66         rte_eth_dev_socket_id;
  67         rte_eth_dev_start;
  68         rte_eth_dev_stop;
  69         rte_eth_dev_tx_queue_start;
  70         rte_eth_dev_tx_queue_stop;
  71         rte_eth_dev_uc_all_hash_table_set;
  72         rte_eth_dev_uc_hash_table_set;
  73         rte_eth_dev_udp_tunnel_add;
  74         rte_eth_dev_udp_tunnel_delete;
  75         rte_eth_dev_vlan_filter;
  76         rte_eth_dev_wd_timeout_store;
  77         rte_eth_devices;
  78         rte_eth_driver_register;
  79         rte_eth_led_off;
  80         rte_eth_led_on;
  81         rte_eth_link;
  82         rte_eth_link_get;
  83         rte_eth_link_get_nowait;
  84         rte_eth_macaddr_get;
  85         rte_eth_mirror_rule_reset;
  86         rte_eth_mirror_rule_set;
  87         rte_eth_promiscuous_disable;
  88         rte_eth_promiscuous_enable;
  89         rte_eth_promiscuous_get;
  90         rte_eth_remove_rx_callback;
  91         rte_eth_remove_tx_callback;
  92         rte_eth_rx_burst;
  93         rte_eth_rx_descriptor_done;
  94         rte_eth_rx_queue_count;
  95         rte_eth_rx_queue_setup;
  96         rte_eth_set_queue_rate_limit;
  97         rte_eth_set_vf_rate_limit;
  98         rte_eth_stats;
  99         rte_eth_stats_get;
 100         rte_eth_stats_reset;
 101         rte_eth_tx_burst;
 102         rte_eth_tx_queue_setup;
 103         rte_eth_xstats_get;
 104         rte_eth_xstats_reset;
 105
 106         local: *;
 107 };
 108
 109 DPDK_2.1 {
 110         global:
 111
 112         rte_eth_dev_default_mac_addr_set;
 113         rte_eth_dev_get_eeprom;
 114         rte_eth_dev_get_eeprom_length;
 115         rte_eth_dev_get_reg_info;
 116         rte_eth_dev_get_reg_length;
 117         rte_eth_dev_is_valid_port;
 118         rte_eth_dev_rx_intr_ctl;
 119         rte_eth_dev_rx_intr_ctl_q;
 120         rte_eth_dev_rx_intr_disable;
 121         rte_eth_dev_rx_intr_enable;
 122         rte_eth_dev_set_eeprom;
 123         rte_eth_dev_set_mc_addr_list;
 124         rte_eth_timesync_disable;
 125         rte_eth_timesync_enable;
 126         rte_eth_timesync_read_rx_timestamp;
 127         rte_eth_timesync_read_tx_timestamp;
 128
 129 } DPDK_2.0;
 130
 131 DPDK_2.2 {
 132         global:
 133
 134         rte_eth_dev_get_dcb_info;
 135         rte_eth_rx_queue_info_get;
 136         rte_eth_tx_queue_info_get;
 137
 138 } DPDK_2.1;