lib/librte_pmd_i40e/i40e_ethdev_vf.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <sys/queue.h>
  35 #include <stdio.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <unistd.h>
  40 #include <stdarg.h>
  41 #include <inttypes.h>
  42 #include <rte_byteorder.h>
  43 #include <rte_common.h>
  44 #include <rte_cycles.h>
  45
  46 #include <rte_interrupts.h>
  47 #include <rte_log.h>
  48 #include <rte_debug.h>
  49 #include <rte_pci.h>
  50 #include <rte_atomic.h>
  51 #include <rte_branch_prediction.h>
  52 #include <rte_memory.h>
  53 #include <rte_memzone.h>
  54 #include <rte_tailq.h>
  55 #include <rte_eal.h>
  56 #include <rte_alarm.h>
  57 #include <rte_ether.h>
  58 #include <rte_ethdev.h>
  59 #include <rte_atomic.h>
  60 #include <rte_malloc.h>
  61 #include <rte_dev.h>
  62
  63 #include "i40e_logs.h"
  64 #include "i40e/i40e_prototype.h"
  65 #include "i40e/i40e_adminq_cmd.h"
  66 #include "i40e/i40e_type.h"
  67
  68 #include "i40e_rxtx.h"
  69 #include "i40e_ethdev.h"
  70 #include "i40e_pf.h"
  71 #define I40EVF_VSI_DEFAULT_MSIX_INTR 1
  72
  73 /* busy wait delay in msec */
  74 #define I40EVF_BUSY_WAIT_DELAY 10
  75 #define I40EVF_BUSY_WAIT_COUNT 50
  76 #define MAX_RESET_WAIT_CNT     20
  77
  78 struct i40evf_arq_msg_info {
  79         enum i40e_virtchnl_ops ops;
  80         enum i40e_status_code result;
  81         uint16_t buf_len;
  82         uint16_t msg_len;
  83         uint8_t *msg;
  84 };
  85
  86 struct vf_cmd_info {
  87         enum i40e_virtchnl_ops ops;
  88         uint8_t *in_args;
  89         uint32_t in_args_size;
  90         uint8_t *out_buffer;
  91         /* Input & output type. pass in buffer size and pass out
  92          * actual return result
  93          */
  94         uint32_t out_size;
  95 };
  96
  97 enum i40evf_aq_result {
  98         I40EVF_MSG_ERR = -1, /* Meet error when accessing admin queue */
  99         I40EVF_MSG_NON,      /* Read nothing from admin queue */
 100         I40EVF_MSG_SYS,      /* Read system msg from admin queue */
 101         I40EVF_MSG_CMD,      /* Read async command result */
 102 };
 103
 104 /* A share buffer to store the command result from PF driver */
 105 static uint8_t cmd_result_buffer[I40E_AQ_BUF_SZ];
 106
 107 static int i40evf_dev_configure(struct rte_eth_dev *dev);
 108 static int i40evf_dev_start(struct rte_eth_dev *dev);
 109 static void i40evf_dev_stop(struct rte_eth_dev *dev);
 110 static void i40evf_dev_info_get(struct rte_eth_dev *dev,
 111                                 struct rte_eth_dev_info *dev_info);
 112 static int i40evf_dev_link_update(struct rte_eth_dev *dev,
 113                                   __rte_unused int wait_to_complete);
 114 static void i40evf_dev_stats_get(struct rte_eth_dev *dev,
 115                                 struct rte_eth_stats *stats);
 116 static int i40evf_vlan_filter_set(struct rte_eth_dev *dev,
 117                                   uint16_t vlan_id, int on);
 118 static void i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
 119 static int i40evf_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid,
 120                                 int on);
 121 static void i40evf_dev_close(struct rte_eth_dev *dev);
 122 static void i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev);
 123 static void i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev);
 124 static void i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev);
 125 static void i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev);
 126 static int i40evf_get_link_status(struct rte_eth_dev *dev,
 127                                   struct rte_eth_link *link);
 128 static int i40evf_init_vlan(struct rte_eth_dev *dev);
 129 static int i40evf_dev_rx_queue_start(struct rte_eth_dev *dev,
 130                                      uint16_t rx_queue_id);
 131 static int i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev,
 132                                     uint16_t rx_queue_id);
 133 static int i40evf_dev_tx_queue_start(struct rte_eth_dev *dev,
 134                                      uint16_t tx_queue_id);
 135 static int i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev,
 136                                     uint16_t tx_queue_id);
 137 static int i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
 138                         struct rte_eth_rss_reta_entry64 *reta_conf,
 139                         uint16_t reta_size);
 140 static int i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
 141                         struct rte_eth_rss_reta_entry64 *reta_conf,
 142                         uint16_t reta_size);
 143 static int i40evf_config_rss(struct i40e_vf *vf);
 144 static int i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
 145                                       struct rte_eth_rss_conf *rss_conf);
 146 static int i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
 147                                         struct rte_eth_rss_conf *rss_conf);
 148
 149 /* Default hash key buffer for RSS */
 150 static uint32_t rss_key_default[I40E_VFQF_HKEY_MAX_INDEX + 1];
 151
 152 static struct eth_dev_ops i40evf_eth_dev_ops = {
 153         .dev_configure        = i40evf_dev_configure,
 154         .dev_start            = i40evf_dev_start,
 155         .dev_stop             = i40evf_dev_stop,
 156         .promiscuous_enable   = i40evf_dev_promiscuous_enable,
 157         .promiscuous_disable  = i40evf_dev_promiscuous_disable,
 158         .allmulticast_enable  = i40evf_dev_allmulticast_enable,
 159         .allmulticast_disable = i40evf_dev_allmulticast_disable,
 160         .link_update          = i40evf_dev_link_update,
 161         .stats_get            = i40evf_dev_stats_get,
 162         .dev_close            = i40evf_dev_close,
 163         .dev_infos_get        = i40evf_dev_info_get,
 164         .vlan_filter_set      = i40evf_vlan_filter_set,
 165         .vlan_offload_set     = i40evf_vlan_offload_set,
 166         .vlan_pvid_set        = i40evf_vlan_pvid_set,
 167         .rx_queue_start       = i40evf_dev_rx_queue_start,
 168         .rx_queue_stop        = i40evf_dev_rx_queue_stop,
 169         .tx_queue_start       = i40evf_dev_tx_queue_start,
 170         .tx_queue_stop        = i40evf_dev_tx_queue_stop,
 171         .rx_queue_setup       = i40e_dev_rx_queue_setup,
 172         .rx_queue_release     = i40e_dev_rx_queue_release,
 173         .tx_queue_setup       = i40e_dev_tx_queue_setup,
 174         .tx_queue_release     = i40e_dev_tx_queue_release,
 175         .reta_update          = i40evf_dev_rss_reta_update,
 176         .reta_query           = i40evf_dev_rss_reta_query,
 177         .rss_hash_update      = i40evf_dev_rss_hash_update,
 178         .rss_hash_conf_get    = i40evf_dev_rss_hash_conf_get,
 179 };
 180
 181 static int
 182 i40evf_set_mac_type(struct i40e_hw *hw)
 183 {
 184         int status = I40E_ERR_DEVICE_NOT_SUPPORTED;
 185
 186         if (hw->vendor_id == I40E_INTEL_VENDOR_ID) {
 187                 switch (hw->device_id) {
 188                 case I40E_DEV_ID_VF:
 189                 case I40E_DEV_ID_VF_HV:
 190                         hw->mac.type = I40E_MAC_VF;
 191                         status = I40E_SUCCESS;
 192                         break;
 193                 default:
 194                         ;
 195                 }
 196         }
 197
 198         return status;
 199 }
 200
 201 /*
 202  * Parse admin queue message.
 203  *
 204  * return value:
 205  *  < 0: meet error
 206  *  0: read sys msg
 207  *  > 0: read cmd result
 208  */
 209 static enum i40evf_aq_result
 210 i40evf_parse_pfmsg(struct i40e_vf *vf,
 211                    struct i40e_arq_event_info *event,
 212                    struct i40evf_arq_msg_info *data)
 213 {
 214         enum i40e_virtchnl_ops opcode = (enum i40e_virtchnl_ops)\
 215                         rte_le_to_cpu_32(event->desc.cookie_high);
 216         enum i40e_status_code retval = (enum i40e_status_code)\
 217                         rte_le_to_cpu_32(event->desc.cookie_low);
 218         enum i40evf_aq_result ret = I40EVF_MSG_CMD;
 219
 220         /* pf sys event */
 221         if (opcode == I40E_VIRTCHNL_OP_EVENT) {
 222                 struct i40e_virtchnl_pf_event *vpe =
 223                         (struct i40e_virtchnl_pf_event *)event->msg_buf;
 224
 225                 /* Initialize ret to sys event */
 226                 ret = I40EVF_MSG_SYS;
 227                 switch (vpe->event) {
 228                 case I40E_VIRTCHNL_EVENT_LINK_CHANGE:
 229                         vf->link_up =
 230                                 vpe->event_data.link_event.link_status;
 231                         vf->pend_msg |= PFMSG_LINK_CHANGE;
 232                         PMD_DRV_LOG(INFO, "Link status update:%s",
 233                                     vf->link_up ? "up" : "down");
 234                         break;
 235                 case I40E_VIRTCHNL_EVENT_RESET_IMPENDING:
 236                         vf->vf_reset = true;
 237                         vf->pend_msg |= PFMSG_RESET_IMPENDING;
 238                         PMD_DRV_LOG(INFO, "vf is reseting");
 239                         break;
 240                 case I40E_VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
 241                         vf->dev_closed = true;
 242                         vf->pend_msg |= PFMSG_DRIVER_CLOSE;
 243                         PMD_DRV_LOG(INFO, "PF driver closed");
 244                         break;
 245                 default:
 246                         PMD_DRV_LOG(ERR, "%s: Unknown event %d from pf",
 247                                     __func__, vpe->event);
 248                 }
 249         } else {
 250                 /* async reply msg on command issued by vf previously */
 251                 ret = I40EVF_MSG_CMD;
 252                 /* Actual data length read from PF */
 253                 data->msg_len = event->msg_len;
 254         }
 255         /* fill the ops and result to notify VF */
 256         data->result = retval;
 257         data->ops = opcode;
 258
 259         return ret;
 260 }
 261
 262 /*
 263  * Read data in admin queue to get msg from pf driver
 264  */
 265 static enum i40evf_aq_result
 266 i40evf_read_pfmsg(struct rte_eth_dev *dev, struct i40evf_arq_msg_info *data)
 267 {
 268         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 269         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 270         struct i40e_arq_event_info event;
 271         int ret;
 272         enum i40evf_aq_result result = I40EVF_MSG_NON;
 273
 274         event.buf_len = data->buf_len;
 275         event.msg_buf = data->msg;
 276         ret = i40e_clean_arq_element(hw, &event, NULL);
 277         /* Can't read any msg from adminQ */
 278         if (ret) {
 279                 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
 280                         result = I40EVF_MSG_NON;
 281                 else
 282                         result = I40EVF_MSG_ERR;
 283                 return result;
 284         }
 285
 286         /* Parse the event */
 287         result = i40evf_parse_pfmsg(vf, &event, data);
 288
 289         return result;
 290 }
 291
 292 /*
 293  * Polling read until command result return from pf driver or meet error.
 294  */
 295 static int
 296 i40evf_wait_cmd_done(struct rte_eth_dev *dev,
 297                      struct i40evf_arq_msg_info *data)
 298 {
 299         int i = 0;
 300         enum i40evf_aq_result ret;
 301
 302 #define MAX_TRY_TIMES 10
 303 #define ASQ_DELAY_MS  50
 304         do {
 305                 /* Delay some time first */
 306                 rte_delay_ms(ASQ_DELAY_MS);
 307                 ret = i40evf_read_pfmsg(dev, data);
 308                 if (ret == I40EVF_MSG_CMD)
 309                         return 0;
 310                 else if (ret == I40EVF_MSG_ERR)
 311                         return -1;
 312
 313                 /* If don't read msg or read sys event, continue */
 314         } while(i++ < MAX_TRY_TIMES);
 315
 316         return -1;
 317 }
 318
 319 /**
 320  * clear current command. Only call in case execute
 321  * _atomic_set_cmd successfully.
 322  */
 323 static inline void
 324 _clear_cmd(struct i40e_vf *vf)
 325 {
 326         rte_wmb();
 327         vf->pend_cmd = I40E_VIRTCHNL_OP_UNKNOWN;
 328 }
 329
 330 /*
 331  * Check there is pending cmd in execution. If none, set new command.
 332  */
 333 static inline int
 334 _atomic_set_cmd(struct i40e_vf *vf, enum i40e_virtchnl_ops ops)
 335 {
 336         int ret = rte_atomic32_cmpset(&vf->pend_cmd,
 337                         I40E_VIRTCHNL_OP_UNKNOWN, ops);
 338
 339         if (!ret)
 340                 PMD_DRV_LOG(ERR, "There is incomplete cmd %d", vf->pend_cmd);
 341
 342         return !ret;
 343 }
 344
 345 static int
 346 i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
 347 {
 348         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 349         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 350         int err = -1;
 351         struct i40evf_arq_msg_info info;
 352
 353         if (_atomic_set_cmd(vf, args->ops))
 354                 return -1;
 355
 356         info.msg = args->out_buffer;
 357         info.buf_len = args->out_size;
 358         info.ops = I40E_VIRTCHNL_OP_UNKNOWN;
 359         info.result = I40E_SUCCESS;
 360
 361         err = i40e_aq_send_msg_to_pf(hw, args->ops, I40E_SUCCESS,
 362                      args->in_args, args->in_args_size, NULL);
 363         if (err) {
 364                 PMD_DRV_LOG(ERR, "fail to send cmd %d", args->ops);
 365                 return err;
 366         }
 367
 368         err = i40evf_wait_cmd_done(dev, &info);
 369         /* read message and it's expected one */
 370         if (!err && args->ops == info.ops)
 371                 _clear_cmd(vf);
 372         else if (err)
 373                 PMD_DRV_LOG(ERR, "Failed to read message from AdminQ");
 374         else if (args->ops != info.ops)
 375                 PMD_DRV_LOG(ERR, "command mismatch, expect %u, get %u",
 376                             args->ops, info.ops);
 377
 378         return (err | info.result);
 379 }
 380
 381 /*
 382  * Check API version with sync wait until version read or fail from admin queue
 383  */
 384 static int
 385 i40evf_check_api_version(struct rte_eth_dev *dev)
 386 {
 387         struct i40e_virtchnl_version_info version, *pver;
 388         int err;
 389         struct vf_cmd_info args;
 390         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 391
 392         version.major = I40E_VIRTCHNL_VERSION_MAJOR;
 393         version.minor = I40E_VIRTCHNL_VERSION_MINOR;
 394
 395         args.ops = I40E_VIRTCHNL_OP_VERSION;
 396         args.in_args = (uint8_t *)&version;
 397         args.in_args_size = sizeof(version);
 398         args.out_buffer = cmd_result_buffer;
 399         args.out_size = I40E_AQ_BUF_SZ;
 400
 401         err = i40evf_execute_vf_cmd(dev, &args);
 402         if (err) {
 403                 PMD_INIT_LOG(ERR, "fail to execute command OP_VERSION");
 404                 return err;
 405         }
 406
 407         pver = (struct i40e_virtchnl_version_info *)args.out_buffer;
 408         vf->version_major = pver->major;
 409         vf->version_minor = pver->minor;
 410         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
 411                 PMD_DRV_LOG(INFO, "Peer is DPDK PF host");
 412         else if ((vf->version_major == I40E_VIRTCHNL_VERSION_MAJOR) &&
 413                 (vf->version_minor == I40E_VIRTCHNL_VERSION_MINOR))
 414                 PMD_DRV_LOG(INFO, "Peer is Linux PF host");
 415         else {
 416                 PMD_INIT_LOG(ERR, "PF/VF API version mismatch:(%u.%u)-(%u.%u)",
 417                                         vf->version_major, vf->version_minor,
 418                                                 I40E_VIRTCHNL_VERSION_MAJOR,
 419                                                 I40E_VIRTCHNL_VERSION_MINOR);
 420                 return -1;
 421         }
 422
 423         return 0;
 424 }
 425
 426 static int
 427 i40evf_get_vf_resource(struct rte_eth_dev *dev)
 428 {
 429         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 430         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 431         int err;
 432         struct vf_cmd_info args;
 433         uint32_t len;
 434
 435         args.ops = I40E_VIRTCHNL_OP_GET_VF_RESOURCES;
 436         args.in_args = NULL;
 437         args.in_args_size = 0;
 438         args.out_buffer = cmd_result_buffer;
 439         args.out_size = I40E_AQ_BUF_SZ;
 440
 441         err = i40evf_execute_vf_cmd(dev, &args);
 442
 443         if (err) {
 444                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_VF_RESOURCE");
 445                 return err;
 446         }
 447
 448         len =  sizeof(struct i40e_virtchnl_vf_resource) +
 449                 I40E_MAX_VF_VSI * sizeof(struct i40e_virtchnl_vsi_resource);
 450
 451         (void)rte_memcpy(vf->vf_res, args.out_buffer,
 452                         RTE_MIN(args.out_size, len));
 453         i40e_vf_parse_hw_config(hw, vf->vf_res);
 454
 455         return 0;
 456 }
 457
 458 static int
 459 i40evf_config_promisc(struct rte_eth_dev *dev,
 460                       bool enable_unicast,
 461                       bool enable_multicast)
 462 {
 463         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 464         int err;
 465         struct vf_cmd_info args;
 466         struct i40e_virtchnl_promisc_info promisc;
 467
 468         promisc.flags = 0;
 469         promisc.vsi_id = vf->vsi_res->vsi_id;
 470
 471         if (enable_unicast)
 472                 promisc.flags |= I40E_FLAG_VF_UNICAST_PROMISC;
 473
 474         if (enable_multicast)
 475                 promisc.flags |= I40E_FLAG_VF_MULTICAST_PROMISC;
 476
 477         args.ops = I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE;
 478         args.in_args = (uint8_t *)&promisc;
 479         args.in_args_size = sizeof(promisc);
 480         args.out_buffer = cmd_result_buffer;
 481         args.out_size = I40E_AQ_BUF_SZ;
 482
 483         err = i40evf_execute_vf_cmd(dev, &args);
 484
 485         if (err)
 486                 PMD_DRV_LOG(ERR, "fail to execute command "
 487                             "CONFIG_PROMISCUOUS_MODE");
 488         return err;
 489 }
 490
 491 /* Configure vlan and double vlan offload. Use flag to specify which part to configure */
 492 static int
 493 i40evf_config_vlan_offload(struct rte_eth_dev *dev,
 494                                 bool enable_vlan_strip)
 495 {
 496         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 497         int err;
 498         struct vf_cmd_info args;
 499         struct i40e_virtchnl_vlan_offload_info offload;
 500
 501         offload.vsi_id = vf->vsi_res->vsi_id;
 502         offload.enable_vlan_strip = enable_vlan_strip;
 503
 504         args.ops = (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_CFG_VLAN_OFFLOAD;
 505         args.in_args = (uint8_t *)&offload;
 506         args.in_args_size = sizeof(offload);
 507         args.out_buffer = cmd_result_buffer;
 508         args.out_size = I40E_AQ_BUF_SZ;
 509
 510         err = i40evf_execute_vf_cmd(dev, &args);
 511         if (err)
 512                 PMD_DRV_LOG(ERR, "fail to execute command CFG_VLAN_OFFLOAD");
 513
 514         return err;
 515 }
 516
 517 static int
 518 i40evf_config_vlan_pvid(struct rte_eth_dev *dev,
 519                                 struct i40e_vsi_vlan_pvid_info *info)
 520 {
 521         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 522         int err;
 523         struct vf_cmd_info args;
 524         struct i40e_virtchnl_pvid_info tpid_info;
 525
 526         if (dev == NULL || info == NULL) {
 527                 PMD_DRV_LOG(ERR, "invalid parameters");
 528                 return I40E_ERR_PARAM;
 529         }
 530
 531         memset(&tpid_info, 0, sizeof(tpid_info));
 532         tpid_info.vsi_id = vf->vsi_res->vsi_id;
 533         (void)rte_memcpy(&tpid_info.info, info, sizeof(*info));
 534
 535         args.ops = (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_CFG_VLAN_PVID;
 536         args.in_args = (uint8_t *)&tpid_info;
 537         args.in_args_size = sizeof(tpid_info);
 538         args.out_buffer = cmd_result_buffer;
 539         args.out_size = I40E_AQ_BUF_SZ;
 540
 541         err = i40evf_execute_vf_cmd(dev, &args);
 542         if (err)
 543                 PMD_DRV_LOG(ERR, "fail to execute command CFG_VLAN_PVID");
 544
 545         return err;
 546 }
 547
 548 static void
 549 i40evf_fill_virtchnl_vsi_txq_info(struct i40e_virtchnl_txq_info *txq_info,
 550                                   uint16_t vsi_id,
 551                                   uint16_t queue_id,
 552                                   uint16_t nb_txq,
 553                                   struct i40e_tx_queue *txq)
 554 {
 555         txq_info->vsi_id = vsi_id;
 556         txq_info->queue_id = queue_id;
 557         if (queue_id < nb_txq) {
 558                 txq_info->ring_len = txq->nb_tx_desc;
 559                 txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
 560         }
 561 }
 562
 563 static void
 564 i40evf_fill_virtchnl_vsi_rxq_info(struct i40e_virtchnl_rxq_info *rxq_info,
 565                                   uint16_t vsi_id,
 566                                   uint16_t queue_id,
 567                                   uint16_t nb_rxq,
 568                                   uint32_t max_pkt_size,
 569                                   struct i40e_rx_queue *rxq)
 570 {
 571         rxq_info->vsi_id = vsi_id;
 572         rxq_info->queue_id = queue_id;
 573         rxq_info->max_pkt_size = max_pkt_size;
 574         if (queue_id < nb_rxq) {
 575                 struct rte_pktmbuf_pool_private *mbp_priv;
 576
 577                 rxq_info->ring_len = rxq->nb_rx_desc;
 578                 rxq_info->dma_ring_addr = rxq->rx_ring_phys_addr;
 579                 mbp_priv = rte_mempool_get_priv(rxq->mp);
 580                 rxq_info->databuffer_size =
 581                         mbp_priv->mbuf_data_room_size - RTE_PKTMBUF_HEADROOM;
 582         }
 583 }
 584
 585 /* It configures VSI queues to co-work with Linux PF host */
 586 static int
 587 i40evf_configure_vsi_queues(struct rte_eth_dev *dev)
 588 {
 589         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 590         struct i40e_rx_queue **rxq =
 591                 (struct i40e_rx_queue **)dev->data->rx_queues;
 592         struct i40e_tx_queue **txq =
 593                 (struct i40e_tx_queue **)dev->data->tx_queues;
 594         struct i40e_virtchnl_vsi_queue_config_info *vc_vqci;
 595         struct i40e_virtchnl_queue_pair_info *vc_qpi;
 596         struct vf_cmd_info args;
 597         uint16_t i, nb_qp = vf->num_queue_pairs;
 598         const uint32_t size =
 599                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci, nb_qp);
 600         uint8_t buff[size];
 601         int ret;
 602
 603         memset(buff, 0, sizeof(buff));
 604         vc_vqci = (struct i40e_virtchnl_vsi_queue_config_info *)buff;
 605         vc_vqci->vsi_id = vf->vsi_res->vsi_id;
 606         vc_vqci->num_queue_pairs = nb_qp;
 607
 608         for (i = 0, vc_qpi = vc_vqci->qpair; i < nb_qp; i++, vc_qpi++) {
 609                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpi->txq,
 610                         vc_vqci->vsi_id, i, dev->data->nb_tx_queues, txq[i]);
 611                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpi->rxq,
 612                         vc_vqci->vsi_id, i, dev->data->nb_rx_queues,
 613                                         vf->max_pkt_len, rxq[i]);
 614         }
 615         memset(&args, 0, sizeof(args));
 616         args.ops = I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES;
 617         args.in_args = (uint8_t *)vc_vqci;
 618         args.in_args_size = size;
 619         args.out_buffer = cmd_result_buffer;
 620         args.out_size = I40E_AQ_BUF_SZ;
 621         ret = i40evf_execute_vf_cmd(dev, &args);
 622         if (ret)
 623                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 624                         "I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES\n");
 625
 626         return ret;
 627 }
 628
 629 /* It configures VSI queues to co-work with DPDK PF host */
 630 static int
 631 i40evf_configure_vsi_queues_ext(struct rte_eth_dev *dev)
 632 {
 633         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 634         struct i40e_rx_queue **rxq =
 635                 (struct i40e_rx_queue **)dev->data->rx_queues;
 636         struct i40e_tx_queue **txq =
 637                 (struct i40e_tx_queue **)dev->data->tx_queues;
 638         struct i40e_virtchnl_vsi_queue_config_ext_info *vc_vqcei;
 639         struct i40e_virtchnl_queue_pair_ext_info *vc_qpei;
 640         struct vf_cmd_info args;
 641         uint16_t i, nb_qp = vf->num_queue_pairs;
 642         const uint32_t size =
 643                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqcei, nb_qp);
 644         uint8_t buff[size];
 645         int ret;
 646
 647         memset(buff, 0, sizeof(buff));
 648         vc_vqcei = (struct i40e_virtchnl_vsi_queue_config_ext_info *)buff;
 649         vc_vqcei->vsi_id = vf->vsi_res->vsi_id;
 650         vc_vqcei->num_queue_pairs = nb_qp;
 651         vc_qpei = vc_vqcei->qpair;
 652         for (i = 0; i < nb_qp; i++, vc_qpei++) {
 653                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpei->txq,
 654                         vc_vqcei->vsi_id, i, dev->data->nb_tx_queues, txq[i]);
 655                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpei->rxq,
 656                         vc_vqcei->vsi_id, i, dev->data->nb_rx_queues,
 657                                         vf->max_pkt_len, rxq[i]);
 658                 if (i < dev->data->nb_rx_queues)
 659                         /*
 660                          * It adds extra info for configuring VSI queues, which
 661                          * is needed to enable the configurable crc stripping
 662                          * in VF.
 663                          */
 664                         vc_qpei->rxq_ext.crcstrip =
 665                                 dev->data->dev_conf.rxmode.hw_strip_crc;
 666         }
 667         memset(&args, 0, sizeof(args));
 668         args.ops =
 669                 (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT;
 670         args.in_args = (uint8_t *)vc_vqcei;
 671         args.in_args_size = size;
 672         args.out_buffer = cmd_result_buffer;
 673         args.out_size = I40E_AQ_BUF_SZ;
 674         ret = i40evf_execute_vf_cmd(dev, &args);
 675         if (ret)
 676                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 677                         "I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT\n");
 678
 679         return ret;
 680 }
 681
 682 static int
 683 i40evf_configure_queues(struct rte_eth_dev *dev)
 684 {
 685         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 686
 687         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
 688                 /* To support DPDK PF host */
 689                 return i40evf_configure_vsi_queues_ext(dev);
 690         else
 691                 /* To support Linux PF host */
 692                 return i40evf_configure_vsi_queues(dev);
 693 }
 694
 695 static int
 696 i40evf_config_irq_map(struct rte_eth_dev *dev)
 697 {
 698         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 699         struct vf_cmd_info args;
 700         uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_irq_map_info) + \
 701                 sizeof(struct i40e_virtchnl_vector_map)];
 702         struct i40e_virtchnl_irq_map_info *map_info;
 703         int i, err;
 704         map_info = (struct i40e_virtchnl_irq_map_info *)cmd_buffer;
 705         map_info->num_vectors = 1;
 706         map_info->vecmap[0].rxitr_idx = RTE_LIBRTE_I40E_ITR_INTERVAL / 2;
 707         map_info->vecmap[0].txitr_idx = RTE_LIBRTE_I40E_ITR_INTERVAL / 2;
 708         map_info->vecmap[0].vsi_id = vf->vsi_res->vsi_id;
 709         /* Alway use default dynamic MSIX interrupt */
 710         map_info->vecmap[0].vector_id = I40EVF_VSI_DEFAULT_MSIX_INTR;
 711         /* Don't map any tx queue */
 712         map_info->vecmap[0].txq_map = 0;
 713         map_info->vecmap[0].rxq_map = 0;
 714         for (i = 0; i < dev->data->nb_rx_queues; i++)
 715                 map_info->vecmap[0].rxq_map |= 1 << i;
 716
 717         args.ops = I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP;
 718         args.in_args = (u8 *)cmd_buffer;
 719         args.in_args_size = sizeof(cmd_buffer);
 720         args.out_buffer = cmd_result_buffer;
 721         args.out_size = I40E_AQ_BUF_SZ;
 722         err = i40evf_execute_vf_cmd(dev, &args);
 723         if (err)
 724                 PMD_DRV_LOG(ERR, "fail to execute command OP_ENABLE_QUEUES");
 725
 726         return err;
 727 }
 728
 729 static int
 730 i40evf_switch_queue(struct rte_eth_dev *dev, bool isrx, uint16_t qid,
 731                                 bool on)
 732 {
 733         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 734         struct i40e_virtchnl_queue_select queue_select;
 735         int err;
 736         struct vf_cmd_info args;
 737         memset(&queue_select, 0, sizeof(queue_select));
 738         queue_select.vsi_id = vf->vsi_res->vsi_id;
 739
 740         if (isrx)
 741                 queue_select.rx_queues |= 1 << qid;
 742         else
 743                 queue_select.tx_queues |= 1 << qid;
 744
 745         if (on)
 746                 args.ops = I40E_VIRTCHNL_OP_ENABLE_QUEUES;
 747         else
 748                 args.ops = I40E_VIRTCHNL_OP_DISABLE_QUEUES;
 749         args.in_args = (u8 *)&queue_select;
 750         args.in_args_size = sizeof(queue_select);
 751         args.out_buffer = cmd_result_buffer;
 752         args.out_size = I40E_AQ_BUF_SZ;
 753         err = i40evf_execute_vf_cmd(dev, &args);
 754         if (err)
 755                 PMD_DRV_LOG(ERR, "fail to switch %s %u %s",
 756                             isrx ? "RX" : "TX", qid, on ? "on" : "off");
 757
 758         return err;
 759 }
 760
 761 static int
 762 i40evf_start_queues(struct rte_eth_dev *dev)
 763 {
 764         struct rte_eth_dev_data *dev_data = dev->data;
 765         int i;
 766         struct i40e_rx_queue *rxq;
 767         struct i40e_tx_queue *txq;
 768
 769         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 770                 rxq = dev_data->rx_queues[i];
 771                 if (rxq->rx_deferred_start)
 772                         continue;
 773                 if (i40evf_dev_rx_queue_start(dev, i) != 0) {
 774                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 775                         return -1;
 776                 }
 777         }
 778
 779         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 780                 txq = dev_data->tx_queues[i];
 781                 if (txq->tx_deferred_start)
 782                         continue;
 783                 if (i40evf_dev_tx_queue_start(dev, i) != 0) {
 784                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 785                         return -1;
 786                 }
 787         }
 788
 789         return 0;
 790 }
 791
 792 static int
 793 i40evf_stop_queues(struct rte_eth_dev *dev)
 794 {
 795         int i;
 796
 797         /* Stop TX queues first */
 798         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 799                 if (i40evf_dev_tx_queue_stop(dev, i) != 0) {
 800                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 801                         return -1;
 802                 }
 803         }
 804
 805         /* Then stop RX queues */
 806         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 807                 if (i40evf_dev_rx_queue_stop(dev, i) != 0) {
 808                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 809                         return -1;
 810                 }
 811         }
 812
 813         return 0;
 814 }
 815
 816 static int
 817 i40evf_add_mac_addr(struct rte_eth_dev *dev, struct ether_addr *addr)
 818 {
 819         struct i40e_virtchnl_ether_addr_list *list;
 820         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 821         uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_ether_addr_list) + \
 822                         sizeof(struct i40e_virtchnl_ether_addr)];
 823         int err;
 824         struct vf_cmd_info args;
 825
 826         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
 827                 PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
 828                             addr->addr_bytes[0], addr->addr_bytes[1],
 829                             addr->addr_bytes[2], addr->addr_bytes[3],
 830                             addr->addr_bytes[4], addr->addr_bytes[5]);
 831                 return -1;
 832         }
 833
 834         list = (struct i40e_virtchnl_ether_addr_list *)cmd_buffer;
 835         list->vsi_id = vf->vsi_res->vsi_id;
 836         list->num_elements = 1;
 837         (void)rte_memcpy(list->list[0].addr, addr->addr_bytes,
 838                                         sizeof(addr->addr_bytes));
 839
 840         args.ops = I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS;
 841         args.in_args = cmd_buffer;
 842         args.in_args_size = sizeof(cmd_buffer);
 843         args.out_buffer = cmd_result_buffer;
 844         args.out_size = I40E_AQ_BUF_SZ;
 845         err = i40evf_execute_vf_cmd(dev, &args);
 846         if (err)
 847                 PMD_DRV_LOG(ERR, "fail to execute command "
 848                             "OP_ADD_ETHER_ADDRESS");
 849
 850         return err;
 851 }
 852
 853 static int
 854 i40evf_del_mac_addr(struct rte_eth_dev *dev, struct ether_addr *addr)
 855 {
 856         struct i40e_virtchnl_ether_addr_list *list;
 857         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 858         uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_ether_addr_list) + \
 859                         sizeof(struct i40e_virtchnl_ether_addr)];
 860         int err;
 861         struct vf_cmd_info args;
 862
 863         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
 864                 PMD_DRV_LOG(ERR, "Invalid mac:%x-%x-%x-%x-%x-%x",
 865                             addr->addr_bytes[0], addr->addr_bytes[1],
 866                             addr->addr_bytes[2], addr->addr_bytes[3],
 867                             addr->addr_bytes[4], addr->addr_bytes[5]);
 868                 return -1;
 869         }
 870
 871         list = (struct i40e_virtchnl_ether_addr_list *)cmd_buffer;
 872         list->vsi_id = vf->vsi_res->vsi_id;
 873         list->num_elements = 1;
 874         (void)rte_memcpy(list->list[0].addr, addr->addr_bytes,
 875                         sizeof(addr->addr_bytes));
 876
 877         args.ops = I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS;
 878         args.in_args = cmd_buffer;
 879         args.in_args_size = sizeof(cmd_buffer);
 880         args.out_buffer = cmd_result_buffer;
 881         args.out_size = I40E_AQ_BUF_SZ;
 882         err = i40evf_execute_vf_cmd(dev, &args);
 883         if (err)
 884                 PMD_DRV_LOG(ERR, "fail to execute command "
 885                             "OP_DEL_ETHER_ADDRESS");
 886
 887         return err;
 888 }
 889
 890 static int
 891 i40evf_get_statics(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
 892 {
 893         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 894         struct i40e_virtchnl_queue_select q_stats;
 895         struct i40e_eth_stats *pstats;
 896         int err;
 897         struct vf_cmd_info args;
 898
 899         memset(&q_stats, 0, sizeof(q_stats));
 900         q_stats.vsi_id = vf->vsi_res->vsi_id;
 901         args.ops = I40E_VIRTCHNL_OP_GET_STATS;
 902         args.in_args = (u8 *)&q_stats;
 903         args.in_args_size = sizeof(q_stats);
 904         args.out_buffer = cmd_result_buffer;
 905         args.out_size = I40E_AQ_BUF_SZ;
 906
 907         err = i40evf_execute_vf_cmd(dev, &args);
 908         if (err) {
 909                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_STATS");
 910                 return err;
 911         }
 912         pstats = (struct i40e_eth_stats *)args.out_buffer;
 913         stats->ipackets = pstats->rx_unicast + pstats->rx_multicast +
 914                                                 pstats->rx_broadcast;
 915         stats->opackets = pstats->tx_broadcast + pstats->tx_multicast +
 916                                                 pstats->tx_unicast;
 917         stats->ierrors = pstats->rx_discards;
 918         stats->oerrors = pstats->tx_errors + pstats->tx_discards;
 919         stats->ibytes = pstats->rx_bytes;
 920         stats->obytes = pstats->tx_bytes;
 921
 922         return 0;
 923 }
 924
 925 static int
 926 i40evf_add_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
 927 {
 928         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 929         struct i40e_virtchnl_vlan_filter_list *vlan_list;
 930         uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_vlan_filter_list) +
 931                                                         sizeof(uint16_t)];
 932         int err;
 933         struct vf_cmd_info args;
 934
 935         vlan_list = (struct i40e_virtchnl_vlan_filter_list *)cmd_buffer;
 936         vlan_list->vsi_id = vf->vsi_res->vsi_id;
 937         vlan_list->num_elements = 1;
 938         vlan_list->vlan_id[0] = vlanid;
 939
 940         args.ops = I40E_VIRTCHNL_OP_ADD_VLAN;
 941         args.in_args = (u8 *)&cmd_buffer;
 942         args.in_args_size = sizeof(cmd_buffer);
 943         args.out_buffer = cmd_result_buffer;
 944         args.out_size = I40E_AQ_BUF_SZ;
 945         err = i40evf_execute_vf_cmd(dev, &args);
 946         if (err)
 947                 PMD_DRV_LOG(ERR, "fail to execute command OP_ADD_VLAN");
 948
 949         return err;
 950 }
 951
 952 static int
 953 i40evf_del_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
 954 {
 955         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 956         struct i40e_virtchnl_vlan_filter_list *vlan_list;
 957         uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_vlan_filter_list) +
 958                                                         sizeof(uint16_t)];
 959         int err;
 960         struct vf_cmd_info args;
 961
 962         vlan_list = (struct i40e_virtchnl_vlan_filter_list *)cmd_buffer;
 963         vlan_list->vsi_id = vf->vsi_res->vsi_id;
 964         vlan_list->num_elements = 1;
 965         vlan_list->vlan_id[0] = vlanid;
 966
 967         args.ops = I40E_VIRTCHNL_OP_DEL_VLAN;
 968         args.in_args = (u8 *)&cmd_buffer;
 969         args.in_args_size = sizeof(cmd_buffer);
 970         args.out_buffer = cmd_result_buffer;
 971         args.out_size = I40E_AQ_BUF_SZ;
 972         err = i40evf_execute_vf_cmd(dev, &args);
 973         if (err)
 974                 PMD_DRV_LOG(ERR, "fail to execute command OP_DEL_VLAN");
 975
 976         return err;
 977 }
 978
 979 static int
 980 i40evf_get_link_status(struct rte_eth_dev *dev, struct rte_eth_link *link)
 981 {
 982         int err;
 983         struct vf_cmd_info args;
 984         struct rte_eth_link *new_link;
 985
 986         args.ops = (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_GET_LINK_STAT;
 987         args.in_args = NULL;
 988         args.in_args_size = 0;
 989         args.out_buffer = cmd_result_buffer;
 990         args.out_size = I40E_AQ_BUF_SZ;
 991         err = i40evf_execute_vf_cmd(dev, &args);
 992         if (err) {
 993                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_LINK_STAT");
 994                 return err;
 995         }
 996
 997         new_link = (struct rte_eth_link *)args.out_buffer;
 998         (void)rte_memcpy(link, new_link, sizeof(*link));
 999
1000         return 0;
1001 }
1002
1003 static struct rte_pci_id pci_id_i40evf_map[] = {
1004 #define RTE_PCI_DEV_ID_DECL_I40EVF(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
1005 #include "rte_pci_dev_ids.h"
1006 { .vendor_id = 0, /* sentinel */ },
1007 };
1008
1009 static inline int
1010 i40evf_dev_atomic_write_link_status(struct rte_eth_dev *dev,
1011                                     struct rte_eth_link *link)
1012 {
1013         struct rte_eth_link *dst = &(dev->data->dev_link);
1014         struct rte_eth_link *src = link;
1015
1016         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1017                                         *(uint64_t *)src) == 0)
1018                 return -1;
1019
1020         return 0;
1021 }
1022
1023 static int
1024 i40evf_reset_vf(struct i40e_hw *hw)
1025 {
1026         int i, reset;
1027
1028         if (i40e_vf_reset(hw) != I40E_SUCCESS) {
1029                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1030                 return -1;
1031         }
1032         /**
1033           * After issuing vf reset command to pf, pf won't necessarily
1034           * reset vf, it depends on what state it exactly is. If it's not
1035           * initialized yet, it won't have vf reset since it's in a certain
1036           * state. If not, it will try to reset. Even vf is reset, pf will
1037           * set I40E_VFGEN_RSTAT to COMPLETE first, then wait 10ms and set
1038           * it to ACTIVE. In this duration, vf may not catch the moment that
1039           * COMPLETE is set. So, for vf, we'll try to wait a long time.
1040           */
1041         rte_delay_ms(200);
1042
1043         for (i = 0; i < MAX_RESET_WAIT_CNT; i++) {
1044                 reset = rd32(hw, I40E_VFGEN_RSTAT) &
1045                         I40E_VFGEN_RSTAT_VFR_STATE_MASK;
1046                 reset = reset >> I40E_VFGEN_RSTAT_VFR_STATE_SHIFT;
1047                 if (I40E_VFR_COMPLETED == reset || I40E_VFR_VFACTIVE == reset)
1048                         break;
1049                 else
1050                         rte_delay_ms(50);
1051         }
1052
1053         if (i >= MAX_RESET_WAIT_CNT) {
1054                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1055                 return -1;
1056         }
1057
1058         return 0;
1059 }
1060
1061 static int
1062 i40evf_init_vf(struct rte_eth_dev *dev)
1063 {
1064         int i, err, bufsz;
1065         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1066         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1067
1068         vf->adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1069         vf->dev_data = dev->data;
1070         err = i40evf_set_mac_type(hw);
1071         if (err) {
1072                 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err);
1073                 goto err;
1074         }
1075
1076         i40e_init_adminq_parameter(hw);
1077         err = i40e_init_adminq(hw);
1078         if (err) {
1079                 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err);
1080                 goto err;
1081         }
1082
1083
1084         /* Reset VF and wait until it's complete */
1085         if (i40evf_reset_vf(hw)) {
1086                 PMD_INIT_LOG(ERR, "reset NIC failed");
1087                 goto err_aq;
1088         }
1089
1090         /* VF reset, shutdown admin queue and initialize again */
1091         if (i40e_shutdown_adminq(hw) != I40E_SUCCESS) {
1092                 PMD_INIT_LOG(ERR, "i40e_shutdown_adminq failed");
1093                 return -1;
1094         }
1095
1096         i40e_init_adminq_parameter(hw);
1097         if (i40e_init_adminq(hw) != I40E_SUCCESS) {
1098                 PMD_INIT_LOG(ERR, "init_adminq failed");
1099                 return -1;
1100         }
1101         if (i40evf_check_api_version(dev) != 0) {
1102                 PMD_INIT_LOG(ERR, "check_api version failed");
1103                 goto err_aq;
1104         }
1105         bufsz = sizeof(struct i40e_virtchnl_vf_resource) +
1106                 (I40E_MAX_VF_VSI * sizeof(struct i40e_virtchnl_vsi_resource));
1107         vf->vf_res = rte_zmalloc("vf_res", bufsz, 0);
1108         if (!vf->vf_res) {
1109                 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
1110                         goto err_aq;
1111         }
1112
1113         if (i40evf_get_vf_resource(dev) != 0) {
1114                 PMD_INIT_LOG(ERR, "i40evf_get_vf_config failed");
1115                 goto err_alloc;
1116         }
1117
1118         /* got VF config message back from PF, now we can parse it */
1119         for (i = 0; i < vf->vf_res->num_vsis; i++) {
1120                 if (vf->vf_res->vsi_res[i].vsi_type == I40E_VSI_SRIOV)
1121                         vf->vsi_res = &vf->vf_res->vsi_res[i];
1122         }
1123
1124         if (!vf->vsi_res) {
1125                 PMD_INIT_LOG(ERR, "no LAN VSI found");
1126                 goto err_alloc;
1127         }
1128
1129         vf->vsi.vsi_id = vf->vsi_res->vsi_id;
1130         vf->vsi.type = vf->vsi_res->vsi_type;
1131         vf->vsi.nb_qps = vf->vsi_res->num_queue_pairs;
1132
1133         /* check mac addr, if it's not valid, genrate one */
1134         if (I40E_SUCCESS != i40e_validate_mac_addr(\
1135                         vf->vsi_res->default_mac_addr))
1136                 eth_random_addr(vf->vsi_res->default_mac_addr);
1137
1138         ether_addr_copy((struct ether_addr *)vf->vsi_res->default_mac_addr,
1139                                         (struct ether_addr *)hw->mac.addr);
1140
1141         return 0;
1142
1143 err_alloc:
1144         rte_free(vf->vf_res);
1145 err_aq:
1146         i40e_shutdown_adminq(hw); /* ignore error */
1147 err:
1148         return -1;
1149 }
1150
1151 static int
1152 i40evf_dev_init(struct rte_eth_dev *eth_dev)
1153 {
1154         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(\
1155                         eth_dev->data->dev_private);
1156
1157         PMD_INIT_FUNC_TRACE();
1158
1159         /* assign ops func pointer */
1160         eth_dev->dev_ops = &i40evf_eth_dev_ops;
1161         eth_dev->rx_pkt_burst = &i40e_recv_pkts;
1162         eth_dev->tx_pkt_burst = &i40e_xmit_pkts;
1163
1164         /*
1165          * For secondary processes, we don't initialise any further as primary
1166          * has already done this work.
1167          */
1168         if (rte_eal_process_type() != RTE_PROC_PRIMARY){
1169                 if (eth_dev->data->scattered_rx)
1170                         eth_dev->rx_pkt_burst = i40e_recv_scattered_pkts;
1171                 return 0;
1172         }
1173
1174         hw->vendor_id = eth_dev->pci_dev->id.vendor_id;
1175         hw->device_id = eth_dev->pci_dev->id.device_id;
1176         hw->subsystem_vendor_id = eth_dev->pci_dev->id.subsystem_vendor_id;
1177         hw->subsystem_device_id = eth_dev->pci_dev->id.subsystem_device_id;
1178         hw->bus.device = eth_dev->pci_dev->addr.devid;
1179         hw->bus.func = eth_dev->pci_dev->addr.function;
1180         hw->hw_addr = (void *)eth_dev->pci_dev->mem_resource[0].addr;
1181
1182         if(i40evf_init_vf(eth_dev) != 0) {
1183                 PMD_INIT_LOG(ERR, "Init vf failed");
1184                 return -1;
1185         }
1186
1187         /* copy mac addr */
1188         eth_dev->data->mac_addrs = rte_zmalloc("i40evf_mac",
1189                                         ETHER_ADDR_LEN, 0);
1190         if (eth_dev->data->mac_addrs == NULL) {
1191                 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to "
1192                                 "store MAC addresses", ETHER_ADDR_LEN);
1193                 return -ENOMEM;
1194         }
1195         ether_addr_copy((struct ether_addr *)hw->mac.addr,
1196                 (struct ether_addr *)eth_dev->data->mac_addrs);
1197
1198         return 0;
1199 }
1200
1201 /*
1202  * virtual function driver struct
1203  */
1204 static struct eth_driver rte_i40evf_pmd = {
1205         {
1206                 .name = "rte_i40evf_pmd",
1207                 .id_table = pci_id_i40evf_map,
1208                 .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
1209         },
1210         .eth_dev_init = i40evf_dev_init,
1211         .dev_private_size = sizeof(struct i40e_vf),
1212 };
1213
1214 /*
1215  * VF Driver initialization routine.
1216  * Invoked one at EAL init time.
1217  * Register itself as the [Virtual Poll Mode] Driver of PCI Fortville devices.
1218  */
1219 static int
1220 rte_i40evf_pmd_init(const char *name __rte_unused,
1221                     const char *params __rte_unused)
1222 {
1223         PMD_INIT_FUNC_TRACE();
1224
1225         rte_eth_driver_register(&rte_i40evf_pmd);
1226
1227         return 0;
1228 }
1229
1230 static struct rte_driver rte_i40evf_driver = {
1231         .type = PMD_PDEV,
1232         .init = rte_i40evf_pmd_init,
1233 };
1234
1235 PMD_REGISTER_DRIVER(rte_i40evf_driver);
1236
1237 static int
1238 i40evf_dev_configure(struct rte_eth_dev *dev)
1239 {
1240         return i40evf_init_vlan(dev);
1241 }
1242
1243 static int
1244 i40evf_init_vlan(struct rte_eth_dev *dev)
1245 {
1246         struct rte_eth_dev_data *data = dev->data;
1247         int ret;
1248
1249         /* Apply vlan offload setting */
1250         i40evf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1251
1252         /* Apply pvid setting */
1253         ret = i40evf_vlan_pvid_set(dev, data->dev_conf.txmode.pvid,
1254                                 data->dev_conf.txmode.hw_vlan_insert_pvid);
1255         return ret;
1256 }
1257
1258 static void
1259 i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1260 {
1261         bool enable_vlan_strip = 0;
1262         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1263         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1264
1265         /* Linux pf host doesn't support vlan offload yet */
1266         if (vf->version_major == I40E_DPDK_VERSION_MAJOR) {
1267                 /* Vlan stripping setting */
1268                 if (mask & ETH_VLAN_STRIP_MASK) {
1269                         /* Enable or disable VLAN stripping */
1270                         if (dev_conf->rxmode.hw_vlan_strip)
1271                                 enable_vlan_strip = 1;
1272                         else
1273                                 enable_vlan_strip = 0;
1274
1275                         i40evf_config_vlan_offload(dev, enable_vlan_strip);
1276                 }
1277         }
1278 }
1279
1280 static int
1281 i40evf_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid, int on)
1282 {
1283         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1284         struct i40e_vsi_vlan_pvid_info info;
1285         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1286
1287         memset(&info, 0, sizeof(info));
1288         info.on = on;
1289
1290         /* Linux pf host don't support vlan offload yet */
1291         if (vf->version_major == I40E_DPDK_VERSION_MAJOR) {
1292                 if (info.on)
1293                         info.config.pvid = pvid;
1294                 else {
1295                         info.config.reject.tagged =
1296                                 dev_conf->txmode.hw_vlan_reject_tagged;
1297                         info.config.reject.untagged =
1298                                 dev_conf->txmode.hw_vlan_reject_untagged;
1299                 }
1300                 return i40evf_config_vlan_pvid(dev, &info);
1301         }
1302
1303         return 0;
1304 }
1305
1306 static int
1307 i40evf_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1308 {
1309         struct i40e_rx_queue *rxq;
1310         int err = 0;
1311         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1312
1313         PMD_INIT_FUNC_TRACE();
1314
1315         if (rx_queue_id < dev->data->nb_rx_queues) {
1316                 rxq = dev->data->rx_queues[rx_queue_id];
1317
1318                 err = i40e_alloc_rx_queue_mbufs(rxq);
1319                 if (err) {
1320                         PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf");
1321                         return err;
1322                 }
1323
1324                 rte_wmb();
1325
1326                 /* Init the RX tail register. */
1327                 I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1328                 I40EVF_WRITE_FLUSH(hw);
1329
1330                 /* Ready to switch the queue on */
1331                 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, TRUE);
1332
1333                 if (err)
1334                         PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on",
1335                                     rx_queue_id);
1336         }
1337
1338         return err;
1339 }
1340
1341 static int
1342 i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1343 {
1344         struct i40e_rx_queue *rxq;
1345         int err;
1346
1347         if (rx_queue_id < dev->data->nb_rx_queues) {
1348                 rxq = dev->data->rx_queues[rx_queue_id];
1349
1350                 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, FALSE);
1351
1352                 if (err) {
1353                         PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off",
1354                                     rx_queue_id);
1355                         return err;
1356                 }
1357
1358                 i40e_rx_queue_release_mbufs(rxq);
1359                 i40e_reset_rx_queue(rxq);
1360         }
1361
1362         return 0;
1363 }
1364
1365 static int
1366 i40evf_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1367 {
1368         int err = 0;
1369
1370         PMD_INIT_FUNC_TRACE();
1371
1372         if (tx_queue_id < dev->data->nb_tx_queues) {
1373
1374                 /* Ready to switch the queue on */
1375                 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, TRUE);
1376
1377                 if (err)
1378                         PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
1379                                     tx_queue_id);
1380         }
1381
1382         return err;
1383 }
1384
1385 static int
1386 i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1387 {
1388         struct i40e_tx_queue *txq;
1389         int err;
1390
1391         if (tx_queue_id < dev->data->nb_tx_queues) {
1392                 txq = dev->data->tx_queues[tx_queue_id];
1393
1394                 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, FALSE);
1395
1396                 if (err) {
1397                         PMD_DRV_LOG(ERR, "Failed to switch TX queue %u of",
1398                                     tx_queue_id);
1399                         return err;
1400                 }
1401
1402                 i40e_tx_queue_release_mbufs(txq);
1403                 i40e_reset_tx_queue(txq);
1404         }
1405
1406         return 0;
1407 }
1408
1409 static int
1410 i40evf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1411 {
1412         int ret;
1413
1414         if (on)
1415                 ret = i40evf_add_vlan(dev, vlan_id);
1416         else
1417                 ret = i40evf_del_vlan(dev,vlan_id);
1418
1419         return ret;
1420 }
1421
1422 static int
1423 i40evf_rx_init(struct rte_eth_dev *dev)
1424 {
1425         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1426         uint16_t i;
1427         struct i40e_rx_queue **rxq =
1428                 (struct i40e_rx_queue **)dev->data->rx_queues;
1429         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1430
1431         i40evf_config_rss(vf);
1432         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1433                 rxq[i]->qrx_tail = hw->hw_addr + I40E_QRX_TAIL1(i);
1434                 I40E_PCI_REG_WRITE(rxq[i]->qrx_tail, rxq[i]->nb_rx_desc - 1);
1435         }
1436
1437         /* Flush the operation to write registers */
1438         I40EVF_WRITE_FLUSH(hw);
1439
1440         return 0;
1441 }
1442
1443 static void
1444 i40evf_tx_init(struct rte_eth_dev *dev)
1445 {
1446         uint16_t i;
1447         struct i40e_tx_queue **txq =
1448                 (struct i40e_tx_queue **)dev->data->tx_queues;
1449         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1450
1451         for (i = 0; i < dev->data->nb_tx_queues; i++)
1452                 txq[i]->qtx_tail = hw->hw_addr + I40E_QTX_TAIL1(i);
1453 }
1454
1455 static inline void
1456 i40evf_enable_queues_intr(struct i40e_hw *hw)
1457 {
1458         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTLN1(I40EVF_VSI_DEFAULT_MSIX_INTR - 1),
1459                         I40E_VFINT_DYN_CTLN1_INTENA_MASK |
1460                         I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
1461 }
1462
1463 static inline void
1464 i40evf_disable_queues_intr(struct i40e_hw *hw)
1465 {
1466         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTLN1(I40EVF_VSI_DEFAULT_MSIX_INTR - 1),
1467                         0);
1468 }
1469
1470 static int
1471 i40evf_dev_start(struct rte_eth_dev *dev)
1472 {
1473         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1474         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1475         struct ether_addr mac_addr;
1476
1477         PMD_INIT_FUNC_TRACE();
1478
1479         vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
1480         if (dev->data->dev_conf.rxmode.jumbo_frame == 1) {
1481                 if (vf->max_pkt_len <= ETHER_MAX_LEN ||
1482                         vf->max_pkt_len > I40E_FRAME_SIZE_MAX) {
1483                         PMD_DRV_LOG(ERR, "maximum packet length must "
1484                                     "be larger than %u and smaller than %u,"
1485                                     "as jumbo frame is enabled",
1486                                     (uint32_t)ETHER_MAX_LEN,
1487                                     (uint32_t)I40E_FRAME_SIZE_MAX);
1488                         return I40E_ERR_CONFIG;
1489                 }
1490         } else {
1491                 if (vf->max_pkt_len < ETHER_MIN_LEN ||
1492                         vf->max_pkt_len > ETHER_MAX_LEN) {
1493                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1494                                     "larger than %u and smaller than %u, "
1495                                     "as jumbo frame is disabled",
1496                                     (uint32_t)ETHER_MIN_LEN,
1497                                     (uint32_t)ETHER_MAX_LEN);
1498                         return I40E_ERR_CONFIG;
1499                 }
1500         }
1501
1502         vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
1503                                         dev->data->nb_tx_queues);
1504
1505         if (i40evf_rx_init(dev) != 0){
1506                 PMD_DRV_LOG(ERR, "failed to do RX init");
1507                 return -1;
1508         }
1509
1510         i40evf_tx_init(dev);
1511
1512         if (i40evf_configure_queues(dev) != 0) {
1513                 PMD_DRV_LOG(ERR, "configure queues failed");
1514                 goto err_queue;
1515         }
1516         if (i40evf_config_irq_map(dev)) {
1517                 PMD_DRV_LOG(ERR, "config_irq_map failed");
1518                 goto err_queue;
1519         }
1520
1521         /* Set mac addr */
1522         (void)rte_memcpy(mac_addr.addr_bytes, hw->mac.addr,
1523                                 sizeof(mac_addr.addr_bytes));
1524         if (i40evf_add_mac_addr(dev, &mac_addr)) {
1525                 PMD_DRV_LOG(ERR, "Failed to add mac addr");
1526                 goto err_queue;
1527         }
1528
1529         if (i40evf_start_queues(dev) != 0) {
1530                 PMD_DRV_LOG(ERR, "enable queues failed");
1531                 goto err_mac;
1532         }
1533
1534         i40evf_enable_queues_intr(hw);
1535         return 0;
1536
1537 err_mac:
1538         i40evf_del_mac_addr(dev, &mac_addr);
1539 err_queue:
1540         return -1;
1541 }
1542
1543 static void
1544 i40evf_dev_stop(struct rte_eth_dev *dev)
1545 {
1546         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1547
1548         PMD_INIT_FUNC_TRACE();
1549
1550         i40evf_disable_queues_intr(hw);
1551         i40evf_stop_queues(dev);
1552 }
1553
1554 static int
1555 i40evf_dev_link_update(struct rte_eth_dev *dev,
1556                        __rte_unused int wait_to_complete)
1557 {
1558         struct rte_eth_link new_link;
1559         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1560         /*
1561          * DPDK pf host provide interfacet to acquire link status
1562          * while Linux driver does not
1563          */
1564         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
1565                 i40evf_get_link_status(dev, &new_link);
1566         else {
1567                 /* Always assume it's up, for Linux driver PF host */
1568                 new_link.link_duplex = ETH_LINK_AUTONEG_DUPLEX;
1569                 new_link.link_speed  = ETH_LINK_SPEED_10000;
1570                 new_link.link_status = 1;
1571         }
1572         i40evf_dev_atomic_write_link_status(dev, &new_link);
1573
1574         return 0;
1575 }
1576
1577 static void
1578 i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev)
1579 {
1580         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1581         int ret;
1582
1583         /* If enabled, just return */
1584         if (vf->promisc_unicast_enabled)
1585                 return;
1586
1587         ret = i40evf_config_promisc(dev, 1, vf->promisc_multicast_enabled);
1588         if (ret == 0)
1589                 vf->promisc_unicast_enabled = TRUE;
1590 }
1591
1592 static void
1593 i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev)
1594 {
1595         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1596         int ret;
1597
1598         /* If disabled, just return */
1599         if (!vf->promisc_unicast_enabled)
1600                 return;
1601
1602         ret = i40evf_config_promisc(dev, 0, vf->promisc_multicast_enabled);
1603         if (ret == 0)
1604                 vf->promisc_unicast_enabled = FALSE;
1605 }
1606
1607 static void
1608 i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev)
1609 {
1610         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1611         int ret;
1612
1613         /* If enabled, just return */
1614         if (vf->promisc_multicast_enabled)
1615                 return;
1616
1617         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 1);
1618         if (ret == 0)
1619                 vf->promisc_multicast_enabled = TRUE;
1620 }
1621
1622 static void
1623 i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev)
1624 {
1625         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1626         int ret;
1627
1628         /* If enabled, just return */
1629         if (!vf->promisc_multicast_enabled)
1630                 return;
1631
1632         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 0);
1633         if (ret == 0)
1634                 vf->promisc_multicast_enabled = FALSE;
1635 }
1636
1637 static void
1638 i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
1639 {
1640         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1641
1642         memset(dev_info, 0, sizeof(*dev_info));
1643         dev_info->max_rx_queues = vf->vsi_res->num_queue_pairs;
1644         dev_info->max_tx_queues = vf->vsi_res->num_queue_pairs;
1645         dev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;
1646         dev_info->max_rx_pktlen = I40E_FRAME_SIZE_MAX;
1647         dev_info->reta_size = ETH_RSS_RETA_SIZE_64;
1648         dev_info->flow_type_rss_offloads = I40E_RSS_OFFLOAD_ALL;
1649
1650         dev_info->default_rxconf = (struct rte_eth_rxconf) {
1651                 .rx_thresh = {
1652                         .pthresh = I40E_DEFAULT_RX_PTHRESH,
1653                         .hthresh = I40E_DEFAULT_RX_HTHRESH,
1654                         .wthresh = I40E_DEFAULT_RX_WTHRESH,
1655                 },
1656                 .rx_free_thresh = I40E_DEFAULT_RX_FREE_THRESH,
1657                 .rx_drop_en = 0,
1658         };
1659
1660         dev_info->default_txconf = (struct rte_eth_txconf) {
1661                 .tx_thresh = {
1662                         .pthresh = I40E_DEFAULT_TX_PTHRESH,
1663                         .hthresh = I40E_DEFAULT_TX_HTHRESH,
1664                         .wthresh = I40E_DEFAULT_TX_WTHRESH,
1665                 },
1666                 .tx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH,
1667                 .tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH,
1668                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
1669                                 ETH_TXQ_FLAGS_NOOFFLOADS,
1670         };
1671 }
1672
1673 static void
1674 i40evf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1675 {
1676         if (i40evf_get_statics(dev, stats))
1677                 PMD_DRV_LOG(ERR, "Get statics failed");
1678 }
1679
1680 static void
1681 i40evf_dev_close(struct rte_eth_dev *dev)
1682 {
1683         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1684
1685         i40evf_dev_stop(dev);
1686         i40evf_reset_vf(hw);
1687         i40e_shutdown_adminq(hw);
1688 }
1689
1690 static int
1691 i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
1692                            struct rte_eth_rss_reta_entry64 *reta_conf,
1693                            uint16_t reta_size)
1694 {
1695         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1696         uint32_t lut, l;
1697         uint16_t i, j;
1698         uint16_t idx, shift;
1699         uint8_t mask;
1700
1701         if (reta_size != ETH_RSS_RETA_SIZE_64) {
1702                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
1703                         "(%d) doesn't match the number of hardware can "
1704                         "support (%d)\n", reta_size, ETH_RSS_RETA_SIZE_64);
1705                 return -EINVAL;
1706         }
1707
1708         for (i = 0; i < reta_size; i += I40E_4_BIT_WIDTH) {
1709                 idx = i / RTE_RETA_GROUP_SIZE;
1710                 shift = i % RTE_RETA_GROUP_SIZE;
1711                 mask = (uint8_t)((reta_conf[idx].mask >> shift) &
1712                                                 I40E_4_BIT_MASK);
1713                 if (!mask)
1714                         continue;
1715                 if (mask == I40E_4_BIT_MASK)
1716                         l = 0;
1717                 else
1718                         l = I40E_READ_REG(hw, I40E_VFQF_HLUT(i >> 2));
1719
1720                 for (j = 0, lut = 0; j < I40E_4_BIT_WIDTH; j++) {
1721                         if (mask & (0x1 << j))
1722                                 lut |= reta_conf[idx].reta[shift + j] <<
1723                                                         (CHAR_BIT * j);
1724                         else
1725                                 lut |= l & (I40E_8_BIT_MASK << (CHAR_BIT * j));
1726                 }
1727                 I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
1728         }
1729
1730         return 0;
1731 }
1732
1733 static int
1734 i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
1735                           struct rte_eth_rss_reta_entry64 *reta_conf,
1736                           uint16_t reta_size)
1737 {
1738         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1739         uint32_t lut;
1740         uint16_t i, j;
1741         uint16_t idx, shift;
1742         uint8_t mask;
1743
1744         if (reta_size != ETH_RSS_RETA_SIZE_64) {
1745                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
1746                         "(%d) doesn't match the number of hardware can "
1747                         "support (%d)\n", reta_size, ETH_RSS_RETA_SIZE_64);
1748                 return -EINVAL;
1749         }
1750
1751         for (i = 0; i < reta_size; i += I40E_4_BIT_WIDTH) {
1752                 idx = i / RTE_RETA_GROUP_SIZE;
1753                 shift = i % RTE_RETA_GROUP_SIZE;
1754                 mask = (uint8_t)((reta_conf[idx].mask >> shift) &
1755                                                 I40E_4_BIT_MASK);
1756                 if (!mask)
1757                         continue;
1758
1759                 lut = I40E_READ_REG(hw, I40E_VFQF_HLUT(i >> 2));
1760                 for (j = 0; j < I40E_4_BIT_WIDTH; j++) {
1761                         if (mask & (0x1 << j))
1762                                 reta_conf[idx].reta[shift + j] =
1763                                         ((lut >> (CHAR_BIT * j)) &
1764                                                 I40E_8_BIT_MASK);
1765                 }
1766         }
1767
1768         return 0;
1769 }
1770
1771 static int
1772 i40evf_hw_rss_hash_set(struct i40e_hw *hw, struct rte_eth_rss_conf *rss_conf)
1773 {
1774         uint32_t *hash_key;
1775         uint8_t hash_key_len;
1776         uint64_t rss_hf, hena;
1777
1778         hash_key = (uint32_t *)(rss_conf->rss_key);
1779         hash_key_len = rss_conf->rss_key_len;
1780         if (hash_key != NULL && hash_key_len >=
1781                 (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t)) {
1782                 uint16_t i;
1783
1784                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
1785                         I40E_WRITE_REG(hw, I40E_VFQF_HKEY(i), hash_key[i]);
1786         }
1787
1788         rss_hf = rss_conf->rss_hf;
1789         hena = (uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(0));
1790         hena |= ((uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(1))) << 32;
1791         hena &= ~I40E_RSS_HENA_ALL;
1792         hena |= i40e_config_hena(rss_hf);
1793         I40E_WRITE_REG(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
1794         I40E_WRITE_REG(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
1795         I40EVF_WRITE_FLUSH(hw);
1796
1797         return 0;
1798 }
1799
1800 static void
1801 i40evf_disable_rss(struct i40e_vf *vf)
1802 {
1803         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
1804         uint64_t hena;
1805
1806         hena = (uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(0));
1807         hena |= ((uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(1))) << 32;
1808         hena &= ~I40E_RSS_HENA_ALL;
1809         I40E_WRITE_REG(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
1810         I40E_WRITE_REG(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
1811         I40EVF_WRITE_FLUSH(hw);
1812 }
1813
1814 static int
1815 i40evf_config_rss(struct i40e_vf *vf)
1816 {
1817         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
1818         struct rte_eth_rss_conf rss_conf;
1819         uint32_t i, j, lut = 0, nb_q = (I40E_VFQF_HLUT_MAX_INDEX + 1) * 4;
1820
1821         if (vf->dev_data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
1822                 i40evf_disable_rss(vf);
1823                 PMD_DRV_LOG(DEBUG, "RSS not configured\n");
1824                 return 0;
1825         }
1826
1827         /* Fill out the look up table */
1828         for (i = 0, j = 0; i < nb_q; i++, j++) {
1829                 if (j >= vf->num_queue_pairs)
1830                         j = 0;
1831                 lut = (lut << 8) | j;
1832                 if ((i & 3) == 3)
1833                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
1834         }
1835
1836         rss_conf = vf->dev_data->dev_conf.rx_adv_conf.rss_conf;
1837         if ((rss_conf.rss_hf & I40E_RSS_OFFLOAD_ALL) == 0) {
1838                 i40evf_disable_rss(vf);
1839                 PMD_DRV_LOG(DEBUG, "No hash flag is set\n");
1840                 return 0;
1841         }
1842
1843         if (rss_conf.rss_key == NULL || rss_conf.rss_key_len < nb_q) {
1844                 /* Calculate the default hash key */
1845                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
1846                         rss_key_default[i] = (uint32_t)rte_rand();
1847                 rss_conf.rss_key = (uint8_t *)rss_key_default;
1848                 rss_conf.rss_key_len = nb_q;
1849         }
1850
1851         return i40evf_hw_rss_hash_set(hw, &rss_conf);
1852 }
1853
1854 static int
1855 i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
1856                            struct rte_eth_rss_conf *rss_conf)
1857 {
1858         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1859         uint64_t rss_hf = rss_conf->rss_hf & I40E_RSS_OFFLOAD_ALL;
1860         uint64_t hena;
1861
1862         hena = (uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(0));
1863         hena |= ((uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(1))) << 32;
1864         if (!(hena & I40E_RSS_HENA_ALL)) { /* RSS disabled */
1865                 if (rss_hf != 0) /* Enable RSS */
1866                         return -EINVAL;
1867                 return 0;
1868         }
1869
1870         /* RSS enabled */
1871         if (rss_hf == 0) /* Disable RSS */
1872                 return -EINVAL;
1873
1874         return i40evf_hw_rss_hash_set(hw, rss_conf);
1875 }
1876
1877 static int
1878 i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
1879                              struct rte_eth_rss_conf *rss_conf)
1880 {
1881         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1882         uint32_t *hash_key = (uint32_t *)(rss_conf->rss_key);
1883         uint64_t hena;
1884         uint16_t i;
1885
1886         if (hash_key) {
1887                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
1888                         hash_key[i] = I40E_READ_REG(hw, I40E_VFQF_HKEY(i));
1889                 rss_conf->rss_key_len = i * sizeof(uint32_t);
1890         }
1891         hena = (uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(0));
1892         hena |= ((uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(1))) << 32;
1893         rss_conf->rss_hf = i40e_parse_hena(hena);
1894
1895         return 0;
1896 }