lib/librte_pmd_i40e/i40e_pf.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <sys/queue.h>
  35 #include <stdio.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <unistd.h>
  40 #include <stdarg.h>
  41 #include <inttypes.h>
  42
  43 #include <rte_string_fns.h>
  44 #include <rte_pci.h>
  45 #include <rte_ether.h>
  46 #include <rte_ethdev.h>
  47 #include <rte_memzone.h>
  48 #include <rte_malloc.h>
  49 #include <rte_memcpy.h>
  50
  51 #include "i40e_logs.h"
  52 #include "i40e/i40e_prototype.h"
  53 #include "i40e/i40e_adminq_cmd.h"
  54 #include "i40e/i40e_type.h"
  55 #include "i40e_ethdev.h"
  56 #include "i40e_rxtx.h"
  57 #include "i40e_pf.h"
  58
  59 static int
  60 i40e_pf_host_switch_queues(struct i40e_pf_vf *vf,
  61                            struct i40e_virtchnl_queue_select *qsel,
  62                            bool on);
  63
  64 /**
  65  * Bind PF queues with VSI and VF.
  66  **/
  67 static int
  68 i40e_pf_vf_queues_mapping(struct i40e_pf_vf *vf)
  69 {
  70         int i;
  71         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
  72         uint16_t vsi_id = vf->vsi->vsi_id;
  73         uint16_t vf_id  = vf->vf_idx;
  74         uint16_t nb_qps = vf->vsi->nb_qps;
  75         uint16_t qbase  = vf->vsi->base_queue;
  76         uint16_t q1, q2;
  77         uint32_t val;
  78
  79         /*
  80          * VF should use scatter range queues. So, it needn't
  81          * to set QBASE in this register.
  82          */
  83         I40E_WRITE_REG(hw, I40E_VSILAN_QBASE(vsi_id),
  84              I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK);
  85
  86         /* Set to enable VFLAN_QTABLE[] registers valid */
  87         I40E_WRITE_REG(hw, I40E_VPLAN_MAPENA(vf_id),
  88                 I40E_VPLAN_MAPENA_TXRX_ENA_MASK);
  89
  90         /* map PF queues to VF */
  91         for (i = 0; i < nb_qps; i++) {
  92                 val = ((qbase + i) & I40E_VPLAN_QTABLE_QINDEX_MASK);
  93                 I40E_WRITE_REG(hw, I40E_VPLAN_QTABLE(i, vf_id), val);
  94         }
  95
  96         /* map PF queues to VSI */
  97         for (i = 0; i < I40E_MAX_QP_NUM_PER_VF / 2; i++) {
  98                 if (2 * i > nb_qps - 1)
  99                         q1 = I40E_VSILAN_QTABLE_QINDEX_0_MASK;
 100                 else
 101                         q1 = qbase + 2 * i;
 102
 103                 if (2 * i + 1 > nb_qps - 1)
 104                         q2 = I40E_VSILAN_QTABLE_QINDEX_0_MASK;
 105                 else
 106                         q2 = qbase + 2 * i + 1;
 107
 108                 val = (q2 << I40E_VSILAN_QTABLE_QINDEX_1_SHIFT) + q1;
 109                 I40E_WRITE_REG(hw, I40E_VSILAN_QTABLE(i, vsi_id), val);
 110         }
 111         I40E_WRITE_FLUSH(hw);
 112
 113         return I40E_SUCCESS;
 114 }
 115
 116
 117 /**
 118  * Proceed VF reset operation.
 119  */
 120 int
 121 i40e_pf_host_vf_reset(struct i40e_pf_vf *vf, bool do_hw_reset)
 122 {
 123         uint32_t val, i;
 124         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 125         uint16_t vf_id, abs_vf_id, vf_msix_num;
 126         int ret;
 127         struct i40e_virtchnl_queue_select qsel;
 128
 129         if (vf == NULL)
 130                 return -EINVAL;
 131
 132         vf_id = vf->vf_idx;
 133         abs_vf_id = vf_id + hw->func_caps.vf_base_id;
 134
 135         /* Notify VF that we are in VFR progress */
 136         I40E_WRITE_REG(hw, I40E_VFGEN_RSTAT1(vf_id), I40E_PF_VFR_INPROGRESS);
 137
 138         /*
 139          * If require a SW VF reset, a VFLR interrupt will be generated,
 140          * this function will be called again. To avoid it,
 141          * disable interrupt first.
 142          */
 143         if (do_hw_reset) {
 144                 vf->state = I40E_VF_INRESET;
 145                 val = I40E_READ_REG(hw, I40E_VPGEN_VFRTRIG(vf_id));
 146                 val |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
 147                 I40E_WRITE_REG(hw, I40E_VPGEN_VFRTRIG(vf_id), val);
 148                 I40E_WRITE_FLUSH(hw);
 149         }
 150
 151 #define VFRESET_MAX_WAIT_CNT 100
 152         /* Wait until VF reset is done */
 153         for (i = 0; i < VFRESET_MAX_WAIT_CNT; i++) {
 154                 rte_delay_us(10);
 155                 val = I40E_READ_REG(hw, I40E_VPGEN_VFRSTAT(vf_id));
 156                 if (val & I40E_VPGEN_VFRSTAT_VFRD_MASK)
 157                         break;
 158         }
 159
 160         if (i >= VFRESET_MAX_WAIT_CNT) {
 161                 PMD_DRV_LOG(ERR, "VF reset timeout\n");
 162                 return -ETIMEDOUT;
 163         }
 164
 165         /* This is not first time to do reset, do cleanup job first */
 166         if (vf->vsi) {
 167                 /* Disable queues */
 168                 memset(&qsel, 0, sizeof(qsel));
 169                 for (i = 0; i < vf->vsi->nb_qps; i++)
 170                         qsel.rx_queues |= 1 << i;
 171                 qsel.tx_queues = qsel.rx_queues;
 172                 ret = i40e_pf_host_switch_queues(vf, &qsel, false);
 173                 if (ret != I40E_SUCCESS) {
 174                         PMD_DRV_LOG(ERR, "Disable VF queues failed\n");
 175                         return -EFAULT;
 176                 }
 177
 178                 /* Disable VF interrupt setting */
 179                 vf_msix_num = hw->func_caps.num_msix_vectors_vf;
 180                 for (i = 0; i < vf_msix_num; i++) {
 181                         if (!i)
 182                                 val = I40E_VFINT_DYN_CTL0(vf_id);
 183                         else
 184                                 val = I40E_VFINT_DYN_CTLN(((vf_msix_num - 1) *
 185                                                         (vf_id)) + (i - 1));
 186                         I40E_WRITE_REG(hw, val, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
 187                 }
 188                 I40E_WRITE_FLUSH(hw);
 189
 190                 /* remove VSI */
 191                 ret = i40e_vsi_release(vf->vsi);
 192                 if (ret != I40E_SUCCESS) {
 193                         PMD_DRV_LOG(ERR, "Release VSI failed\n");
 194                         return -EFAULT;
 195                 }
 196         }
 197
 198 #define I40E_VF_PCI_ADDR  0xAA
 199 #define I40E_VF_PEND_MASK 0x20
 200         /* Check the pending transactions of this VF */
 201         /* Use absolute VF id, refer to datasheet for details */
 202         I40E_WRITE_REG(hw, I40E_PF_PCI_CIAA, I40E_VF_PCI_ADDR |
 203                 (abs_vf_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT));
 204         for (i = 0; i < VFRESET_MAX_WAIT_CNT; i++) {
 205                 rte_delay_us(1);
 206                 val = I40E_READ_REG(hw, I40E_PF_PCI_CIAD);
 207                 if ((val & I40E_VF_PEND_MASK) == 0)
 208                         break;
 209         }
 210
 211         if (i >= VFRESET_MAX_WAIT_CNT) {
 212                 PMD_DRV_LOG(ERR, "Wait VF PCI transaction end timeout\n");
 213                 return -ETIMEDOUT;
 214         }
 215
 216         /* Reset done, Set COMPLETE flag and clear reset bit */
 217         I40E_WRITE_REG(hw, I40E_VFGEN_RSTAT1(vf_id), I40E_PF_VFR_COMPLETED);
 218         val = I40E_READ_REG(hw, I40E_VPGEN_VFRTRIG(vf_id));
 219         val &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK;
 220         I40E_WRITE_REG(hw, I40E_VPGEN_VFRTRIG(vf_id), val);
 221         vf->reset_cnt++;
 222         I40E_WRITE_FLUSH(hw);
 223
 224         /* Allocate resource again */
 225         vf->vsi = i40e_vsi_setup(vf->pf, I40E_VSI_SRIOV,
 226                         vf->pf->main_vsi, vf->vf_idx);
 227         if (vf->vsi == NULL) {
 228                 PMD_DRV_LOG(ERR, "Add vsi failed\n");
 229                 return -EFAULT;
 230         }
 231
 232         ret = i40e_pf_vf_queues_mapping(vf);
 233         if (ret != I40E_SUCCESS) {
 234                 PMD_DRV_LOG(ERR, "queue mapping error\n");
 235                 i40e_vsi_release(vf->vsi);
 236                 return -EFAULT;
 237         }
 238
 239         return ret;
 240 }
 241
 242 static int
 243 i40e_pf_host_send_msg_to_vf(struct i40e_pf_vf *vf,
 244                             uint32_t opcode,
 245                             uint32_t retval,
 246                             uint8_t *msg,
 247                             uint16_t msglen)
 248 {
 249         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 250         uint16_t abs_vf_id = hw->func_caps.vf_base_id + vf->vf_idx;
 251         int ret;
 252
 253         ret = i40e_aq_send_msg_to_vf(hw, abs_vf_id, opcode, retval,
 254                                                 msg, msglen, NULL);
 255         if (ret) {
 256                 PMD_DRV_LOG(ERR, "Fail to send message to VF, err %u\n",
 257                         hw->aq.asq_last_status);
 258                 printf("Fail to send message to VF, err %u\n",
 259                                         hw->aq.asq_last_status);
 260         }
 261
 262         return ret;
 263 }
 264
 265 static void
 266 i40e_pf_host_process_cmd_version(struct i40e_pf_vf *vf)
 267 {
 268         struct i40e_virtchnl_version_info info;
 269
 270         info.major = I40E_DPDK_VERSION_MAJOR;
 271         info.minor = I40E_DPDK_VERSION_MINOR;
 272         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_VERSION,
 273                 I40E_SUCCESS, (uint8_t *)&info, sizeof(info));
 274 }
 275
 276 static int
 277 i40e_pf_host_process_cmd_reset_vf(struct i40e_pf_vf *vf)
 278 {
 279         i40e_pf_host_vf_reset(vf, 1);
 280
 281         /* No feedback will be sent to VF for VFLR */
 282         return I40E_SUCCESS;
 283 }
 284
 285 static int
 286 i40e_pf_host_process_cmd_get_vf_resource(struct i40e_pf_vf *vf)
 287 {
 288         struct i40e_virtchnl_vf_resource *vf_res = NULL;
 289         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 290         uint32_t len = 0;
 291         int ret = I40E_SUCCESS;
 292
 293         /* only have 1 VSI by default */
 294         len =  sizeof(struct i40e_virtchnl_vf_resource) +
 295                                 I40E_DEFAULT_VF_VSI_NUM *
 296                 sizeof(struct i40e_virtchnl_vsi_resource);
 297
 298         vf_res = rte_zmalloc("i40e_vf_res", len, 0);
 299         if (vf_res == NULL) {
 300                 PMD_DRV_LOG(ERR, "failed to allocate mem\n");
 301                 ret = I40E_ERR_NO_MEMORY;
 302                 vf_res = NULL;
 303                 len = 0;
 304                 goto send_msg;
 305         }
 306
 307         vf_res->vf_offload_flags = I40E_VIRTCHNL_VF_OFFLOAD_L2;
 308         vf_res->max_vectors = hw->func_caps.num_msix_vectors_vf;
 309         vf_res->num_queue_pairs = vf->vsi->nb_qps;
 310         vf_res->num_vsis = I40E_DEFAULT_VF_VSI_NUM;
 311
 312         /* Change below setting if PF host can support more VSIs for VF */
 313         vf_res->vsi_res[0].vsi_type = I40E_VSI_SRIOV;
 314         /* As assume Vf only has single VSI now, always return 0 */
 315         vf_res->vsi_res[0].vsi_id = 0;
 316         vf_res->vsi_res[0].num_queue_pairs = vf->vsi->nb_qps;
 317
 318 send_msg:
 319         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_VF_RESOURCES,
 320                                         ret, (uint8_t *)vf_res, len);
 321         rte_free(vf_res);
 322
 323         return ret;
 324 }
 325
 326 static int
 327 i40e_pf_host_hmc_config_rxq(struct i40e_hw *hw,
 328                             struct i40e_pf_vf *vf,
 329                             struct i40e_virtchnl_rxq_info *rxq)
 330 {
 331         int err = I40E_SUCCESS;
 332         struct i40e_hmc_obj_rxq rx_ctx;
 333         uint16_t abs_queue_id = vf->vsi->base_queue + rxq->queue_id;
 334
 335         /* Clear the context structure first */
 336         memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq));
 337         rx_ctx.dbuff = rxq->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
 338         rx_ctx.hbuff = rxq->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT;
 339         rx_ctx.base = rxq->dma_ring_addr / I40E_QUEUE_BASE_ADDR_UNIT;
 340         rx_ctx.qlen = rxq->ring_len;
 341 #ifndef RTE_LIBRTE_I40E_16BYTE_RX_DESC
 342         rx_ctx.dsize = 1;
 343 #endif
 344
 345         if (rxq->splithdr_enabled) {
 346                 rx_ctx.hsplit_0 = I40E_HEADER_SPLIT_ALL;
 347                 rx_ctx.dtype = i40e_header_split_enabled;
 348         } else {
 349                 rx_ctx.hsplit_0 = I40E_HEADER_SPLIT_NONE;
 350                 rx_ctx.dtype = i40e_header_split_none;
 351         }
 352         rx_ctx.rxmax = rxq->max_pkt_size;
 353         rx_ctx.tphrdesc_ena = 1;
 354         rx_ctx.tphwdesc_ena = 1;
 355         rx_ctx.tphdata_ena = 1;
 356         rx_ctx.tphhead_ena = 1;
 357         rx_ctx.lrxqthresh = 2;
 358         rx_ctx.crcstrip = 1;
 359         rx_ctx.prefena = 1;
 360
 361         err = i40e_clear_lan_rx_queue_context(hw, abs_queue_id);
 362         if (err != I40E_SUCCESS)
 363                 return err;
 364         err = i40e_set_lan_rx_queue_context(hw, abs_queue_id, &rx_ctx);
 365
 366         return err;
 367 }
 368
 369 static int
 370 i40e_pf_host_hmc_config_txq(struct i40e_hw *hw,
 371                             struct i40e_pf_vf *vf,
 372                             struct i40e_virtchnl_txq_info *txq)
 373 {
 374         int err = I40E_SUCCESS;
 375         struct i40e_hmc_obj_txq tx_ctx;
 376         uint32_t qtx_ctl;
 377         uint16_t abs_queue_id = vf->vsi->base_queue + txq->queue_id;
 378
 379
 380         /* clear the context structure first */
 381         memset(&tx_ctx, 0, sizeof(tx_ctx));
 382         tx_ctx.new_context = 1;
 383         tx_ctx.base = txq->dma_ring_addr / I40E_QUEUE_BASE_ADDR_UNIT;
 384         tx_ctx.qlen = txq->ring_len;
 385         tx_ctx.rdylist = rte_le_to_cpu_16(vf->vsi->info.qs_handle[0]);
 386         err = i40e_clear_lan_tx_queue_context(hw, abs_queue_id);
 387         if (err != I40E_SUCCESS)
 388                 return err;
 389
 390         err = i40e_set_lan_tx_queue_context(hw, abs_queue_id, &tx_ctx);
 391         if (err != I40E_SUCCESS)
 392                 return err;
 393
 394         /* bind queue with VF function, since TX/QX will appear in pair,
 395          * so only has QTX_CTL to set.
 396          */
 397         qtx_ctl = (I40E_QTX_CTL_VF_QUEUE << I40E_QTX_CTL_PFVF_Q_SHIFT) |
 398                                 ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
 399                                 I40E_QTX_CTL_PF_INDX_MASK) |
 400                                 (((vf->vf_idx + hw->func_caps.vf_base_id) <<
 401                                 I40E_QTX_CTL_VFVM_INDX_SHIFT) &
 402                                 I40E_QTX_CTL_VFVM_INDX_MASK);
 403         I40E_WRITE_REG(hw, I40E_QTX_CTL(abs_queue_id), qtx_ctl);
 404         I40E_WRITE_FLUSH(hw);
 405
 406         return I40E_SUCCESS;
 407 }
 408
 409 static int
 410 i40e_pf_host_process_cmd_config_vsi_queues(struct i40e_pf_vf *vf,
 411                                            uint8_t *msg,
 412                                            uint16_t msglen)
 413 {
 414         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 415         struct i40e_vsi *vsi = vf->vsi;
 416         int ret = I40E_SUCCESS;
 417         struct i40e_virtchnl_vsi_queue_config_info *qconfig =
 418             (struct i40e_virtchnl_vsi_queue_config_info *)msg;
 419         int i;
 420         struct i40e_virtchnl_queue_pair_info *qpair;
 421
 422         if (msglen <= sizeof(*qconfig) ||
 423                 qconfig->num_queue_pairs > vsi->nb_qps) {
 424                 PMD_DRV_LOG(ERR, "vsi_queue_config_info argument wrong\n");
 425                 ret = I40E_ERR_PARAM;
 426                 goto send_msg;
 427         }
 428
 429         qpair = qconfig->qpair;
 430         for (i = 0; i < qconfig->num_queue_pairs; i++) {
 431                 if (qpair[i].rxq.queue_id > vsi->nb_qps - 1 ||
 432                         qpair[i].txq.queue_id > vsi->nb_qps - 1) {
 433                         ret = I40E_ERR_PARAM;
 434                         goto send_msg;
 435                 }
 436
 437                 /* Apply VF RX queue setting to HMC */
 438                 if (i40e_pf_host_hmc_config_rxq(hw, vf, &qpair[i].rxq)
 439                         != I40E_SUCCESS) {
 440                         PMD_DRV_LOG(ERR, "Configure RX queue HMC failed");
 441                         ret = I40E_ERR_PARAM;
 442                         goto send_msg;
 443                 }
 444
 445                 /* Apply VF TX queue setting to HMC */
 446                 if (i40e_pf_host_hmc_config_txq(hw, vf, &qpair[i].txq)
 447                         != I40E_SUCCESS) {
 448                         PMD_DRV_LOG(ERR, "Configure TX queue HMC failed");
 449                         ret = I40E_ERR_PARAM;
 450                         goto send_msg;
 451                 }
 452         }
 453
 454 send_msg:
 455         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES,
 456                                                         ret, NULL, 0);
 457         return ret;
 458 }
 459
 460 static int
 461 i40e_pf_host_process_cmd_config_irq_map(struct i40e_pf_vf *vf,
 462                                         uint8_t *msg, uint16_t msglen)
 463 {
 464         int ret = I40E_SUCCESS;
 465         struct i40e_virtchnl_irq_map_info *irqmap =
 466             (struct i40e_virtchnl_irq_map_info *)msg;
 467
 468         if (msglen < sizeof(struct i40e_virtchnl_irq_map_info)) {
 469                 PMD_DRV_LOG(ERR, "buffer too short\n");
 470                 ret = I40E_ERR_PARAM;
 471                 goto send_msg;
 472         }
 473
 474         /* Assume VF only have 1 vector to bind all queues */
 475         if (irqmap->num_vectors != 1) {
 476                 PMD_DRV_LOG(ERR, "DKDK host only support 1 vector\n");
 477                 ret = I40E_ERR_PARAM;
 478                 goto send_msg;
 479         }
 480
 481         if (irqmap->vecmap[0].vector_id == 0) {
 482                 PMD_DRV_LOG(ERR, "DPDK host don't support use IRQ0\n");
 483                 ret = I40E_ERR_PARAM;
 484                 goto send_msg;
 485         }
 486         /* This MSIX intr store the intr in VF range */
 487         vf->vsi->msix_intr = irqmap->vecmap[0].vector_id;
 488
 489         /* Don't care how the TX/RX queue mapping with this vector.
 490          * Link all VF RX queues together. Only did mapping work.
 491          * VF can disable/enable the intr by itself.
 492          */
 493         i40e_vsi_queues_bind_intr(vf->vsi);
 494 send_msg:
 495         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP,
 496                                                         ret, NULL, 0);
 497
 498         return ret;
 499 }
 500
 501 static int
 502 i40e_pf_host_switch_queues(struct i40e_pf_vf *vf,
 503                            struct i40e_virtchnl_queue_select *qsel,
 504                            bool on)
 505 {
 506         int ret = I40E_SUCCESS;
 507         int i;
 508         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 509         uint16_t baseq = vf->vsi->base_queue;
 510
 511         if (qsel->rx_queues + qsel->tx_queues == 0)
 512                 return I40E_ERR_PARAM;
 513
 514         /* always enable RX first and disable last */
 515         /* Enable RX if it's enable */
 516         if (on) {
 517                 for (i = 0; i < I40E_MAX_QP_NUM_PER_VF; i++)
 518                         if (qsel->rx_queues & (1 << i)) {
 519                                 ret = i40e_switch_rx_queue(hw, baseq + i, on);
 520                                 if (ret != I40E_SUCCESS)
 521                                         return ret;
 522                         }
 523         }
 524
 525         /* Enable/Disable TX */
 526         for (i = 0; i < I40E_MAX_QP_NUM_PER_VF; i++)
 527                 if (qsel->tx_queues & (1 << i)) {
 528                         ret = i40e_switch_tx_queue(hw, baseq + i, on);
 529                         if (ret != I40E_SUCCESS)
 530                                 return ret;
 531                 }
 532
 533         /* disable RX last if it's disable */
 534         if (!on) {
 535                 /* disable RX */
 536                 for (i = 0; i < I40E_MAX_QP_NUM_PER_VF; i++)
 537                         if (qsel->rx_queues & (1 << i)) {
 538                                 ret = i40e_switch_rx_queue(hw, baseq + i, on);
 539                                 if (ret != I40E_SUCCESS)
 540                                         return ret;
 541                         }
 542         }
 543
 544         return ret;
 545 }
 546
 547 static int
 548 i40e_pf_host_process_cmd_enable_queues(struct i40e_pf_vf *vf,
 549                                        uint8_t *msg,
 550                                        uint16_t msglen)
 551 {
 552         int ret = I40E_SUCCESS;
 553         struct i40e_virtchnl_queue_select *q_sel =
 554                 (struct i40e_virtchnl_queue_select *)msg;
 555
 556         if (msglen != sizeof(*q_sel)) {
 557                 ret = I40E_ERR_PARAM;
 558                 goto send_msg;
 559         }
 560         ret = i40e_pf_host_switch_queues(vf, q_sel, true);
 561
 562 send_msg:
 563         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES,
 564                                                         ret, NULL, 0);
 565
 566         return ret;
 567 }
 568
 569 static int
 570 i40e_pf_host_process_cmd_disable_queues(struct i40e_pf_vf *vf,
 571                                         uint8_t *msg,
 572                                         uint16_t msglen)
 573 {
 574         int ret = I40E_SUCCESS;
 575         struct i40e_virtchnl_queue_select *q_sel =
 576                 (struct i40e_virtchnl_queue_select *)msg;
 577
 578         if (msglen != sizeof(*q_sel)) {
 579                 ret = I40E_ERR_PARAM;
 580                 goto send_msg;
 581         }
 582         ret = i40e_pf_host_switch_queues(vf, q_sel, false);
 583
 584 send_msg:
 585         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_DISABLE_QUEUES,
 586                                                         ret, NULL, 0);
 587
 588         return ret;
 589 }
 590
 591
 592 static int
 593 i40e_pf_host_process_cmd_add_ether_address(struct i40e_pf_vf *vf,
 594                                            uint8_t *msg,
 595                                            uint16_t msglen)
 596 {
 597         int ret = I40E_SUCCESS;
 598         struct i40e_virtchnl_ether_addr_list *addr_list =
 599                         (struct i40e_virtchnl_ether_addr_list *)msg;
 600         int i;
 601         struct ether_addr *mac;
 602
 603         if (msglen <= sizeof(*addr_list)) {
 604                 PMD_DRV_LOG(ERR, "add_ether_address argument too short\n");
 605                 ret = I40E_ERR_PARAM;
 606                 goto send_msg;
 607         }
 608
 609         for (i = 0; i < addr_list->num_elements; i++) {
 610                 mac = (struct ether_addr *)(addr_list->list[i].addr);
 611                 if(!is_valid_assigned_ether_addr(mac) ||
 612                         i40e_vsi_add_mac(vf->vsi, mac)) {
 613                         ret = I40E_ERR_INVALID_MAC_ADDR;
 614                         goto send_msg;
 615                 }
 616         }
 617
 618 send_msg:
 619         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS,
 620                                                         ret, NULL, 0);
 621
 622         return ret;
 623 }
 624
 625 static int
 626 i40e_pf_host_process_cmd_del_ether_address(struct i40e_pf_vf *vf,
 627                                            uint8_t *msg,
 628                                            uint16_t msglen)
 629 {
 630         int ret = I40E_SUCCESS;
 631         struct i40e_virtchnl_ether_addr_list *addr_list =
 632                 (struct i40e_virtchnl_ether_addr_list *)msg;
 633         int i;
 634         struct ether_addr *mac;
 635
 636         if (msglen <= sizeof(*addr_list)) {
 637                 PMD_DRV_LOG(ERR, "delete_ether_address argument too short\n");
 638                 ret = I40E_ERR_PARAM;
 639                 goto send_msg;
 640         }
 641
 642         for (i = 0; i < addr_list->num_elements; i++) {
 643                 mac = (struct ether_addr *)(addr_list->list[i].addr);
 644                 if(!is_valid_assigned_ether_addr(mac) ||
 645                         i40e_vsi_delete_mac(vf->vsi, mac)) {
 646                         ret = I40E_ERR_INVALID_MAC_ADDR;
 647                         goto send_msg;
 648                 }
 649         }
 650
 651 send_msg:
 652         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS,
 653                                                         ret, NULL, 0);
 654
 655         return ret;
 656 }
 657
 658
 659 static int
 660 i40e_pf_host_process_cmd_add_vlan(struct i40e_pf_vf *vf,
 661                                 uint8_t *msg, uint16_t msglen)
 662 {
 663         int ret = I40E_SUCCESS;
 664         struct i40e_virtchnl_vlan_filter_list *vlan_filter_list =
 665                 (struct i40e_virtchnl_vlan_filter_list *)msg;
 666         int i;
 667         uint16_t *vid;
 668
 669         if (msglen <= sizeof(*vlan_filter_list)) {
 670                 PMD_DRV_LOG(ERR, "add_vlan argument too short\n");
 671                 ret = I40E_ERR_PARAM;
 672                 goto send_msg;
 673         }
 674
 675         vid = vlan_filter_list->vlan_id;
 676
 677         for (i = 0; i < vlan_filter_list->num_elements; i++) {
 678                 ret = i40e_vsi_add_vlan(vf->vsi, vid[i]);
 679                 if(ret != I40E_SUCCESS)
 680                         goto send_msg;
 681         }
 682
 683 send_msg:
 684         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_ADD_VLAN,
 685                                                 ret, NULL, 0);
 686
 687         return ret;
 688 }
 689
 690 static int
 691 i40e_pf_host_process_cmd_del_vlan(struct i40e_pf_vf *vf,
 692                                   uint8_t *msg,
 693                                   uint16_t msglen)
 694 {
 695         int ret = I40E_SUCCESS;
 696         struct i40e_virtchnl_vlan_filter_list *vlan_filter_list =
 697                         (struct i40e_virtchnl_vlan_filter_list *)msg;
 698         int i;
 699         uint16_t *vid;
 700
 701         if (msglen <= sizeof(*vlan_filter_list)) {
 702                 PMD_DRV_LOG(ERR, "delete_vlan argument too short\n");
 703                 ret = I40E_ERR_PARAM;
 704                 goto send_msg;
 705         }
 706
 707         vid = vlan_filter_list->vlan_id;
 708         for (i = 0; i < vlan_filter_list->num_elements; i++) {
 709                 ret = i40e_vsi_delete_vlan(vf->vsi, vid[i]);
 710                 if(ret != I40E_SUCCESS)
 711                         goto send_msg;
 712         }
 713
 714 send_msg:
 715         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_DEL_VLAN,
 716                                                 ret, NULL, 0);
 717
 718         return ret;
 719 }
 720
 721 static int
 722 i40e_pf_host_process_cmd_config_promisc_mode(
 723                                         struct i40e_pf_vf *vf,
 724                                         uint8_t *msg,
 725                                         __rte_unused uint16_t msglen)
 726 {
 727         int ret = I40E_SUCCESS;
 728         struct i40e_virtchnl_promisc_info *promisc =
 729                                 (struct i40e_virtchnl_promisc_info *)msg;
 730         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 731         bool unicast = FALSE, multicast = FALSE;
 732
 733         if (promisc->flags & I40E_FLAG_VF_UNICAST_PROMISC)
 734                 unicast = TRUE;
 735         ret = i40e_aq_set_vsi_unicast_promiscuous(hw,
 736                         vf->vsi->seid, unicast, NULL);
 737         if (ret != I40E_SUCCESS)
 738                 goto send_msg;
 739
 740         if (promisc->flags & I40E_FLAG_VF_MULTICAST_PROMISC)
 741                 multicast = TRUE;
 742         ret = i40e_aq_set_vsi_multicast_promiscuous(hw, vf->vsi->seid,
 743                                                 multicast, NULL);
 744
 745 send_msg:
 746         i40e_pf_host_send_msg_to_vf(vf,
 747                 I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE, ret, NULL, 0);
 748
 749         return ret;
 750 }
 751
 752 static int
 753 i40e_pf_host_process_cmd_get_stats(struct i40e_pf_vf *vf)
 754 {
 755         i40e_update_vsi_stats(vf->vsi);
 756
 757         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_STATS,
 758                 I40E_SUCCESS, (uint8_t *)&vf->vsi->eth_stats,
 759                                 sizeof(vf->vsi->eth_stats));
 760
 761         return I40E_SUCCESS;
 762 }
 763
 764 static void
 765 i40e_pf_host_process_cmd_get_link_status(struct i40e_pf_vf *vf)
 766 {
 767         struct rte_eth_dev *dev = I40E_VSI_TO_ETH_DEV(vf->pf->main_vsi);
 768
 769         /* Update link status first to acquire latest link change */
 770         i40e_dev_link_update(dev, 1);
 771         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_LINK_STAT,
 772                 I40E_SUCCESS, (uint8_t *)&dev->data->dev_link,
 773                                 sizeof(struct rte_eth_link));
 774 }
 775
 776 void
 777 i40e_pf_host_handle_vf_msg(struct rte_eth_dev *dev,
 778                            uint16_t abs_vf_id, uint32_t opcode,
 779                            __rte_unused uint32_t retval,
 780                            uint8_t *msg,
 781                            uint16_t msglen)
 782 {
 783         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
 784         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 785         struct i40e_pf_vf *vf;
 786         /* AdminQ will pass absolute VF id, transfer to internal vf id */
 787         uint16_t vf_id = abs_vf_id - hw->func_caps.vf_base_id;
 788
 789         if (!dev || vf_id > pf->vf_num - 1 || !pf->vfs) {
 790                 PMD_DRV_LOG(ERR, "invalid argument\n");
 791                 return;
 792         }
 793
 794         vf = &pf->vfs[vf_id];
 795         if (!vf->vsi) {
 796                 PMD_DRV_LOG(ERR, "NO VSI associated with VF found\n");
 797                 i40e_pf_host_send_msg_to_vf(vf, opcode,
 798                         I40E_ERR_NO_AVAILABLE_VSI, NULL, 0);
 799                 return;
 800         }
 801
 802         switch (opcode) {
 803         case I40E_VIRTCHNL_OP_VERSION :
 804                 PMD_DRV_LOG(INFO, "OP_VERSION received\n");
 805                 i40e_pf_host_process_cmd_version(vf);
 806                 break;
 807         case I40E_VIRTCHNL_OP_RESET_VF :
 808                 PMD_DRV_LOG(INFO, "OP_RESET_VF received\n");
 809                 i40e_pf_host_process_cmd_reset_vf(vf);
 810                 break;
 811         case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
 812                 PMD_DRV_LOG(INFO, "OP_GET_VF_RESOURCES received\n");
 813                 i40e_pf_host_process_cmd_get_vf_resource(vf);
 814                 break;
 815         case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
 816                 PMD_DRV_LOG(INFO, "OP_CONFIG_VSI_QUEUES received\n");
 817                 i40e_pf_host_process_cmd_config_vsi_queues(vf,
 818                                                 msg, msglen);
 819                 break;
 820         case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
 821                 PMD_DRV_LOG(INFO, "OP_CONFIG_IRQ_MAP received\n");
 822                 i40e_pf_host_process_cmd_config_irq_map(vf, msg, msglen);
 823                 break;
 824         case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
 825                 PMD_DRV_LOG(INFO, "OP_ENABLE_QUEUES received\n");
 826                 i40e_pf_host_process_cmd_enable_queues(vf,
 827                                                 msg, msglen);
 828                 break;
 829         case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
 830                 PMD_DRV_LOG(INFO, "OP_DISABLE_QUEUE received\n");
 831                 i40e_pf_host_process_cmd_disable_queues(vf,
 832                                                 msg, msglen);
 833                 break;
 834         case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
 835                 PMD_DRV_LOG(INFO, "OP_ADD_ETHER_ADDRESS received\n");
 836                 i40e_pf_host_process_cmd_add_ether_address(vf,
 837                                                 msg, msglen);
 838                 break;
 839         case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
 840                 PMD_DRV_LOG(INFO, "OP_DEL_ETHER_ADDRESS received\n");
 841                 i40e_pf_host_process_cmd_del_ether_address(vf,
 842                                                 msg, msglen);
 843                 break;
 844         case I40E_VIRTCHNL_OP_ADD_VLAN:
 845                 PMD_DRV_LOG(INFO, "OP_ADD_VLAN received\n");
 846                 i40e_pf_host_process_cmd_add_vlan(vf, msg, msglen);
 847                 break;
 848         case I40E_VIRTCHNL_OP_DEL_VLAN:
 849                 PMD_DRV_LOG(INFO, "OP_DEL_VLAN received\n");
 850                 i40e_pf_host_process_cmd_del_vlan(vf, msg, msglen);
 851                 break;
 852         case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
 853                 PMD_DRV_LOG(INFO, "OP_CONFIG_PROMISCUOUS_MODE received\n");
 854                 i40e_pf_host_process_cmd_config_promisc_mode(vf, msg, msglen);
 855                 break;
 856         case I40E_VIRTCHNL_OP_GET_STATS:
 857                 PMD_DRV_LOG(INFO, "OP_GET_STATS received\n");
 858                 i40e_pf_host_process_cmd_get_stats(vf);
 859                 break;
 860         case I40E_VIRTCHNL_OP_GET_LINK_STAT:
 861                 PMD_DRV_LOG(INFO, "OP_GET_LINK_STAT received\n");
 862                 i40e_pf_host_process_cmd_get_link_status(vf);
 863                 break;
 864          /* Don't add command supported below, which will
 865          *  return an error code.
 866          */
 867         case I40E_VIRTCHNL_OP_FCOE:
 868                 PMD_DRV_LOG(ERR, "OP_FCOE received, not supported\n");
 869         default:
 870                 PMD_DRV_LOG(ERR, "%u received, not supported\n",
 871                                                         opcode);
 872                 i40e_pf_host_send_msg_to_vf(vf, opcode,
 873                                 I40E_ERR_PARAM, NULL, 0);
 874                 break;
 875         }
 876 }
 877
 878 int
 879 i40e_pf_host_init(struct rte_eth_dev *dev)
 880 {
 881         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
 882         struct i40e_hw *hw = I40E_PF_TO_HW(pf);
 883         int ret, i;
 884         uint32_t val;
 885
 886         PMD_INIT_FUNC_TRACE();
 887
 888         /**
 889          * return if SRIOV not enabled, VF number not configured or
 890          * no queue assigned.
 891          */
 892         if(!hw->func_caps.sr_iov_1_1 || pf->vf_num == 0 || pf->vf_nb_qps == 0)
 893                 return I40E_SUCCESS;
 894
 895         /* Allocate memory to store VF structure */
 896         pf->vfs = rte_zmalloc("i40e_pf_vf",sizeof(*pf->vfs) * pf->vf_num, 0);
 897         if(pf->vfs == NULL)
 898                 return -ENOMEM;
 899
 900         /* Disable irq0 for VFR event */
 901         i40e_pf_disable_irq0(hw);
 902
 903         /* Disable VF link status interrupt */
 904         val = I40E_READ_REG(hw, I40E_PFGEN_PORTMDIO_NUM);
 905         val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
 906         I40E_WRITE_REG(hw, I40E_PFGEN_PORTMDIO_NUM, val);
 907         I40E_WRITE_FLUSH(hw);
 908
 909         for (i = 0; i < pf->vf_num; i++) {
 910                 pf->vfs[i].pf = pf;
 911                 pf->vfs[i].state = I40E_VF_INACTIVE;
 912                 pf->vfs[i].vf_idx = i;
 913                 ret = i40e_pf_host_vf_reset(&pf->vfs[i], 0);
 914                 if (ret != I40E_SUCCESS)
 915                         goto fail;
 916         }
 917
 918         /* restore irq0 */
 919         i40e_pf_enable_irq0(hw);
 920
 921         return I40E_SUCCESS;
 922
 923 fail:
 924         rte_free(pf->vfs);
 925         i40e_pf_enable_irq0(hw);
 926
 927         return ret;
 928 }