lib/librte_sched/rte_sched.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <stdio.h>
  35 #include <string.h>
  36
  37 #include <rte_common.h>
  38 #include <rte_log.h>
  39 #include <rte_memory.h>
  40 #include <rte_malloc.h>
  41 #include <rte_cycles.h>
  42 #include <rte_prefetch.h>
  43 #include <rte_branch_prediction.h>
  44 #include <rte_mbuf.h>
  45
  46 #include "rte_sched.h"
  47 #include "rte_bitmap.h"
  48 #include "rte_sched_common.h"
  49 #include "rte_approx.h"
  50
  51 #ifdef __INTEL_COMPILER
  52 #pragma warning(disable:2259) /* conversion may lose significant bits */
  53 #endif
  54
  55 #ifdef RTE_SCHED_VECTOR
  56 #include <rte_vect.h>
  57
  58 #if defined(__SSE4__)
  59 #define SCHED_VECTOR_SSE4
  60 #endif
  61
  62 #endif
  63
  64 #define RTE_SCHED_TB_RATE_CONFIG_ERR          (1e-7)
  65 #define RTE_SCHED_WRR_SHIFT                   3
  66 #define RTE_SCHED_GRINDER_PCACHE_SIZE         (64 / RTE_SCHED_QUEUES_PER_PIPE)
  67 #define RTE_SCHED_PIPE_INVALID                UINT32_MAX
  68 #define RTE_SCHED_BMP_POS_INVALID             UINT32_MAX
  69
  70 struct rte_sched_subport {
  71         /* Token bucket (TB) */
  72         uint64_t tb_time; /* time of last update */
  73         uint32_t tb_period;
  74         uint32_t tb_credits_per_period;
  75         uint32_t tb_size;
  76         uint32_t tb_credits;
  77
  78         /* Traffic classes (TCs) */
  79         uint64_t tc_time; /* time of next update */
  80         uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
  81         uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
  82         uint32_t tc_period;
  83
  84         /* TC oversubscription */
  85         uint32_t tc_ov_wm;
  86         uint32_t tc_ov_wm_min;
  87         uint32_t tc_ov_wm_max;
  88         uint8_t tc_ov_period_id;
  89         uint8_t tc_ov;
  90         uint32_t tc_ov_n;
  91         double tc_ov_rate;
  92
  93         /* Statistics */
  94         struct rte_sched_subport_stats stats;
  95 };
  96
  97 struct rte_sched_pipe_profile {
  98         /* Token bucket (TB) */
  99         uint32_t tb_period;
 100         uint32_t tb_credits_per_period;
 101         uint32_t tb_size;
 102
 103         /* Pipe traffic classes */
 104         uint32_t tc_period;
 105         uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 106         uint8_t tc_ov_weight;
 107
 108         /* Pipe queues */
 109         uint8_t  wrr_cost[RTE_SCHED_QUEUES_PER_PIPE];
 110 };
 111
 112 struct rte_sched_pipe {
 113         /* Token bucket (TB) */
 114         uint64_t tb_time; /* time of last update */
 115         uint32_t tb_credits;
 116
 117         /* Pipe profile and flags */
 118         uint32_t profile;
 119
 120         /* Traffic classes (TCs) */
 121         uint64_t tc_time; /* time of next update */
 122         uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 123
 124         /* Weighted Round Robin (WRR) */
 125         uint8_t wrr_tokens[RTE_SCHED_QUEUES_PER_PIPE];
 126
 127         /* TC oversubscription */
 128         uint32_t tc_ov_credits;
 129         uint8_t tc_ov_period_id;
 130         uint8_t reserved[3];
 131 } __rte_cache_aligned;
 132
 133 struct rte_sched_queue {
 134         uint16_t qw;
 135         uint16_t qr;
 136 };
 137
 138 struct rte_sched_queue_extra {
 139         struct rte_sched_queue_stats stats;
 140 #ifdef RTE_SCHED_RED
 141         struct rte_red red;
 142 #endif
 143 };
 144
 145 enum grinder_state {
 146         e_GRINDER_PREFETCH_PIPE = 0,
 147         e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS,
 148         e_GRINDER_PREFETCH_MBUF,
 149         e_GRINDER_READ_MBUF
 150 };
 151
 152 /*
 153  * Path through the scheduler hierarchy used by the scheduler enqueue
 154  * operation to identify the destination queue for the current
 155  * packet. Stored in the field pkt.hash.sched of struct rte_mbuf of
 156  * each packet, typically written by the classification stage and read
 157  * by scheduler enqueue.
 158  */
 159 struct rte_sched_port_hierarchy {
 160         uint16_t queue:2;                /**< Queue ID (0 .. 3) */
 161         uint16_t traffic_class:2;        /**< Traffic class ID (0 .. 3)*/
 162         uint32_t color:2;                /**< Color */
 163         uint16_t unused:10;
 164         uint16_t subport;                /**< Subport ID */
 165         uint32_t pipe;                   /**< Pipe ID */
 166 };
 167
 168 struct rte_sched_grinder {
 169         /* Pipe cache */
 170         uint16_t pcache_qmask[RTE_SCHED_GRINDER_PCACHE_SIZE];
 171         uint32_t pcache_qindex[RTE_SCHED_GRINDER_PCACHE_SIZE];
 172         uint32_t pcache_w;
 173         uint32_t pcache_r;
 174
 175         /* Current pipe */
 176         enum grinder_state state;
 177         uint32_t productive;
 178         uint32_t pindex;
 179         struct rte_sched_subport *subport;
 180         struct rte_sched_pipe *pipe;
 181         struct rte_sched_pipe_profile *pipe_params;
 182
 183         /* TC cache */
 184         uint8_t tccache_qmask[4];
 185         uint32_t tccache_qindex[4];
 186         uint32_t tccache_w;
 187         uint32_t tccache_r;
 188
 189         /* Current TC */
 190         uint32_t tc_index;
 191         struct rte_sched_queue *queue[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 192         struct rte_mbuf **qbase[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 193         uint32_t qindex[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 194         uint16_t qsize;
 195         uint32_t qmask;
 196         uint32_t qpos;
 197         struct rte_mbuf *pkt;
 198
 199         /* WRR */
 200         uint16_t wrr_tokens[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
 201         uint16_t wrr_mask[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
 202         uint8_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
 203 };
 204
 205 struct rte_sched_port {
 206         /* User parameters */
 207         uint32_t n_subports_per_port;
 208         uint32_t n_pipes_per_subport;
 209         uint32_t rate;
 210         uint32_t mtu;
 211         uint32_t frame_overhead;
 212         uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 213         uint32_t n_pipe_profiles;
 214         uint32_t pipe_tc3_rate_max;
 215 #ifdef RTE_SCHED_RED
 216         struct rte_red_config red_config[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][e_RTE_METER_COLORS];
 217 #endif
 218
 219         /* Timing */
 220         uint64_t time_cpu_cycles;     /* Current CPU time measured in CPU cyles */
 221         uint64_t time_cpu_bytes;      /* Current CPU time measured in bytes */
 222         uint64_t time;                /* Current NIC TX time measured in bytes */
 223         double cycles_per_byte;       /* CPU cycles per byte */
 224
 225         /* Scheduling loop detection */
 226         uint32_t pipe_loop;
 227         uint32_t pipe_exhaustion;
 228
 229         /* Bitmap */
 230         struct rte_bitmap *bmp;
 231         uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16;
 232
 233         /* Grinders */
 234         struct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS];
 235         uint32_t busy_grinders;
 236         struct rte_mbuf **pkts_out;
 237         uint32_t n_pkts_out;
 238
 239         /* Queue base calculation */
 240         uint32_t qsize_add[RTE_SCHED_QUEUES_PER_PIPE];
 241         uint32_t qsize_sum;
 242
 243         /* Large data structures */
 244         struct rte_sched_subport *subport;
 245         struct rte_sched_pipe *pipe;
 246         struct rte_sched_queue *queue;
 247         struct rte_sched_queue_extra *queue_extra;
 248         struct rte_sched_pipe_profile *pipe_profiles;
 249         uint8_t *bmp_array;
 250         struct rte_mbuf **queue_array;
 251         uint8_t memory[0] __rte_cache_aligned;
 252 } __rte_cache_aligned;
 253
 254 enum rte_sched_port_array {
 255         e_RTE_SCHED_PORT_ARRAY_SUBPORT = 0,
 256         e_RTE_SCHED_PORT_ARRAY_PIPE,
 257         e_RTE_SCHED_PORT_ARRAY_QUEUE,
 258         e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA,
 259         e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES,
 260         e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY,
 261         e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY,
 262         e_RTE_SCHED_PORT_ARRAY_TOTAL,
 263 };
 264
 265 #ifdef RTE_SCHED_COLLECT_STATS
 266
 267 static inline uint32_t
 268 rte_sched_port_queues_per_subport(struct rte_sched_port *port)
 269 {
 270         return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport;
 271 }
 272
 273 #endif
 274
 275 static inline uint32_t
 276 rte_sched_port_queues_per_port(struct rte_sched_port *port)
 277 {
 278         return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport * port->n_subports_per_port;
 279 }
 280
 281 static inline struct rte_mbuf **
 282 rte_sched_port_qbase(struct rte_sched_port *port, uint32_t qindex)
 283 {
 284         uint32_t pindex = qindex >> 4;
 285         uint32_t qpos = qindex & 0xF;
 286
 287         return (port->queue_array + pindex *
 288                 port->qsize_sum + port->qsize_add[qpos]);
 289 }
 290
 291 static inline uint16_t
 292 rte_sched_port_qsize(struct rte_sched_port *port, uint32_t qindex)
 293 {
 294         uint32_t tc = (qindex >> 2) & 0x3;
 295
 296         return port->qsize[tc];
 297 }
 298
 299 static int
 300 rte_sched_port_check_params(struct rte_sched_port_params *params)
 301 {
 302         uint32_t i, j;
 303
 304         if (params == NULL)
 305                 return -1;
 306
 307         /* socket */
 308         if ((params->socket < 0) || (params->socket >= RTE_MAX_NUMA_NODES))
 309                 return -3;
 310
 311         /* rate */
 312         if (params->rate == 0)
 313                 return -4;
 314
 315         /* mtu */
 316         if (params->mtu == 0)
 317                 return -5;
 318
 319         /* n_subports_per_port: non-zero, limited to 16 bits, power of 2 */
 320         if (params->n_subports_per_port == 0 ||
 321             params->n_subports_per_port > 1u << 16 ||
 322             !rte_is_power_of_2(params->n_subports_per_port))
 323                 return -6;
 324
 325         /* n_pipes_per_subport: non-zero, power of 2 */
 326         if (params->n_pipes_per_subport == 0 ||
 327             !rte_is_power_of_2(params->n_pipes_per_subport))
 328                 return -7;
 329
 330         /* qsize: non-zero, power of 2,
 331          * no bigger than 32K (due to 16-bit read/write pointers)
 332          */
 333         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 334                 uint16_t qsize = params->qsize[i];
 335
 336                 if (qsize == 0 || !rte_is_power_of_2(qsize))
 337                         return -8;
 338         }
 339
 340         /* pipe_profiles and n_pipe_profiles */
 341         if (params->pipe_profiles == NULL ||
 342             params->n_pipe_profiles == 0 ||
 343             params->n_pipe_profiles > RTE_SCHED_PIPE_PROFILES_PER_PORT)
 344                 return -9;
 345
 346         for (i = 0; i < params->n_pipe_profiles; i++) {
 347                 struct rte_sched_pipe_params *p = params->pipe_profiles + i;
 348
 349                 /* TB rate: non-zero, not greater than port rate */
 350                 if (p->tb_rate == 0 || p->tb_rate > params->rate)
 351                         return -10;
 352
 353                 /* TB size: non-zero */
 354                 if (p->tb_size == 0)
 355                         return -11;
 356
 357                 /* TC rate: non-zero, less than pipe rate */
 358                 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++) {
 359                         if (p->tc_rate[j] == 0 || p->tc_rate[j] > p->tb_rate)
 360                                 return -12;
 361                 }
 362
 363                 /* TC period: non-zero */
 364                 if (p->tc_period == 0)
 365                         return -13;
 366
 367 #ifdef RTE_SCHED_SUBPORT_TC_OV
 368                 /* TC3 oversubscription weight: non-zero */
 369                 if (p->tc_ov_weight == 0)
 370                         return -14;
 371 #endif
 372
 373                 /* Queue WRR weights: non-zero */
 374                 for (j = 0; j < RTE_SCHED_QUEUES_PER_PIPE; j++) {
 375                         if (p->wrr_weights[j] == 0)
 376                                 return -15;
 377                 }
 378         }
 379
 380         return 0;
 381 }
 382
 383 static uint32_t
 384 rte_sched_port_get_array_base(struct rte_sched_port_params *params, enum rte_sched_port_array array)
 385 {
 386         uint32_t n_subports_per_port = params->n_subports_per_port;
 387         uint32_t n_pipes_per_subport = params->n_pipes_per_subport;
 388         uint32_t n_pipes_per_port = n_pipes_per_subport * n_subports_per_port;
 389         uint32_t n_queues_per_port = RTE_SCHED_QUEUES_PER_PIPE * n_pipes_per_subport * n_subports_per_port;
 390
 391         uint32_t size_subport = n_subports_per_port * sizeof(struct rte_sched_subport);
 392         uint32_t size_pipe = n_pipes_per_port * sizeof(struct rte_sched_pipe);
 393         uint32_t size_queue = n_queues_per_port * sizeof(struct rte_sched_queue);
 394         uint32_t size_queue_extra
 395                 = n_queues_per_port * sizeof(struct rte_sched_queue_extra);
 396         uint32_t size_pipe_profiles
 397                 = RTE_SCHED_PIPE_PROFILES_PER_PORT * sizeof(struct rte_sched_pipe_profile);
 398         uint32_t size_bmp_array = rte_bitmap_get_memory_footprint(n_queues_per_port);
 399         uint32_t size_per_pipe_queue_array, size_queue_array;
 400
 401         uint32_t base, i;
 402
 403         size_per_pipe_queue_array = 0;
 404         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 405                 size_per_pipe_queue_array += RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS
 406                         * params->qsize[i] * sizeof(struct rte_mbuf *);
 407         }
 408         size_queue_array = n_pipes_per_port * size_per_pipe_queue_array;
 409
 410         base = 0;
 411
 412         if (array == e_RTE_SCHED_PORT_ARRAY_SUBPORT)
 413                 return base;
 414         base += RTE_CACHE_LINE_ROUNDUP(size_subport);
 415
 416         if (array == e_RTE_SCHED_PORT_ARRAY_PIPE)
 417                 return base;
 418         base += RTE_CACHE_LINE_ROUNDUP(size_pipe);
 419
 420         if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE)
 421                 return base;
 422         base += RTE_CACHE_LINE_ROUNDUP(size_queue);
 423
 424         if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA)
 425                 return base;
 426         base += RTE_CACHE_LINE_ROUNDUP(size_queue_extra);
 427
 428         if (array == e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES)
 429                 return base;
 430         base += RTE_CACHE_LINE_ROUNDUP(size_pipe_profiles);
 431
 432         if (array == e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY)
 433                 return base;
 434         base += RTE_CACHE_LINE_ROUNDUP(size_bmp_array);
 435
 436         if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY)
 437                 return base;
 438         base += RTE_CACHE_LINE_ROUNDUP(size_queue_array);
 439
 440         return base;
 441 }
 442
 443 uint32_t
 444 rte_sched_port_get_memory_footprint(struct rte_sched_port_params *params)
 445 {
 446         uint32_t size0, size1;
 447         int status;
 448
 449         status = rte_sched_port_check_params(params);
 450         if (status != 0) {
 451                 RTE_LOG(NOTICE, SCHED,
 452                         "Port scheduler params check failed (%d)\n", status);
 453
 454                 return 0;
 455         }
 456
 457         size0 = sizeof(struct rte_sched_port);
 458         size1 = rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_TOTAL);
 459
 460         return size0 + size1;
 461 }
 462
 463 static void
 464 rte_sched_port_config_qsize(struct rte_sched_port *port)
 465 {
 466         /* TC 0 */
 467         port->qsize_add[0] = 0;
 468         port->qsize_add[1] = port->qsize_add[0] + port->qsize[0];
 469         port->qsize_add[2] = port->qsize_add[1] + port->qsize[0];
 470         port->qsize_add[3] = port->qsize_add[2] + port->qsize[0];
 471
 472         /* TC 1 */
 473         port->qsize_add[4] = port->qsize_add[3] + port->qsize[0];
 474         port->qsize_add[5] = port->qsize_add[4] + port->qsize[1];
 475         port->qsize_add[6] = port->qsize_add[5] + port->qsize[1];
 476         port->qsize_add[7] = port->qsize_add[6] + port->qsize[1];
 477
 478         /* TC 2 */
 479         port->qsize_add[8] = port->qsize_add[7] + port->qsize[1];
 480         port->qsize_add[9] = port->qsize_add[8] + port->qsize[2];
 481         port->qsize_add[10] = port->qsize_add[9] + port->qsize[2];
 482         port->qsize_add[11] = port->qsize_add[10] + port->qsize[2];
 483
 484         /* TC 3 */
 485         port->qsize_add[12] = port->qsize_add[11] + port->qsize[2];
 486         port->qsize_add[13] = port->qsize_add[12] + port->qsize[3];
 487         port->qsize_add[14] = port->qsize_add[13] + port->qsize[3];
 488         port->qsize_add[15] = port->qsize_add[14] + port->qsize[3];
 489
 490         port->qsize_sum = port->qsize_add[15] + port->qsize[3];
 491 }
 492
 493 static void
 494 rte_sched_port_log_pipe_profile(struct rte_sched_port *port, uint32_t i)
 495 {
 496         struct rte_sched_pipe_profile *p = port->pipe_profiles + i;
 497
 498         RTE_LOG(DEBUG, SCHED, "Low level config for pipe profile %u:\n"
 499                 "    Token bucket: period = %u, credits per period = %u, size = %u\n"
 500                 "    Traffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
 501                 "    Traffic class 3 oversubscription: weight = %hhu\n"
 502                 "    WRR cost: [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu]\n",
 503                 i,
 504
 505                 /* Token bucket */
 506                 p->tb_period,
 507                 p->tb_credits_per_period,
 508                 p->tb_size,
 509
 510                 /* Traffic classes */
 511                 p->tc_period,
 512                 p->tc_credits_per_period[0],
 513                 p->tc_credits_per_period[1],
 514                 p->tc_credits_per_period[2],
 515                 p->tc_credits_per_period[3],
 516
 517                 /* Traffic class 3 oversubscription */
 518                 p->tc_ov_weight,
 519
 520                 /* WRR */
 521                 p->wrr_cost[ 0], p->wrr_cost[ 1], p->wrr_cost[ 2], p->wrr_cost[ 3],
 522                 p->wrr_cost[ 4], p->wrr_cost[ 5], p->wrr_cost[ 6], p->wrr_cost[ 7],
 523                 p->wrr_cost[ 8], p->wrr_cost[ 9], p->wrr_cost[10], p->wrr_cost[11],
 524                 p->wrr_cost[12], p->wrr_cost[13], p->wrr_cost[14], p->wrr_cost[15]);
 525 }
 526
 527 static inline uint64_t
 528 rte_sched_time_ms_to_bytes(uint32_t time_ms, uint32_t rate)
 529 {
 530         uint64_t time = time_ms;
 531
 532         time = (time * rate) / 1000;
 533
 534         return time;
 535 }
 536
 537 static void
 538 rte_sched_port_config_pipe_profile_table(struct rte_sched_port *port, struct rte_sched_port_params *params)
 539 {
 540         uint32_t i, j;
 541
 542         for (i = 0; i < port->n_pipe_profiles; i++) {
 543                 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
 544                 struct rte_sched_pipe_profile *dst = port->pipe_profiles + i;
 545
 546                 /* Token Bucket */
 547                 if (src->tb_rate == params->rate) {
 548                         dst->tb_credits_per_period = 1;
 549                         dst->tb_period = 1;
 550                 } else {
 551                         double tb_rate = (double) src->tb_rate
 552                                 / (double) params->rate;
 553                         double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
 554
 555                         rte_approx(tb_rate, d,
 556                                    &dst->tb_credits_per_period, &dst->tb_period);
 557                 }
 558                 dst->tb_size = src->tb_size;
 559
 560                 /* Traffic Classes */
 561                 dst->tc_period = rte_sched_time_ms_to_bytes(src->tc_period,
 562                                                             params->rate);
 563
 564                 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++)
 565                         dst->tc_credits_per_period[j]
 566                                 = rte_sched_time_ms_to_bytes(src->tc_period,
 567                                                              src->tc_rate[j]);
 568
 569 #ifdef RTE_SCHED_SUBPORT_TC_OV
 570                 dst->tc_ov_weight = src->tc_ov_weight;
 571 #endif
 572
 573                 /* WRR */
 574                 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++) {
 575                         uint32_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
 576                         uint32_t lcd, lcd1, lcd2;
 577                         uint32_t qindex;
 578
 579                         qindex = j * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS;
 580
 581                         wrr_cost[0] = src->wrr_weights[qindex];
 582                         wrr_cost[1] = src->wrr_weights[qindex + 1];
 583                         wrr_cost[2] = src->wrr_weights[qindex + 2];
 584                         wrr_cost[3] = src->wrr_weights[qindex + 3];
 585
 586                         lcd1 = rte_get_lcd(wrr_cost[0], wrr_cost[1]);
 587                         lcd2 = rte_get_lcd(wrr_cost[2], wrr_cost[3]);
 588                         lcd = rte_get_lcd(lcd1, lcd2);
 589
 590                         wrr_cost[0] = lcd / wrr_cost[0];
 591                         wrr_cost[1] = lcd / wrr_cost[1];
 592                         wrr_cost[2] = lcd / wrr_cost[2];
 593                         wrr_cost[3] = lcd / wrr_cost[3];
 594
 595                         dst->wrr_cost[qindex] = (uint8_t) wrr_cost[0];
 596                         dst->wrr_cost[qindex + 1] = (uint8_t) wrr_cost[1];
 597                         dst->wrr_cost[qindex + 2] = (uint8_t) wrr_cost[2];
 598                         dst->wrr_cost[qindex + 3] = (uint8_t) wrr_cost[3];
 599                 }
 600
 601                 rte_sched_port_log_pipe_profile(port, i);
 602         }
 603
 604         port->pipe_tc3_rate_max = 0;
 605         for (i = 0; i < port->n_pipe_profiles; i++) {
 606                 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
 607                 uint32_t pipe_tc3_rate = src->tc_rate[3];
 608
 609                 if (port->pipe_tc3_rate_max < pipe_tc3_rate)
 610                         port->pipe_tc3_rate_max = pipe_tc3_rate;
 611         }
 612 }
 613
 614 struct rte_sched_port *
 615 rte_sched_port_config(struct rte_sched_port_params *params)
 616 {
 617         struct rte_sched_port *port = NULL;
 618         uint32_t mem_size, bmp_mem_size, n_queues_per_port, i;
 619
 620         /* Check user parameters. Determine the amount of memory to allocate */
 621         mem_size = rte_sched_port_get_memory_footprint(params);
 622         if (mem_size == 0)
 623                 return NULL;
 624
 625         /* Allocate memory to store the data structures */
 626         port = rte_zmalloc("qos_params", mem_size, RTE_CACHE_LINE_SIZE);
 627         if (port == NULL)
 628                 return NULL;
 629
 630         /* compile time checks */
 631         RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS == 0);
 632         RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS & (RTE_SCHED_PORT_N_GRINDERS - 1));
 633
 634         /* User parameters */
 635         port->n_subports_per_port = params->n_subports_per_port;
 636         port->n_pipes_per_subport = params->n_pipes_per_subport;
 637         port->rate = params->rate;
 638         port->mtu = params->mtu + params->frame_overhead;
 639         port->frame_overhead = params->frame_overhead;
 640         memcpy(port->qsize, params->qsize, sizeof(params->qsize));
 641         port->n_pipe_profiles = params->n_pipe_profiles;
 642
 643 #ifdef RTE_SCHED_RED
 644         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 645                 uint32_t j;
 646
 647                 for (j = 0; j < e_RTE_METER_COLORS; j++) {
 648                         /* if min/max are both zero, then RED is disabled */
 649                         if ((params->red_params[i][j].min_th |
 650                              params->red_params[i][j].max_th) == 0) {
 651                                 continue;
 652                         }
 653
 654                         if (rte_red_config_init(&port->red_config[i][j],
 655                                 params->red_params[i][j].wq_log2,
 656                                 params->red_params[i][j].min_th,
 657                                 params->red_params[i][j].max_th,
 658                                 params->red_params[i][j].maxp_inv) != 0) {
 659                                 return NULL;
 660                         }
 661                 }
 662         }
 663 #endif
 664
 665         /* Timing */
 666         port->time_cpu_cycles = rte_get_tsc_cycles();
 667         port->time_cpu_bytes = 0;
 668         port->time = 0;
 669         port->cycles_per_byte = ((double) rte_get_tsc_hz()) / ((double) params->rate);
 670
 671         /* Scheduling loop detection */
 672         port->pipe_loop = RTE_SCHED_PIPE_INVALID;
 673         port->pipe_exhaustion = 0;
 674
 675         /* Grinders */
 676         port->busy_grinders = 0;
 677         port->pkts_out = NULL;
 678         port->n_pkts_out = 0;
 679
 680         /* Queue base calculation */
 681         rte_sched_port_config_qsize(port);
 682
 683         /* Large data structures */
 684         port->subport = (struct rte_sched_subport *)
 685                 (port->memory + rte_sched_port_get_array_base(params,
 686                                                               e_RTE_SCHED_PORT_ARRAY_SUBPORT));
 687         port->pipe = (struct rte_sched_pipe *)
 688                 (port->memory + rte_sched_port_get_array_base(params,
 689                                                               e_RTE_SCHED_PORT_ARRAY_PIPE));
 690         port->queue = (struct rte_sched_queue *)
 691                 (port->memory + rte_sched_port_get_array_base(params,
 692                                                               e_RTE_SCHED_PORT_ARRAY_QUEUE));
 693         port->queue_extra = (struct rte_sched_queue_extra *)
 694                 (port->memory + rte_sched_port_get_array_base(params,
 695                                                               e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA));
 696         port->pipe_profiles = (struct rte_sched_pipe_profile *)
 697                 (port->memory + rte_sched_port_get_array_base(params,
 698                                                               e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES));
 699         port->bmp_array =  port->memory
 700                 + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY);
 701         port->queue_array = (struct rte_mbuf **)
 702                 (port->memory + rte_sched_port_get_array_base(params,
 703                                                               e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY));
 704
 705         /* Pipe profile table */
 706         rte_sched_port_config_pipe_profile_table(port, params);
 707
 708         /* Bitmap */
 709         n_queues_per_port = rte_sched_port_queues_per_port(port);
 710         bmp_mem_size = rte_bitmap_get_memory_footprint(n_queues_per_port);
 711         port->bmp = rte_bitmap_init(n_queues_per_port, port->bmp_array,
 712                                     bmp_mem_size);
 713         if (port->bmp == NULL) {
 714                 RTE_LOG(ERR, SCHED, "Bitmap init error\n");
 715                 return NULL;
 716         }
 717
 718         for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i++)
 719                 port->grinder_base_bmp_pos[i] = RTE_SCHED_PIPE_INVALID;
 720
 721
 722         return port;
 723 }
 724
 725 void
 726 rte_sched_port_free(struct rte_sched_port *port)
 727 {
 728         unsigned int queue;
 729
 730         /* Check user parameters */
 731         if (port == NULL)
 732                 return;
 733
 734         /* Free enqueued mbufs */
 735         for (queue = 0; queue < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; queue++) {
 736                 struct rte_mbuf **mbufs = rte_sched_port_qbase(port, queue);
 737                 unsigned int i;
 738
 739                 for (i = 0; i < rte_sched_port_qsize(port, queue); i++)
 740                         rte_pktmbuf_free(mbufs[i]);
 741         }
 742
 743         rte_bitmap_free(port->bmp);
 744         rte_free(port);
 745 }
 746
 747 static void
 748 rte_sched_port_log_subport_config(struct rte_sched_port *port, uint32_t i)
 749 {
 750         struct rte_sched_subport *s = port->subport + i;
 751
 752         RTE_LOG(DEBUG, SCHED, "Low level config for subport %u:\n"
 753                 "    Token bucket: period = %u, credits per period = %u, size = %u\n"
 754                 "    Traffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
 755                 "    Traffic class 3 oversubscription: wm min = %u, wm max = %u\n",
 756                 i,
 757
 758                 /* Token bucket */
 759                 s->tb_period,
 760                 s->tb_credits_per_period,
 761                 s->tb_size,
 762
 763                 /* Traffic classes */
 764                 s->tc_period,
 765                 s->tc_credits_per_period[0],
 766                 s->tc_credits_per_period[1],
 767                 s->tc_credits_per_period[2],
 768                 s->tc_credits_per_period[3],
 769
 770                 /* Traffic class 3 oversubscription */
 771                 s->tc_ov_wm_min,
 772                 s->tc_ov_wm_max);
 773 }
 774
 775 int
 776 rte_sched_subport_config(struct rte_sched_port *port,
 777         uint32_t subport_id,
 778         struct rte_sched_subport_params *params)
 779 {
 780         struct rte_sched_subport *s;
 781         uint32_t i;
 782
 783         /* Check user parameters */
 784         if (port == NULL ||
 785             subport_id >= port->n_subports_per_port ||
 786             params == NULL)
 787                 return -1;
 788
 789         if (params->tb_rate == 0 || params->tb_rate > port->rate)
 790                 return -2;
 791
 792         if (params->tb_size == 0)
 793                 return -3;
 794
 795         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 796                 if (params->tc_rate[i] == 0 ||
 797                     params->tc_rate[i] > params->tb_rate)
 798                         return -4;
 799         }
 800
 801         if (params->tc_period == 0)
 802                 return -5;
 803
 804         s = port->subport + subport_id;
 805
 806         /* Token Bucket (TB) */
 807         if (params->tb_rate == port->rate) {
 808                 s->tb_credits_per_period = 1;
 809                 s->tb_period = 1;
 810         } else {
 811                 double tb_rate = ((double) params->tb_rate) / ((double) port->rate);
 812                 double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
 813
 814                 rte_approx(tb_rate, d, &s->tb_credits_per_period, &s->tb_period);
 815         }
 816
 817         s->tb_size = params->tb_size;
 818         s->tb_time = port->time;
 819         s->tb_credits = s->tb_size / 2;
 820
 821         /* Traffic Classes (TCs) */
 822         s->tc_period = rte_sched_time_ms_to_bytes(params->tc_period, port->rate);
 823         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 824                 s->tc_credits_per_period[i]
 825                         = rte_sched_time_ms_to_bytes(params->tc_period,
 826                                                      params->tc_rate[i]);
 827         }
 828         s->tc_time = port->time + s->tc_period;
 829         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
 830                 s->tc_credits[i] = s->tc_credits_per_period[i];
 831
 832 #ifdef RTE_SCHED_SUBPORT_TC_OV
 833         /* TC oversubscription */
 834         s->tc_ov_wm_min = port->mtu;
 835         s->tc_ov_wm_max = rte_sched_time_ms_to_bytes(params->tc_period,
 836                                                      port->pipe_tc3_rate_max);
 837         s->tc_ov_wm = s->tc_ov_wm_max;
 838         s->tc_ov_period_id = 0;
 839         s->tc_ov = 0;
 840         s->tc_ov_n = 0;
 841         s->tc_ov_rate = 0;
 842 #endif
 843
 844         rte_sched_port_log_subport_config(port, subport_id);
 845
 846         return 0;
 847 }
 848
 849 int
 850 rte_sched_pipe_config(struct rte_sched_port *port,
 851         uint32_t subport_id,
 852         uint32_t pipe_id,
 853         int32_t pipe_profile)
 854 {
 855         struct rte_sched_subport *s;
 856         struct rte_sched_pipe *p;
 857         struct rte_sched_pipe_profile *params;
 858         uint32_t deactivate, profile, i;
 859
 860         /* Check user parameters */
 861         profile = (uint32_t) pipe_profile;
 862         deactivate = (pipe_profile < 0);
 863
 864         if (port == NULL ||
 865             subport_id >= port->n_subports_per_port ||
 866             pipe_id >= port->n_pipes_per_subport ||
 867             (!deactivate && profile >= port->n_pipe_profiles))
 868                 return -1;
 869
 870
 871         /* Check that subport configuration is valid */
 872         s = port->subport + subport_id;
 873         if (s->tb_period == 0)
 874                 return -2;
 875
 876         p = port->pipe + (subport_id * port->n_pipes_per_subport + pipe_id);
 877
 878         /* Handle the case when pipe already has a valid configuration */
 879         if (p->tb_time) {
 880                 params = port->pipe_profiles + p->profile;
 881
 882 #ifdef RTE_SCHED_SUBPORT_TC_OV
 883                 double subport_tc3_rate = (double) s->tc_credits_per_period[3]
 884                         / (double) s->tc_period;
 885                 double pipe_tc3_rate = (double) params->tc_credits_per_period[3]
 886                         / (double) params->tc_period;
 887                 uint32_t tc3_ov = s->tc_ov;
 888
 889                 /* Unplug pipe from its subport */
 890                 s->tc_ov_n -= params->tc_ov_weight;
 891                 s->tc_ov_rate -= pipe_tc3_rate;
 892                 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
 893
 894                 if (s->tc_ov != tc3_ov) {
 895                         RTE_LOG(DEBUG, SCHED,
 896                                 "Subport %u TC3 oversubscription is OFF (%.4lf >= %.4lf)\n",
 897                                 subport_id, subport_tc3_rate, s->tc_ov_rate);
 898                 }
 899 #endif
 900
 901                 /* Reset the pipe */
 902                 memset(p, 0, sizeof(struct rte_sched_pipe));
 903         }
 904
 905         if (deactivate)
 906                 return 0;
 907
 908         /* Apply the new pipe configuration */
 909         p->profile = profile;
 910         params = port->pipe_profiles + p->profile;
 911
 912         /* Token Bucket (TB) */
 913         p->tb_time = port->time;
 914         p->tb_credits = params->tb_size / 2;
 915
 916         /* Traffic Classes (TCs) */
 917         p->tc_time = port->time + params->tc_period;
 918         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
 919                 p->tc_credits[i] = params->tc_credits_per_period[i];
 920
 921 #ifdef RTE_SCHED_SUBPORT_TC_OV
 922         {
 923                 /* Subport TC3 oversubscription */
 924                 double subport_tc3_rate = (double) s->tc_credits_per_period[3]
 925                         / (double) s->tc_period;
 926                 double pipe_tc3_rate = (double) params->tc_credits_per_period[3]
 927                         / (double) params->tc_period;
 928                 uint32_t tc3_ov = s->tc_ov;
 929
 930                 s->tc_ov_n += params->tc_ov_weight;
 931                 s->tc_ov_rate += pipe_tc3_rate;
 932                 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
 933
 934                 if (s->tc_ov != tc3_ov) {
 935                         RTE_LOG(DEBUG, SCHED,
 936                                 "Subport %u TC3 oversubscription is ON (%.4lf < %.4lf)\n",
 937                                 subport_id, subport_tc3_rate, s->tc_ov_rate);
 938                 }
 939                 p->tc_ov_period_id = s->tc_ov_period_id;
 940                 p->tc_ov_credits = s->tc_ov_wm;
 941         }
 942 #endif
 943
 944         return 0;
 945 }
 946
 947 void
 948 rte_sched_port_pkt_write(struct rte_mbuf *pkt,
 949                          uint32_t subport, uint32_t pipe, uint32_t traffic_class,
 950                          uint32_t queue, enum rte_meter_color color)
 951 {
 952         struct rte_sched_port_hierarchy *sched
 953                 = (struct rte_sched_port_hierarchy *) &pkt->hash.sched;
 954
 955         RTE_BUILD_BUG_ON(sizeof(*sched) > sizeof(pkt->hash.sched));
 956
 957         sched->color = (uint32_t) color;
 958         sched->subport = subport;
 959         sched->pipe = pipe;
 960         sched->traffic_class = traffic_class;
 961         sched->queue = queue;
 962 }
 963
 964 void
 965 rte_sched_port_pkt_read_tree_path(const struct rte_mbuf *pkt,
 966                                   uint32_t *subport, uint32_t *pipe,
 967                                   uint32_t *traffic_class, uint32_t *queue)
 968 {
 969         const struct rte_sched_port_hierarchy *sched
 970                 = (const struct rte_sched_port_hierarchy *) &pkt->hash.sched;
 971
 972         *subport = sched->subport;
 973         *pipe = sched->pipe;
 974         *traffic_class = sched->traffic_class;
 975         *queue = sched->queue;
 976 }
 977
 978 enum rte_meter_color
 979 rte_sched_port_pkt_read_color(const struct rte_mbuf *pkt)
 980 {
 981         const struct rte_sched_port_hierarchy *sched
 982                 = (const struct rte_sched_port_hierarchy *) &pkt->hash.sched;
 983
 984         return (enum rte_meter_color) sched->color;
 985 }
 986
 987 int
 988 rte_sched_subport_read_stats(struct rte_sched_port *port,
 989                              uint32_t subport_id,
 990                              struct rte_sched_subport_stats *stats,
 991                              uint32_t *tc_ov)
 992 {
 993         struct rte_sched_subport *s;
 994
 995         /* Check user parameters */
 996         if (port == NULL || subport_id >= port->n_subports_per_port ||
 997             stats == NULL || tc_ov == NULL)
 998                 return -1;
 999
1000         s = port->subport + subport_id;
1001
1002         /* Copy subport stats and clear */
1003         memcpy(stats, &s->stats, sizeof(struct rte_sched_subport_stats));
1004         memset(&s->stats, 0, sizeof(struct rte_sched_subport_stats));
1005
1006         /* Subport TC ovesubscription status */
1007         *tc_ov = s->tc_ov;
1008
1009         return 0;
1010 }
1011
1012 int
1013 rte_sched_queue_read_stats(struct rte_sched_port *port,
1014         uint32_t queue_id,
1015         struct rte_sched_queue_stats *stats,
1016         uint16_t *qlen)
1017 {
1018         struct rte_sched_queue *q;
1019         struct rte_sched_queue_extra *qe;
1020
1021         /* Check user parameters */
1022         if ((port == NULL) ||
1023             (queue_id >= rte_sched_port_queues_per_port(port)) ||
1024                 (stats == NULL) ||
1025                 (qlen == NULL)) {
1026                 return -1;
1027         }
1028         q = port->queue + queue_id;
1029         qe = port->queue_extra + queue_id;
1030
1031         /* Copy queue stats and clear */
1032         memcpy(stats, &qe->stats, sizeof(struct rte_sched_queue_stats));
1033         memset(&qe->stats, 0, sizeof(struct rte_sched_queue_stats));
1034
1035         /* Queue length */
1036         *qlen = q->qw - q->qr;
1037
1038         return 0;
1039 }
1040
1041 static inline uint32_t
1042 rte_sched_port_qindex(struct rte_sched_port *port, uint32_t subport, uint32_t pipe, uint32_t traffic_class, uint32_t queue)
1043 {
1044         uint32_t result;
1045
1046         result = subport * port->n_pipes_per_subport + pipe;
1047         result = result * RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE + traffic_class;
1048         result = result * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS + queue;
1049
1050         return result;
1051 }
1052
1053 #ifdef RTE_SCHED_DEBUG
1054
1055 static inline int
1056 rte_sched_port_queue_is_empty(struct rte_sched_port *port, uint32_t qindex)
1057 {
1058         struct rte_sched_queue *queue = port->queue + qindex;
1059
1060         return queue->qr == queue->qw;
1061 }
1062
1063 #endif /* RTE_SCHED_DEBUG */
1064
1065 #ifdef RTE_SCHED_COLLECT_STATS
1066
1067 static inline void
1068 rte_sched_port_update_subport_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1069 {
1070         struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1071         uint32_t tc_index = (qindex >> 2) & 0x3;
1072         uint32_t pkt_len = pkt->pkt_len;
1073
1074         s->stats.n_pkts_tc[tc_index] += 1;
1075         s->stats.n_bytes_tc[tc_index] += pkt_len;
1076 }
1077
1078 static inline void
1079 rte_sched_port_update_subport_stats_on_drop(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1080 {
1081         struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1082         uint32_t tc_index = (qindex >> 2) & 0x3;
1083         uint32_t pkt_len = pkt->pkt_len;
1084
1085         s->stats.n_pkts_tc_dropped[tc_index] += 1;
1086         s->stats.n_bytes_tc_dropped[tc_index] += pkt_len;
1087 }
1088
1089 static inline void
1090 rte_sched_port_update_queue_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1091 {
1092         struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1093         uint32_t pkt_len = pkt->pkt_len;
1094
1095         qe->stats.n_pkts += 1;
1096         qe->stats.n_bytes += pkt_len;
1097 }
1098
1099 static inline void
1100 rte_sched_port_update_queue_stats_on_drop(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1101 {
1102         struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1103         uint32_t pkt_len = pkt->pkt_len;
1104
1105         qe->stats.n_pkts_dropped += 1;
1106         qe->stats.n_bytes_dropped += pkt_len;
1107 }
1108
1109 #endif /* RTE_SCHED_COLLECT_STATS */
1110
1111 #ifdef RTE_SCHED_RED
1112
1113 static inline int
1114 rte_sched_port_red_drop(struct rte_sched_port *port, struct rte_mbuf *pkt, uint32_t qindex, uint16_t qlen)
1115 {
1116         struct rte_sched_queue_extra *qe;
1117         struct rte_red_config *red_cfg;
1118         struct rte_red *red;
1119         uint32_t tc_index;
1120         enum rte_meter_color color;
1121
1122         tc_index = (qindex >> 2) & 0x3;
1123         color = rte_sched_port_pkt_read_color(pkt);
1124         red_cfg = &port->red_config[tc_index][color];
1125
1126         if ((red_cfg->min_th | red_cfg->max_th) == 0)
1127                 return 0;
1128
1129         qe = port->queue_extra + qindex;
1130         red = &qe->red;
1131
1132         return rte_red_enqueue(red_cfg, red, qlen, port->time);
1133 }
1134
1135 static inline void
1136 rte_sched_port_set_queue_empty_timestamp(struct rte_sched_port *port, uint32_t qindex)
1137 {
1138         struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1139         struct rte_red *red = &qe->red;
1140
1141         rte_red_mark_queue_empty(red, port->time);
1142 }
1143
1144 #else
1145
1146 #define rte_sched_port_red_drop(port, pkt, qindex, qlen)             0
1147
1148 #define rte_sched_port_set_queue_empty_timestamp(port, qindex)
1149
1150 #endif /* RTE_SCHED_RED */
1151
1152 #ifdef RTE_SCHED_DEBUG
1153
1154 static inline void
1155 debug_check_queue_slab(struct rte_sched_port *port, uint32_t bmp_pos,
1156                        uint64_t bmp_slab)
1157 {
1158         uint64_t mask;
1159         uint32_t i, panic;
1160
1161         if (bmp_slab == 0)
1162                 rte_panic("Empty slab at position %u\n", bmp_pos);
1163
1164         panic = 0;
1165         for (i = 0, mask = 1; i < 64; i++, mask <<= 1) {
1166                 if (mask & bmp_slab) {
1167                         if (rte_sched_port_queue_is_empty(port, bmp_pos + i)) {
1168                                 printf("Queue %u (slab offset %u) is empty\n", bmp_pos + i, i);
1169                                 panic = 1;
1170                         }
1171                 }
1172         }
1173
1174         if (panic)
1175                 rte_panic("Empty queues in slab 0x%" PRIx64 "starting at position %u\n",
1176                         bmp_slab, bmp_pos);
1177 }
1178
1179 #endif /* RTE_SCHED_DEBUG */
1180
1181 static inline uint32_t
1182 rte_sched_port_enqueue_qptrs_prefetch0(struct rte_sched_port *port,
1183                                        struct rte_mbuf *pkt)
1184 {
1185         struct rte_sched_queue *q;
1186 #ifdef RTE_SCHED_COLLECT_STATS
1187         struct rte_sched_queue_extra *qe;
1188 #endif
1189         uint32_t subport, pipe, traffic_class, queue, qindex;
1190
1191         rte_sched_port_pkt_read_tree_path(pkt, &subport, &pipe, &traffic_class, &queue);
1192
1193         qindex = rte_sched_port_qindex(port, subport, pipe, traffic_class, queue);
1194         q = port->queue + qindex;
1195         rte_prefetch0(q);
1196 #ifdef RTE_SCHED_COLLECT_STATS
1197         qe = port->queue_extra + qindex;
1198         rte_prefetch0(qe);
1199 #endif
1200
1201         return qindex;
1202 }
1203
1204 static inline void
1205 rte_sched_port_enqueue_qwa_prefetch0(struct rte_sched_port *port,
1206                                      uint32_t qindex, struct rte_mbuf **qbase)
1207 {
1208         struct rte_sched_queue *q;
1209         struct rte_mbuf **q_qw;
1210         uint16_t qsize;
1211
1212         q = port->queue + qindex;
1213         qsize = rte_sched_port_qsize(port, qindex);
1214         q_qw = qbase + (q->qw & (qsize - 1));
1215
1216         rte_prefetch0(q_qw);
1217         rte_bitmap_prefetch0(port->bmp, qindex);
1218 }
1219
1220 static inline int
1221 rte_sched_port_enqueue_qwa(struct rte_sched_port *port, uint32_t qindex,
1222                            struct rte_mbuf **qbase, struct rte_mbuf *pkt)
1223 {
1224         struct rte_sched_queue *q;
1225         uint16_t qsize;
1226         uint16_t qlen;
1227
1228         q = port->queue + qindex;
1229         qsize = rte_sched_port_qsize(port, qindex);
1230         qlen = q->qw - q->qr;
1231
1232         /* Drop the packet (and update drop stats) when queue is full */
1233         if (unlikely(rte_sched_port_red_drop(port, pkt, qindex, qlen) ||
1234                      (qlen >= qsize))) {
1235                 rte_pktmbuf_free(pkt);
1236 #ifdef RTE_SCHED_COLLECT_STATS
1237                 rte_sched_port_update_subport_stats_on_drop(port, qindex, pkt);
1238                 rte_sched_port_update_queue_stats_on_drop(port, qindex, pkt);
1239 #endif
1240                 return 0;
1241         }
1242
1243         /* Enqueue packet */
1244         qbase[q->qw & (qsize - 1)] = pkt;
1245         q->qw++;
1246
1247         /* Activate queue in the port bitmap */
1248         rte_bitmap_set(port->bmp, qindex);
1249
1250         /* Statistics */
1251 #ifdef RTE_SCHED_COLLECT_STATS
1252         rte_sched_port_update_subport_stats(port, qindex, pkt);
1253         rte_sched_port_update_queue_stats(port, qindex, pkt);
1254 #endif
1255
1256         return 1;
1257 }
1258
1259
1260 /*
1261  * The enqueue function implements a 4-level pipeline with each stage
1262  * processing two different packets. The purpose of using a pipeline
1263  * is to hide the latency of prefetching the data structures. The
1264  * naming convention is presented in the diagram below:
1265  *
1266  *   p00  _______   p10  _______   p20  _______   p30  _______
1267  * ----->|       |----->|       |----->|       |----->|       |----->
1268  *       |   0   |      |   1   |      |   2   |      |   3   |
1269  * ----->|_______|----->|_______|----->|_______|----->|_______|----->
1270  *   p01            p11            p21            p31
1271  *
1272  */
1273 int
1274 rte_sched_port_enqueue(struct rte_sched_port *port, struct rte_mbuf **pkts,
1275                        uint32_t n_pkts)
1276 {
1277         struct rte_mbuf *pkt00, *pkt01, *pkt10, *pkt11, *pkt20, *pkt21,
1278                 *pkt30, *pkt31, *pkt_last;
1279         struct rte_mbuf **q00_base, **q01_base, **q10_base, **q11_base,
1280                 **q20_base, **q21_base, **q30_base, **q31_base, **q_last_base;
1281         uint32_t q00, q01, q10, q11, q20, q21, q30, q31, q_last;
1282         uint32_t r00, r01, r10, r11, r20, r21, r30, r31, r_last;
1283         uint32_t result, i;
1284
1285         result = 0;
1286
1287         /*
1288          * Less then 6 input packets available, which is not enough to
1289          * feed the pipeline
1290          */
1291         if (unlikely(n_pkts < 6)) {
1292                 struct rte_mbuf **q_base[5];
1293                 uint32_t q[5];
1294
1295                 /* Prefetch the mbuf structure of each packet */
1296                 for (i = 0; i < n_pkts; i++)
1297                         rte_prefetch0(pkts[i]);
1298
1299                 /* Prefetch the queue structure for each queue */
1300                 for (i = 0; i < n_pkts; i++)
1301                         q[i] = rte_sched_port_enqueue_qptrs_prefetch0(port,
1302                                                                       pkts[i]);
1303
1304                 /* Prefetch the write pointer location of each queue */
1305                 for (i = 0; i < n_pkts; i++) {
1306                         q_base[i] = rte_sched_port_qbase(port, q[i]);
1307                         rte_sched_port_enqueue_qwa_prefetch0(port, q[i],
1308                                                              q_base[i]);
1309                 }
1310
1311                 /* Write each packet to its queue */
1312                 for (i = 0; i < n_pkts; i++)
1313                         result += rte_sched_port_enqueue_qwa(port, q[i],
1314                                                              q_base[i], pkts[i]);
1315
1316                 return result;
1317         }
1318
1319         /* Feed the first 3 stages of the pipeline (6 packets needed) */
1320         pkt20 = pkts[0];
1321         pkt21 = pkts[1];
1322         rte_prefetch0(pkt20);
1323         rte_prefetch0(pkt21);
1324
1325         pkt10 = pkts[2];
1326         pkt11 = pkts[3];
1327         rte_prefetch0(pkt10);
1328         rte_prefetch0(pkt11);
1329
1330         q20 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt20);
1331         q21 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt21);
1332
1333         pkt00 = pkts[4];
1334         pkt01 = pkts[5];
1335         rte_prefetch0(pkt00);
1336         rte_prefetch0(pkt01);
1337
1338         q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1339         q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1340
1341         q20_base = rte_sched_port_qbase(port, q20);
1342         q21_base = rte_sched_port_qbase(port, q21);
1343         rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1344         rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1345
1346         /* Run the pipeline */
1347         for (i = 6; i < (n_pkts & (~1)); i += 2) {
1348                 /* Propagate stage inputs */
1349                 pkt30 = pkt20;
1350                 pkt31 = pkt21;
1351                 pkt20 = pkt10;
1352                 pkt21 = pkt11;
1353                 pkt10 = pkt00;
1354                 pkt11 = pkt01;
1355                 q30 = q20;
1356                 q31 = q21;
1357                 q20 = q10;
1358                 q21 = q11;
1359                 q30_base = q20_base;
1360                 q31_base = q21_base;
1361
1362                 /* Stage 0: Get packets in */
1363                 pkt00 = pkts[i];
1364                 pkt01 = pkts[i + 1];
1365                 rte_prefetch0(pkt00);
1366                 rte_prefetch0(pkt01);
1367
1368                 /* Stage 1: Prefetch queue structure storing queue pointers */
1369                 q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1370                 q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1371
1372                 /* Stage 2: Prefetch queue write location */
1373                 q20_base = rte_sched_port_qbase(port, q20);
1374                 q21_base = rte_sched_port_qbase(port, q21);
1375                 rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1376                 rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1377
1378                 /* Stage 3: Write packet to queue and activate queue */
1379                 r30 = rte_sched_port_enqueue_qwa(port, q30, q30_base, pkt30);
1380                 r31 = rte_sched_port_enqueue_qwa(port, q31, q31_base, pkt31);
1381                 result += r30 + r31;
1382         }
1383
1384         /*
1385          * Drain the pipeline (exactly 6 packets).
1386          * Handle the last packet in the case
1387          * of an odd number of input packets.
1388          */
1389         pkt_last = pkts[n_pkts - 1];
1390         rte_prefetch0(pkt_last);
1391
1392         q00 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt00);
1393         q01 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt01);
1394
1395         q10_base = rte_sched_port_qbase(port, q10);
1396         q11_base = rte_sched_port_qbase(port, q11);
1397         rte_sched_port_enqueue_qwa_prefetch0(port, q10, q10_base);
1398         rte_sched_port_enqueue_qwa_prefetch0(port, q11, q11_base);
1399
1400         r20 = rte_sched_port_enqueue_qwa(port, q20, q20_base, pkt20);
1401         r21 = rte_sched_port_enqueue_qwa(port, q21, q21_base, pkt21);
1402         result += r20 + r21;
1403
1404         q_last = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt_last);
1405
1406         q00_base = rte_sched_port_qbase(port, q00);
1407         q01_base = rte_sched_port_qbase(port, q01);
1408         rte_sched_port_enqueue_qwa_prefetch0(port, q00, q00_base);
1409         rte_sched_port_enqueue_qwa_prefetch0(port, q01, q01_base);
1410
1411         r10 = rte_sched_port_enqueue_qwa(port, q10, q10_base, pkt10);
1412         r11 = rte_sched_port_enqueue_qwa(port, q11, q11_base, pkt11);
1413         result += r10 + r11;
1414
1415         q_last_base = rte_sched_port_qbase(port, q_last);
1416         rte_sched_port_enqueue_qwa_prefetch0(port, q_last, q_last_base);
1417
1418         r00 = rte_sched_port_enqueue_qwa(port, q00, q00_base, pkt00);
1419         r01 = rte_sched_port_enqueue_qwa(port, q01, q01_base, pkt01);
1420         result += r00 + r01;
1421
1422         if (n_pkts & 1) {
1423                 r_last = rte_sched_port_enqueue_qwa(port, q_last, q_last_base, pkt_last);
1424                 result += r_last;
1425         }
1426
1427         return result;
1428 }
1429
1430 #ifndef RTE_SCHED_SUBPORT_TC_OV
1431
1432 static inline void
1433 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1434 {
1435         struct rte_sched_grinder *grinder = port->grinder + pos;
1436         struct rte_sched_subport *subport = grinder->subport;
1437         struct rte_sched_pipe *pipe = grinder->pipe;
1438         struct rte_sched_pipe_profile *params = grinder->pipe_params;
1439         uint64_t n_periods;
1440
1441         /* Subport TB */
1442         n_periods = (port->time - subport->tb_time) / subport->tb_period;
1443         subport->tb_credits += n_periods * subport->tb_credits_per_period;
1444         subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1445         subport->tb_time += n_periods * subport->tb_period;
1446
1447         /* Pipe TB */
1448         n_periods = (port->time - pipe->tb_time) / params->tb_period;
1449         pipe->tb_credits += n_periods * params->tb_credits_per_period;
1450         pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1451         pipe->tb_time += n_periods * params->tb_period;
1452
1453         /* Subport TCs */
1454         if (unlikely(port->time >= subport->tc_time)) {
1455                 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1456                 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1457                 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1458                 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1459                 subport->tc_time = port->time + subport->tc_period;
1460         }
1461
1462         /* Pipe TCs */
1463         if (unlikely(port->time >= pipe->tc_time)) {
1464                 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1465                 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1466                 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1467                 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1468                 pipe->tc_time = port->time + params->tc_period;
1469         }
1470 }
1471
1472 #else
1473
1474 static inline uint32_t
1475 grinder_tc_ov_credits_update(struct rte_sched_port *port, uint32_t pos)
1476 {
1477         struct rte_sched_grinder *grinder = port->grinder + pos;
1478         struct rte_sched_subport *subport = grinder->subport;
1479         uint32_t tc_ov_consumption[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
1480         uint32_t tc_ov_consumption_max;
1481         uint32_t tc_ov_wm = subport->tc_ov_wm;
1482
1483         if (subport->tc_ov == 0)
1484                 return subport->tc_ov_wm_max;
1485
1486         tc_ov_consumption[0] = subport->tc_credits_per_period[0] - subport->tc_credits[0];
1487         tc_ov_consumption[1] = subport->tc_credits_per_period[1] - subport->tc_credits[1];
1488         tc_ov_consumption[2] = subport->tc_credits_per_period[2] - subport->tc_credits[2];
1489         tc_ov_consumption[3] = subport->tc_credits_per_period[3] - subport->tc_credits[3];
1490
1491         tc_ov_consumption_max = subport->tc_credits_per_period[3] -
1492                 (tc_ov_consumption[0] + tc_ov_consumption[1] + tc_ov_consumption[2]);
1493
1494         if (tc_ov_consumption[3] > (tc_ov_consumption_max - port->mtu)) {
1495                 tc_ov_wm  -= tc_ov_wm >> 7;
1496                 if (tc_ov_wm < subport->tc_ov_wm_min)
1497                         tc_ov_wm = subport->tc_ov_wm_min;
1498
1499                 return tc_ov_wm;
1500         }
1501
1502         tc_ov_wm += (tc_ov_wm >> 7) + 1;
1503         if (tc_ov_wm > subport->tc_ov_wm_max)
1504                 tc_ov_wm = subport->tc_ov_wm_max;
1505
1506         return tc_ov_wm;
1507 }
1508
1509 static inline void
1510 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1511 {
1512         struct rte_sched_grinder *grinder = port->grinder + pos;
1513         struct rte_sched_subport *subport = grinder->subport;
1514         struct rte_sched_pipe *pipe = grinder->pipe;
1515         struct rte_sched_pipe_profile *params = grinder->pipe_params;
1516         uint64_t n_periods;
1517
1518         /* Subport TB */
1519         n_periods = (port->time - subport->tb_time) / subport->tb_period;
1520         subport->tb_credits += n_periods * subport->tb_credits_per_period;
1521         subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1522         subport->tb_time += n_periods * subport->tb_period;
1523
1524         /* Pipe TB */
1525         n_periods = (port->time - pipe->tb_time) / params->tb_period;
1526         pipe->tb_credits += n_periods * params->tb_credits_per_period;
1527         pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1528         pipe->tb_time += n_periods * params->tb_period;
1529
1530         /* Subport TCs */
1531         if (unlikely(port->time >= subport->tc_time)) {
1532                 subport->tc_ov_wm = grinder_tc_ov_credits_update(port, pos);
1533
1534                 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1535                 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1536                 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1537                 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1538
1539                 subport->tc_time = port->time + subport->tc_period;
1540                 subport->tc_ov_period_id++;
1541         }
1542
1543         /* Pipe TCs */
1544         if (unlikely(port->time >= pipe->tc_time)) {
1545                 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1546                 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1547                 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1548                 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1549                 pipe->tc_time = port->time + params->tc_period;
1550         }
1551
1552         /* Pipe TCs - Oversubscription */
1553         if (unlikely(pipe->tc_ov_period_id != subport->tc_ov_period_id)) {
1554                 pipe->tc_ov_credits = subport->tc_ov_wm * params->tc_ov_weight;
1555
1556                 pipe->tc_ov_period_id = subport->tc_ov_period_id;
1557         }
1558 }
1559
1560 #endif /* RTE_SCHED_TS_CREDITS_UPDATE, RTE_SCHED_SUBPORT_TC_OV */
1561
1562
1563 #ifndef RTE_SCHED_SUBPORT_TC_OV
1564
1565 static inline int
1566 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1567 {
1568         struct rte_sched_grinder *grinder = port->grinder + pos;
1569         struct rte_sched_subport *subport = grinder->subport;
1570         struct rte_sched_pipe *pipe = grinder->pipe;
1571         struct rte_mbuf *pkt = grinder->pkt;
1572         uint32_t tc_index = grinder->tc_index;
1573         uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1574         uint32_t subport_tb_credits = subport->tb_credits;
1575         uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1576         uint32_t pipe_tb_credits = pipe->tb_credits;
1577         uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1578         int enough_credits;
1579
1580         /* Check queue credits */
1581         enough_credits = (pkt_len <= subport_tb_credits) &&
1582                 (pkt_len <= subport_tc_credits) &&
1583                 (pkt_len <= pipe_tb_credits) &&
1584                 (pkt_len <= pipe_tc_credits);
1585
1586         if (!enough_credits)
1587                 return 0;
1588
1589         /* Update port credits */
1590         subport->tb_credits -= pkt_len;
1591         subport->tc_credits[tc_index] -= pkt_len;
1592         pipe->tb_credits -= pkt_len;
1593         pipe->tc_credits[tc_index] -= pkt_len;
1594
1595         return 1;
1596 }
1597
1598 #else
1599
1600 static inline int
1601 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1602 {
1603         struct rte_sched_grinder *grinder = port->grinder + pos;
1604         struct rte_sched_subport *subport = grinder->subport;
1605         struct rte_sched_pipe *pipe = grinder->pipe;
1606         struct rte_mbuf *pkt = grinder->pkt;
1607         uint32_t tc_index = grinder->tc_index;
1608         uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1609         uint32_t subport_tb_credits = subport->tb_credits;
1610         uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1611         uint32_t pipe_tb_credits = pipe->tb_credits;
1612         uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1613         uint32_t pipe_tc_ov_mask1[] = {UINT32_MAX, UINT32_MAX, UINT32_MAX, pipe->tc_ov_credits};
1614         uint32_t pipe_tc_ov_mask2[] = {0, 0, 0, UINT32_MAX};
1615         uint32_t pipe_tc_ov_credits = pipe_tc_ov_mask1[tc_index];
1616         int enough_credits;
1617
1618         /* Check pipe and subport credits */
1619         enough_credits = (pkt_len <= subport_tb_credits) &&
1620                 (pkt_len <= subport_tc_credits) &&
1621                 (pkt_len <= pipe_tb_credits) &&
1622                 (pkt_len <= pipe_tc_credits) &&
1623                 (pkt_len <= pipe_tc_ov_credits);
1624
1625         if (!enough_credits)
1626                 return 0;
1627
1628         /* Update pipe and subport credits */
1629         subport->tb_credits -= pkt_len;
1630         subport->tc_credits[tc_index] -= pkt_len;
1631         pipe->tb_credits -= pkt_len;
1632         pipe->tc_credits[tc_index] -= pkt_len;
1633         pipe->tc_ov_credits -= pipe_tc_ov_mask2[tc_index] & pkt_len;
1634
1635         return 1;
1636 }
1637
1638 #endif /* RTE_SCHED_SUBPORT_TC_OV */
1639
1640
1641 static inline int
1642 grinder_schedule(struct rte_sched_port *port, uint32_t pos)
1643 {
1644         struct rte_sched_grinder *grinder = port->grinder + pos;
1645         struct rte_sched_queue *queue = grinder->queue[grinder->qpos];
1646         struct rte_mbuf *pkt = grinder->pkt;
1647         uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1648
1649         if (!grinder_credits_check(port, pos))
1650                 return 0;
1651
1652         /* Advance port time */
1653         port->time += pkt_len;
1654
1655         /* Send packet */
1656         port->pkts_out[port->n_pkts_out++] = pkt;
1657         queue->qr++;
1658         grinder->wrr_tokens[grinder->qpos] += pkt_len * grinder->wrr_cost[grinder->qpos];
1659         if (queue->qr == queue->qw) {
1660                 uint32_t qindex = grinder->qindex[grinder->qpos];
1661
1662                 rte_bitmap_clear(port->bmp, qindex);
1663                 grinder->qmask &= ~(1 << grinder->qpos);
1664                 grinder->wrr_mask[grinder->qpos] = 0;
1665                 rte_sched_port_set_queue_empty_timestamp(port, qindex);
1666         }
1667
1668         /* Reset pipe loop detection */
1669         port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1670         grinder->productive = 1;
1671
1672         return 1;
1673 }
1674
1675 #ifdef SCHED_VECTOR_SSE4
1676
1677 static inline int
1678 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1679 {
1680         __m128i index = _mm_set1_epi32(base_pipe);
1681         __m128i pipes = _mm_load_si128((__m128i *)port->grinder_base_bmp_pos);
1682         __m128i res = _mm_cmpeq_epi32(pipes, index);
1683
1684         pipes = _mm_load_si128((__m128i *)(port->grinder_base_bmp_pos + 4));
1685         pipes = _mm_cmpeq_epi32(pipes, index);
1686         res = _mm_or_si128(res, pipes);
1687
1688         if (_mm_testz_si128(res, res))
1689                 return 0;
1690
1691         return 1;
1692 }
1693
1694 #else
1695
1696 static inline int
1697 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1698 {
1699         uint32_t i;
1700
1701         for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i++) {
1702                 if (port->grinder_base_bmp_pos[i] == base_pipe)
1703                         return 1;
1704         }
1705
1706         return 0;
1707 }
1708
1709 #endif /* RTE_SCHED_OPTIMIZATIONS */
1710
1711 static inline void
1712 grinder_pcache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t bmp_pos, uint64_t bmp_slab)
1713 {
1714         struct rte_sched_grinder *grinder = port->grinder + pos;
1715         uint16_t w[4];
1716
1717         grinder->pcache_w = 0;
1718         grinder->pcache_r = 0;
1719
1720         w[0] = (uint16_t) bmp_slab;
1721         w[1] = (uint16_t) (bmp_slab >> 16);
1722         w[2] = (uint16_t) (bmp_slab >> 32);
1723         w[3] = (uint16_t) (bmp_slab >> 48);
1724
1725         grinder->pcache_qmask[grinder->pcache_w] = w[0];
1726         grinder->pcache_qindex[grinder->pcache_w] = bmp_pos;
1727         grinder->pcache_w += (w[0] != 0);
1728
1729         grinder->pcache_qmask[grinder->pcache_w] = w[1];
1730         grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 16;
1731         grinder->pcache_w += (w[1] != 0);
1732
1733         grinder->pcache_qmask[grinder->pcache_w] = w[2];
1734         grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 32;
1735         grinder->pcache_w += (w[2] != 0);
1736
1737         grinder->pcache_qmask[grinder->pcache_w] = w[3];
1738         grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 48;
1739         grinder->pcache_w += (w[3] != 0);
1740 }
1741
1742 static inline void
1743 grinder_tccache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t qindex, uint16_t qmask)
1744 {
1745         struct rte_sched_grinder *grinder = port->grinder + pos;
1746         uint8_t b[4];
1747
1748         grinder->tccache_w = 0;
1749         grinder->tccache_r = 0;
1750
1751         b[0] = (uint8_t) (qmask & 0xF);
1752         b[1] = (uint8_t) ((qmask >> 4) & 0xF);
1753         b[2] = (uint8_t) ((qmask >> 8) & 0xF);
1754         b[3] = (uint8_t) ((qmask >> 12) & 0xF);
1755
1756         grinder->tccache_qmask[grinder->tccache_w] = b[0];
1757         grinder->tccache_qindex[grinder->tccache_w] = qindex;
1758         grinder->tccache_w += (b[0] != 0);
1759
1760         grinder->tccache_qmask[grinder->tccache_w] = b[1];
1761         grinder->tccache_qindex[grinder->tccache_w] = qindex + 4;
1762         grinder->tccache_w += (b[1] != 0);
1763
1764         grinder->tccache_qmask[grinder->tccache_w] = b[2];
1765         grinder->tccache_qindex[grinder->tccache_w] = qindex + 8;
1766         grinder->tccache_w += (b[2] != 0);
1767
1768         grinder->tccache_qmask[grinder->tccache_w] = b[3];
1769         grinder->tccache_qindex[grinder->tccache_w] = qindex + 12;
1770         grinder->tccache_w += (b[3] != 0);
1771 }
1772
1773 static inline int
1774 grinder_next_tc(struct rte_sched_port *port, uint32_t pos)
1775 {
1776         struct rte_sched_grinder *grinder = port->grinder + pos;
1777         struct rte_mbuf **qbase;
1778         uint32_t qindex;
1779         uint16_t qsize;
1780
1781         if (grinder->tccache_r == grinder->tccache_w)
1782                 return 0;
1783
1784         qindex = grinder->tccache_qindex[grinder->tccache_r];
1785         qbase = rte_sched_port_qbase(port, qindex);
1786         qsize = rte_sched_port_qsize(port, qindex);
1787
1788         grinder->tc_index = (qindex >> 2) & 0x3;
1789         grinder->qmask = grinder->tccache_qmask[grinder->tccache_r];
1790         grinder->qsize = qsize;
1791
1792         grinder->qindex[0] = qindex;
1793         grinder->qindex[1] = qindex + 1;
1794         grinder->qindex[2] = qindex + 2;
1795         grinder->qindex[3] = qindex + 3;
1796
1797         grinder->queue[0] = port->queue + qindex;
1798         grinder->queue[1] = port->queue + qindex + 1;
1799         grinder->queue[2] = port->queue + qindex + 2;
1800         grinder->queue[3] = port->queue + qindex + 3;
1801
1802         grinder->qbase[0] = qbase;
1803         grinder->qbase[1] = qbase + qsize;
1804         grinder->qbase[2] = qbase + 2 * qsize;
1805         grinder->qbase[3] = qbase + 3 * qsize;
1806
1807         grinder->tccache_r++;
1808         return 1;
1809 }
1810
1811 static inline int
1812 grinder_next_pipe(struct rte_sched_port *port, uint32_t pos)
1813 {
1814         struct rte_sched_grinder *grinder = port->grinder + pos;
1815         uint32_t pipe_qindex;
1816         uint16_t pipe_qmask;
1817
1818         if (grinder->pcache_r < grinder->pcache_w) {
1819                 pipe_qmask = grinder->pcache_qmask[grinder->pcache_r];
1820                 pipe_qindex = grinder->pcache_qindex[grinder->pcache_r];
1821                 grinder->pcache_r++;
1822         } else {
1823                 uint64_t bmp_slab = 0;
1824                 uint32_t bmp_pos = 0;
1825
1826                 /* Get another non-empty pipe group */
1827                 if (unlikely(rte_bitmap_scan(port->bmp, &bmp_pos, &bmp_slab) <= 0))
1828                         return 0;
1829
1830 #ifdef RTE_SCHED_DEBUG
1831                 debug_check_queue_slab(port, bmp_pos, bmp_slab);
1832 #endif
1833
1834                 /* Return if pipe group already in one of the other grinders */
1835                 port->grinder_base_bmp_pos[pos] = RTE_SCHED_BMP_POS_INVALID;
1836                 if (unlikely(grinder_pipe_exists(port, bmp_pos)))
1837                         return 0;
1838
1839                 port->grinder_base_bmp_pos[pos] = bmp_pos;
1840
1841                 /* Install new pipe group into grinder's pipe cache */
1842                 grinder_pcache_populate(port, pos, bmp_pos, bmp_slab);
1843
1844                 pipe_qmask = grinder->pcache_qmask[0];
1845                 pipe_qindex = grinder->pcache_qindex[0];
1846                 grinder->pcache_r = 1;
1847         }
1848
1849         /* Install new pipe in the grinder */
1850         grinder->pindex = pipe_qindex >> 4;
1851         grinder->subport = port->subport + (grinder->pindex / port->n_pipes_per_subport);
1852         grinder->pipe = port->pipe + grinder->pindex;
1853         grinder->pipe_params = NULL; /* to be set after the pipe structure is prefetched */
1854         grinder->productive = 0;
1855
1856         grinder_tccache_populate(port, pos, pipe_qindex, pipe_qmask);
1857         grinder_next_tc(port, pos);
1858
1859         /* Check for pipe exhaustion */
1860         if (grinder->pindex == port->pipe_loop) {
1861                 port->pipe_exhaustion = 1;
1862                 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1863         }
1864
1865         return 1;
1866 }
1867
1868
1869 static inline void
1870 grinder_wrr_load(struct rte_sched_port *port, uint32_t pos)
1871 {
1872         struct rte_sched_grinder *grinder = port->grinder + pos;
1873         struct rte_sched_pipe *pipe = grinder->pipe;
1874         struct rte_sched_pipe_profile *pipe_params = grinder->pipe_params;
1875         uint32_t tc_index = grinder->tc_index;
1876         uint32_t qmask = grinder->qmask;
1877         uint32_t qindex;
1878
1879         qindex = tc_index * 4;
1880
1881         grinder->wrr_tokens[0] = ((uint16_t) pipe->wrr_tokens[qindex]) << RTE_SCHED_WRR_SHIFT;
1882         grinder->wrr_tokens[1] = ((uint16_t) pipe->wrr_tokens[qindex + 1]) << RTE_SCHED_WRR_SHIFT;
1883         grinder->wrr_tokens[2] = ((uint16_t) pipe->wrr_tokens[qindex + 2]) << RTE_SCHED_WRR_SHIFT;
1884         grinder->wrr_tokens[3] = ((uint16_t) pipe->wrr_tokens[qindex + 3]) << RTE_SCHED_WRR_SHIFT;
1885
1886         grinder->wrr_mask[0] = (qmask & 0x1) * 0xFFFF;
1887         grinder->wrr_mask[1] = ((qmask >> 1) & 0x1) * 0xFFFF;
1888         grinder->wrr_mask[2] = ((qmask >> 2) & 0x1) * 0xFFFF;
1889         grinder->wrr_mask[3] = ((qmask >> 3) & 0x1) * 0xFFFF;
1890
1891         grinder->wrr_cost[0] = pipe_params->wrr_cost[qindex];
1892         grinder->wrr_cost[1] = pipe_params->wrr_cost[qindex + 1];
1893         grinder->wrr_cost[2] = pipe_params->wrr_cost[qindex + 2];
1894         grinder->wrr_cost[3] = pipe_params->wrr_cost[qindex + 3];
1895 }
1896
1897 static inline void
1898 grinder_wrr_store(struct rte_sched_port *port, uint32_t pos)
1899 {
1900         struct rte_sched_grinder *grinder = port->grinder + pos;
1901         struct rte_sched_pipe *pipe = grinder->pipe;
1902         uint32_t tc_index = grinder->tc_index;
1903         uint32_t qindex;
1904
1905         qindex = tc_index * 4;
1906
1907         pipe->wrr_tokens[qindex] = (grinder->wrr_tokens[0] & grinder->wrr_mask[0])
1908                 >> RTE_SCHED_WRR_SHIFT;
1909         pipe->wrr_tokens[qindex + 1] = (grinder->wrr_tokens[1] & grinder->wrr_mask[1])
1910                 >> RTE_SCHED_WRR_SHIFT;
1911         pipe->wrr_tokens[qindex + 2] = (grinder->wrr_tokens[2] & grinder->wrr_mask[2])
1912                 >> RTE_SCHED_WRR_SHIFT;
1913         pipe->wrr_tokens[qindex + 3] = (grinder->wrr_tokens[3] & grinder->wrr_mask[3])
1914                 >> RTE_SCHED_WRR_SHIFT;
1915 }
1916
1917 static inline void
1918 grinder_wrr(struct rte_sched_port *port, uint32_t pos)
1919 {
1920         struct rte_sched_grinder *grinder = port->grinder + pos;
1921         uint16_t wrr_tokens_min;
1922
1923         grinder->wrr_tokens[0] |= ~grinder->wrr_mask[0];
1924         grinder->wrr_tokens[1] |= ~grinder->wrr_mask[1];
1925         grinder->wrr_tokens[2] |= ~grinder->wrr_mask[2];
1926         grinder->wrr_tokens[3] |= ~grinder->wrr_mask[3];
1927
1928         grinder->qpos = rte_min_pos_4_u16(grinder->wrr_tokens);
1929         wrr_tokens_min = grinder->wrr_tokens[grinder->qpos];
1930
1931         grinder->wrr_tokens[0] -= wrr_tokens_min;
1932         grinder->wrr_tokens[1] -= wrr_tokens_min;
1933         grinder->wrr_tokens[2] -= wrr_tokens_min;
1934         grinder->wrr_tokens[3] -= wrr_tokens_min;
1935 }
1936
1937
1938 #define grinder_evict(port, pos)
1939
1940 static inline void
1941 grinder_prefetch_pipe(struct rte_sched_port *port, uint32_t pos)
1942 {
1943         struct rte_sched_grinder *grinder = port->grinder + pos;
1944
1945         rte_prefetch0(grinder->pipe);
1946         rte_prefetch0(grinder->queue[0]);
1947 }
1948
1949 static inline void
1950 grinder_prefetch_tc_queue_arrays(struct rte_sched_port *port, uint32_t pos)
1951 {
1952         struct rte_sched_grinder *grinder = port->grinder + pos;
1953         uint16_t qsize, qr[4];
1954
1955         qsize = grinder->qsize;
1956         qr[0] = grinder->queue[0]->qr & (qsize - 1);
1957         qr[1] = grinder->queue[1]->qr & (qsize - 1);
1958         qr[2] = grinder->queue[2]->qr & (qsize - 1);
1959         qr[3] = grinder->queue[3]->qr & (qsize - 1);
1960
1961         rte_prefetch0(grinder->qbase[0] + qr[0]);
1962         rte_prefetch0(grinder->qbase[1] + qr[1]);
1963
1964         grinder_wrr_load(port, pos);
1965         grinder_wrr(port, pos);
1966
1967         rte_prefetch0(grinder->qbase[2] + qr[2]);
1968         rte_prefetch0(grinder->qbase[3] + qr[3]);
1969 }
1970
1971 static inline void
1972 grinder_prefetch_mbuf(struct rte_sched_port *port, uint32_t pos)
1973 {
1974         struct rte_sched_grinder *grinder = port->grinder + pos;
1975         uint32_t qpos = grinder->qpos;
1976         struct rte_mbuf **qbase = grinder->qbase[qpos];
1977         uint16_t qsize = grinder->qsize;
1978         uint16_t qr = grinder->queue[qpos]->qr & (qsize - 1);
1979
1980         grinder->pkt = qbase[qr];
1981         rte_prefetch0(grinder->pkt);
1982
1983         if (unlikely((qr & 0x7) == 7)) {
1984                 uint16_t qr_next = (grinder->queue[qpos]->qr + 1) & (qsize - 1);
1985
1986                 rte_prefetch0(qbase + qr_next);
1987         }
1988 }
1989
1990 static inline uint32_t
1991 grinder_handle(struct rte_sched_port *port, uint32_t pos)
1992 {
1993         struct rte_sched_grinder *grinder = port->grinder + pos;
1994
1995         switch (grinder->state) {
1996         case e_GRINDER_PREFETCH_PIPE:
1997         {
1998                 if (grinder_next_pipe(port, pos)) {
1999                         grinder_prefetch_pipe(port, pos);
2000                         port->busy_grinders++;
2001
2002                         grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2003                         return 0;
2004                 }
2005
2006                 return 0;
2007         }
2008
2009         case e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS:
2010         {
2011                 struct rte_sched_pipe *pipe = grinder->pipe;
2012
2013                 grinder->pipe_params = port->pipe_profiles + pipe->profile;
2014                 grinder_prefetch_tc_queue_arrays(port, pos);
2015                 grinder_credits_update(port, pos);
2016
2017                 grinder->state = e_GRINDER_PREFETCH_MBUF;
2018                 return 0;
2019         }
2020
2021         case e_GRINDER_PREFETCH_MBUF:
2022         {
2023                 grinder_prefetch_mbuf(port, pos);
2024
2025                 grinder->state = e_GRINDER_READ_MBUF;
2026                 return 0;
2027         }
2028
2029         case e_GRINDER_READ_MBUF:
2030         {
2031                 uint32_t result = 0;
2032
2033                 result = grinder_schedule(port, pos);
2034
2035                 /* Look for next packet within the same TC */
2036                 if (result && grinder->qmask) {
2037                         grinder_wrr(port, pos);
2038                         grinder_prefetch_mbuf(port, pos);
2039
2040                         return 1;
2041                 }
2042                 grinder_wrr_store(port, pos);
2043
2044                 /* Look for another active TC within same pipe */
2045                 if (grinder_next_tc(port, pos)) {
2046                         grinder_prefetch_tc_queue_arrays(port, pos);
2047
2048                         grinder->state = e_GRINDER_PREFETCH_MBUF;
2049                         return result;
2050                 }
2051
2052                 if (grinder->productive == 0 &&
2053                     port->pipe_loop == RTE_SCHED_PIPE_INVALID)
2054                         port->pipe_loop = grinder->pindex;
2055
2056                 grinder_evict(port, pos);
2057
2058                 /* Look for another active pipe */
2059                 if (grinder_next_pipe(port, pos)) {
2060                         grinder_prefetch_pipe(port, pos);
2061
2062                         grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2063                         return result;
2064                 }
2065
2066                 /* No active pipe found */
2067                 port->busy_grinders--;
2068
2069                 grinder->state = e_GRINDER_PREFETCH_PIPE;
2070                 return result;
2071         }
2072
2073         default:
2074                 rte_panic("Algorithmic error (invalid state)\n");
2075                 return 0;
2076         }
2077 }
2078
2079 static inline void
2080 rte_sched_port_time_resync(struct rte_sched_port *port)
2081 {
2082         uint64_t cycles = rte_get_tsc_cycles();
2083         uint64_t cycles_diff = cycles - port->time_cpu_cycles;
2084         double bytes_diff = ((double) cycles_diff) / port->cycles_per_byte;
2085
2086         /* Advance port time */
2087         port->time_cpu_cycles = cycles;
2088         port->time_cpu_bytes += (uint64_t) bytes_diff;
2089         if (port->time < port->time_cpu_bytes)
2090                 port->time = port->time_cpu_bytes;
2091
2092         /* Reset pipe loop detection */
2093         port->pipe_loop = RTE_SCHED_PIPE_INVALID;
2094 }
2095
2096 static inline int
2097 rte_sched_port_exceptions(struct rte_sched_port *port, int second_pass)
2098 {
2099         int exceptions;
2100
2101         /* Check if any exception flag is set */
2102         exceptions = (second_pass && port->busy_grinders == 0) ||
2103                 (port->pipe_exhaustion == 1);
2104
2105         /* Clear exception flags */
2106         port->pipe_exhaustion = 0;
2107
2108         return exceptions;
2109 }
2110
2111 int
2112 rte_sched_port_dequeue(struct rte_sched_port *port, struct rte_mbuf **pkts, uint32_t n_pkts)
2113 {
2114         uint32_t i, count;
2115
2116         port->pkts_out = pkts;
2117         port->n_pkts_out = 0;
2118
2119         rte_sched_port_time_resync(port);
2120
2121         /* Take each queue in the grinder one step further */
2122         for (i = 0, count = 0; ; i++)  {
2123                 count += grinder_handle(port, i & (RTE_SCHED_PORT_N_GRINDERS - 1));
2124                 if ((count == n_pkts) ||
2125                     rte_sched_port_exceptions(port, i >= RTE_SCHED_PORT_N_GRINDERS)) {
2126                         break;
2127                 }
2128         }
2129
2130         return count;
2131 }