lib/librte_sched/rte_sched.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <stdio.h>
  35 #include <string.h>
  36
  37 #include <rte_common.h>
  38 #include <rte_log.h>
  39 #include <rte_memory.h>
  40 #include <rte_malloc.h>
  41 #include <rte_cycles.h>
  42 #include <rte_prefetch.h>
  43 #include <rte_branch_prediction.h>
  44 #include <rte_mbuf.h>
  45 #include <rte_bitmap.h>
  46
  47 #include "rte_sched.h"
  48 #include "rte_sched_common.h"
  49 #include "rte_approx.h"
  50 #include "rte_reciprocal.h"
  51
  52 #ifdef __INTEL_COMPILER
  53 #pragma warning(disable:2259) /* conversion may lose significant bits */
  54 #endif
  55
  56 #ifdef RTE_SCHED_VECTOR
  57 #include <rte_vect.h>
  58
  59 #ifdef RTE_ARCH_X86
  60 #define SCHED_VECTOR_SSE4
  61 #elif defined(RTE_MACHINE_CPUFLAG_NEON)
  62 #define SCHED_VECTOR_NEON
  63 #endif
  64
  65 #endif
  66
  67 #define RTE_SCHED_TB_RATE_CONFIG_ERR          (1e-7)
  68 #define RTE_SCHED_WRR_SHIFT                   3
  69 #define RTE_SCHED_GRINDER_PCACHE_SIZE         (64 / RTE_SCHED_QUEUES_PER_PIPE)
  70 #define RTE_SCHED_PIPE_INVALID                UINT32_MAX
  71 #define RTE_SCHED_BMP_POS_INVALID             UINT32_MAX
  72
  73 /* Scaling for cycles_per_byte calculation
  74  * Chosen so that minimum rate is 480 bit/sec
  75  */
  76 #define RTE_SCHED_TIME_SHIFT                  8
  77
  78 struct rte_sched_subport {
  79         /* Token bucket (TB) */
  80         uint64_t tb_time; /* time of last update */
  81         uint32_t tb_period;
  82         uint32_t tb_credits_per_period;
  83         uint32_t tb_size;
  84         uint32_t tb_credits;
  85
  86         /* Traffic classes (TCs) */
  87         uint64_t tc_time; /* time of next update */
  88         uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
  89         uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
  90         uint32_t tc_period;
  91
  92         /* TC oversubscription */
  93         uint32_t tc_ov_wm;
  94         uint32_t tc_ov_wm_min;
  95         uint32_t tc_ov_wm_max;
  96         uint8_t tc_ov_period_id;
  97         uint8_t tc_ov;
  98         uint32_t tc_ov_n;
  99         double tc_ov_rate;
 100
 101         /* Statistics */
 102         struct rte_sched_subport_stats stats;
 103 };
 104
 105 struct rte_sched_pipe_profile {
 106         /* Token bucket (TB) */
 107         uint32_t tb_period;
 108         uint32_t tb_credits_per_period;
 109         uint32_t tb_size;
 110
 111         /* Pipe traffic classes */
 112         uint32_t tc_period;
 113         uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 114         uint8_t tc_ov_weight;
 115
 116         /* Pipe queues */
 117         uint8_t  wrr_cost[RTE_SCHED_QUEUES_PER_PIPE];
 118 };
 119
 120 struct rte_sched_pipe {
 121         /* Token bucket (TB) */
 122         uint64_t tb_time; /* time of last update */
 123         uint32_t tb_credits;
 124
 125         /* Pipe profile and flags */
 126         uint32_t profile;
 127
 128         /* Traffic classes (TCs) */
 129         uint64_t tc_time; /* time of next update */
 130         uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 131
 132         /* Weighted Round Robin (WRR) */
 133         uint8_t wrr_tokens[RTE_SCHED_QUEUES_PER_PIPE];
 134
 135         /* TC oversubscription */
 136         uint32_t tc_ov_credits;
 137         uint8_t tc_ov_period_id;
 138         uint8_t reserved[3];
 139 } __rte_cache_aligned;
 140
 141 struct rte_sched_queue {
 142         uint16_t qw;
 143         uint16_t qr;
 144 };
 145
 146 struct rte_sched_queue_extra {
 147         struct rte_sched_queue_stats stats;
 148 #ifdef RTE_SCHED_RED
 149         struct rte_red red;
 150 #endif
 151 };
 152
 153 enum grinder_state {
 154         e_GRINDER_PREFETCH_PIPE = 0,
 155         e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS,
 156         e_GRINDER_PREFETCH_MBUF,
 157         e_GRINDER_READ_MBUF
 158 };
 159
 160 /*
 161  * Path through the scheduler hierarchy used by the scheduler enqueue
 162  * operation to identify the destination queue for the current
 163  * packet. Stored in the field pkt.hash.sched of struct rte_mbuf of
 164  * each packet, typically written by the classification stage and read
 165  * by scheduler enqueue.
 166  */
 167 struct rte_sched_port_hierarchy {
 168         uint16_t queue:2;                /**< Queue ID (0 .. 3) */
 169         uint16_t traffic_class:2;        /**< Traffic class ID (0 .. 3)*/
 170         uint32_t color:2;                /**< Color */
 171         uint16_t unused:10;
 172         uint16_t subport;                /**< Subport ID */
 173         uint32_t pipe;                   /**< Pipe ID */
 174 };
 175
 176 struct rte_sched_grinder {
 177         /* Pipe cache */
 178         uint16_t pcache_qmask[RTE_SCHED_GRINDER_PCACHE_SIZE];
 179         uint32_t pcache_qindex[RTE_SCHED_GRINDER_PCACHE_SIZE];
 180         uint32_t pcache_w;
 181         uint32_t pcache_r;
 182
 183         /* Current pipe */
 184         enum grinder_state state;
 185         uint32_t productive;
 186         uint32_t pindex;
 187         struct rte_sched_subport *subport;
 188         struct rte_sched_pipe *pipe;
 189         struct rte_sched_pipe_profile *pipe_params;
 190
 191         /* TC cache */
 192         uint8_t tccache_qmask[4];
 193         uint32_t tccache_qindex[4];
 194         uint32_t tccache_w;
 195         uint32_t tccache_r;
 196
 197         /* Current TC */
 198         uint32_t tc_index;
 199         struct rte_sched_queue *queue[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 200         struct rte_mbuf **qbase[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 201         uint32_t qindex[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 202         uint16_t qsize;
 203         uint32_t qmask;
 204         uint32_t qpos;
 205         struct rte_mbuf *pkt;
 206
 207         /* WRR */
 208         uint16_t wrr_tokens[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
 209         uint16_t wrr_mask[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
 210         uint8_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
 211 };
 212
 213 struct rte_sched_port {
 214         /* User parameters */
 215         uint32_t n_subports_per_port;
 216         uint32_t n_pipes_per_subport;
 217         uint32_t rate;
 218         uint32_t mtu;
 219         uint32_t frame_overhead;
 220         uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 221         uint32_t n_pipe_profiles;
 222         uint32_t pipe_tc3_rate_max;
 223 #ifdef RTE_SCHED_RED
 224         struct rte_red_config red_config[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][e_RTE_METER_COLORS];
 225 #endif
 226
 227         /* Timing */
 228         uint64_t time_cpu_cycles;     /* Current CPU time measured in CPU cyles */
 229         uint64_t time_cpu_bytes;      /* Current CPU time measured in bytes */
 230         uint64_t time;                /* Current NIC TX time measured in bytes */
 231         struct rte_reciprocal inv_cycles_per_byte; /* CPU cycles per byte */
 232
 233         /* Scheduling loop detection */
 234         uint32_t pipe_loop;
 235         uint32_t pipe_exhaustion;
 236
 237         /* Bitmap */
 238         struct rte_bitmap *bmp;
 239         uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16;
 240
 241         /* Grinders */
 242         struct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS];
 243         uint32_t busy_grinders;
 244         struct rte_mbuf **pkts_out;
 245         uint32_t n_pkts_out;
 246
 247         /* Queue base calculation */
 248         uint32_t qsize_add[RTE_SCHED_QUEUES_PER_PIPE];
 249         uint32_t qsize_sum;
 250
 251         /* Large data structures */
 252         struct rte_sched_subport *subport;
 253         struct rte_sched_pipe *pipe;
 254         struct rte_sched_queue *queue;
 255         struct rte_sched_queue_extra *queue_extra;
 256         struct rte_sched_pipe_profile *pipe_profiles;
 257         uint8_t *bmp_array;
 258         struct rte_mbuf **queue_array;
 259         uint8_t memory[0] __rte_cache_aligned;
 260 } __rte_cache_aligned;
 261
 262 enum rte_sched_port_array {
 263         e_RTE_SCHED_PORT_ARRAY_SUBPORT = 0,
 264         e_RTE_SCHED_PORT_ARRAY_PIPE,
 265         e_RTE_SCHED_PORT_ARRAY_QUEUE,
 266         e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA,
 267         e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES,
 268         e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY,
 269         e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY,
 270         e_RTE_SCHED_PORT_ARRAY_TOTAL,
 271 };
 272
 273 #ifdef RTE_SCHED_COLLECT_STATS
 274
 275 static inline uint32_t
 276 rte_sched_port_queues_per_subport(struct rte_sched_port *port)
 277 {
 278         return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport;
 279 }
 280
 281 #endif
 282
 283 static inline uint32_t
 284 rte_sched_port_queues_per_port(struct rte_sched_port *port)
 285 {
 286         return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport * port->n_subports_per_port;
 287 }
 288
 289 static inline struct rte_mbuf **
 290 rte_sched_port_qbase(struct rte_sched_port *port, uint32_t qindex)
 291 {
 292         uint32_t pindex = qindex >> 4;
 293         uint32_t qpos = qindex & 0xF;
 294
 295         return (port->queue_array + pindex *
 296                 port->qsize_sum + port->qsize_add[qpos]);
 297 }
 298
 299 static inline uint16_t
 300 rte_sched_port_qsize(struct rte_sched_port *port, uint32_t qindex)
 301 {
 302         uint32_t tc = (qindex >> 2) & 0x3;
 303
 304         return port->qsize[tc];
 305 }
 306
 307 static int
 308 rte_sched_port_check_params(struct rte_sched_port_params *params)
 309 {
 310         uint32_t i, j;
 311
 312         if (params == NULL)
 313                 return -1;
 314
 315         /* socket */
 316         if ((params->socket < 0) || (params->socket >= RTE_MAX_NUMA_NODES))
 317                 return -3;
 318
 319         /* rate */
 320         if (params->rate == 0)
 321                 return -4;
 322
 323         /* mtu */
 324         if (params->mtu == 0)
 325                 return -5;
 326
 327         /* n_subports_per_port: non-zero, limited to 16 bits, power of 2 */
 328         if (params->n_subports_per_port == 0 ||
 329             params->n_subports_per_port > 1u << 16 ||
 330             !rte_is_power_of_2(params->n_subports_per_port))
 331                 return -6;
 332
 333         /* n_pipes_per_subport: non-zero, power of 2 */
 334         if (params->n_pipes_per_subport == 0 ||
 335             !rte_is_power_of_2(params->n_pipes_per_subport))
 336                 return -7;
 337
 338         /* qsize: non-zero, power of 2,
 339          * no bigger than 32K (due to 16-bit read/write pointers)
 340          */
 341         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 342                 uint16_t qsize = params->qsize[i];
 343
 344                 if (qsize == 0 || !rte_is_power_of_2(qsize))
 345                         return -8;
 346         }
 347
 348         /* pipe_profiles and n_pipe_profiles */
 349         if (params->pipe_profiles == NULL ||
 350             params->n_pipe_profiles == 0 ||
 351             params->n_pipe_profiles > RTE_SCHED_PIPE_PROFILES_PER_PORT)
 352                 return -9;
 353
 354         for (i = 0; i < params->n_pipe_profiles; i++) {
 355                 struct rte_sched_pipe_params *p = params->pipe_profiles + i;
 356
 357                 /* TB rate: non-zero, not greater than port rate */
 358                 if (p->tb_rate == 0 || p->tb_rate > params->rate)
 359                         return -10;
 360
 361                 /* TB size: non-zero */
 362                 if (p->tb_size == 0)
 363                         return -11;
 364
 365                 /* TC rate: non-zero, less than pipe rate */
 366                 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++) {
 367                         if (p->tc_rate[j] == 0 || p->tc_rate[j] > p->tb_rate)
 368                                 return -12;
 369                 }
 370
 371                 /* TC period: non-zero */
 372                 if (p->tc_period == 0)
 373                         return -13;
 374
 375 #ifdef RTE_SCHED_SUBPORT_TC_OV
 376                 /* TC3 oversubscription weight: non-zero */
 377                 if (p->tc_ov_weight == 0)
 378                         return -14;
 379 #endif
 380
 381                 /* Queue WRR weights: non-zero */
 382                 for (j = 0; j < RTE_SCHED_QUEUES_PER_PIPE; j++) {
 383                         if (p->wrr_weights[j] == 0)
 384                                 return -15;
 385                 }
 386         }
 387
 388         return 0;
 389 }
 390
 391 static uint32_t
 392 rte_sched_port_get_array_base(struct rte_sched_port_params *params, enum rte_sched_port_array array)
 393 {
 394         uint32_t n_subports_per_port = params->n_subports_per_port;
 395         uint32_t n_pipes_per_subport = params->n_pipes_per_subport;
 396         uint32_t n_pipes_per_port = n_pipes_per_subport * n_subports_per_port;
 397         uint32_t n_queues_per_port = RTE_SCHED_QUEUES_PER_PIPE * n_pipes_per_subport * n_subports_per_port;
 398
 399         uint32_t size_subport = n_subports_per_port * sizeof(struct rte_sched_subport);
 400         uint32_t size_pipe = n_pipes_per_port * sizeof(struct rte_sched_pipe);
 401         uint32_t size_queue = n_queues_per_port * sizeof(struct rte_sched_queue);
 402         uint32_t size_queue_extra
 403                 = n_queues_per_port * sizeof(struct rte_sched_queue_extra);
 404         uint32_t size_pipe_profiles
 405                 = RTE_SCHED_PIPE_PROFILES_PER_PORT * sizeof(struct rte_sched_pipe_profile);
 406         uint32_t size_bmp_array = rte_bitmap_get_memory_footprint(n_queues_per_port);
 407         uint32_t size_per_pipe_queue_array, size_queue_array;
 408
 409         uint32_t base, i;
 410
 411         size_per_pipe_queue_array = 0;
 412         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 413                 size_per_pipe_queue_array += RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS
 414                         * params->qsize[i] * sizeof(struct rte_mbuf *);
 415         }
 416         size_queue_array = n_pipes_per_port * size_per_pipe_queue_array;
 417
 418         base = 0;
 419
 420         if (array == e_RTE_SCHED_PORT_ARRAY_SUBPORT)
 421                 return base;
 422         base += RTE_CACHE_LINE_ROUNDUP(size_subport);
 423
 424         if (array == e_RTE_SCHED_PORT_ARRAY_PIPE)
 425                 return base;
 426         base += RTE_CACHE_LINE_ROUNDUP(size_pipe);
 427
 428         if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE)
 429                 return base;
 430         base += RTE_CACHE_LINE_ROUNDUP(size_queue);
 431
 432         if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA)
 433                 return base;
 434         base += RTE_CACHE_LINE_ROUNDUP(size_queue_extra);
 435
 436         if (array == e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES)
 437                 return base;
 438         base += RTE_CACHE_LINE_ROUNDUP(size_pipe_profiles);
 439
 440         if (array == e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY)
 441                 return base;
 442         base += RTE_CACHE_LINE_ROUNDUP(size_bmp_array);
 443
 444         if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY)
 445                 return base;
 446         base += RTE_CACHE_LINE_ROUNDUP(size_queue_array);
 447
 448         return base;
 449 }
 450
 451 uint32_t
 452 rte_sched_port_get_memory_footprint(struct rte_sched_port_params *params)
 453 {
 454         uint32_t size0, size1;
 455         int status;
 456
 457         status = rte_sched_port_check_params(params);
 458         if (status != 0) {
 459                 RTE_LOG(NOTICE, SCHED,
 460                         "Port scheduler params check failed (%d)\n", status);
 461
 462                 return 0;
 463         }
 464
 465         size0 = sizeof(struct rte_sched_port);
 466         size1 = rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_TOTAL);
 467
 468         return size0 + size1;
 469 }
 470
 471 static void
 472 rte_sched_port_config_qsize(struct rte_sched_port *port)
 473 {
 474         /* TC 0 */
 475         port->qsize_add[0] = 0;
 476         port->qsize_add[1] = port->qsize_add[0] + port->qsize[0];
 477         port->qsize_add[2] = port->qsize_add[1] + port->qsize[0];
 478         port->qsize_add[3] = port->qsize_add[2] + port->qsize[0];
 479
 480         /* TC 1 */
 481         port->qsize_add[4] = port->qsize_add[3] + port->qsize[0];
 482         port->qsize_add[5] = port->qsize_add[4] + port->qsize[1];
 483         port->qsize_add[6] = port->qsize_add[5] + port->qsize[1];
 484         port->qsize_add[7] = port->qsize_add[6] + port->qsize[1];
 485
 486         /* TC 2 */
 487         port->qsize_add[8] = port->qsize_add[7] + port->qsize[1];
 488         port->qsize_add[9] = port->qsize_add[8] + port->qsize[2];
 489         port->qsize_add[10] = port->qsize_add[9] + port->qsize[2];
 490         port->qsize_add[11] = port->qsize_add[10] + port->qsize[2];
 491
 492         /* TC 3 */
 493         port->qsize_add[12] = port->qsize_add[11] + port->qsize[2];
 494         port->qsize_add[13] = port->qsize_add[12] + port->qsize[3];
 495         port->qsize_add[14] = port->qsize_add[13] + port->qsize[3];
 496         port->qsize_add[15] = port->qsize_add[14] + port->qsize[3];
 497
 498         port->qsize_sum = port->qsize_add[15] + port->qsize[3];
 499 }
 500
 501 static void
 502 rte_sched_port_log_pipe_profile(struct rte_sched_port *port, uint32_t i)
 503 {
 504         struct rte_sched_pipe_profile *p = port->pipe_profiles + i;
 505
 506         RTE_LOG(DEBUG, SCHED, "Low level config for pipe profile %u:\n"
 507                 "    Token bucket: period = %u, credits per period = %u, size = %u\n"
 508                 "    Traffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
 509                 "    Traffic class 3 oversubscription: weight = %hhu\n"
 510                 "    WRR cost: [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu]\n",
 511                 i,
 512
 513                 /* Token bucket */
 514                 p->tb_period,
 515                 p->tb_credits_per_period,
 516                 p->tb_size,
 517
 518                 /* Traffic classes */
 519                 p->tc_period,
 520                 p->tc_credits_per_period[0],
 521                 p->tc_credits_per_period[1],
 522                 p->tc_credits_per_period[2],
 523                 p->tc_credits_per_period[3],
 524
 525                 /* Traffic class 3 oversubscription */
 526                 p->tc_ov_weight,
 527
 528                 /* WRR */
 529                 p->wrr_cost[ 0], p->wrr_cost[ 1], p->wrr_cost[ 2], p->wrr_cost[ 3],
 530                 p->wrr_cost[ 4], p->wrr_cost[ 5], p->wrr_cost[ 6], p->wrr_cost[ 7],
 531                 p->wrr_cost[ 8], p->wrr_cost[ 9], p->wrr_cost[10], p->wrr_cost[11],
 532                 p->wrr_cost[12], p->wrr_cost[13], p->wrr_cost[14], p->wrr_cost[15]);
 533 }
 534
 535 static inline uint64_t
 536 rte_sched_time_ms_to_bytes(uint32_t time_ms, uint32_t rate)
 537 {
 538         uint64_t time = time_ms;
 539
 540         time = (time * rate) / 1000;
 541
 542         return time;
 543 }
 544
 545 static void
 546 rte_sched_port_config_pipe_profile_table(struct rte_sched_port *port, struct rte_sched_port_params *params)
 547 {
 548         uint32_t i, j;
 549
 550         for (i = 0; i < port->n_pipe_profiles; i++) {
 551                 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
 552                 struct rte_sched_pipe_profile *dst = port->pipe_profiles + i;
 553
 554                 /* Token Bucket */
 555                 if (src->tb_rate == params->rate) {
 556                         dst->tb_credits_per_period = 1;
 557                         dst->tb_period = 1;
 558                 } else {
 559                         double tb_rate = (double) src->tb_rate
 560                                 / (double) params->rate;
 561                         double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
 562
 563                         rte_approx(tb_rate, d,
 564                                    &dst->tb_credits_per_period, &dst->tb_period);
 565                 }
 566                 dst->tb_size = src->tb_size;
 567
 568                 /* Traffic Classes */
 569                 dst->tc_period = rte_sched_time_ms_to_bytes(src->tc_period,
 570                                                             params->rate);
 571
 572                 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++)
 573                         dst->tc_credits_per_period[j]
 574                                 = rte_sched_time_ms_to_bytes(src->tc_period,
 575                                                              src->tc_rate[j]);
 576
 577 #ifdef RTE_SCHED_SUBPORT_TC_OV
 578                 dst->tc_ov_weight = src->tc_ov_weight;
 579 #endif
 580
 581                 /* WRR */
 582                 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++) {
 583                         uint32_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
 584                         uint32_t lcd, lcd1, lcd2;
 585                         uint32_t qindex;
 586
 587                         qindex = j * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS;
 588
 589                         wrr_cost[0] = src->wrr_weights[qindex];
 590                         wrr_cost[1] = src->wrr_weights[qindex + 1];
 591                         wrr_cost[2] = src->wrr_weights[qindex + 2];
 592                         wrr_cost[3] = src->wrr_weights[qindex + 3];
 593
 594                         lcd1 = rte_get_lcd(wrr_cost[0], wrr_cost[1]);
 595                         lcd2 = rte_get_lcd(wrr_cost[2], wrr_cost[3]);
 596                         lcd = rte_get_lcd(lcd1, lcd2);
 597
 598                         wrr_cost[0] = lcd / wrr_cost[0];
 599                         wrr_cost[1] = lcd / wrr_cost[1];
 600                         wrr_cost[2] = lcd / wrr_cost[2];
 601                         wrr_cost[3] = lcd / wrr_cost[3];
 602
 603                         dst->wrr_cost[qindex] = (uint8_t) wrr_cost[0];
 604                         dst->wrr_cost[qindex + 1] = (uint8_t) wrr_cost[1];
 605                         dst->wrr_cost[qindex + 2] = (uint8_t) wrr_cost[2];
 606                         dst->wrr_cost[qindex + 3] = (uint8_t) wrr_cost[3];
 607                 }
 608
 609                 rte_sched_port_log_pipe_profile(port, i);
 610         }
 611
 612         port->pipe_tc3_rate_max = 0;
 613         for (i = 0; i < port->n_pipe_profiles; i++) {
 614                 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
 615                 uint32_t pipe_tc3_rate = src->tc_rate[3];
 616
 617                 if (port->pipe_tc3_rate_max < pipe_tc3_rate)
 618                         port->pipe_tc3_rate_max = pipe_tc3_rate;
 619         }
 620 }
 621
 622 struct rte_sched_port *
 623 rte_sched_port_config(struct rte_sched_port_params *params)
 624 {
 625         struct rte_sched_port *port = NULL;
 626         uint32_t mem_size, bmp_mem_size, n_queues_per_port, i, cycles_per_byte;
 627
 628         /* Check user parameters. Determine the amount of memory to allocate */
 629         mem_size = rte_sched_port_get_memory_footprint(params);
 630         if (mem_size == 0)
 631                 return NULL;
 632
 633         /* Allocate memory to store the data structures */
 634         port = rte_zmalloc("qos_params", mem_size, RTE_CACHE_LINE_SIZE);
 635         if (port == NULL)
 636                 return NULL;
 637
 638         /* compile time checks */
 639         RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS == 0);
 640         RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS & (RTE_SCHED_PORT_N_GRINDERS - 1));
 641
 642         /* User parameters */
 643         port->n_subports_per_port = params->n_subports_per_port;
 644         port->n_pipes_per_subport = params->n_pipes_per_subport;
 645         port->rate = params->rate;
 646         port->mtu = params->mtu + params->frame_overhead;
 647         port->frame_overhead = params->frame_overhead;
 648         memcpy(port->qsize, params->qsize, sizeof(params->qsize));
 649         port->n_pipe_profiles = params->n_pipe_profiles;
 650
 651 #ifdef RTE_SCHED_RED
 652         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 653                 uint32_t j;
 654
 655                 for (j = 0; j < e_RTE_METER_COLORS; j++) {
 656                         /* if min/max are both zero, then RED is disabled */
 657                         if ((params->red_params[i][j].min_th |
 658                              params->red_params[i][j].max_th) == 0) {
 659                                 continue;
 660                         }
 661
 662                         if (rte_red_config_init(&port->red_config[i][j],
 663                                 params->red_params[i][j].wq_log2,
 664                                 params->red_params[i][j].min_th,
 665                                 params->red_params[i][j].max_th,
 666                                 params->red_params[i][j].maxp_inv) != 0) {
 667                                 return NULL;
 668                         }
 669                 }
 670         }
 671 #endif
 672
 673         /* Timing */
 674         port->time_cpu_cycles = rte_get_tsc_cycles();
 675         port->time_cpu_bytes = 0;
 676         port->time = 0;
 677
 678         cycles_per_byte = (rte_get_tsc_hz() << RTE_SCHED_TIME_SHIFT)
 679                 / params->rate;
 680         port->inv_cycles_per_byte = rte_reciprocal_value(cycles_per_byte);
 681
 682         /* Scheduling loop detection */
 683         port->pipe_loop = RTE_SCHED_PIPE_INVALID;
 684         port->pipe_exhaustion = 0;
 685
 686         /* Grinders */
 687         port->busy_grinders = 0;
 688         port->pkts_out = NULL;
 689         port->n_pkts_out = 0;
 690
 691         /* Queue base calculation */
 692         rte_sched_port_config_qsize(port);
 693
 694         /* Large data structures */
 695         port->subport = (struct rte_sched_subport *)
 696                 (port->memory + rte_sched_port_get_array_base(params,
 697                                                               e_RTE_SCHED_PORT_ARRAY_SUBPORT));
 698         port->pipe = (struct rte_sched_pipe *)
 699                 (port->memory + rte_sched_port_get_array_base(params,
 700                                                               e_RTE_SCHED_PORT_ARRAY_PIPE));
 701         port->queue = (struct rte_sched_queue *)
 702                 (port->memory + rte_sched_port_get_array_base(params,
 703                                                               e_RTE_SCHED_PORT_ARRAY_QUEUE));
 704         port->queue_extra = (struct rte_sched_queue_extra *)
 705                 (port->memory + rte_sched_port_get_array_base(params,
 706                                                               e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA));
 707         port->pipe_profiles = (struct rte_sched_pipe_profile *)
 708                 (port->memory + rte_sched_port_get_array_base(params,
 709                                                               e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES));
 710         port->bmp_array =  port->memory
 711                 + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY);
 712         port->queue_array = (struct rte_mbuf **)
 713                 (port->memory + rte_sched_port_get_array_base(params,
 714                                                               e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY));
 715
 716         /* Pipe profile table */
 717         rte_sched_port_config_pipe_profile_table(port, params);
 718
 719         /* Bitmap */
 720         n_queues_per_port = rte_sched_port_queues_per_port(port);
 721         bmp_mem_size = rte_bitmap_get_memory_footprint(n_queues_per_port);
 722         port->bmp = rte_bitmap_init(n_queues_per_port, port->bmp_array,
 723                                     bmp_mem_size);
 724         if (port->bmp == NULL) {
 725                 RTE_LOG(ERR, SCHED, "Bitmap init error\n");
 726                 return NULL;
 727         }
 728
 729         for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i++)
 730                 port->grinder_base_bmp_pos[i] = RTE_SCHED_PIPE_INVALID;
 731
 732
 733         return port;
 734 }
 735
 736 void
 737 rte_sched_port_free(struct rte_sched_port *port)
 738 {
 739         uint32_t qindex;
 740         uint32_t n_queues_per_port;
 741
 742         /* Check user parameters */
 743         if (port == NULL)
 744                 return;
 745
 746         n_queues_per_port = rte_sched_port_queues_per_port(port);
 747
 748         /* Free enqueued mbufs */
 749         for (qindex = 0; qindex < n_queues_per_port; qindex++) {
 750                 struct rte_mbuf **mbufs = rte_sched_port_qbase(port, qindex);
 751                 uint16_t qsize = rte_sched_port_qsize(port, qindex);
 752                 struct rte_sched_queue *queue = port->queue + qindex;
 753                 uint16_t qr = queue->qr & (qsize - 1);
 754                 uint16_t qw = queue->qw & (qsize - 1);
 755
 756                 for (; qr != qw; qr = (qr + 1) & (qsize - 1))
 757                         rte_pktmbuf_free(mbufs[qr]);
 758         }
 759
 760         rte_bitmap_free(port->bmp);
 761         rte_free(port);
 762 }
 763
 764 static void
 765 rte_sched_port_log_subport_config(struct rte_sched_port *port, uint32_t i)
 766 {
 767         struct rte_sched_subport *s = port->subport + i;
 768
 769         RTE_LOG(DEBUG, SCHED, "Low level config for subport %u:\n"
 770                 "    Token bucket: period = %u, credits per period = %u, size = %u\n"
 771                 "    Traffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
 772                 "    Traffic class 3 oversubscription: wm min = %u, wm max = %u\n",
 773                 i,
 774
 775                 /* Token bucket */
 776                 s->tb_period,
 777                 s->tb_credits_per_period,
 778                 s->tb_size,
 779
 780                 /* Traffic classes */
 781                 s->tc_period,
 782                 s->tc_credits_per_period[0],
 783                 s->tc_credits_per_period[1],
 784                 s->tc_credits_per_period[2],
 785                 s->tc_credits_per_period[3],
 786
 787                 /* Traffic class 3 oversubscription */
 788                 s->tc_ov_wm_min,
 789                 s->tc_ov_wm_max);
 790 }
 791
 792 int
 793 rte_sched_subport_config(struct rte_sched_port *port,
 794         uint32_t subport_id,
 795         struct rte_sched_subport_params *params)
 796 {
 797         struct rte_sched_subport *s;
 798         uint32_t i;
 799
 800         /* Check user parameters */
 801         if (port == NULL ||
 802             subport_id >= port->n_subports_per_port ||
 803             params == NULL)
 804                 return -1;
 805
 806         if (params->tb_rate == 0 || params->tb_rate > port->rate)
 807                 return -2;
 808
 809         if (params->tb_size == 0)
 810                 return -3;
 811
 812         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 813                 if (params->tc_rate[i] == 0 ||
 814                     params->tc_rate[i] > params->tb_rate)
 815                         return -4;
 816         }
 817
 818         if (params->tc_period == 0)
 819                 return -5;
 820
 821         s = port->subport + subport_id;
 822
 823         /* Token Bucket (TB) */
 824         if (params->tb_rate == port->rate) {
 825                 s->tb_credits_per_period = 1;
 826                 s->tb_period = 1;
 827         } else {
 828                 double tb_rate = ((double) params->tb_rate) / ((double) port->rate);
 829                 double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
 830
 831                 rte_approx(tb_rate, d, &s->tb_credits_per_period, &s->tb_period);
 832         }
 833
 834         s->tb_size = params->tb_size;
 835         s->tb_time = port->time;
 836         s->tb_credits = s->tb_size / 2;
 837
 838         /* Traffic Classes (TCs) */
 839         s->tc_period = rte_sched_time_ms_to_bytes(params->tc_period, port->rate);
 840         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 841                 s->tc_credits_per_period[i]
 842                         = rte_sched_time_ms_to_bytes(params->tc_period,
 843                                                      params->tc_rate[i]);
 844         }
 845         s->tc_time = port->time + s->tc_period;
 846         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
 847                 s->tc_credits[i] = s->tc_credits_per_period[i];
 848
 849 #ifdef RTE_SCHED_SUBPORT_TC_OV
 850         /* TC oversubscription */
 851         s->tc_ov_wm_min = port->mtu;
 852         s->tc_ov_wm_max = rte_sched_time_ms_to_bytes(params->tc_period,
 853                                                      port->pipe_tc3_rate_max);
 854         s->tc_ov_wm = s->tc_ov_wm_max;
 855         s->tc_ov_period_id = 0;
 856         s->tc_ov = 0;
 857         s->tc_ov_n = 0;
 858         s->tc_ov_rate = 0;
 859 #endif
 860
 861         rte_sched_port_log_subport_config(port, subport_id);
 862
 863         return 0;
 864 }
 865
 866 int
 867 rte_sched_pipe_config(struct rte_sched_port *port,
 868         uint32_t subport_id,
 869         uint32_t pipe_id,
 870         int32_t pipe_profile)
 871 {
 872         struct rte_sched_subport *s;
 873         struct rte_sched_pipe *p;
 874         struct rte_sched_pipe_profile *params;
 875         uint32_t deactivate, profile, i;
 876
 877         /* Check user parameters */
 878         profile = (uint32_t) pipe_profile;
 879         deactivate = (pipe_profile < 0);
 880
 881         if (port == NULL ||
 882             subport_id >= port->n_subports_per_port ||
 883             pipe_id >= port->n_pipes_per_subport ||
 884             (!deactivate && profile >= port->n_pipe_profiles))
 885                 return -1;
 886
 887
 888         /* Check that subport configuration is valid */
 889         s = port->subport + subport_id;
 890         if (s->tb_period == 0)
 891                 return -2;
 892
 893         p = port->pipe + (subport_id * port->n_pipes_per_subport + pipe_id);
 894
 895         /* Handle the case when pipe already has a valid configuration */
 896         if (p->tb_time) {
 897                 params = port->pipe_profiles + p->profile;
 898
 899 #ifdef RTE_SCHED_SUBPORT_TC_OV
 900                 double subport_tc3_rate = (double) s->tc_credits_per_period[3]
 901                         / (double) s->tc_period;
 902                 double pipe_tc3_rate = (double) params->tc_credits_per_period[3]
 903                         / (double) params->tc_period;
 904                 uint32_t tc3_ov = s->tc_ov;
 905
 906                 /* Unplug pipe from its subport */
 907                 s->tc_ov_n -= params->tc_ov_weight;
 908                 s->tc_ov_rate -= pipe_tc3_rate;
 909                 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
 910
 911                 if (s->tc_ov != tc3_ov) {
 912                         RTE_LOG(DEBUG, SCHED,
 913                                 "Subport %u TC3 oversubscription is OFF (%.4lf >= %.4lf)\n",
 914                                 subport_id, subport_tc3_rate, s->tc_ov_rate);
 915                 }
 916 #endif
 917
 918                 /* Reset the pipe */
 919                 memset(p, 0, sizeof(struct rte_sched_pipe));
 920         }
 921
 922         if (deactivate)
 923                 return 0;
 924
 925         /* Apply the new pipe configuration */
 926         p->profile = profile;
 927         params = port->pipe_profiles + p->profile;
 928
 929         /* Token Bucket (TB) */
 930         p->tb_time = port->time;
 931         p->tb_credits = params->tb_size / 2;
 932
 933         /* Traffic Classes (TCs) */
 934         p->tc_time = port->time + params->tc_period;
 935         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
 936                 p->tc_credits[i] = params->tc_credits_per_period[i];
 937
 938 #ifdef RTE_SCHED_SUBPORT_TC_OV
 939         {
 940                 /* Subport TC3 oversubscription */
 941                 double subport_tc3_rate = (double) s->tc_credits_per_period[3]
 942                         / (double) s->tc_period;
 943                 double pipe_tc3_rate = (double) params->tc_credits_per_period[3]
 944                         / (double) params->tc_period;
 945                 uint32_t tc3_ov = s->tc_ov;
 946
 947                 s->tc_ov_n += params->tc_ov_weight;
 948                 s->tc_ov_rate += pipe_tc3_rate;
 949                 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
 950
 951                 if (s->tc_ov != tc3_ov) {
 952                         RTE_LOG(DEBUG, SCHED,
 953                                 "Subport %u TC3 oversubscription is ON (%.4lf < %.4lf)\n",
 954                                 subport_id, subport_tc3_rate, s->tc_ov_rate);
 955                 }
 956                 p->tc_ov_period_id = s->tc_ov_period_id;
 957                 p->tc_ov_credits = s->tc_ov_wm;
 958         }
 959 #endif
 960
 961         return 0;
 962 }
 963
 964 void
 965 rte_sched_port_pkt_write(struct rte_mbuf *pkt,
 966                          uint32_t subport, uint32_t pipe, uint32_t traffic_class,
 967                          uint32_t queue, enum rte_meter_color color)
 968 {
 969         struct rte_sched_port_hierarchy *sched
 970                 = (struct rte_sched_port_hierarchy *) &pkt->hash.sched;
 971
 972         RTE_BUILD_BUG_ON(sizeof(*sched) > sizeof(pkt->hash.sched));
 973
 974         sched->color = (uint32_t) color;
 975         sched->subport = subport;
 976         sched->pipe = pipe;
 977         sched->traffic_class = traffic_class;
 978         sched->queue = queue;
 979 }
 980
 981 void
 982 rte_sched_port_pkt_read_tree_path(const struct rte_mbuf *pkt,
 983                                   uint32_t *subport, uint32_t *pipe,
 984                                   uint32_t *traffic_class, uint32_t *queue)
 985 {
 986         const struct rte_sched_port_hierarchy *sched
 987                 = (const struct rte_sched_port_hierarchy *) &pkt->hash.sched;
 988
 989         *subport = sched->subport;
 990         *pipe = sched->pipe;
 991         *traffic_class = sched->traffic_class;
 992         *queue = sched->queue;
 993 }
 994
 995 enum rte_meter_color
 996 rte_sched_port_pkt_read_color(const struct rte_mbuf *pkt)
 997 {
 998         const struct rte_sched_port_hierarchy *sched
 999                 = (const struct rte_sched_port_hierarchy *) &pkt->hash.sched;
1000
1001         return (enum rte_meter_color) sched->color;
1002 }
1003
1004 int
1005 rte_sched_subport_read_stats(struct rte_sched_port *port,
1006                              uint32_t subport_id,
1007                              struct rte_sched_subport_stats *stats,
1008                              uint32_t *tc_ov)
1009 {
1010         struct rte_sched_subport *s;
1011
1012         /* Check user parameters */
1013         if (port == NULL || subport_id >= port->n_subports_per_port ||
1014             stats == NULL || tc_ov == NULL)
1015                 return -1;
1016
1017         s = port->subport + subport_id;
1018
1019         /* Copy subport stats and clear */
1020         memcpy(stats, &s->stats, sizeof(struct rte_sched_subport_stats));
1021         memset(&s->stats, 0, sizeof(struct rte_sched_subport_stats));
1022
1023         /* Subport TC oversubscription status */
1024         *tc_ov = s->tc_ov;
1025
1026         return 0;
1027 }
1028
1029 int
1030 rte_sched_queue_read_stats(struct rte_sched_port *port,
1031         uint32_t queue_id,
1032         struct rte_sched_queue_stats *stats,
1033         uint16_t *qlen)
1034 {
1035         struct rte_sched_queue *q;
1036         struct rte_sched_queue_extra *qe;
1037
1038         /* Check user parameters */
1039         if ((port == NULL) ||
1040             (queue_id >= rte_sched_port_queues_per_port(port)) ||
1041                 (stats == NULL) ||
1042                 (qlen == NULL)) {
1043                 return -1;
1044         }
1045         q = port->queue + queue_id;
1046         qe = port->queue_extra + queue_id;
1047
1048         /* Copy queue stats and clear */
1049         memcpy(stats, &qe->stats, sizeof(struct rte_sched_queue_stats));
1050         memset(&qe->stats, 0, sizeof(struct rte_sched_queue_stats));
1051
1052         /* Queue length */
1053         *qlen = q->qw - q->qr;
1054
1055         return 0;
1056 }
1057
1058 static inline uint32_t
1059 rte_sched_port_qindex(struct rte_sched_port *port, uint32_t subport, uint32_t pipe, uint32_t traffic_class, uint32_t queue)
1060 {
1061         uint32_t result;
1062
1063         result = subport * port->n_pipes_per_subport + pipe;
1064         result = result * RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE + traffic_class;
1065         result = result * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS + queue;
1066
1067         return result;
1068 }
1069
1070 #ifdef RTE_SCHED_DEBUG
1071
1072 static inline int
1073 rte_sched_port_queue_is_empty(struct rte_sched_port *port, uint32_t qindex)
1074 {
1075         struct rte_sched_queue *queue = port->queue + qindex;
1076
1077         return queue->qr == queue->qw;
1078 }
1079
1080 #endif /* RTE_SCHED_DEBUG */
1081
1082 #ifdef RTE_SCHED_COLLECT_STATS
1083
1084 static inline void
1085 rte_sched_port_update_subport_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1086 {
1087         struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1088         uint32_t tc_index = (qindex >> 2) & 0x3;
1089         uint32_t pkt_len = pkt->pkt_len;
1090
1091         s->stats.n_pkts_tc[tc_index] += 1;
1092         s->stats.n_bytes_tc[tc_index] += pkt_len;
1093 }
1094
1095 #ifdef RTE_SCHED_RED
1096 static inline void
1097 rte_sched_port_update_subport_stats_on_drop(struct rte_sched_port *port,
1098                                                 uint32_t qindex,
1099                                                 struct rte_mbuf *pkt, uint32_t red)
1100 #else
1101 static inline void
1102 rte_sched_port_update_subport_stats_on_drop(struct rte_sched_port *port,
1103                                                 uint32_t qindex,
1104                                                 struct rte_mbuf *pkt, __rte_unused uint32_t red)
1105 #endif
1106 {
1107         struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1108         uint32_t tc_index = (qindex >> 2) & 0x3;
1109         uint32_t pkt_len = pkt->pkt_len;
1110
1111         s->stats.n_pkts_tc_dropped[tc_index] += 1;
1112         s->stats.n_bytes_tc_dropped[tc_index] += pkt_len;
1113 #ifdef RTE_SCHED_RED
1114         s->stats.n_pkts_red_dropped[tc_index] += red;
1115 #endif
1116 }
1117
1118 static inline void
1119 rte_sched_port_update_queue_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1120 {
1121         struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1122         uint32_t pkt_len = pkt->pkt_len;
1123
1124         qe->stats.n_pkts += 1;
1125         qe->stats.n_bytes += pkt_len;
1126 }
1127
1128 #ifdef RTE_SCHED_RED
1129 static inline void
1130 rte_sched_port_update_queue_stats_on_drop(struct rte_sched_port *port,
1131                                                 uint32_t qindex,
1132                                                 struct rte_mbuf *pkt, uint32_t red)
1133 #else
1134 static inline void
1135 rte_sched_port_update_queue_stats_on_drop(struct rte_sched_port *port,
1136                                                 uint32_t qindex,
1137                                                 struct rte_mbuf *pkt, __rte_unused uint32_t red)
1138 #endif
1139 {
1140         struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1141         uint32_t pkt_len = pkt->pkt_len;
1142
1143         qe->stats.n_pkts_dropped += 1;
1144         qe->stats.n_bytes_dropped += pkt_len;
1145 #ifdef RTE_SCHED_RED
1146         qe->stats.n_pkts_red_dropped += red;
1147 #endif
1148 }
1149
1150 #endif /* RTE_SCHED_COLLECT_STATS */
1151
1152 #ifdef RTE_SCHED_RED
1153
1154 static inline int
1155 rte_sched_port_red_drop(struct rte_sched_port *port, struct rte_mbuf *pkt, uint32_t qindex, uint16_t qlen)
1156 {
1157         struct rte_sched_queue_extra *qe;
1158         struct rte_red_config *red_cfg;
1159         struct rte_red *red;
1160         uint32_t tc_index;
1161         enum rte_meter_color color;
1162
1163         tc_index = (qindex >> 2) & 0x3;
1164         color = rte_sched_port_pkt_read_color(pkt);
1165         red_cfg = &port->red_config[tc_index][color];
1166
1167         if ((red_cfg->min_th | red_cfg->max_th) == 0)
1168                 return 0;
1169
1170         qe = port->queue_extra + qindex;
1171         red = &qe->red;
1172
1173         return rte_red_enqueue(red_cfg, red, qlen, port->time);
1174 }
1175
1176 static inline void
1177 rte_sched_port_set_queue_empty_timestamp(struct rte_sched_port *port, uint32_t qindex)
1178 {
1179         struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1180         struct rte_red *red = &qe->red;
1181
1182         rte_red_mark_queue_empty(red, port->time);
1183 }
1184
1185 #else
1186
1187 #define rte_sched_port_red_drop(port, pkt, qindex, qlen)             0
1188
1189 #define rte_sched_port_set_queue_empty_timestamp(port, qindex)
1190
1191 #endif /* RTE_SCHED_RED */
1192
1193 #ifdef RTE_SCHED_DEBUG
1194
1195 static inline void
1196 debug_check_queue_slab(struct rte_sched_port *port, uint32_t bmp_pos,
1197                        uint64_t bmp_slab)
1198 {
1199         uint64_t mask;
1200         uint32_t i, panic;
1201
1202         if (bmp_slab == 0)
1203                 rte_panic("Empty slab at position %u\n", bmp_pos);
1204
1205         panic = 0;
1206         for (i = 0, mask = 1; i < 64; i++, mask <<= 1) {
1207                 if (mask & bmp_slab) {
1208                         if (rte_sched_port_queue_is_empty(port, bmp_pos + i)) {
1209                                 printf("Queue %u (slab offset %u) is empty\n", bmp_pos + i, i);
1210                                 panic = 1;
1211                         }
1212                 }
1213         }
1214
1215         if (panic)
1216                 rte_panic("Empty queues in slab 0x%" PRIx64 "starting at position %u\n",
1217                         bmp_slab, bmp_pos);
1218 }
1219
1220 #endif /* RTE_SCHED_DEBUG */
1221
1222 static inline uint32_t
1223 rte_sched_port_enqueue_qptrs_prefetch0(struct rte_sched_port *port,
1224                                        struct rte_mbuf *pkt)
1225 {
1226         struct rte_sched_queue *q;
1227 #ifdef RTE_SCHED_COLLECT_STATS
1228         struct rte_sched_queue_extra *qe;
1229 #endif
1230         uint32_t subport, pipe, traffic_class, queue, qindex;
1231
1232         rte_sched_port_pkt_read_tree_path(pkt, &subport, &pipe, &traffic_class, &queue);
1233
1234         qindex = rte_sched_port_qindex(port, subport, pipe, traffic_class, queue);
1235         q = port->queue + qindex;
1236         rte_prefetch0(q);
1237 #ifdef RTE_SCHED_COLLECT_STATS
1238         qe = port->queue_extra + qindex;
1239         rte_prefetch0(qe);
1240 #endif
1241
1242         return qindex;
1243 }
1244
1245 static inline void
1246 rte_sched_port_enqueue_qwa_prefetch0(struct rte_sched_port *port,
1247                                      uint32_t qindex, struct rte_mbuf **qbase)
1248 {
1249         struct rte_sched_queue *q;
1250         struct rte_mbuf **q_qw;
1251         uint16_t qsize;
1252
1253         q = port->queue + qindex;
1254         qsize = rte_sched_port_qsize(port, qindex);
1255         q_qw = qbase + (q->qw & (qsize - 1));
1256
1257         rte_prefetch0(q_qw);
1258         rte_bitmap_prefetch0(port->bmp, qindex);
1259 }
1260
1261 static inline int
1262 rte_sched_port_enqueue_qwa(struct rte_sched_port *port, uint32_t qindex,
1263                            struct rte_mbuf **qbase, struct rte_mbuf *pkt)
1264 {
1265         struct rte_sched_queue *q;
1266         uint16_t qsize;
1267         uint16_t qlen;
1268
1269         q = port->queue + qindex;
1270         qsize = rte_sched_port_qsize(port, qindex);
1271         qlen = q->qw - q->qr;
1272
1273         /* Drop the packet (and update drop stats) when queue is full */
1274         if (unlikely(rte_sched_port_red_drop(port, pkt, qindex, qlen) ||
1275                      (qlen >= qsize))) {
1276                 rte_pktmbuf_free(pkt);
1277 #ifdef RTE_SCHED_COLLECT_STATS
1278                 rte_sched_port_update_subport_stats_on_drop(port, qindex, pkt,
1279                                                             qlen < qsize);
1280                 rte_sched_port_update_queue_stats_on_drop(port, qindex, pkt,
1281                                                           qlen < qsize);
1282 #endif
1283                 return 0;
1284         }
1285
1286         /* Enqueue packet */
1287         qbase[q->qw & (qsize - 1)] = pkt;
1288         q->qw++;
1289
1290         /* Activate queue in the port bitmap */
1291         rte_bitmap_set(port->bmp, qindex);
1292
1293         /* Statistics */
1294 #ifdef RTE_SCHED_COLLECT_STATS
1295         rte_sched_port_update_subport_stats(port, qindex, pkt);
1296         rte_sched_port_update_queue_stats(port, qindex, pkt);
1297 #endif
1298
1299         return 1;
1300 }
1301
1302
1303 /*
1304  * The enqueue function implements a 4-level pipeline with each stage
1305  * processing two different packets. The purpose of using a pipeline
1306  * is to hide the latency of prefetching the data structures. The
1307  * naming convention is presented in the diagram below:
1308  *
1309  *   p00  _______   p10  _______   p20  _______   p30  _______
1310  * ----->|       |----->|       |----->|       |----->|       |----->
1311  *       |   0   |      |   1   |      |   2   |      |   3   |
1312  * ----->|_______|----->|_______|----->|_______|----->|_______|----->
1313  *   p01            p11            p21            p31
1314  *
1315  */
1316 int
1317 rte_sched_port_enqueue(struct rte_sched_port *port, struct rte_mbuf **pkts,
1318                        uint32_t n_pkts)
1319 {
1320         struct rte_mbuf *pkt00, *pkt01, *pkt10, *pkt11, *pkt20, *pkt21,
1321                 *pkt30, *pkt31, *pkt_last;
1322         struct rte_mbuf **q00_base, **q01_base, **q10_base, **q11_base,
1323                 **q20_base, **q21_base, **q30_base, **q31_base, **q_last_base;
1324         uint32_t q00, q01, q10, q11, q20, q21, q30, q31, q_last;
1325         uint32_t r00, r01, r10, r11, r20, r21, r30, r31, r_last;
1326         uint32_t result, i;
1327
1328         result = 0;
1329
1330         /*
1331          * Less then 6 input packets available, which is not enough to
1332          * feed the pipeline
1333          */
1334         if (unlikely(n_pkts < 6)) {
1335                 struct rte_mbuf **q_base[5];
1336                 uint32_t q[5];
1337
1338                 /* Prefetch the mbuf structure of each packet */
1339                 for (i = 0; i < n_pkts; i++)
1340                         rte_prefetch0(pkts[i]);
1341
1342                 /* Prefetch the queue structure for each queue */
1343                 for (i = 0; i < n_pkts; i++)
1344                         q[i] = rte_sched_port_enqueue_qptrs_prefetch0(port,
1345                                                                       pkts[i]);
1346
1347                 /* Prefetch the write pointer location of each queue */
1348                 for (i = 0; i < n_pkts; i++) {
1349                         q_base[i] = rte_sched_port_qbase(port, q[i]);
1350                         rte_sched_port_enqueue_qwa_prefetch0(port, q[i],
1351                                                              q_base[i]);
1352                 }
1353
1354                 /* Write each packet to its queue */
1355                 for (i = 0; i < n_pkts; i++)
1356                         result += rte_sched_port_enqueue_qwa(port, q[i],
1357                                                              q_base[i], pkts[i]);
1358
1359                 return result;
1360         }
1361
1362         /* Feed the first 3 stages of the pipeline (6 packets needed) */
1363         pkt20 = pkts[0];
1364         pkt21 = pkts[1];
1365         rte_prefetch0(pkt20);
1366         rte_prefetch0(pkt21);
1367
1368         pkt10 = pkts[2];
1369         pkt11 = pkts[3];
1370         rte_prefetch0(pkt10);
1371         rte_prefetch0(pkt11);
1372
1373         q20 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt20);
1374         q21 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt21);
1375
1376         pkt00 = pkts[4];
1377         pkt01 = pkts[5];
1378         rte_prefetch0(pkt00);
1379         rte_prefetch0(pkt01);
1380
1381         q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1382         q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1383
1384         q20_base = rte_sched_port_qbase(port, q20);
1385         q21_base = rte_sched_port_qbase(port, q21);
1386         rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1387         rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1388
1389         /* Run the pipeline */
1390         for (i = 6; i < (n_pkts & (~1)); i += 2) {
1391                 /* Propagate stage inputs */
1392                 pkt30 = pkt20;
1393                 pkt31 = pkt21;
1394                 pkt20 = pkt10;
1395                 pkt21 = pkt11;
1396                 pkt10 = pkt00;
1397                 pkt11 = pkt01;
1398                 q30 = q20;
1399                 q31 = q21;
1400                 q20 = q10;
1401                 q21 = q11;
1402                 q30_base = q20_base;
1403                 q31_base = q21_base;
1404
1405                 /* Stage 0: Get packets in */
1406                 pkt00 = pkts[i];
1407                 pkt01 = pkts[i + 1];
1408                 rte_prefetch0(pkt00);
1409                 rte_prefetch0(pkt01);
1410
1411                 /* Stage 1: Prefetch queue structure storing queue pointers */
1412                 q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1413                 q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1414
1415                 /* Stage 2: Prefetch queue write location */
1416                 q20_base = rte_sched_port_qbase(port, q20);
1417                 q21_base = rte_sched_port_qbase(port, q21);
1418                 rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1419                 rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1420
1421                 /* Stage 3: Write packet to queue and activate queue */
1422                 r30 = rte_sched_port_enqueue_qwa(port, q30, q30_base, pkt30);
1423                 r31 = rte_sched_port_enqueue_qwa(port, q31, q31_base, pkt31);
1424                 result += r30 + r31;
1425         }
1426
1427         /*
1428          * Drain the pipeline (exactly 6 packets).
1429          * Handle the last packet in the case
1430          * of an odd number of input packets.
1431          */
1432         pkt_last = pkts[n_pkts - 1];
1433         rte_prefetch0(pkt_last);
1434
1435         q00 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt00);
1436         q01 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt01);
1437
1438         q10_base = rte_sched_port_qbase(port, q10);
1439         q11_base = rte_sched_port_qbase(port, q11);
1440         rte_sched_port_enqueue_qwa_prefetch0(port, q10, q10_base);
1441         rte_sched_port_enqueue_qwa_prefetch0(port, q11, q11_base);
1442
1443         r20 = rte_sched_port_enqueue_qwa(port, q20, q20_base, pkt20);
1444         r21 = rte_sched_port_enqueue_qwa(port, q21, q21_base, pkt21);
1445         result += r20 + r21;
1446
1447         q_last = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt_last);
1448
1449         q00_base = rte_sched_port_qbase(port, q00);
1450         q01_base = rte_sched_port_qbase(port, q01);
1451         rte_sched_port_enqueue_qwa_prefetch0(port, q00, q00_base);
1452         rte_sched_port_enqueue_qwa_prefetch0(port, q01, q01_base);
1453
1454         r10 = rte_sched_port_enqueue_qwa(port, q10, q10_base, pkt10);
1455         r11 = rte_sched_port_enqueue_qwa(port, q11, q11_base, pkt11);
1456         result += r10 + r11;
1457
1458         q_last_base = rte_sched_port_qbase(port, q_last);
1459         rte_sched_port_enqueue_qwa_prefetch0(port, q_last, q_last_base);
1460
1461         r00 = rte_sched_port_enqueue_qwa(port, q00, q00_base, pkt00);
1462         r01 = rte_sched_port_enqueue_qwa(port, q01, q01_base, pkt01);
1463         result += r00 + r01;
1464
1465         if (n_pkts & 1) {
1466                 r_last = rte_sched_port_enqueue_qwa(port, q_last, q_last_base, pkt_last);
1467                 result += r_last;
1468         }
1469
1470         return result;
1471 }
1472
1473 #ifndef RTE_SCHED_SUBPORT_TC_OV
1474
1475 static inline void
1476 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1477 {
1478         struct rte_sched_grinder *grinder = port->grinder + pos;
1479         struct rte_sched_subport *subport = grinder->subport;
1480         struct rte_sched_pipe *pipe = grinder->pipe;
1481         struct rte_sched_pipe_profile *params = grinder->pipe_params;
1482         uint64_t n_periods;
1483
1484         /* Subport TB */
1485         n_periods = (port->time - subport->tb_time) / subport->tb_period;
1486         subport->tb_credits += n_periods * subport->tb_credits_per_period;
1487         subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1488         subport->tb_time += n_periods * subport->tb_period;
1489
1490         /* Pipe TB */
1491         n_periods = (port->time - pipe->tb_time) / params->tb_period;
1492         pipe->tb_credits += n_periods * params->tb_credits_per_period;
1493         pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1494         pipe->tb_time += n_periods * params->tb_period;
1495
1496         /* Subport TCs */
1497         if (unlikely(port->time >= subport->tc_time)) {
1498                 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1499                 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1500                 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1501                 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1502                 subport->tc_time = port->time + subport->tc_period;
1503         }
1504
1505         /* Pipe TCs */
1506         if (unlikely(port->time >= pipe->tc_time)) {
1507                 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1508                 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1509                 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1510                 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1511                 pipe->tc_time = port->time + params->tc_period;
1512         }
1513 }
1514
1515 #else
1516
1517 static inline uint32_t
1518 grinder_tc_ov_credits_update(struct rte_sched_port *port, uint32_t pos)
1519 {
1520         struct rte_sched_grinder *grinder = port->grinder + pos;
1521         struct rte_sched_subport *subport = grinder->subport;
1522         uint32_t tc_ov_consumption[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
1523         uint32_t tc_ov_consumption_max;
1524         uint32_t tc_ov_wm = subport->tc_ov_wm;
1525
1526         if (subport->tc_ov == 0)
1527                 return subport->tc_ov_wm_max;
1528
1529         tc_ov_consumption[0] = subport->tc_credits_per_period[0] - subport->tc_credits[0];
1530         tc_ov_consumption[1] = subport->tc_credits_per_period[1] - subport->tc_credits[1];
1531         tc_ov_consumption[2] = subport->tc_credits_per_period[2] - subport->tc_credits[2];
1532         tc_ov_consumption[3] = subport->tc_credits_per_period[3] - subport->tc_credits[3];
1533
1534         tc_ov_consumption_max = subport->tc_credits_per_period[3] -
1535                 (tc_ov_consumption[0] + tc_ov_consumption[1] + tc_ov_consumption[2]);
1536
1537         if (tc_ov_consumption[3] > (tc_ov_consumption_max - port->mtu)) {
1538                 tc_ov_wm  -= tc_ov_wm >> 7;
1539                 if (tc_ov_wm < subport->tc_ov_wm_min)
1540                         tc_ov_wm = subport->tc_ov_wm_min;
1541
1542                 return tc_ov_wm;
1543         }
1544
1545         tc_ov_wm += (tc_ov_wm >> 7) + 1;
1546         if (tc_ov_wm > subport->tc_ov_wm_max)
1547                 tc_ov_wm = subport->tc_ov_wm_max;
1548
1549         return tc_ov_wm;
1550 }
1551
1552 static inline void
1553 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1554 {
1555         struct rte_sched_grinder *grinder = port->grinder + pos;
1556         struct rte_sched_subport *subport = grinder->subport;
1557         struct rte_sched_pipe *pipe = grinder->pipe;
1558         struct rte_sched_pipe_profile *params = grinder->pipe_params;
1559         uint64_t n_periods;
1560
1561         /* Subport TB */
1562         n_periods = (port->time - subport->tb_time) / subport->tb_period;
1563         subport->tb_credits += n_periods * subport->tb_credits_per_period;
1564         subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1565         subport->tb_time += n_periods * subport->tb_period;
1566
1567         /* Pipe TB */
1568         n_periods = (port->time - pipe->tb_time) / params->tb_period;
1569         pipe->tb_credits += n_periods * params->tb_credits_per_period;
1570         pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1571         pipe->tb_time += n_periods * params->tb_period;
1572
1573         /* Subport TCs */
1574         if (unlikely(port->time >= subport->tc_time)) {
1575                 subport->tc_ov_wm = grinder_tc_ov_credits_update(port, pos);
1576
1577                 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1578                 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1579                 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1580                 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1581
1582                 subport->tc_time = port->time + subport->tc_period;
1583                 subport->tc_ov_period_id++;
1584         }
1585
1586         /* Pipe TCs */
1587         if (unlikely(port->time >= pipe->tc_time)) {
1588                 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1589                 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1590                 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1591                 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1592                 pipe->tc_time = port->time + params->tc_period;
1593         }
1594
1595         /* Pipe TCs - Oversubscription */
1596         if (unlikely(pipe->tc_ov_period_id != subport->tc_ov_period_id)) {
1597                 pipe->tc_ov_credits = subport->tc_ov_wm * params->tc_ov_weight;
1598
1599                 pipe->tc_ov_period_id = subport->tc_ov_period_id;
1600         }
1601 }
1602
1603 #endif /* RTE_SCHED_TS_CREDITS_UPDATE, RTE_SCHED_SUBPORT_TC_OV */
1604
1605
1606 #ifndef RTE_SCHED_SUBPORT_TC_OV
1607
1608 static inline int
1609 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1610 {
1611         struct rte_sched_grinder *grinder = port->grinder + pos;
1612         struct rte_sched_subport *subport = grinder->subport;
1613         struct rte_sched_pipe *pipe = grinder->pipe;
1614         struct rte_mbuf *pkt = grinder->pkt;
1615         uint32_t tc_index = grinder->tc_index;
1616         uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1617         uint32_t subport_tb_credits = subport->tb_credits;
1618         uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1619         uint32_t pipe_tb_credits = pipe->tb_credits;
1620         uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1621         int enough_credits;
1622
1623         /* Check queue credits */
1624         enough_credits = (pkt_len <= subport_tb_credits) &&
1625                 (pkt_len <= subport_tc_credits) &&
1626                 (pkt_len <= pipe_tb_credits) &&
1627                 (pkt_len <= pipe_tc_credits);
1628
1629         if (!enough_credits)
1630                 return 0;
1631
1632         /* Update port credits */
1633         subport->tb_credits -= pkt_len;
1634         subport->tc_credits[tc_index] -= pkt_len;
1635         pipe->tb_credits -= pkt_len;
1636         pipe->tc_credits[tc_index] -= pkt_len;
1637
1638         return 1;
1639 }
1640
1641 #else
1642
1643 static inline int
1644 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1645 {
1646         struct rte_sched_grinder *grinder = port->grinder + pos;
1647         struct rte_sched_subport *subport = grinder->subport;
1648         struct rte_sched_pipe *pipe = grinder->pipe;
1649         struct rte_mbuf *pkt = grinder->pkt;
1650         uint32_t tc_index = grinder->tc_index;
1651         uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1652         uint32_t subport_tb_credits = subport->tb_credits;
1653         uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1654         uint32_t pipe_tb_credits = pipe->tb_credits;
1655         uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1656         uint32_t pipe_tc_ov_mask1[] = {UINT32_MAX, UINT32_MAX, UINT32_MAX, pipe->tc_ov_credits};
1657         uint32_t pipe_tc_ov_mask2[] = {0, 0, 0, UINT32_MAX};
1658         uint32_t pipe_tc_ov_credits = pipe_tc_ov_mask1[tc_index];
1659         int enough_credits;
1660
1661         /* Check pipe and subport credits */
1662         enough_credits = (pkt_len <= subport_tb_credits) &&
1663                 (pkt_len <= subport_tc_credits) &&
1664                 (pkt_len <= pipe_tb_credits) &&
1665                 (pkt_len <= pipe_tc_credits) &&
1666                 (pkt_len <= pipe_tc_ov_credits);
1667
1668         if (!enough_credits)
1669                 return 0;
1670
1671         /* Update pipe and subport credits */
1672         subport->tb_credits -= pkt_len;
1673         subport->tc_credits[tc_index] -= pkt_len;
1674         pipe->tb_credits -= pkt_len;
1675         pipe->tc_credits[tc_index] -= pkt_len;
1676         pipe->tc_ov_credits -= pipe_tc_ov_mask2[tc_index] & pkt_len;
1677
1678         return 1;
1679 }
1680
1681 #endif /* RTE_SCHED_SUBPORT_TC_OV */
1682
1683
1684 static inline int
1685 grinder_schedule(struct rte_sched_port *port, uint32_t pos)
1686 {
1687         struct rte_sched_grinder *grinder = port->grinder + pos;
1688         struct rte_sched_queue *queue = grinder->queue[grinder->qpos];
1689         struct rte_mbuf *pkt = grinder->pkt;
1690         uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1691
1692         if (!grinder_credits_check(port, pos))
1693                 return 0;
1694
1695         /* Advance port time */
1696         port->time += pkt_len;
1697
1698         /* Send packet */
1699         port->pkts_out[port->n_pkts_out++] = pkt;
1700         queue->qr++;
1701         grinder->wrr_tokens[grinder->qpos] += pkt_len * grinder->wrr_cost[grinder->qpos];
1702         if (queue->qr == queue->qw) {
1703                 uint32_t qindex = grinder->qindex[grinder->qpos];
1704
1705                 rte_bitmap_clear(port->bmp, qindex);
1706                 grinder->qmask &= ~(1 << grinder->qpos);
1707                 grinder->wrr_mask[grinder->qpos] = 0;
1708                 rte_sched_port_set_queue_empty_timestamp(port, qindex);
1709         }
1710
1711         /* Reset pipe loop detection */
1712         port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1713         grinder->productive = 1;
1714
1715         return 1;
1716 }
1717
1718 #ifdef SCHED_VECTOR_SSE4
1719
1720 static inline int
1721 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1722 {
1723         __m128i index = _mm_set1_epi32(base_pipe);
1724         __m128i pipes = _mm_load_si128((__m128i *)port->grinder_base_bmp_pos);
1725         __m128i res = _mm_cmpeq_epi32(pipes, index);
1726
1727         pipes = _mm_load_si128((__m128i *)(port->grinder_base_bmp_pos + 4));
1728         pipes = _mm_cmpeq_epi32(pipes, index);
1729         res = _mm_or_si128(res, pipes);
1730
1731         if (_mm_testz_si128(res, res))
1732                 return 0;
1733
1734         return 1;
1735 }
1736
1737 #elif defined(SCHED_VECTOR_NEON)
1738
1739 static inline int
1740 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1741 {
1742         uint32x4_t index, pipes;
1743         uint32_t *pos = (uint32_t *)port->grinder_base_bmp_pos;
1744
1745         index = vmovq_n_u32(base_pipe);
1746         pipes = vld1q_u32(pos);
1747         if (!vminvq_u32(veorq_u32(pipes, index)))
1748                 return 1;
1749
1750         pipes = vld1q_u32(pos + 4);
1751         if (!vminvq_u32(veorq_u32(pipes, index)))
1752                 return 1;
1753
1754         return 0;
1755 }
1756
1757 #else
1758
1759 static inline int
1760 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1761 {
1762         uint32_t i;
1763
1764         for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i++) {
1765                 if (port->grinder_base_bmp_pos[i] == base_pipe)
1766                         return 1;
1767         }
1768
1769         return 0;
1770 }
1771
1772 #endif /* RTE_SCHED_OPTIMIZATIONS */
1773
1774 static inline void
1775 grinder_pcache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t bmp_pos, uint64_t bmp_slab)
1776 {
1777         struct rte_sched_grinder *grinder = port->grinder + pos;
1778         uint16_t w[4];
1779
1780         grinder->pcache_w = 0;
1781         grinder->pcache_r = 0;
1782
1783         w[0] = (uint16_t) bmp_slab;
1784         w[1] = (uint16_t) (bmp_slab >> 16);
1785         w[2] = (uint16_t) (bmp_slab >> 32);
1786         w[3] = (uint16_t) (bmp_slab >> 48);
1787
1788         grinder->pcache_qmask[grinder->pcache_w] = w[0];
1789         grinder->pcache_qindex[grinder->pcache_w] = bmp_pos;
1790         grinder->pcache_w += (w[0] != 0);
1791
1792         grinder->pcache_qmask[grinder->pcache_w] = w[1];
1793         grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 16;
1794         grinder->pcache_w += (w[1] != 0);
1795
1796         grinder->pcache_qmask[grinder->pcache_w] = w[2];
1797         grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 32;
1798         grinder->pcache_w += (w[2] != 0);
1799
1800         grinder->pcache_qmask[grinder->pcache_w] = w[3];
1801         grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 48;
1802         grinder->pcache_w += (w[3] != 0);
1803 }
1804
1805 static inline void
1806 grinder_tccache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t qindex, uint16_t qmask)
1807 {
1808         struct rte_sched_grinder *grinder = port->grinder + pos;
1809         uint8_t b[4];
1810
1811         grinder->tccache_w = 0;
1812         grinder->tccache_r = 0;
1813
1814         b[0] = (uint8_t) (qmask & 0xF);
1815         b[1] = (uint8_t) ((qmask >> 4) & 0xF);
1816         b[2] = (uint8_t) ((qmask >> 8) & 0xF);
1817         b[3] = (uint8_t) ((qmask >> 12) & 0xF);
1818
1819         grinder->tccache_qmask[grinder->tccache_w] = b[0];
1820         grinder->tccache_qindex[grinder->tccache_w] = qindex;
1821         grinder->tccache_w += (b[0] != 0);
1822
1823         grinder->tccache_qmask[grinder->tccache_w] = b[1];
1824         grinder->tccache_qindex[grinder->tccache_w] = qindex + 4;
1825         grinder->tccache_w += (b[1] != 0);
1826
1827         grinder->tccache_qmask[grinder->tccache_w] = b[2];
1828         grinder->tccache_qindex[grinder->tccache_w] = qindex + 8;
1829         grinder->tccache_w += (b[2] != 0);
1830
1831         grinder->tccache_qmask[grinder->tccache_w] = b[3];
1832         grinder->tccache_qindex[grinder->tccache_w] = qindex + 12;
1833         grinder->tccache_w += (b[3] != 0);
1834 }
1835
1836 static inline int
1837 grinder_next_tc(struct rte_sched_port *port, uint32_t pos)
1838 {
1839         struct rte_sched_grinder *grinder = port->grinder + pos;
1840         struct rte_mbuf **qbase;
1841         uint32_t qindex;
1842         uint16_t qsize;
1843
1844         if (grinder->tccache_r == grinder->tccache_w)
1845                 return 0;
1846
1847         qindex = grinder->tccache_qindex[grinder->tccache_r];
1848         qbase = rte_sched_port_qbase(port, qindex);
1849         qsize = rte_sched_port_qsize(port, qindex);
1850
1851         grinder->tc_index = (qindex >> 2) & 0x3;
1852         grinder->qmask = grinder->tccache_qmask[grinder->tccache_r];
1853         grinder->qsize = qsize;
1854
1855         grinder->qindex[0] = qindex;
1856         grinder->qindex[1] = qindex + 1;
1857         grinder->qindex[2] = qindex + 2;
1858         grinder->qindex[3] = qindex + 3;
1859
1860         grinder->queue[0] = port->queue + qindex;
1861         grinder->queue[1] = port->queue + qindex + 1;
1862         grinder->queue[2] = port->queue + qindex + 2;
1863         grinder->queue[3] = port->queue + qindex + 3;
1864
1865         grinder->qbase[0] = qbase;
1866         grinder->qbase[1] = qbase + qsize;
1867         grinder->qbase[2] = qbase + 2 * qsize;
1868         grinder->qbase[3] = qbase + 3 * qsize;
1869
1870         grinder->tccache_r++;
1871         return 1;
1872 }
1873
1874 static inline int
1875 grinder_next_pipe(struct rte_sched_port *port, uint32_t pos)
1876 {
1877         struct rte_sched_grinder *grinder = port->grinder + pos;
1878         uint32_t pipe_qindex;
1879         uint16_t pipe_qmask;
1880
1881         if (grinder->pcache_r < grinder->pcache_w) {
1882                 pipe_qmask = grinder->pcache_qmask[grinder->pcache_r];
1883                 pipe_qindex = grinder->pcache_qindex[grinder->pcache_r];
1884                 grinder->pcache_r++;
1885         } else {
1886                 uint64_t bmp_slab = 0;
1887                 uint32_t bmp_pos = 0;
1888
1889                 /* Get another non-empty pipe group */
1890                 if (unlikely(rte_bitmap_scan(port->bmp, &bmp_pos, &bmp_slab) <= 0))
1891                         return 0;
1892
1893 #ifdef RTE_SCHED_DEBUG
1894                 debug_check_queue_slab(port, bmp_pos, bmp_slab);
1895 #endif
1896
1897                 /* Return if pipe group already in one of the other grinders */
1898                 port->grinder_base_bmp_pos[pos] = RTE_SCHED_BMP_POS_INVALID;
1899                 if (unlikely(grinder_pipe_exists(port, bmp_pos)))
1900                         return 0;
1901
1902                 port->grinder_base_bmp_pos[pos] = bmp_pos;
1903
1904                 /* Install new pipe group into grinder's pipe cache */
1905                 grinder_pcache_populate(port, pos, bmp_pos, bmp_slab);
1906
1907                 pipe_qmask = grinder->pcache_qmask[0];
1908                 pipe_qindex = grinder->pcache_qindex[0];
1909                 grinder->pcache_r = 1;
1910         }
1911
1912         /* Install new pipe in the grinder */
1913         grinder->pindex = pipe_qindex >> 4;
1914         grinder->subport = port->subport + (grinder->pindex / port->n_pipes_per_subport);
1915         grinder->pipe = port->pipe + grinder->pindex;
1916         grinder->pipe_params = NULL; /* to be set after the pipe structure is prefetched */
1917         grinder->productive = 0;
1918
1919         grinder_tccache_populate(port, pos, pipe_qindex, pipe_qmask);
1920         grinder_next_tc(port, pos);
1921
1922         /* Check for pipe exhaustion */
1923         if (grinder->pindex == port->pipe_loop) {
1924                 port->pipe_exhaustion = 1;
1925                 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1926         }
1927
1928         return 1;
1929 }
1930
1931
1932 static inline void
1933 grinder_wrr_load(struct rte_sched_port *port, uint32_t pos)
1934 {
1935         struct rte_sched_grinder *grinder = port->grinder + pos;
1936         struct rte_sched_pipe *pipe = grinder->pipe;
1937         struct rte_sched_pipe_profile *pipe_params = grinder->pipe_params;
1938         uint32_t tc_index = grinder->tc_index;
1939         uint32_t qmask = grinder->qmask;
1940         uint32_t qindex;
1941
1942         qindex = tc_index * 4;
1943
1944         grinder->wrr_tokens[0] = ((uint16_t) pipe->wrr_tokens[qindex]) << RTE_SCHED_WRR_SHIFT;
1945         grinder->wrr_tokens[1] = ((uint16_t) pipe->wrr_tokens[qindex + 1]) << RTE_SCHED_WRR_SHIFT;
1946         grinder->wrr_tokens[2] = ((uint16_t) pipe->wrr_tokens[qindex + 2]) << RTE_SCHED_WRR_SHIFT;
1947         grinder->wrr_tokens[3] = ((uint16_t) pipe->wrr_tokens[qindex + 3]) << RTE_SCHED_WRR_SHIFT;
1948
1949         grinder->wrr_mask[0] = (qmask & 0x1) * 0xFFFF;
1950         grinder->wrr_mask[1] = ((qmask >> 1) & 0x1) * 0xFFFF;
1951         grinder->wrr_mask[2] = ((qmask >> 2) & 0x1) * 0xFFFF;
1952         grinder->wrr_mask[3] = ((qmask >> 3) & 0x1) * 0xFFFF;
1953
1954         grinder->wrr_cost[0] = pipe_params->wrr_cost[qindex];
1955         grinder->wrr_cost[1] = pipe_params->wrr_cost[qindex + 1];
1956         grinder->wrr_cost[2] = pipe_params->wrr_cost[qindex + 2];
1957         grinder->wrr_cost[3] = pipe_params->wrr_cost[qindex + 3];
1958 }
1959
1960 static inline void
1961 grinder_wrr_store(struct rte_sched_port *port, uint32_t pos)
1962 {
1963         struct rte_sched_grinder *grinder = port->grinder + pos;
1964         struct rte_sched_pipe *pipe = grinder->pipe;
1965         uint32_t tc_index = grinder->tc_index;
1966         uint32_t qindex;
1967
1968         qindex = tc_index * 4;
1969
1970         pipe->wrr_tokens[qindex] = (grinder->wrr_tokens[0] & grinder->wrr_mask[0])
1971                 >> RTE_SCHED_WRR_SHIFT;
1972         pipe->wrr_tokens[qindex + 1] = (grinder->wrr_tokens[1] & grinder->wrr_mask[1])
1973                 >> RTE_SCHED_WRR_SHIFT;
1974         pipe->wrr_tokens[qindex + 2] = (grinder->wrr_tokens[2] & grinder->wrr_mask[2])
1975                 >> RTE_SCHED_WRR_SHIFT;
1976         pipe->wrr_tokens[qindex + 3] = (grinder->wrr_tokens[3] & grinder->wrr_mask[3])
1977                 >> RTE_SCHED_WRR_SHIFT;
1978 }
1979
1980 static inline void
1981 grinder_wrr(struct rte_sched_port *port, uint32_t pos)
1982 {
1983         struct rte_sched_grinder *grinder = port->grinder + pos;
1984         uint16_t wrr_tokens_min;
1985
1986         grinder->wrr_tokens[0] |= ~grinder->wrr_mask[0];
1987         grinder->wrr_tokens[1] |= ~grinder->wrr_mask[1];
1988         grinder->wrr_tokens[2] |= ~grinder->wrr_mask[2];
1989         grinder->wrr_tokens[3] |= ~grinder->wrr_mask[3];
1990
1991         grinder->qpos = rte_min_pos_4_u16(grinder->wrr_tokens);
1992         wrr_tokens_min = grinder->wrr_tokens[grinder->qpos];
1993
1994         grinder->wrr_tokens[0] -= wrr_tokens_min;
1995         grinder->wrr_tokens[1] -= wrr_tokens_min;
1996         grinder->wrr_tokens[2] -= wrr_tokens_min;
1997         grinder->wrr_tokens[3] -= wrr_tokens_min;
1998 }
1999
2000
2001 #define grinder_evict(port, pos)
2002
2003 static inline void
2004 grinder_prefetch_pipe(struct rte_sched_port *port, uint32_t pos)
2005 {
2006         struct rte_sched_grinder *grinder = port->grinder + pos;
2007
2008         rte_prefetch0(grinder->pipe);
2009         rte_prefetch0(grinder->queue[0]);
2010 }
2011
2012 static inline void
2013 grinder_prefetch_tc_queue_arrays(struct rte_sched_port *port, uint32_t pos)
2014 {
2015         struct rte_sched_grinder *grinder = port->grinder + pos;
2016         uint16_t qsize, qr[4];
2017
2018         qsize = grinder->qsize;
2019         qr[0] = grinder->queue[0]->qr & (qsize - 1);
2020         qr[1] = grinder->queue[1]->qr & (qsize - 1);
2021         qr[2] = grinder->queue[2]->qr & (qsize - 1);
2022         qr[3] = grinder->queue[3]->qr & (qsize - 1);
2023
2024         rte_prefetch0(grinder->qbase[0] + qr[0]);
2025         rte_prefetch0(grinder->qbase[1] + qr[1]);
2026
2027         grinder_wrr_load(port, pos);
2028         grinder_wrr(port, pos);
2029
2030         rte_prefetch0(grinder->qbase[2] + qr[2]);
2031         rte_prefetch0(grinder->qbase[3] + qr[3]);
2032 }
2033
2034 static inline void
2035 grinder_prefetch_mbuf(struct rte_sched_port *port, uint32_t pos)
2036 {
2037         struct rte_sched_grinder *grinder = port->grinder + pos;
2038         uint32_t qpos = grinder->qpos;
2039         struct rte_mbuf **qbase = grinder->qbase[qpos];
2040         uint16_t qsize = grinder->qsize;
2041         uint16_t qr = grinder->queue[qpos]->qr & (qsize - 1);
2042
2043         grinder->pkt = qbase[qr];
2044         rte_prefetch0(grinder->pkt);
2045
2046         if (unlikely((qr & 0x7) == 7)) {
2047                 uint16_t qr_next = (grinder->queue[qpos]->qr + 1) & (qsize - 1);
2048
2049                 rte_prefetch0(qbase + qr_next);
2050         }
2051 }
2052
2053 static inline uint32_t
2054 grinder_handle(struct rte_sched_port *port, uint32_t pos)
2055 {
2056         struct rte_sched_grinder *grinder = port->grinder + pos;
2057
2058         switch (grinder->state) {
2059         case e_GRINDER_PREFETCH_PIPE:
2060         {
2061                 if (grinder_next_pipe(port, pos)) {
2062                         grinder_prefetch_pipe(port, pos);
2063                         port->busy_grinders++;
2064
2065                         grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2066                         return 0;
2067                 }
2068
2069                 return 0;
2070         }
2071
2072         case e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS:
2073         {
2074                 struct rte_sched_pipe *pipe = grinder->pipe;
2075
2076                 grinder->pipe_params = port->pipe_profiles + pipe->profile;
2077                 grinder_prefetch_tc_queue_arrays(port, pos);
2078                 grinder_credits_update(port, pos);
2079
2080                 grinder->state = e_GRINDER_PREFETCH_MBUF;
2081                 return 0;
2082         }
2083
2084         case e_GRINDER_PREFETCH_MBUF:
2085         {
2086                 grinder_prefetch_mbuf(port, pos);
2087
2088                 grinder->state = e_GRINDER_READ_MBUF;
2089                 return 0;
2090         }
2091
2092         case e_GRINDER_READ_MBUF:
2093         {
2094                 uint32_t result = 0;
2095
2096                 result = grinder_schedule(port, pos);
2097
2098                 /* Look for next packet within the same TC */
2099                 if (result && grinder->qmask) {
2100                         grinder_wrr(port, pos);
2101                         grinder_prefetch_mbuf(port, pos);
2102
2103                         return 1;
2104                 }
2105                 grinder_wrr_store(port, pos);
2106
2107                 /* Look for another active TC within same pipe */
2108                 if (grinder_next_tc(port, pos)) {
2109                         grinder_prefetch_tc_queue_arrays(port, pos);
2110
2111                         grinder->state = e_GRINDER_PREFETCH_MBUF;
2112                         return result;
2113                 }
2114
2115                 if (grinder->productive == 0 &&
2116                     port->pipe_loop == RTE_SCHED_PIPE_INVALID)
2117                         port->pipe_loop = grinder->pindex;
2118
2119                 grinder_evict(port, pos);
2120
2121                 /* Look for another active pipe */
2122                 if (grinder_next_pipe(port, pos)) {
2123                         grinder_prefetch_pipe(port, pos);
2124
2125                         grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2126                         return result;
2127                 }
2128
2129                 /* No active pipe found */
2130                 port->busy_grinders--;
2131
2132                 grinder->state = e_GRINDER_PREFETCH_PIPE;
2133                 return result;
2134         }
2135
2136         default:
2137                 rte_panic("Algorithmic error (invalid state)\n");
2138                 return 0;
2139         }
2140 }
2141
2142 static inline void
2143 rte_sched_port_time_resync(struct rte_sched_port *port)
2144 {
2145         uint64_t cycles = rte_get_tsc_cycles();
2146         uint64_t cycles_diff = cycles - port->time_cpu_cycles;
2147         uint64_t bytes_diff;
2148
2149         /* Compute elapsed time in bytes */
2150         bytes_diff = rte_reciprocal_divide(cycles_diff << RTE_SCHED_TIME_SHIFT,
2151                                            port->inv_cycles_per_byte);
2152
2153         /* Advance port time */
2154         port->time_cpu_cycles = cycles;
2155         port->time_cpu_bytes += bytes_diff;
2156         if (port->time < port->time_cpu_bytes)
2157                 port->time = port->time_cpu_bytes;
2158
2159         /* Reset pipe loop detection */
2160         port->pipe_loop = RTE_SCHED_PIPE_INVALID;
2161 }
2162
2163 static inline int
2164 rte_sched_port_exceptions(struct rte_sched_port *port, int second_pass)
2165 {
2166         int exceptions;
2167
2168         /* Check if any exception flag is set */
2169         exceptions = (second_pass && port->busy_grinders == 0) ||
2170                 (port->pipe_exhaustion == 1);
2171
2172         /* Clear exception flags */
2173         port->pipe_exhaustion = 0;
2174
2175         return exceptions;
2176 }
2177
2178 int
2179 rte_sched_port_dequeue(struct rte_sched_port *port, struct rte_mbuf **pkts, uint32_t n_pkts)
2180 {
2181         uint32_t i, count;
2182
2183         port->pkts_out = pkts;
2184         port->n_pkts_out = 0;
2185
2186         rte_sched_port_time_resync(port);
2187
2188         /* Take each queue in the grinder one step further */
2189         for (i = 0, count = 0; ; i++)  {
2190                 count += grinder_handle(port, i & (RTE_SCHED_PORT_N_GRINDERS - 1));
2191                 if ((count == n_pkts) ||
2192                     rte_sched_port_exceptions(port, i >= RTE_SCHED_PORT_N_GRINDERS)) {
2193                         break;
2194                 }
2195         }
2196
2197         return count;
2198 }