4 * Copyright(c) 2010-2013 Intel Corporation. All rights reserved.
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38 #include <rte_common.h>
40 #include <rte_memory.h>
41 #include <rte_memzone.h>
42 #include <rte_cycles.h>
43 #include <rte_prefetch.h>
44 #include <rte_branch_prediction.h>
47 #include "rte_sched.h"
48 #include "rte_bitmap.h"
49 #include "rte_sched_common.h"
50 #include "rte_approx.h"
52 #ifdef __INTEL_COMPILER
53 #pragma warning(disable:2259) /* conversion may lose significant bits */
56 #ifndef RTE_SCHED_DEBUG
57 #define RTE_SCHED_DEBUG 0
60 #ifndef RTE_SCHED_OPTIMIZATIONS
61 #define RTE_SCHED_OPTIMIZATIONS 0
64 #if RTE_SCHED_OPTIMIZATIONS
65 #include <immintrin.h>
68 #define RTE_SCHED_ENQUEUE 1
70 #define RTE_SCHED_TS 1
72 #if RTE_SCHED_TS == 0 /* Infinite credits. Traffic shaping disabled. */
73 #define RTE_SCHED_TS_CREDITS_UPDATE 0
74 #define RTE_SCHED_TS_CREDITS_CHECK 0
75 #else /* Real Credits. Full traffic shaping implemented. */
76 #define RTE_SCHED_TS_CREDITS_UPDATE 1
77 #define RTE_SCHED_TS_CREDITS_CHECK 1
80 #ifndef RTE_SCHED_TB_RATE_CONFIG_ERR
81 #define RTE_SCHED_TB_RATE_CONFIG_ERR (1e-7)
84 #define RTE_SCHED_WRR 1
86 #ifndef RTE_SCHED_WRR_SHIFT
87 #define RTE_SCHED_WRR_SHIFT 3
90 #ifndef RTE_SCHED_PORT_N_GRINDERS
91 #define RTE_SCHED_PORT_N_GRINDERS 8
93 #if (RTE_SCHED_PORT_N_GRINDERS == 0) || (RTE_SCHED_PORT_N_GRINDERS & (RTE_SCHED_PORT_N_GRINDERS - 1))
94 #error Number of grinders must be non-zero and a power of 2
96 #if (RTE_SCHED_OPTIMIZATIONS && (RTE_SCHED_PORT_N_GRINDERS != 8))
97 #error Number of grinders must be 8 when RTE_SCHED_OPTIMIZATIONS is set
100 #define RTE_SCHED_GRINDER_PCACHE_SIZE (64 / RTE_SCHED_QUEUES_PER_PIPE)
102 #define RTE_SCHED_PIPE_INVALID UINT32_MAX
104 #define RTE_SCHED_BMP_POS_INVALID UINT32_MAX
106 struct rte_sched_subport {
107 /* Token bucket (TB) */
108 uint64_t tb_time; /* time of last update */
110 uint32_t tb_credits_per_period;
114 /* Traffic classes (TCs) */
115 uint64_t tc_time; /* time of next update */
116 uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
117 uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
120 /* TC oversubscription */
122 uint32_t tc_ov_wm_min;
123 uint32_t tc_ov_wm_max;
124 uint8_t tc_ov_period_id;
130 struct rte_sched_subport_stats stats;
133 struct rte_sched_pipe_profile {
134 /* Token bucket (TB) */
136 uint32_t tb_credits_per_period;
139 /* Pipe traffic classes */
141 uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
142 uint8_t tc_ov_weight;
145 uint8_t wrr_cost[RTE_SCHED_QUEUES_PER_PIPE];
148 struct rte_sched_pipe {
149 /* Token bucket (TB) */
150 uint64_t tb_time; /* time of last update */
153 /* Pipe profile and flags */
156 /* Traffic classes (TCs) */
157 uint64_t tc_time; /* time of next update */
158 uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
160 /* Weighted Round Robin (WRR) */
161 uint8_t wrr_tokens[RTE_SCHED_QUEUES_PER_PIPE];
163 /* TC oversubscription */
164 uint32_t tc_ov_credits;
165 uint8_t tc_ov_period_id;
167 } __rte_cache_aligned;
169 struct rte_sched_queue {
174 struct rte_sched_queue_extra {
175 struct rte_sched_queue_stats stats;
182 e_GRINDER_PREFETCH_PIPE = 0,
183 e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS,
184 e_GRINDER_PREFETCH_MBUF,
188 struct rte_sched_grinder {
190 uint16_t pcache_qmask[RTE_SCHED_GRINDER_PCACHE_SIZE];
191 uint32_t pcache_qindex[RTE_SCHED_GRINDER_PCACHE_SIZE];
196 enum grinder_state state;
199 struct rte_sched_subport *subport;
200 struct rte_sched_pipe *pipe;
201 struct rte_sched_pipe_profile *pipe_params;
204 uint8_t tccache_qmask[4];
205 uint32_t tccache_qindex[4];
211 struct rte_sched_queue *queue[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
212 struct rte_mbuf **qbase[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
213 uint32_t qindex[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
217 struct rte_mbuf *pkt;
220 uint16_t wrr_tokens[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
221 uint16_t wrr_mask[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
222 uint8_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
225 struct rte_sched_port {
226 /* User parameters */
227 uint32_t n_subports_per_port;
228 uint32_t n_pipes_per_subport;
231 uint32_t frame_overhead;
232 uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
233 uint32_t n_pipe_profiles;
234 uint32_t pipe_tc3_rate_max;
236 struct rte_red_config red_config[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][e_RTE_METER_COLORS];
240 uint64_t time_cpu_cycles; /* Current CPU time measured in CPU cyles */
241 uint64_t time_cpu_bytes; /* Current CPU time measured in bytes */
242 uint64_t time; /* Current NIC TX time measured in bytes */
243 double cycles_per_byte; /* CPU cycles per byte */
245 /* Scheduling loop detection */
247 uint32_t pipe_exhaustion;
250 struct rte_bitmap *bmp;
251 uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16;
254 struct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS];
255 uint32_t busy_grinders;
256 struct rte_mbuf **pkts_out;
259 /* Queue base calculation */
260 uint32_t qsize_add[RTE_SCHED_QUEUES_PER_PIPE];
263 /* Large data structures */
264 struct rte_sched_subport *subport;
265 struct rte_sched_pipe *pipe;
266 struct rte_sched_queue *queue;
267 struct rte_sched_queue_extra *queue_extra;
268 struct rte_sched_pipe_profile *pipe_profiles;
270 struct rte_mbuf **queue_array;
271 uint8_t memory[0] __rte_cache_aligned;
272 } __rte_cache_aligned;
274 enum rte_sched_port_array {
275 e_RTE_SCHED_PORT_ARRAY_SUBPORT = 0,
276 e_RTE_SCHED_PORT_ARRAY_PIPE,
277 e_RTE_SCHED_PORT_ARRAY_QUEUE,
278 e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA,
279 e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES,
280 e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY,
281 e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY,
282 e_RTE_SCHED_PORT_ARRAY_TOTAL,
285 #ifdef RTE_SCHED_COLLECT_STATS
287 static inline uint32_t
288 rte_sched_port_queues_per_subport(struct rte_sched_port *port)
290 return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport;
295 static inline uint32_t
296 rte_sched_port_queues_per_port(struct rte_sched_port *port)
298 return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport * port->n_subports_per_port;
302 rte_sched_port_check_params(struct rte_sched_port_params *params)
306 if (params == NULL) {
311 if (params->name == NULL) {
316 if ((params->socket < 0) || (params->socket >= RTE_MAX_NUMA_NODES)) {
321 if (params->rate == 0) {
326 if (params->mtu == 0) {
330 /* n_subports_per_port: non-zero, power of 2 */
331 if ((params->n_subports_per_port == 0) || (!rte_is_power_of_2(params->n_subports_per_port))) {
335 /* n_pipes_per_subport: non-zero, power of 2 */
336 if ((params->n_pipes_per_subport == 0) || (!rte_is_power_of_2(params->n_pipes_per_subport))) {
340 /* qsize: non-zero, power of 2, no bigger than 32K (due to 16-bit read/write pointers) */
341 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
342 uint16_t qsize = params->qsize[i];
344 if ((qsize == 0) || (!rte_is_power_of_2(qsize))) {
349 /* pipe_profiles and n_pipe_profiles */
350 if ((params->pipe_profiles == NULL) ||
351 (params->n_pipe_profiles == 0) ||
352 (params->n_pipe_profiles > RTE_SCHED_PIPE_PROFILES_PER_PORT)) {
356 for (i = 0; i < params->n_pipe_profiles; i ++) {
357 struct rte_sched_pipe_params *p = params->pipe_profiles + i;
359 /* TB rate: non-zero, not greater than port rate */
360 if ((p->tb_rate == 0) || (p->tb_rate > params->rate)) {
364 /* TB size: non-zero */
365 if (p->tb_size == 0) {
369 /* TC rate: non-zero, less than pipe rate */
370 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j ++) {
371 if ((p->tc_rate[j] == 0) || (p->tc_rate[j] > p->tb_rate)) {
376 /* TC period: non-zero */
377 if (p->tc_period == 0) {
381 #ifdef RTE_SCHED_SUBPORT_TC_OV
382 /* TC3 oversubscription weight: non-zero */
383 if (p->tc_ov_weight == 0) {
388 /* Queue WRR weights: non-zero */
389 for (j = 0; j < RTE_SCHED_QUEUES_PER_PIPE; j ++) {
390 if (p->wrr_weights[j] == 0) {
400 rte_sched_port_get_array_base(struct rte_sched_port_params *params, enum rte_sched_port_array array)
402 uint32_t n_subports_per_port = params->n_subports_per_port;
403 uint32_t n_pipes_per_subport = params->n_pipes_per_subport;
404 uint32_t n_pipes_per_port = n_pipes_per_subport * n_subports_per_port;
405 uint32_t n_queues_per_port = RTE_SCHED_QUEUES_PER_PIPE * n_pipes_per_subport * n_subports_per_port;
407 uint32_t size_subport = n_subports_per_port * sizeof(struct rte_sched_subport);
408 uint32_t size_pipe = n_pipes_per_port * sizeof(struct rte_sched_pipe);
409 uint32_t size_queue = n_queues_per_port * sizeof(struct rte_sched_queue);
410 uint32_t size_queue_extra = n_queues_per_port * sizeof(struct rte_sched_queue_extra);
411 uint32_t size_pipe_profiles = RTE_SCHED_PIPE_PROFILES_PER_PORT * sizeof(struct rte_sched_pipe_profile);
412 uint32_t size_bmp_array = rte_bitmap_get_memory_footprint(n_queues_per_port);
413 uint32_t size_per_pipe_queue_array, size_queue_array;
417 size_per_pipe_queue_array = 0;
418 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
419 size_per_pipe_queue_array += RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS * params->qsize[i] * sizeof(struct rte_mbuf *);
421 size_queue_array = n_pipes_per_port * size_per_pipe_queue_array;
425 if (array == e_RTE_SCHED_PORT_ARRAY_SUBPORT) return base;
426 base += CACHE_LINE_ROUNDUP(size_subport);
428 if (array == e_RTE_SCHED_PORT_ARRAY_PIPE) return base;
429 base += CACHE_LINE_ROUNDUP(size_pipe);
431 if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE) return base;
432 base += CACHE_LINE_ROUNDUP(size_queue);
434 if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA) return base;
435 base += CACHE_LINE_ROUNDUP(size_queue_extra);
437 if (array == e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES) return base;
438 base += CACHE_LINE_ROUNDUP(size_pipe_profiles);
440 if (array == e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY) return base;
441 base += CACHE_LINE_ROUNDUP(size_bmp_array);
443 if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY) return base;
444 base += CACHE_LINE_ROUNDUP(size_queue_array);
450 rte_sched_port_get_memory_footprint(struct rte_sched_port_params *params)
452 uint32_t size0, size1;
455 status = rte_sched_port_check_params(params);
457 RTE_LOG(INFO, SCHED, "Port scheduler params check failed (%d)\n", status);
462 size0 = sizeof(struct rte_sched_port);
463 size1 = rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_TOTAL);
465 return (size0 + size1);
469 rte_sched_port_config_qsize(struct rte_sched_port *port)
472 port->qsize_add[0] = 0;
473 port->qsize_add[1] = port->qsize_add[0] + port->qsize[0];
474 port->qsize_add[2] = port->qsize_add[1] + port->qsize[0];
475 port->qsize_add[3] = port->qsize_add[2] + port->qsize[0];
478 port->qsize_add[4] = port->qsize_add[3] + port->qsize[0];
479 port->qsize_add[5] = port->qsize_add[4] + port->qsize[1];
480 port->qsize_add[6] = port->qsize_add[5] + port->qsize[1];
481 port->qsize_add[7] = port->qsize_add[6] + port->qsize[1];
484 port->qsize_add[8] = port->qsize_add[7] + port->qsize[1];
485 port->qsize_add[9] = port->qsize_add[8] + port->qsize[2];
486 port->qsize_add[10] = port->qsize_add[9] + port->qsize[2];
487 port->qsize_add[11] = port->qsize_add[10] + port->qsize[2];
490 port->qsize_add[12] = port->qsize_add[11] + port->qsize[2];
491 port->qsize_add[13] = port->qsize_add[12] + port->qsize[3];
492 port->qsize_add[14] = port->qsize_add[13] + port->qsize[3];
493 port->qsize_add[15] = port->qsize_add[14] + port->qsize[3];
495 port->qsize_sum = port->qsize_add[15] + port->qsize[3];
499 rte_sched_port_log_pipe_profile(struct rte_sched_port *port, uint32_t i)
501 struct rte_sched_pipe_profile *p = port->pipe_profiles + i;
503 RTE_LOG(INFO, SCHED, "Low level config for pipe profile %u:\n"
504 "\tToken bucket: period = %u, credits per period = %u, size = %u\n"
505 "\tTraffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
506 "\tTraffic class 3 oversubscription: weight = %hhu\n"
507 "\tWRR cost: [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu]\n",
512 p->tb_credits_per_period,
515 /* Traffic classes */
517 p->tc_credits_per_period[0],
518 p->tc_credits_per_period[1],
519 p->tc_credits_per_period[2],
520 p->tc_credits_per_period[3],
522 /* Traffic class 3 oversubscription */
526 p->wrr_cost[ 0], p->wrr_cost[ 1], p->wrr_cost[ 2], p->wrr_cost[ 3],
527 p->wrr_cost[ 4], p->wrr_cost[ 5], p->wrr_cost[ 6], p->wrr_cost[ 7],
528 p->wrr_cost[ 8], p->wrr_cost[ 9], p->wrr_cost[10], p->wrr_cost[11],
529 p->wrr_cost[12], p->wrr_cost[13], p->wrr_cost[14], p->wrr_cost[15]);
532 static inline uint64_t
533 rte_sched_time_ms_to_bytes(uint32_t time_ms, uint32_t rate)
535 uint64_t time = time_ms;
536 time = (time * rate) / 1000;
542 rte_sched_port_config_pipe_profile_table(struct rte_sched_port *port, struct rte_sched_port_params *params)
546 for (i = 0; i < port->n_pipe_profiles; i ++) {
547 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
548 struct rte_sched_pipe_profile *dst = port->pipe_profiles + i;
551 if (src->tb_rate == params->rate) {
552 dst->tb_credits_per_period = 1;
555 double tb_rate = ((double) src->tb_rate) / ((double) params->rate);
556 double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
558 rte_approx(tb_rate, d, &dst->tb_credits_per_period, &dst->tb_period);
560 dst->tb_size = src->tb_size;
562 /* Traffic Classes */
563 dst->tc_period = (uint32_t) rte_sched_time_ms_to_bytes(src->tc_period, params->rate);
564 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j ++) {
565 dst->tc_credits_per_period[j] = (uint32_t) rte_sched_time_ms_to_bytes(src->tc_period, src->tc_rate[j]);
567 #ifdef RTE_SCHED_SUBPORT_TC_OV
568 dst->tc_ov_weight = src->tc_ov_weight;
572 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j ++) {
573 uint32_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
574 uint32_t lcd, lcd1, lcd2;
577 qindex = j * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS;
579 wrr_cost[0] = src->wrr_weights[qindex];
580 wrr_cost[1] = src->wrr_weights[qindex + 1];
581 wrr_cost[2] = src->wrr_weights[qindex + 2];
582 wrr_cost[3] = src->wrr_weights[qindex + 3];
584 lcd1 = rte_get_lcd(wrr_cost[0], wrr_cost[1]);
585 lcd2 = rte_get_lcd(wrr_cost[2], wrr_cost[3]);
586 lcd = rte_get_lcd(lcd1, lcd2);
588 wrr_cost[0] = lcd / wrr_cost[0];
589 wrr_cost[1] = lcd / wrr_cost[1];
590 wrr_cost[2] = lcd / wrr_cost[2];
591 wrr_cost[3] = lcd / wrr_cost[3];
593 dst->wrr_cost[qindex] = (uint8_t) wrr_cost[0];
594 dst->wrr_cost[qindex + 1] = (uint8_t) wrr_cost[1];
595 dst->wrr_cost[qindex + 2] = (uint8_t) wrr_cost[2];
596 dst->wrr_cost[qindex + 3] = (uint8_t) wrr_cost[3];
599 rte_sched_port_log_pipe_profile(port, i);
602 port->pipe_tc3_rate_max = 0;
603 for (i = 0; i < port->n_pipe_profiles; i ++) {
604 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
605 uint32_t pipe_tc3_rate = src->tc_rate[3];
607 if (port->pipe_tc3_rate_max < pipe_tc3_rate) {
608 port->pipe_tc3_rate_max = pipe_tc3_rate;
613 struct rte_sched_port *
614 rte_sched_port_config(struct rte_sched_port_params *params)
616 struct rte_sched_port *port = NULL;
617 const struct rte_memzone *mz = NULL;
618 uint32_t mem_size, bmp_mem_size, n_queues_per_port, i;
620 /* Check user parameters. Determine the amount of memory to allocate */
621 mem_size = rte_sched_port_get_memory_footprint(params);
626 /* Allocate memory to store the data structures */
627 mz = rte_memzone_lookup(params->name);
629 /* Use existing memzone, provided that its size is big enough */
630 if (mz->len < mem_size) {
634 /* Create new memzone */
635 mz = rte_memzone_reserve(params->name, mem_size, params->socket, 0);
640 memset(mz->addr, 0, mem_size);
641 port = (struct rte_sched_port *) mz->addr;
643 /* User parameters */
644 port->n_subports_per_port = params->n_subports_per_port;
645 port->n_pipes_per_subport = params->n_pipes_per_subport;
646 port->rate = params->rate;
647 port->mtu = params->mtu + params->frame_overhead;
648 port->frame_overhead = params->frame_overhead;
649 memcpy(port->qsize, params->qsize, sizeof(params->qsize));
650 port->n_pipe_profiles = params->n_pipe_profiles;
653 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
656 for (j = 0; j < e_RTE_METER_COLORS; j++) {
657 if (rte_red_config_init(&port->red_config[i][j],
658 params->red_params[i][j].wq_log2,
659 params->red_params[i][j].min_th,
660 params->red_params[i][j].max_th,
661 params->red_params[i][j].maxp_inv) != 0) {
669 port->time_cpu_cycles = rte_get_tsc_cycles();
670 port->time_cpu_bytes = 0;
672 port->cycles_per_byte = ((double) rte_get_tsc_hz()) / ((double) params->rate);
674 /* Scheduling loop detection */
675 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
676 port->pipe_exhaustion = 0;
679 port->busy_grinders = 0;
680 port->pkts_out = NULL;
681 port->n_pkts_out = 0;
683 /* Queue base calculation */
684 rte_sched_port_config_qsize(port);
686 /* Large data structures */
687 port->subport = (struct rte_sched_subport *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_SUBPORT));
688 port->pipe = (struct rte_sched_pipe *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_PIPE));
689 port->queue = (struct rte_sched_queue *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_QUEUE));
690 port->queue_extra = (struct rte_sched_queue_extra *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA));
691 port->pipe_profiles = (struct rte_sched_pipe_profile *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES));
692 port->bmp_array = port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY);
693 port->queue_array = (struct rte_mbuf **) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY));
695 /* Pipe profile table */
696 rte_sched_port_config_pipe_profile_table(port, params);
699 n_queues_per_port = rte_sched_port_queues_per_port(port);
700 bmp_mem_size = rte_bitmap_get_memory_footprint(n_queues_per_port);
701 port->bmp = rte_bitmap_init(n_queues_per_port, port->bmp_array, bmp_mem_size);
702 if (port->bmp == NULL) {
703 RTE_LOG(INFO, SCHED, "Bitmap init error\n");
706 for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i ++) {
707 port->grinder_base_bmp_pos[i] = RTE_SCHED_PIPE_INVALID;
714 rte_sched_port_free(struct rte_sched_port *port)
716 /* Check user parameters */
720 rte_bitmap_free(port->bmp);
726 rte_sched_port_log_subport_config(struct rte_sched_port *port, uint32_t i)
728 struct rte_sched_subport *s = port->subport + i;
730 RTE_LOG(INFO, SCHED, "Low level config for subport %u:\n"
731 "\tToken bucket: period = %u, credits per period = %u, size = %u\n"
732 "\tTraffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
733 "\tTraffic class 3 oversubscription: wm min = %u, wm max = %u\n",
738 s->tb_credits_per_period,
741 /* Traffic classes */
743 s->tc_credits_per_period[0],
744 s->tc_credits_per_period[1],
745 s->tc_credits_per_period[2],
746 s->tc_credits_per_period[3],
748 /* Traffic class 3 oversubscription */
754 rte_sched_subport_config(struct rte_sched_port *port,
756 struct rte_sched_subport_params *params)
758 struct rte_sched_subport *s;
761 /* Check user parameters */
762 if ((port == NULL) ||
763 (subport_id >= port->n_subports_per_port) ||
768 if ((params->tb_rate == 0) || (params->tb_rate > port->rate)) {
772 if (params->tb_size == 0) {
776 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
777 if ((params->tc_rate[i] == 0) || (params->tc_rate[i] > params->tb_rate)) {
782 if (params->tc_period == 0) {
786 s = port->subport + subport_id;
788 /* Token Bucket (TB) */
789 if (params->tb_rate == port->rate) {
790 s->tb_credits_per_period = 1;
793 double tb_rate = ((double) params->tb_rate) / ((double) port->rate);
794 double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
796 rte_approx(tb_rate, d, &s->tb_credits_per_period, &s->tb_period);
798 s->tb_size = params->tb_size;
799 s->tb_time = port->time;
800 s->tb_credits = s->tb_size / 2;
802 /* Traffic Classes (TCs) */
803 s->tc_period = (uint32_t) rte_sched_time_ms_to_bytes(params->tc_period, port->rate);
804 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
805 s->tc_credits_per_period[i] = (uint32_t) rte_sched_time_ms_to_bytes(params->tc_period, params->tc_rate[i]);
807 s->tc_time = port->time + s->tc_period;
808 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
809 s->tc_credits[i] = s->tc_credits_per_period[i];
812 #ifdef RTE_SCHED_SUBPORT_TC_OV
813 /* TC oversubscription */
814 s->tc_ov_wm_min = port->mtu;
815 s->tc_ov_wm_max = (uint32_t) rte_sched_time_ms_to_bytes(params->tc_period, port->pipe_tc3_rate_max);
816 s->tc_ov_wm = s->tc_ov_wm_max;
817 s->tc_ov_period_id = 0;
823 rte_sched_port_log_subport_config(port, subport_id);
829 rte_sched_pipe_config(struct rte_sched_port *port,
832 int32_t pipe_profile)
834 struct rte_sched_subport *s;
835 struct rte_sched_pipe *p;
836 struct rte_sched_pipe_profile *params;
837 uint32_t deactivate, profile, i;
839 /* Check user parameters */
840 profile = (uint32_t) pipe_profile;
841 deactivate = (pipe_profile < 0);
842 if ((port == NULL) ||
843 (subport_id >= port->n_subports_per_port) ||
844 (pipe_id >= port->n_pipes_per_subport) ||
845 ((!deactivate) && (profile >= port->n_pipe_profiles))) {
849 /* Check that subport configuration is valid */
850 s = port->subport + subport_id;
851 if (s->tb_period == 0) {
855 p = port->pipe + (subport_id * port->n_pipes_per_subport + pipe_id);
857 /* Handle the case when pipe already has a valid configuration */
859 params = port->pipe_profiles + p->profile;
861 #ifdef RTE_SCHED_SUBPORT_TC_OV
862 double subport_tc3_rate = ((double) s->tc_credits_per_period[3]) / ((double) s->tc_period);
863 double pipe_tc3_rate = ((double) params->tc_credits_per_period[3]) / ((double) params->tc_period);
864 uint32_t tc3_ov = s->tc_ov;
866 /* Unplug pipe from its subport */
867 s->tc_ov_n -= params->tc_ov_weight;
868 s->tc_ov_rate -= pipe_tc3_rate;
869 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
871 if (s->tc_ov != tc3_ov) {
872 RTE_LOG(INFO, SCHED, "Subport %u TC3 oversubscription is OFF (%.4lf >= %.4lf)\n",
873 subport_id, subport_tc3_rate, s->tc_ov_rate);
878 memset(p, 0, sizeof(struct rte_sched_pipe));
885 /* Apply the new pipe configuration */
886 p->profile = profile;
887 params = port->pipe_profiles + p->profile;
889 /* Token Bucket (TB) */
890 p->tb_time = port->time;
891 p->tb_credits = params->tb_size / 2;
893 /* Traffic Classes (TCs) */
894 p->tc_time = port->time + params->tc_period;
895 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
896 p->tc_credits[i] = params->tc_credits_per_period[i];
899 #ifdef RTE_SCHED_SUBPORT_TC_OV
901 /* Subport TC3 oversubscription */
902 double subport_tc3_rate = ((double) s->tc_credits_per_period[3]) / ((double) s->tc_period);
903 double pipe_tc3_rate = ((double) params->tc_credits_per_period[3]) / ((double) params->tc_period);
904 uint32_t tc3_ov = s->tc_ov;
906 s->tc_ov_n += params->tc_ov_weight;
907 s->tc_ov_rate += pipe_tc3_rate;
908 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
910 if (s->tc_ov != tc3_ov) {
911 RTE_LOG(INFO, SCHED, "Subport %u TC3 oversubscription is ON (%.4lf < %.4lf)\n",
912 subport_id, subport_tc3_rate, s->tc_ov_rate);
914 p->tc_ov_period_id = s->tc_ov_period_id;
915 p->tc_ov_credits = s->tc_ov_wm;
923 rte_sched_subport_read_stats(struct rte_sched_port *port,
925 struct rte_sched_subport_stats *stats,
928 struct rte_sched_subport *s;
930 /* Check user parameters */
931 if ((port == NULL) ||
932 (subport_id >= port->n_subports_per_port) ||
937 s = port->subport + subport_id;
939 /* Copy subport stats and clear */
940 memcpy(stats, &s->stats, sizeof(struct rte_sched_subport_stats));
941 memset(&s->stats, 0, sizeof(struct rte_sched_subport_stats));
943 /* Subport TC ovesubscription status */
950 rte_sched_queue_read_stats(struct rte_sched_port *port,
952 struct rte_sched_queue_stats *stats,
955 struct rte_sched_queue *q;
956 struct rte_sched_queue_extra *qe;
958 /* Check user parameters */
959 if ((port == NULL) ||
960 (queue_id >= rte_sched_port_queues_per_port(port)) ||
965 q = port->queue + queue_id;
966 qe = port->queue_extra + queue_id;
968 /* Copy queue stats and clear */
969 memcpy(stats, &qe->stats, sizeof(struct rte_sched_queue_stats));
970 memset(&qe->stats, 0, sizeof(struct rte_sched_queue_stats));
973 *qlen = q->qw - q->qr;
978 static inline uint32_t
979 rte_sched_port_qindex(struct rte_sched_port *port, uint32_t subport, uint32_t pipe, uint32_t traffic_class, uint32_t queue)
983 result = subport * port->n_pipes_per_subport + pipe;
984 result = result * RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE + traffic_class;
985 result = result * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS + queue;
990 static inline struct rte_mbuf **
991 rte_sched_port_qbase(struct rte_sched_port *port, uint32_t qindex)
993 uint32_t pindex = qindex >> 4;
994 uint32_t qpos = qindex & 0xF;
996 return (port->queue_array + pindex * port->qsize_sum + port->qsize_add[qpos]);
999 static inline uint16_t
1000 rte_sched_port_qsize(struct rte_sched_port *port, uint32_t qindex)
1002 uint32_t tc = (qindex >> 2) & 0x3;
1004 return port->qsize[tc];
1010 rte_sched_port_queue_is_empty(struct rte_sched_port *port, uint32_t qindex)
1012 struct rte_sched_queue *queue = port->queue + qindex;
1014 return (queue->qr == queue->qw);
1018 rte_sched_port_queue_is_full(struct rte_sched_port *port, uint32_t qindex)
1020 struct rte_sched_queue *queue = port->queue + qindex;
1021 uint16_t qsize = rte_sched_port_qsize(port, qindex);
1022 uint16_t qlen = q->qw - q->qr;
1024 return (qlen >= qsize);
1027 #endif /* RTE_SCHED_DEBUG */
1029 #ifdef RTE_SCHED_COLLECT_STATS
1032 rte_sched_port_update_subport_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1034 struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1035 uint32_t tc_index = (qindex >> 2) & 0x3;
1036 uint32_t pkt_len = pkt->pkt.pkt_len;
1038 s->stats.n_pkts_tc[tc_index] += 1;
1039 s->stats.n_bytes_tc[tc_index] += pkt_len;
1043 rte_sched_port_update_subport_stats_on_drop(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1045 struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1046 uint32_t tc_index = (qindex >> 2) & 0x3;
1047 uint32_t pkt_len = pkt->pkt.pkt_len;
1049 s->stats.n_pkts_tc_dropped[tc_index] += 1;
1050 s->stats.n_bytes_tc_dropped[tc_index] += pkt_len;
1054 rte_sched_port_update_queue_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1056 struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1057 uint32_t pkt_len = pkt->pkt.pkt_len;
1059 qe->stats.n_pkts += 1;
1060 qe->stats.n_bytes += pkt_len;
1064 rte_sched_port_update_queue_stats_on_drop(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1066 struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1067 uint32_t pkt_len = pkt->pkt.pkt_len;
1069 qe->stats.n_pkts_dropped += 1;
1070 qe->stats.n_bytes_dropped += pkt_len;
1073 #endif /* RTE_SCHED_COLLECT_STATS */
1075 #ifdef RTE_SCHED_RED
1078 rte_sched_port_red_drop(struct rte_sched_port *port, struct rte_mbuf *pkt, uint32_t qindex, uint16_t qlen)
1080 struct rte_sched_queue_extra *qe;
1081 struct rte_red_config *red_cfg;
1082 struct rte_red *red;
1084 enum rte_meter_color color;
1086 tc_index = (qindex >> 2) & 0x3;
1087 color = rte_sched_port_pkt_read_color(pkt);
1088 red_cfg = &port->red_config[tc_index][color];
1090 qe = port->queue_extra + qindex;
1093 return rte_red_enqueue(red_cfg, red, qlen, port->time);
1097 rte_sched_port_set_queue_empty_timestamp(struct rte_sched_port *port, uint32_t qindex)
1099 struct rte_sched_queue_extra *qe;
1100 struct rte_red *red;
1102 qe = port->queue_extra + qindex;
1105 rte_red_mark_queue_empty(red, port->time);
1110 #define rte_sched_port_red_drop(port, pkt, qindex, qlen) 0
1112 #define rte_sched_port_set_queue_empty_timestamp(port, qindex)
1114 #endif /* RTE_SCHED_RED */
1119 debug_pipe_is_empty(struct rte_sched_port *port, uint32_t pindex)
1123 qindex = pindex << 4;
1125 for (i = 0; i < 16; i ++){
1126 uint32_t queue_empty = rte_sched_port_queue_is_empty(port, qindex + i);
1127 uint32_t bmp_bit_clear = (rte_bitmap_get(port->bmp, qindex + i) == 0);
1129 if (queue_empty != bmp_bit_clear){
1130 rte_panic("Queue status mismatch for queue %u of pipe %u\n", i, pindex);
1142 debug_check_queue_slab(struct rte_sched_port *port, uint32_t bmp_pos, uint64_t bmp_slab)
1148 rte_panic("Empty slab at position %u\n", bmp_pos);
1152 for (i = 0, mask = 1; i < 64; i ++, mask <<= 1) {
1153 if (mask & bmp_slab){
1154 if (rte_sched_port_queue_is_empty(port, bmp_pos + i)) {
1155 printf("Queue %u (slab offset %u) is empty\n", bmp_pos + i, i);
1162 rte_panic("Empty queues in slab 0x%" PRIx64 "starting at position %u\n",
1167 #endif /* RTE_SCHED_DEBUG */
1169 static inline uint32_t
1170 rte_sched_port_enqueue_qptrs_prefetch0(struct rte_sched_port *port, struct rte_mbuf *pkt)
1172 struct rte_sched_queue *q;
1173 #ifdef RTE_SCHED_COLLECT_STATS
1174 struct rte_sched_queue_extra *qe;
1176 uint32_t subport, pipe, traffic_class, queue, qindex;
1178 rte_sched_port_pkt_read_tree_path(pkt, &subport, &pipe, &traffic_class, &queue);
1180 qindex = rte_sched_port_qindex(port, subport, pipe, traffic_class, queue);
1181 q = port->queue + qindex;
1183 #ifdef RTE_SCHED_COLLECT_STATS
1184 qe = port->queue_extra + qindex;
1192 rte_sched_port_enqueue_qwa_prefetch0(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf **qbase)
1194 struct rte_sched_queue *q;
1195 struct rte_mbuf **q_qw;
1198 q = port->queue + qindex;
1199 qsize = rte_sched_port_qsize(port, qindex);
1200 q_qw = qbase + (q->qw & (qsize - 1));
1202 rte_prefetch0(q_qw);
1203 rte_bitmap_prefetch0(port->bmp, qindex);
1207 rte_sched_port_enqueue_qwa(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf **qbase, struct rte_mbuf *pkt)
1209 struct rte_sched_queue *q;
1213 q = port->queue + qindex;
1214 qsize = rte_sched_port_qsize(port, qindex);
1215 qlen = q->qw - q->qr;
1217 /* Drop the packet (and update drop stats) when queue is full */
1218 if (unlikely(rte_sched_port_red_drop(port, pkt, qindex, qlen) || (qlen >= qsize))) {
1219 rte_pktmbuf_free(pkt);
1220 #ifdef RTE_SCHED_COLLECT_STATS
1221 rte_sched_port_update_subport_stats_on_drop(port, qindex, pkt);
1222 rte_sched_port_update_queue_stats_on_drop(port, qindex, pkt);
1227 /* Enqueue packet */
1228 qbase[q->qw & (qsize - 1)] = pkt;
1231 /* Activate queue in the port bitmap */
1232 rte_bitmap_set(port->bmp, qindex);
1235 #ifdef RTE_SCHED_COLLECT_STATS
1236 rte_sched_port_update_subport_stats(port, qindex, pkt);
1237 rte_sched_port_update_queue_stats(port, qindex, pkt);
1243 #if RTE_SCHED_ENQUEUE == 0
1246 rte_sched_port_enqueue(struct rte_sched_port *port, struct rte_mbuf **pkts, uint32_t n_pkts)
1252 for (i = 0; i < n_pkts; i ++) {
1253 struct rte_mbuf *pkt;
1254 struct rte_mbuf **q_base;
1255 uint32_t subport, pipe, traffic_class, queue, qindex;
1259 rte_sched_port_pkt_read_tree_path(pkt, &subport, &pipe, &traffic_class, &queue);
1261 qindex = rte_sched_port_qindex(port, subport, pipe, traffic_class, queue);
1263 q_base = rte_sched_port_qbase(port, qindex);
1265 result += rte_sched_port_enqueue_qwa(port, qindex, q_base, pkt);
1273 /* The enqueue function implements a 4-level pipeline with each stage processing
1274 * two different packets. The purpose of using a pipeline is to hide the latency
1275 * of prefetching the data structures. The naming convention is presented in the
1278 * p00 _______ p10 _______ p20 _______ p30 _______
1279 * ----->| |----->| |----->| |----->| |----->
1280 * | 0 | | 1 | | 2 | | 3 |
1281 * ----->|_______|----->|_______|----->|_______|----->|_______|----->
1286 rte_sched_port_enqueue(struct rte_sched_port *port, struct rte_mbuf **pkts, uint32_t n_pkts)
1288 struct rte_mbuf *pkt00, *pkt01, *pkt10, *pkt11, *pkt20, *pkt21, *pkt30, *pkt31, *pkt_last;
1289 struct rte_mbuf **q00_base, **q01_base, **q10_base, **q11_base, **q20_base, **q21_base, **q30_base, **q31_base, **q_last_base;
1290 uint32_t q00, q01, q10, q11, q20, q21, q30, q31, q_last;
1291 uint32_t r00, r01, r10, r11, r20, r21, r30, r31, r_last;
1296 /* Less then 6 input packets available, which is not enough to feed the pipeline */
1297 if (unlikely(n_pkts < 6)) {
1298 struct rte_mbuf **q_base[5];
1301 /* Prefetch the mbuf structure of each packet */
1302 for (i = 0; i < n_pkts; i ++) {
1303 rte_prefetch0(pkts[i]);
1306 /* Prefetch the queue structure for each queue */
1307 for (i = 0; i < n_pkts; i ++) {
1308 q[i] = rte_sched_port_enqueue_qptrs_prefetch0(port, pkts[i]);
1311 /* Prefetch the write pointer location of each queue */
1312 for (i = 0; i < n_pkts; i ++) {
1313 q_base[i] = rte_sched_port_qbase(port, q[i]);
1314 rte_sched_port_enqueue_qwa_prefetch0(port, q[i], q_base[i]);
1317 /* Write each packet to its queue */
1318 for (i = 0; i < n_pkts; i ++) {
1319 result += rte_sched_port_enqueue_qwa(port, q[i], q_base[i], pkts[i]);
1325 /* Feed the first 3 stages of the pipeline (6 packets needed) */
1328 rte_prefetch0(pkt20);
1329 rte_prefetch0(pkt21);
1333 rte_prefetch0(pkt10);
1334 rte_prefetch0(pkt11);
1336 q20 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt20);
1337 q21 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt21);
1341 rte_prefetch0(pkt00);
1342 rte_prefetch0(pkt01);
1344 q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1345 q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1347 q20_base = rte_sched_port_qbase(port, q20);
1348 q21_base = rte_sched_port_qbase(port, q21);
1349 rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1350 rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1352 /* Run the pipeline */
1353 for (i = 6; i < (n_pkts & (~1)); i += 2) {
1354 /* Propagate stage inputs */
1365 q30_base = q20_base;
1366 q31_base = q21_base;
1368 /* Stage 0: Get packets in */
1370 pkt01 = pkts[i + 1];
1371 rte_prefetch0(pkt00);
1372 rte_prefetch0(pkt01);
1374 /* Stage 1: Prefetch queue structure storing queue pointers */
1375 q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1376 q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1378 /* Stage 2: Prefetch queue write location */
1379 q20_base = rte_sched_port_qbase(port, q20);
1380 q21_base = rte_sched_port_qbase(port, q21);
1381 rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1382 rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1384 /* Stage 3: Write packet to queue and activate queue */
1385 r30 = rte_sched_port_enqueue_qwa(port, q30, q30_base, pkt30);
1386 r31 = rte_sched_port_enqueue_qwa(port, q31, q31_base, pkt31);
1387 result += r30 + r31;
1390 /* Drain the pipeline (exactly 6 packets). Handle the last packet in the case
1391 of an odd number of input packets. */
1392 pkt_last = pkts[n_pkts - 1];
1393 rte_prefetch0(pkt_last);
1395 q00 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt00);
1396 q01 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt01);
1398 q10_base = rte_sched_port_qbase(port, q10);
1399 q11_base = rte_sched_port_qbase(port, q11);
1400 rte_sched_port_enqueue_qwa_prefetch0(port, q10, q10_base);
1401 rte_sched_port_enqueue_qwa_prefetch0(port, q11, q11_base);
1403 r20 = rte_sched_port_enqueue_qwa(port, q20, q20_base, pkt20);
1404 r21 = rte_sched_port_enqueue_qwa(port, q21, q21_base, pkt21);
1405 result += r20 + r21;
1407 q_last = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt_last);
1409 q00_base = rte_sched_port_qbase(port, q00);
1410 q01_base = rte_sched_port_qbase(port, q01);
1411 rte_sched_port_enqueue_qwa_prefetch0(port, q00, q00_base);
1412 rte_sched_port_enqueue_qwa_prefetch0(port, q01, q01_base);
1414 r10 = rte_sched_port_enqueue_qwa(port, q10, q10_base, pkt10);
1415 r11 = rte_sched_port_enqueue_qwa(port, q11, q11_base, pkt11);
1416 result += r10 + r11;
1418 q_last_base = rte_sched_port_qbase(port, q_last);
1419 rte_sched_port_enqueue_qwa_prefetch0(port, q_last, q_last_base);
1421 r00 = rte_sched_port_enqueue_qwa(port, q00, q00_base, pkt00);
1422 r01 = rte_sched_port_enqueue_qwa(port, q01, q01_base, pkt01);
1423 result += r00 + r01;
1426 r_last = rte_sched_port_enqueue_qwa(port, q_last, q_last_base, pkt_last);
1433 #endif /* RTE_SCHED_ENQUEUE */
1435 #if RTE_SCHED_TS_CREDITS_UPDATE == 0
1437 #define grinder_credits_update(port, pos)
1439 #elif !defined(RTE_SCHED_SUBPORT_TC_OV)
1442 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1444 struct rte_sched_grinder *grinder = port->grinder + pos;
1445 struct rte_sched_subport *subport = grinder->subport;
1446 struct rte_sched_pipe *pipe = grinder->pipe;
1447 struct rte_sched_pipe_profile *params = grinder->pipe_params;
1451 n_periods = (port->time - subport->tb_time) / subport->tb_period;
1452 subport->tb_credits += n_periods * subport->tb_credits_per_period;
1453 subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1454 subport->tb_time += n_periods * subport->tb_period;
1457 n_periods = (port->time - pipe->tb_time) / params->tb_period;
1458 pipe->tb_credits += n_periods * params->tb_credits_per_period;
1459 pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1460 pipe->tb_time += n_periods * params->tb_period;
1463 if (unlikely(port->time >= subport->tc_time)) {
1464 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1465 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1466 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1467 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1468 subport->tc_time = port->time + subport->tc_period;
1472 if (unlikely(port->time >= pipe->tc_time)) {
1473 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1474 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1475 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1476 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1477 pipe->tc_time = port->time + params->tc_period;
1483 static inline uint32_t
1484 grinder_tc_ov_credits_update(struct rte_sched_port *port, uint32_t pos)
1486 struct rte_sched_grinder *grinder = port->grinder + pos;
1487 struct rte_sched_subport *subport = grinder->subport;
1488 uint32_t tc_ov_consumption[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
1489 uint32_t tc_ov_consumption_max;
1490 uint32_t tc_ov_wm = subport->tc_ov_wm;
1492 if (subport->tc_ov == 0) {
1493 return subport->tc_ov_wm_max;
1496 tc_ov_consumption[0] = subport->tc_credits_per_period[0] - subport->tc_credits[0];
1497 tc_ov_consumption[1] = subport->tc_credits_per_period[1] - subport->tc_credits[1];
1498 tc_ov_consumption[2] = subport->tc_credits_per_period[2] - subport->tc_credits[2];
1499 tc_ov_consumption[3] = subport->tc_credits_per_period[3] - subport->tc_credits[3];
1501 tc_ov_consumption_max = subport->tc_credits_per_period[3] -
1502 (tc_ov_consumption[0] + tc_ov_consumption[1] + tc_ov_consumption[2]);
1504 if (tc_ov_consumption[3] > (tc_ov_consumption_max - port->mtu)) {
1505 tc_ov_wm -= tc_ov_wm >> 7;
1506 if (tc_ov_wm < subport->tc_ov_wm_min) {
1507 tc_ov_wm = subport->tc_ov_wm_min;
1512 tc_ov_wm += (tc_ov_wm >> 7) + 1;
1513 if (tc_ov_wm > subport->tc_ov_wm_max) {
1514 tc_ov_wm = subport->tc_ov_wm_max;
1520 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1522 struct rte_sched_grinder *grinder = port->grinder + pos;
1523 struct rte_sched_subport *subport = grinder->subport;
1524 struct rte_sched_pipe *pipe = grinder->pipe;
1525 struct rte_sched_pipe_profile *params = grinder->pipe_params;
1529 n_periods = (port->time - subport->tb_time) / subport->tb_period;
1530 subport->tb_credits += n_periods * subport->tb_credits_per_period;
1531 subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1532 subport->tb_time += n_periods * subport->tb_period;
1535 n_periods = (port->time - pipe->tb_time) / params->tb_period;
1536 pipe->tb_credits += n_periods * params->tb_credits_per_period;
1537 pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1538 pipe->tb_time += n_periods * params->tb_period;
1541 if (unlikely(port->time >= subport->tc_time)) {
1542 subport->tc_ov_wm = grinder_tc_ov_credits_update(port, pos);
1544 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1545 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1546 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1547 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1549 subport->tc_time = port->time + subport->tc_period;
1550 subport->tc_ov_period_id ++;
1554 if (unlikely(port->time >= pipe->tc_time)) {
1555 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1556 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1557 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1558 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1559 pipe->tc_time = port->time + params->tc_period;
1562 /* Pipe TCs - Oversubscription */
1563 if (unlikely(pipe->tc_ov_period_id != subport->tc_ov_period_id)) {
1564 pipe->tc_ov_credits = subport->tc_ov_wm * params->tc_ov_weight;
1566 pipe->tc_ov_period_id = subport->tc_ov_period_id;
1570 #endif /* RTE_SCHED_TS_CREDITS_UPDATE, RTE_SCHED_SUBPORT_TC_OV */
1572 #ifndef RTE_SCHED_SUBPORT_TC_OV
1575 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1577 struct rte_sched_grinder *grinder = port->grinder + pos;
1578 struct rte_sched_subport *subport = grinder->subport;
1579 struct rte_sched_pipe *pipe = grinder->pipe;
1580 struct rte_mbuf *pkt = grinder->pkt;
1581 uint32_t tc_index = grinder->tc_index;
1582 uint32_t pkt_len = pkt->pkt.pkt_len + port->frame_overhead;
1583 uint32_t subport_tb_credits = subport->tb_credits;
1584 uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1585 uint32_t pipe_tb_credits = pipe->tb_credits;
1586 uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1589 /* Check queue credits */
1590 enough_credits = (pkt_len <= subport_tb_credits) &&
1591 (pkt_len <= subport_tc_credits) &&
1592 (pkt_len <= pipe_tb_credits) &&
1593 (pkt_len <= pipe_tc_credits);
1595 if (!enough_credits) {
1599 /* Update port credits */
1600 subport->tb_credits -= pkt_len;
1601 subport->tc_credits[tc_index] -= pkt_len;
1602 pipe->tb_credits -= pkt_len;
1603 pipe->tc_credits[tc_index] -= pkt_len;
1611 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1613 struct rte_sched_grinder *grinder = port->grinder + pos;
1614 struct rte_sched_subport *subport = grinder->subport;
1615 struct rte_sched_pipe *pipe = grinder->pipe;
1616 struct rte_mbuf *pkt = grinder->pkt;
1617 uint32_t tc_index = grinder->tc_index;
1618 uint32_t pkt_len = pkt->pkt.pkt_len + port->frame_overhead;
1619 uint32_t subport_tb_credits = subport->tb_credits;
1620 uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1621 uint32_t pipe_tb_credits = pipe->tb_credits;
1622 uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1623 uint32_t pipe_tc_ov_mask1[] = {UINT32_MAX, UINT32_MAX, UINT32_MAX, pipe->tc_ov_credits};
1624 uint32_t pipe_tc_ov_mask2[] = {0, 0, 0, UINT32_MAX};
1625 uint32_t pipe_tc_ov_credits = pipe_tc_ov_mask1[tc_index];
1628 /* Check pipe and subport credits */
1629 enough_credits = (pkt_len <= subport_tb_credits) &&
1630 (pkt_len <= subport_tc_credits) &&
1631 (pkt_len <= pipe_tb_credits) &&
1632 (pkt_len <= pipe_tc_credits) &&
1633 (pkt_len <= pipe_tc_ov_credits);
1635 if (!enough_credits) {
1639 /* Update pipe and subport credits */
1640 subport->tb_credits -= pkt_len;
1641 subport->tc_credits[tc_index] -= pkt_len;
1642 pipe->tb_credits -= pkt_len;
1643 pipe->tc_credits[tc_index] -= pkt_len;
1644 pipe->tc_ov_credits -= pipe_tc_ov_mask2[tc_index] & pkt_len;
1649 #endif /* RTE_SCHED_SUBPORT_TC_OV */
1652 grinder_schedule(struct rte_sched_port *port, uint32_t pos)
1654 struct rte_sched_grinder *grinder = port->grinder + pos;
1655 struct rte_sched_queue *queue = grinder->queue[grinder->qpos];
1656 struct rte_mbuf *pkt = grinder->pkt;
1657 uint32_t pkt_len = pkt->pkt.pkt_len + port->frame_overhead;
1659 #if RTE_SCHED_TS_CREDITS_CHECK
1660 if (!grinder_credits_check(port, pos)) {
1665 /* Advance port time */
1666 port->time += pkt_len;
1669 port->pkts_out[port->n_pkts_out ++] = pkt;
1671 grinder->wrr_tokens[grinder->qpos] += pkt_len * grinder->wrr_cost[grinder->qpos];
1672 if (queue->qr == queue->qw) {
1673 uint32_t qindex = grinder->qindex[grinder->qpos];
1675 rte_bitmap_clear(port->bmp, qindex);
1676 grinder->qmask &= ~(1 << grinder->qpos);
1677 grinder->wrr_mask[grinder->qpos] = 0;
1678 rte_sched_port_set_queue_empty_timestamp(port, qindex);
1681 /* Reset pipe loop detection */
1682 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1683 grinder->productive = 1;
1688 #if RTE_SCHED_OPTIMIZATIONS
1691 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1693 __m128i index = _mm_set1_epi32 (base_pipe);
1694 __m128i pipes = _mm_load_si128((__m128i *)port->grinder_base_bmp_pos);
1695 __m128i res = _mm_cmpeq_epi32(pipes, index);
1696 pipes = _mm_load_si128((__m128i *)(port->grinder_base_bmp_pos + 4));
1697 pipes = _mm_cmpeq_epi32(pipes, index);
1698 res = _mm_or_si128(res, pipes);
1700 if (_mm_testz_si128(res, res))
1709 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1713 for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i ++) {
1714 if (port->grinder_base_bmp_pos[i] == base_pipe) {
1722 #endif /* RTE_SCHED_OPTIMIZATIONS */
1725 grinder_pcache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t bmp_pos, uint64_t bmp_slab)
1727 struct rte_sched_grinder *grinder = port->grinder + pos;
1730 grinder->pcache_w = 0;
1731 grinder->pcache_r = 0;
1733 w[0] = (uint16_t) bmp_slab;
1734 w[1] = (uint16_t) (bmp_slab >> 16);
1735 w[2] = (uint16_t) (bmp_slab >> 32);
1736 w[3] = (uint16_t) (bmp_slab >> 48);
1738 grinder->pcache_qmask[grinder->pcache_w] = w[0];
1739 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos;
1740 grinder->pcache_w += (w[0] != 0);
1742 grinder->pcache_qmask[grinder->pcache_w] = w[1];
1743 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 16;
1744 grinder->pcache_w += (w[1] != 0);
1746 grinder->pcache_qmask[grinder->pcache_w] = w[2];
1747 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 32;
1748 grinder->pcache_w += (w[2] != 0);
1750 grinder->pcache_qmask[grinder->pcache_w] = w[3];
1751 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 48;
1752 grinder->pcache_w += (w[3] != 0);
1756 grinder_tccache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t qindex, uint16_t qmask)
1758 struct rte_sched_grinder *grinder = port->grinder + pos;
1761 grinder->tccache_w = 0;
1762 grinder->tccache_r = 0;
1764 b[0] = (uint8_t) (qmask & 0xF);
1765 b[1] = (uint8_t) ((qmask >> 4) & 0xF);
1766 b[2] = (uint8_t) ((qmask >> 8) & 0xF);
1767 b[3] = (uint8_t) ((qmask >> 12) & 0xF);
1769 grinder->tccache_qmask[grinder->tccache_w] = b[0];
1770 grinder->tccache_qindex[grinder->tccache_w] = qindex;
1771 grinder->tccache_w += (b[0] != 0);
1773 grinder->tccache_qmask[grinder->tccache_w] = b[1];
1774 grinder->tccache_qindex[grinder->tccache_w] = qindex + 4;
1775 grinder->tccache_w += (b[1] != 0);
1777 grinder->tccache_qmask[grinder->tccache_w] = b[2];
1778 grinder->tccache_qindex[grinder->tccache_w] = qindex + 8;
1779 grinder->tccache_w += (b[2] != 0);
1781 grinder->tccache_qmask[grinder->tccache_w] = b[3];
1782 grinder->tccache_qindex[grinder->tccache_w] = qindex + 12;
1783 grinder->tccache_w += (b[3] != 0);
1787 grinder_next_tc(struct rte_sched_port *port, uint32_t pos)
1789 struct rte_sched_grinder *grinder = port->grinder + pos;
1790 struct rte_mbuf **qbase;
1794 if (grinder->tccache_r == grinder->tccache_w) {
1798 qindex = grinder->tccache_qindex[grinder->tccache_r];
1799 qbase = rte_sched_port_qbase(port, qindex);
1800 qsize = rte_sched_port_qsize(port, qindex);
1802 grinder->tc_index = (qindex >> 2) & 0x3;
1803 grinder->qmask = grinder->tccache_qmask[grinder->tccache_r];
1804 grinder->qsize = qsize;
1806 grinder->qindex[0] = qindex;
1807 grinder->qindex[1] = qindex + 1;
1808 grinder->qindex[2] = qindex + 2;
1809 grinder->qindex[3] = qindex + 3;
1811 grinder->queue[0] = port->queue + qindex;
1812 grinder->queue[1] = port->queue + qindex + 1;
1813 grinder->queue[2] = port->queue + qindex + 2;
1814 grinder->queue[3] = port->queue + qindex + 3;
1816 grinder->qbase[0] = qbase;
1817 grinder->qbase[1] = qbase + qsize;
1818 grinder->qbase[2] = qbase + 2 * qsize;
1819 grinder->qbase[3] = qbase + 3 * qsize;
1821 grinder->tccache_r ++;
1826 grinder_next_pipe(struct rte_sched_port *port, uint32_t pos)
1828 struct rte_sched_grinder *grinder = port->grinder + pos;
1829 uint32_t pipe_qindex;
1830 uint16_t pipe_qmask;
1832 if (grinder->pcache_r < grinder->pcache_w) {
1833 pipe_qmask = grinder->pcache_qmask[grinder->pcache_r];
1834 pipe_qindex = grinder->pcache_qindex[grinder->pcache_r];
1835 grinder->pcache_r ++;
1837 uint64_t bmp_slab = 0;
1838 uint32_t bmp_pos = 0;
1840 /* Get another non-empty pipe group */
1841 if (unlikely(rte_bitmap_scan(port->bmp, &bmp_pos, &bmp_slab) <= 0)) {
1846 debug_check_queue_slab(port, bmp_pos, bmp_slab);
1849 /* Return if pipe group already in one of the other grinders */
1850 port->grinder_base_bmp_pos[pos] = RTE_SCHED_BMP_POS_INVALID;
1851 if (unlikely(grinder_pipe_exists(port, bmp_pos))) {
1854 port->grinder_base_bmp_pos[pos] = bmp_pos;
1856 /* Install new pipe group into grinder's pipe cache */
1857 grinder_pcache_populate(port, pos, bmp_pos, bmp_slab);
1859 pipe_qmask = grinder->pcache_qmask[0];
1860 pipe_qindex = grinder->pcache_qindex[0];
1861 grinder->pcache_r = 1;
1864 /* Install new pipe in the grinder */
1865 grinder->pindex = pipe_qindex >> 4;
1866 grinder->subport = port->subport + (grinder->pindex / port->n_pipes_per_subport);
1867 grinder->pipe = port->pipe + grinder->pindex;
1868 grinder->pipe_params = NULL; /* to be set after the pipe structure is prefetched */
1869 grinder->productive = 0;
1871 grinder_tccache_populate(port, pos, pipe_qindex, pipe_qmask);
1872 grinder_next_tc(port, pos);
1874 /* Check for pipe exhaustion */
1875 if (grinder->pindex == port->pipe_loop) {
1876 port->pipe_exhaustion = 1;
1877 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1883 #if RTE_SCHED_WRR == 0
1885 #define grinder_wrr_load(a,b)
1887 #define grinder_wrr_store(a,b)
1890 grinder_wrr(struct rte_sched_port *port, uint32_t pos)
1892 struct rte_sched_grinder *grinder = port->grinder + pos;
1893 uint64_t slab = grinder->qmask;
1895 if (rte_bsf64(slab, &grinder->qpos) == 0) {
1896 rte_panic("grinder wrr\n");
1900 #elif RTE_SCHED_WRR == 1
1903 grinder_wrr_load(struct rte_sched_port *port, uint32_t pos)
1905 struct rte_sched_grinder *grinder = port->grinder + pos;
1906 struct rte_sched_pipe *pipe = grinder->pipe;
1907 struct rte_sched_pipe_profile *pipe_params = grinder->pipe_params;
1908 uint32_t tc_index = grinder->tc_index;
1909 uint32_t qmask = grinder->qmask;
1912 qindex = tc_index * 4;
1914 grinder->wrr_tokens[0] = ((uint16_t) pipe->wrr_tokens[qindex]) << RTE_SCHED_WRR_SHIFT;
1915 grinder->wrr_tokens[1] = ((uint16_t) pipe->wrr_tokens[qindex + 1]) << RTE_SCHED_WRR_SHIFT;
1916 grinder->wrr_tokens[2] = ((uint16_t) pipe->wrr_tokens[qindex + 2]) << RTE_SCHED_WRR_SHIFT;
1917 grinder->wrr_tokens[3] = ((uint16_t) pipe->wrr_tokens[qindex + 3]) << RTE_SCHED_WRR_SHIFT;
1919 grinder->wrr_mask[0] = (qmask & 0x1) * 0xFFFF;
1920 grinder->wrr_mask[1] = ((qmask >> 1) & 0x1) * 0xFFFF;
1921 grinder->wrr_mask[2] = ((qmask >> 2) & 0x1) * 0xFFFF;
1922 grinder->wrr_mask[3] = ((qmask >> 3) & 0x1) * 0xFFFF;
1924 grinder->wrr_cost[0] = pipe_params->wrr_cost[qindex];
1925 grinder->wrr_cost[1] = pipe_params->wrr_cost[qindex + 1];
1926 grinder->wrr_cost[2] = pipe_params->wrr_cost[qindex + 2];
1927 grinder->wrr_cost[3] = pipe_params->wrr_cost[qindex + 3];
1931 grinder_wrr_store(struct rte_sched_port *port, uint32_t pos)
1933 struct rte_sched_grinder *grinder = port->grinder + pos;
1934 struct rte_sched_pipe *pipe = grinder->pipe;
1935 uint32_t tc_index = grinder->tc_index;
1938 qindex = tc_index * 4;
1940 pipe->wrr_tokens[qindex] = (uint8_t) ((grinder->wrr_tokens[0] & grinder->wrr_mask[0]) >> RTE_SCHED_WRR_SHIFT);
1941 pipe->wrr_tokens[qindex + 1] = (uint8_t) ((grinder->wrr_tokens[1] & grinder->wrr_mask[1]) >> RTE_SCHED_WRR_SHIFT);
1942 pipe->wrr_tokens[qindex + 2] = (uint8_t) ((grinder->wrr_tokens[2] & grinder->wrr_mask[2]) >> RTE_SCHED_WRR_SHIFT);
1943 pipe->wrr_tokens[qindex + 3] = (uint8_t) ((grinder->wrr_tokens[3] & grinder->wrr_mask[3]) >> RTE_SCHED_WRR_SHIFT);
1947 grinder_wrr(struct rte_sched_port *port, uint32_t pos)
1949 struct rte_sched_grinder *grinder = port->grinder + pos;
1950 uint16_t wrr_tokens_min;
1952 grinder->wrr_tokens[0] |= ~grinder->wrr_mask[0];
1953 grinder->wrr_tokens[1] |= ~grinder->wrr_mask[1];
1954 grinder->wrr_tokens[2] |= ~grinder->wrr_mask[2];
1955 grinder->wrr_tokens[3] |= ~grinder->wrr_mask[3];
1957 grinder->qpos = rte_min_pos_4_u16(grinder->wrr_tokens);
1958 wrr_tokens_min = grinder->wrr_tokens[grinder->qpos];
1960 grinder->wrr_tokens[0] -= wrr_tokens_min;
1961 grinder->wrr_tokens[1] -= wrr_tokens_min;
1962 grinder->wrr_tokens[2] -= wrr_tokens_min;
1963 grinder->wrr_tokens[3] -= wrr_tokens_min;
1968 #error Invalid value for RTE_SCHED_WRR
1970 #endif /* RTE_SCHED_WRR */
1972 #define grinder_evict(port, pos)
1975 grinder_prefetch_pipe(struct rte_sched_port *port, uint32_t pos)
1977 struct rte_sched_grinder *grinder = port->grinder + pos;
1979 rte_prefetch0(grinder->pipe);
1980 rte_prefetch0(grinder->queue[0]);
1984 grinder_prefetch_tc_queue_arrays(struct rte_sched_port *port, uint32_t pos)
1986 struct rte_sched_grinder *grinder = port->grinder + pos;
1987 uint16_t qsize, qr[4];
1989 qsize = grinder->qsize;
1990 qr[0] = grinder->queue[0]->qr & (qsize - 1);
1991 qr[1] = grinder->queue[1]->qr & (qsize - 1);
1992 qr[2] = grinder->queue[2]->qr & (qsize - 1);
1993 qr[3] = grinder->queue[3]->qr & (qsize - 1);
1995 rte_prefetch0(grinder->qbase[0] + qr[0]);
1996 rte_prefetch0(grinder->qbase[1] + qr[1]);
1998 grinder_wrr_load(port, pos);
1999 grinder_wrr(port, pos);
2001 rte_prefetch0(grinder->qbase[2] + qr[2]);
2002 rte_prefetch0(grinder->qbase[3] + qr[3]);
2006 grinder_prefetch_mbuf(struct rte_sched_port *port, uint32_t pos)
2008 struct rte_sched_grinder *grinder = port->grinder + pos;
2009 uint32_t qpos = grinder->qpos;
2010 struct rte_mbuf **qbase = grinder->qbase[qpos];
2011 uint16_t qsize = grinder->qsize;
2012 uint16_t qr = grinder->queue[qpos]->qr & (qsize - 1);
2014 grinder->pkt = qbase[qr];
2015 rte_prefetch0(grinder->pkt);
2017 if (unlikely((qr & 0x7) == 7)) {
2018 uint16_t qr_next = (grinder->queue[qpos]->qr + 1) & (qsize - 1);
2020 rte_prefetch0(qbase + qr_next);
2024 static inline uint32_t
2025 grinder_handle(struct rte_sched_port *port, uint32_t pos)
2027 struct rte_sched_grinder *grinder = port->grinder + pos;
2029 switch (grinder->state) {
2030 case e_GRINDER_PREFETCH_PIPE:
2032 if (grinder_next_pipe(port, pos)) {
2033 grinder_prefetch_pipe(port, pos);
2034 port->busy_grinders ++;
2036 grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2043 case e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS:
2045 struct rte_sched_pipe *pipe = grinder->pipe;
2047 grinder->pipe_params = port->pipe_profiles + pipe->profile;
2048 grinder_prefetch_tc_queue_arrays(port, pos);
2049 grinder_credits_update(port, pos);
2051 grinder->state = e_GRINDER_PREFETCH_MBUF;
2055 case e_GRINDER_PREFETCH_MBUF:
2057 grinder_prefetch_mbuf(port, pos);
2059 grinder->state = e_GRINDER_READ_MBUF;
2063 case e_GRINDER_READ_MBUF:
2065 uint32_t result = 0;
2067 result = grinder_schedule(port, pos);
2069 /* Look for next packet within the same TC */
2070 if (result && grinder->qmask) {
2071 grinder_wrr(port, pos);
2072 grinder_prefetch_mbuf(port, pos);
2076 grinder_wrr_store(port, pos);
2078 /* Look for another active TC within same pipe */
2079 if (grinder_next_tc(port, pos)) {
2080 grinder_prefetch_tc_queue_arrays(port, pos);
2082 grinder->state = e_GRINDER_PREFETCH_MBUF;
2085 if ((grinder->productive == 0) && (port->pipe_loop == RTE_SCHED_PIPE_INVALID)) {
2086 port->pipe_loop = grinder->pindex;
2088 grinder_evict(port, pos);
2090 /* Look for another active pipe */
2091 if (grinder_next_pipe(port, pos)) {
2092 grinder_prefetch_pipe(port, pos);
2094 grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2098 /* No active pipe found */
2099 port->busy_grinders --;
2101 grinder->state = e_GRINDER_PREFETCH_PIPE;
2106 rte_panic("Algorithmic error (invalid state)\n");
2112 rte_sched_port_time_resync(struct rte_sched_port *port)
2114 uint64_t cycles = rte_get_tsc_cycles();
2115 uint64_t cycles_diff = cycles - port->time_cpu_cycles;
2116 double bytes_diff = ((double) cycles_diff) / port->cycles_per_byte;
2118 /* Advance port time */
2119 port->time_cpu_cycles = cycles;
2120 port->time_cpu_bytes += (uint64_t) bytes_diff;
2121 if (port->time < port->time_cpu_bytes) {
2122 port->time = port->time_cpu_bytes;
2125 /* Reset pipe loop detection */
2126 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
2130 rte_sched_port_exceptions(struct rte_sched_port *port)
2134 /* Check if any exception flag is set */
2135 exceptions = (port->busy_grinders == 0) ||
2136 (port->pipe_exhaustion == 1);
2138 /* Clear exception flags */
2139 port->pipe_exhaustion = 0;
2145 rte_sched_port_dequeue(struct rte_sched_port *port, struct rte_mbuf **pkts, uint32_t n_pkts)
2149 port->pkts_out = pkts;
2150 port->n_pkts_out = 0;
2152 rte_sched_port_time_resync(port);
2154 /* Take each queue in the grinder one step further */
2155 for (i = 0, count = 0; ; i ++) {
2156 count += grinder_handle(port, i & (RTE_SCHED_PORT_N_GRINDERS - 1));
2157 if ((count == n_pkts) || rte_sched_port_exceptions(port)) {