test/test-pipeline/pipeline_lpm.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
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  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
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  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
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  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <stdio.h>
  35 #include <stdlib.h>
  36 #include <stdint.h>
  37
  38 #include <rte_log.h>
  39 #include <rte_ethdev.h>
  40 #include <rte_ether.h>
  41 #include <rte_ip.h>
  42 #include <rte_byteorder.h>
  43
  44 #include <rte_port_ring.h>
  45 #include <rte_table_lpm.h>
  46 #include <rte_pipeline.h>
  47
  48 #include "main.h"
  49
  50 #ifndef PIPELINE_LPM_TABLE_NUMBER_TABLE8s
  51 #define PIPELINE_LPM_TABLE_NUMBER_TABLE8s 256
  52 #endif
  53
  54 void
  55 app_main_loop_worker_pipeline_lpm(void) {
  56         struct rte_pipeline_params pipeline_params = {
  57                 .name = "pipeline",
  58                 .socket_id = rte_socket_id(),
  59         };
  60
  61         struct rte_pipeline *p;
  62         uint32_t port_in_id[APP_MAX_PORTS];
  63         uint32_t port_out_id[APP_MAX_PORTS];
  64         uint32_t table_id;
  65         uint32_t i;
  66
  67         RTE_LOG(INFO, USER1, "Core %u is doing work (pipeline with "
  68                 "LPM table)\n", rte_lcore_id());
  69
  70         /* Pipeline configuration */
  71         p = rte_pipeline_create(&pipeline_params);
  72         if (p == NULL)
  73                 rte_panic("Unable to configure the pipeline\n");
  74
  75         /* Input port configuration */
  76         for (i = 0; i < app.n_ports; i++) {
  77                 struct rte_port_ring_reader_params port_ring_params = {
  78                         .ring = app.rings_rx[i],
  79                 };
  80
  81                 struct rte_pipeline_port_in_params port_params = {
  82                         .ops = &rte_port_ring_reader_ops,
  83                         .arg_create = (void *) &port_ring_params,
  84                         .f_action = NULL,
  85                         .arg_ah = NULL,
  86                         .burst_size = app.burst_size_worker_read,
  87                 };
  88
  89                 if (rte_pipeline_port_in_create(p, &port_params,
  90                         &port_in_id[i]))
  91                         rte_panic("Unable to configure input port for "
  92                                 "ring %d\n", i);
  93         }
  94
  95         /* Output port configuration */
  96         for (i = 0; i < app.n_ports; i++) {
  97                 struct rte_port_ring_writer_params port_ring_params = {
  98                         .ring = app.rings_tx[i],
  99                         .tx_burst_sz = app.burst_size_worker_write,
 100                 };
 101
 102                 struct rte_pipeline_port_out_params port_params = {
 103                         .ops = &rte_port_ring_writer_ops,
 104                         .arg_create = (void *) &port_ring_params,
 105                         .f_action = NULL,
 106                         .arg_ah = NULL,
 107                 };
 108
 109                 if (rte_pipeline_port_out_create(p, &port_params,
 110                         &port_out_id[i]))
 111                         rte_panic("Unable to configure output port for "
 112                                 "ring %d\n", i);
 113         }
 114
 115         /* Table configuration */
 116         {
 117                 struct rte_table_lpm_params table_lpm_params = {
 118                         .name = "LPM",
 119                         .n_rules = 1 << 24,
 120                         .number_tbl8s = PIPELINE_LPM_TABLE_NUMBER_TABLE8s,
 121                         .flags = 0,
 122                         .entry_unique_size =
 123                                 sizeof(struct rte_pipeline_table_entry),
 124                         .offset = APP_METADATA_OFFSET(32),
 125                 };
 126
 127                 struct rte_pipeline_table_params table_params = {
 128                         .ops = &rte_table_lpm_ops,
 129                         .arg_create = &table_lpm_params,
 130                         .f_action_hit = NULL,
 131                         .f_action_miss = NULL,
 132                         .arg_ah = NULL,
 133                         .action_data_size = 0,
 134                 };
 135
 136                 if (rte_pipeline_table_create(p, &table_params, &table_id))
 137                         rte_panic("Unable to configure the LPM table\n");
 138         }
 139
 140         /* Interconnecting ports and tables */
 141         for (i = 0; i < app.n_ports; i++)
 142                 if (rte_pipeline_port_in_connect_to_table(p, port_in_id[i],
 143                         table_id))
 144                         rte_panic("Unable to connect input port %u to "
 145                                 "table %u\n", port_in_id[i],  table_id);
 146
 147         /* Add entries to tables */
 148         for (i = 0; i < app.n_ports; i++) {
 149                 struct rte_pipeline_table_entry entry = {
 150                         .action = RTE_PIPELINE_ACTION_PORT,
 151                         {.port_id = port_out_id[i & (app.n_ports - 1)]},
 152                 };
 153
 154                 struct rte_table_lpm_key key = {
 155                         .ip = i << (24 - __builtin_popcount(app.n_ports - 1)),
 156                         .depth = 8 + __builtin_popcount(app.n_ports - 1),
 157                 };
 158
 159                 struct rte_pipeline_table_entry *entry_ptr;
 160
 161                 int key_found, status;
 162
 163                 printf("Adding rule to LPM table (IPv4 destination = %"
 164                         PRIu32 ".%" PRIu32 ".%" PRIu32 ".%" PRIu32 "/%" PRIu8
 165                         " => port out = %" PRIu32 ")\n",
 166                         (key.ip & 0xFF000000) >> 24,
 167                         (key.ip & 0x00FF0000) >> 16,
 168                         (key.ip & 0x0000FF00) >> 8,
 169                         key.ip & 0x000000FF,
 170                         key.depth,
 171                         i);
 172
 173                 status = rte_pipeline_table_entry_add(p, table_id, &key, &entry,
 174                         &key_found, &entry_ptr);
 175                 if (status < 0)
 176                         rte_panic("Unable to add entry to table %u (%d)\n",
 177                                 table_id, status);
 178         }
 179
 180         /* Enable input ports */
 181         for (i = 0; i < app.n_ports; i++)
 182                 if (rte_pipeline_port_in_enable(p, port_in_id[i]))
 183                         rte_panic("Unable to enable input port %u\n",
 184                                 port_in_id[i]);
 185
 186         /* Check pipeline consistency */
 187         if (rte_pipeline_check(p) < 0)
 188                 rte_panic("Pipeline consistency check failed\n");
 189
 190         /* Run-time */
 191 #if APP_FLUSH == 0
 192         for ( ; ; )
 193                 rte_pipeline_run(p);
 194 #else
 195         for (i = 0; ; i++) {
 196                 rte_pipeline_run(p);
 197
 198                 if ((i & APP_FLUSH) == 0)
 199                         rte_pipeline_flush(p);
 200         }
 201 #endif
 202 }