net/ixgbe: set the default value for EITR
authorTonghao Zhang <xiangxia.m.yue@gmail.com>
Sat, 28 Apr 2018 03:03:38 +0000 (20:03 -0700)
committerFerruh Yigit <ferruh.yigit@intel.com>
Mon, 14 May 2018 21:31:49 +0000 (22:31 +0100)
The ixgbe PF and VF use the same default value
for EITR defined in header file.

Signed-off-by: Tonghao Zhang <xiangxia.m.yue@gmail.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
drivers/net/ixgbe/ixgbe_ethdev.c
drivers/net/ixgbe/ixgbe_rxtx.c

index 7ba05c4..1090560 100644 (file)
@@ -59,9 +59,6 @@
  */
 #define IXGBE_FC_LO    0x40
 
-/* Default minimum inter-interrupt interval for EITR configuration */
-#define IXGBE_MIN_INTER_INTERRUPT_INTERVAL_DEFAULT    0x79E
-
 /* Timer value included in XOFF frames. */
 #define IXGBE_FC_PAUSE 0x680
 
@@ -5873,7 +5870,7 @@ ixgbe_configure_msix(struct rte_eth_dev *dev)
                break;
        }
        IXGBE_WRITE_REG(hw, IXGBE_EITR(IXGBE_MISC_VEC_ID),
-                       IXGBE_MIN_INTER_INTERRUPT_INTERVAL_DEFAULT & 0xFFF);
+                       IXGBE_EITR_INTERVAL_US(IXGBE_QUEUE_ITR_INTERVAL_DEFAULT));
 
        /* set up to autoclear timer, and the vectors */
        mask = IXGBE_EIMS_ENABLE_MASK;
index 47045dd..37837aa 100644 (file)
@@ -4841,7 +4841,8 @@ ixgbe_set_rsc(struct rte_eth_dev *dev)
                 * at most 500us latency for a single RSC aggregation.
                 */
                eitr &= ~IXGBE_EITR_ITR_INT_MASK;
-               eitr |= IXGBE_EITR_INTERVAL_US(500) | IXGBE_EITR_CNT_WDIS;
+               eitr |= IXGBE_EITR_INTERVAL_US(IXGBE_QUEUE_ITR_INTERVAL_DEFAULT);
+               eitr |= IXGBE_EITR_CNT_WDIS;
 
                IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxq->reg_idx), srrctl);
                IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(rxq->reg_idx), rscctl);