config/thunderx: disable C11 memory model ring
authorJerin Jacob <jerin.jacob@caviumnetworks.com>
Sun, 3 Dec 2017 12:37:30 +0000 (18:07 +0530)
committerThomas Monjalon <thomas@monjalon.net>
Mon, 29 Jan 2018 15:40:01 +0000 (16:40 +0100)
On thunderx and octeontx, ring_perf_autotest and
ring_pmd_perf_autotest test shows better performance
when disabling CONFIG_RTE_RING_USE_C11_MEM_MODEL.
On the other hand, Enabling CONFIG_RTE_RING_USE_C11_MEM_MODEL
shows better performance on thunderx2.
Since thunderx2 is using the default armv8 config,
no particular change is required.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
config/defconfig_arm64-thunderx-linuxapp-gcc

index 6d105d9..2bed66c 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_RTE_CACHE_LINE_SIZE=128
 CONFIG_RTE_MAX_NUMA_NODES=2
 CONFIG_RTE_MAX_LCORE=96
 CONFIG_RTE_MAX_VFIO_GROUPS=128
+CONFIG_RTE_RING_USE_C11_MEM_MODEL=n
 
 #
 # Compile PMD for octeontx sso event device