net/i40e/base: extend PHY access AQ command
authorXiaolong Ye <xiaolong.ye@intel.com>
Mon, 13 Jan 2020 02:39:31 +0000 (10:39 +0800)
committerFerruh Yigit <ferruh.yigit@intel.com>
Fri, 17 Jan 2020 18:46:02 +0000 (19:46 +0100)
Currently FW use MDIO I/F number corresponded with current PF for PHY
access. This code allow to specify used MDIO I/F number.

Signed-off-by: Piotr Azarewicz <piotr.azarewicz@intel.com>
Signed-off-by: Xiaolong Ye <xiaolong.ye@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
drivers/net/i40e/base/i40e_adminq.c
drivers/net/i40e/base/i40e_adminq_cmd.h
drivers/net/i40e/base/i40e_common.c
drivers/net/i40e/base/i40e_prototype.h
drivers/net/i40e/base/i40e_type.h

index 52bea84..96e170e 100644 (file)
@@ -569,6 +569,57 @@ STATIC void i40e_resume_aq(struct i40e_hw *hw)
 }
 #endif /* PF_DRIVER */
 
+/**
+ *  i40e_set_hw_flags - set HW flags
+ *  @hw: pointer to the hardware structure
+ **/
+STATIC void i40e_set_hw_flags(struct i40e_hw *hw)
+{
+       struct i40e_adminq_info *aq = &hw->aq;
+
+       hw->flags = 0;
+
+       switch (hw->mac.type) {
+       case I40E_MAC_XL710:
+               if (aq->api_maj_ver > 1 ||
+                   (aq->api_maj_ver == 1 &&
+                    aq->api_min_ver >= I40E_MINOR_VER_GET_LINK_INFO_XL710)) {
+                       hw->flags |= I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE;
+                       hw->flags |= I40E_HW_FLAG_FW_LLDP_STOPPABLE;
+                       /* The ability to RX (not drop) 802.1ad frames */
+                       hw->flags |= I40E_HW_FLAG_802_1AD_CAPABLE;
+               }
+               break;
+       case I40E_MAC_X722:
+               hw->flags |= I40E_HW_FLAG_AQ_SRCTL_ACCESS_ENABLE |
+                            I40E_HW_FLAG_NVM_READ_REQUIRES_LOCK;
+
+               if (aq->api_maj_ver > 1 ||
+                   (aq->api_maj_ver == 1 &&
+                    aq->api_min_ver >= I40E_MINOR_VER_FW_LLDP_STOPPABLE_X722))
+                       hw->flags |= I40E_HW_FLAG_FW_LLDP_STOPPABLE;
+               /* fall through */
+       default:
+               break;
+       }
+
+       /* Newer versions of firmware require lock when reading the NVM */
+       if (aq->api_maj_ver > 1 ||
+           (aq->api_maj_ver == 1 &&
+            aq->api_min_ver >= 5))
+               hw->flags |= I40E_HW_FLAG_NVM_READ_REQUIRES_LOCK;
+
+       if (aq->api_maj_ver > 1 ||
+           (aq->api_maj_ver == 1 &&
+            aq->api_min_ver >= 8))
+               hw->flags |= I40E_HW_FLAG_FW_LLDP_PERSISTENT;
+
+       if (aq->api_maj_ver > 1 ||
+           (aq->api_maj_ver == 1 &&
+            aq->api_min_ver >= 9))
+               hw->flags |= I40E_HW_FLAG_AQ_PHY_ACCESS_EXTENDED;
+}
+
 /**
  *  i40e_init_adminq - main initialization routine for Admin Queue
  *  @hw: pointer to the hardware structure
@@ -636,6 +687,12 @@ enum i40e_status_code i40e_init_adminq(struct i40e_hw *hw)
        if (ret_code != I40E_SUCCESS)
                goto init_adminq_free_arq;
 
+       /*
+        * Some features were introduced in different FW API version
+        * for different MAC type.
+        */
+       i40e_set_hw_flags(hw);
+
        /* get the NVM version info */
        i40e_read_nvm_word(hw, I40E_SR_NVM_DEV_STARTER_VERSION,
                           &hw->nvm.version);
index d718c73..7181e0f 100644 (file)
@@ -2310,7 +2310,11 @@ struct i40e_aqc_phy_register_access {
 #define I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE 2
        u8      dev_addres;
        u8      cmd_flags;
-#define I40E_AQ_PHY_REG_ACCESS_DONT_CHANGE_QSFP_PAGE   1
+#define I40E_AQ_PHY_REG_ACCESS_DONT_CHANGE_QSFP_PAGE   0x01
+#define I40E_AQ_PHY_REG_ACCESS_SET_MDIO_IF_NUMBER      0x02
+#define I40E_AQ_PHY_REG_ACCESS_MDIO_IF_NUMBER_SHIFT    2
+#define I40E_AQ_PHY_REG_ACCESS_MDIO_IF_NUMBER_MASK     (0x3 << \
+               I40E_AQ_PHY_REG_ACCESS_MDIO_IF_NUMBER_SHIFT)
        u8      reserved1;
        __le32  reg_address;
        __le32  reg_value;
index 9d76b68..ee081d6 100644 (file)
@@ -7239,23 +7239,52 @@ do_retry:
                wr32(hw, reg_addr, reg_val);
 }
 
-#ifdef PF_DRIVER
 /**
- * i40e_aq_set_phy_register
+ * i40e_mdio_if_number_selection - MDIO I/F number selection
+ * @hw: pointer to the hw struct
+ * @set_mdio: use MDIO I/F number specified by mdio_num
+ * @mdio_num: MDIO I/F number
+ * @cmd: pointer to PHY Register command structure
+ **/
+static void
+i40e_mdio_if_number_selection(struct i40e_hw *hw, bool set_mdio, u8 mdio_num,
+                             struct i40e_aqc_phy_register_access *cmd)
+{
+       if (set_mdio && cmd->phy_interface == I40E_AQ_PHY_REG_ACCESS_EXTERNAL) {
+               if (hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_EXTENDED)
+                       cmd->cmd_flags |=
+                               I40E_AQ_PHY_REG_ACCESS_SET_MDIO_IF_NUMBER |
+                               ((mdio_num <<
+                               I40E_AQ_PHY_REG_ACCESS_MDIO_IF_NUMBER_SHIFT) &
+                               I40E_AQ_PHY_REG_ACCESS_MDIO_IF_NUMBER_MASK);
+               else
+                       i40e_debug(hw, I40E_DEBUG_PHY,
+                                  "MDIO I/F number selection not supported by current FW version.\n");
+       }
+}
+
+/**
+ * i40e_aq_set_phy_register_ext
  * @hw: pointer to the hw struct
  * @phy_select: select which phy should be accessed
  * @dev_addr: PHY device address
  * @page_change: enable auto page change
+ * @set_mdio: use MDIO I/F number specified by mdio_num
+ * @mdio_num: MDIO I/F number
  * @reg_addr: PHY register address
  * @reg_val: new register value
  * @cmd_details: pointer to command details structure or NULL
  *
  * Write the external PHY register.
+ * NOTE: In common cases MDIO I/F number should not be changed, thats why you
+ * may use simple wrapper i40e_aq_set_phy_register.
  **/
-enum i40e_status_code i40e_aq_set_phy_register(struct i40e_hw *hw,
-                               u8 phy_select, u8 dev_addr, bool page_change,
-                               u32 reg_addr, u32 reg_val,
-                               struct i40e_asq_cmd_details *cmd_details)
+enum i40e_status_code
+i40e_aq_set_phy_register_ext(struct i40e_hw *hw,
+                            u8 phy_select, u8 dev_addr, bool page_change,
+                            bool set_mdio, u8 mdio_num,
+                            u32 reg_addr, u32 reg_val,
+                            struct i40e_asq_cmd_details *cmd_details)
 {
        struct i40e_aq_desc desc;
        struct i40e_aqc_phy_register_access *cmd =
@@ -7273,27 +7302,35 @@ enum i40e_status_code i40e_aq_set_phy_register(struct i40e_hw *hw,
        if (!page_change)
                cmd->cmd_flags = I40E_AQ_PHY_REG_ACCESS_DONT_CHANGE_QSFP_PAGE;
 
+       i40e_mdio_if_number_selection(hw, set_mdio, mdio_num, cmd);
+
        status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
 
        return status;
 }
 
 /**
- * i40e_aq_get_phy_register
+ * i40e_aq_get_phy_register_ext
  * @hw: pointer to the hw struct
  * @phy_select: select which phy should be accessed
  * @dev_addr: PHY device address
  * @page_change: enable auto page change
+ * @set_mdio: use MDIO I/F number specified by mdio_num
+ * @mdio_num: MDIO I/F number
  * @reg_addr: PHY register address
  * @reg_val: read register value
  * @cmd_details: pointer to command details structure or NULL
  *
  * Read the external PHY register.
+ * NOTE: In common cases MDIO I/F number should not be changed, thats why you
+ * may use simple wrapper i40e_aq_get_phy_register.
  **/
-enum i40e_status_code i40e_aq_get_phy_register(struct i40e_hw *hw,
-                               u8 phy_select, u8 dev_addr, bool page_change,
-                               u32 reg_addr, u32 *reg_val,
-                               struct i40e_asq_cmd_details *cmd_details)
+enum i40e_status_code
+i40e_aq_get_phy_register_ext(struct i40e_hw *hw,
+                            u8 phy_select, u8 dev_addr, bool page_change,
+                            bool set_mdio, u8 mdio_num,
+                            u32 reg_addr, u32 *reg_val,
+                            struct i40e_asq_cmd_details *cmd_details)
 {
        struct i40e_aq_desc desc;
        struct i40e_aqc_phy_register_access *cmd =
@@ -7310,6 +7347,8 @@ enum i40e_status_code i40e_aq_get_phy_register(struct i40e_hw *hw,
        if (!page_change)
                cmd->cmd_flags = I40E_AQ_PHY_REG_ACCESS_DONT_CHANGE_QSFP_PAGE;
 
+       i40e_mdio_if_number_selection(hw, set_mdio, mdio_num, cmd);
+
        status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
        if (!status)
                *reg_val = LE32_TO_CPU(cmd->reg_value);
@@ -7317,7 +7356,6 @@ enum i40e_status_code i40e_aq_get_phy_register(struct i40e_hw *hw,
        return status;
 }
 
-#endif /* PF_DRIVER */
 /**
  * i40e_aq_run_phy_activity
  * @hw: pointer to the hw struct
index 748a7a2..fcfe497 100644 (file)
@@ -548,14 +548,25 @@ enum i40e_status_code i40e_aq_rx_ctl_write_register(struct i40e_hw *hw,
                                u32 reg_addr, u32 reg_val,
                                struct i40e_asq_cmd_details *cmd_details);
 void i40e_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val);
-enum i40e_status_code i40e_aq_set_phy_register(struct i40e_hw *hw,
-                               u8 phy_select, u8 dev_addr, bool page_change,
-                               u32 reg_addr, u32 reg_val,
-                               struct i40e_asq_cmd_details *cmd_details);
-enum i40e_status_code i40e_aq_get_phy_register(struct i40e_hw *hw,
-                               u8 phy_select, u8 dev_addr, bool page_change,
-                               u32 reg_addr, u32 *reg_val,
-                               struct i40e_asq_cmd_details *cmd_details);
+enum i40e_status_code
+i40e_aq_set_phy_register_ext(struct i40e_hw *hw,
+                            u8 phy_select, u8 dev_addr, bool page_change,
+                            bool set_mdio, u8 mdio_num,
+                            u32 reg_addr, u32 reg_val,
+                            struct i40e_asq_cmd_details *cmd_details);
+enum i40e_status_code
+i40e_aq_get_phy_register_ext(struct i40e_hw *hw,
+                            u8 phy_select, u8 dev_addr, bool page_change,
+                            bool set_mdio, u8 mdio_num,
+                            u32 reg_addr, u32 *reg_val,
+                            struct i40e_asq_cmd_details *cmd_details);
+
+/* Convenience wrappers for most common use case */
+#define i40e_aq_set_phy_register(hw, ps, da, pc, ra, rv, cd) \
+       i40e_aq_set_phy_register_ext(hw, ps, da, pc, false, 0, ra, rv, cd)
+#define i40e_aq_get_phy_register(hw, ps, da, pc, ra, rv, cd) \
+       i40e_aq_get_phy_register_ext(hw, ps, da, pc, false, 0, ra, rv, cd)
+
 enum i40e_status_code
 i40e_aq_run_phy_activity(struct i40e_hw *hw, u16 activity_id, u32 opcode,
                         u32 *cmd_status, u32 *data0, u32 *data1,
index f0e4b66..b380193 100644 (file)
@@ -743,6 +743,7 @@ struct i40e_hw {
 #define I40E_HW_FLAG_NVM_READ_REQUIRES_LOCK BIT_ULL(3)
 #define I40E_HW_FLAG_FW_LLDP_STOPPABLE     BIT_ULL(4)
 #define I40E_HW_FLAG_FW_LLDP_PERSISTENT     BIT_ULL(5)
+#define I40E_HW_FLAG_AQ_PHY_ACCESS_EXTENDED BIT_ULL(6)
        u64 flags;
 
        /* Used in set switch config AQ command */