net/avf/base: fix shifting 32-bit signed variable 31 times
authorFerruh Yigit <ferruh.yigit@intel.com>
Sun, 28 Oct 2018 03:51:33 +0000 (03:51 +0000)
committerFerruh Yigit <ferruh.yigit@intel.com>
Mon, 5 Nov 2018 14:58:45 +0000 (15:58 +0100)
Fixes: e5b2a9e957e7 ("net/avf/base: add base code for avf PMD")
Cc: stable@dpdk.org
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Reviewed-by: Wei Zhao <wei.zhao1@intel.com>
drivers/net/avf/base/avf_register.h

index ba5a9f3..adb9895 100644 (file)
@@ -76,7 +76,7 @@ POSSIBILITY OF SUCH DAMAGE.
 #define AVF_ARQLEN1_ARQCRIT_SHIFT   30
 #define AVF_ARQLEN1_ARQCRIT_MASK    AVF_MASK(0x1, AVF_ARQLEN1_ARQCRIT_SHIFT)
 #define AVF_ARQLEN1_ARQENABLE_SHIFT 31
-#define AVF_ARQLEN1_ARQENABLE_MASK  AVF_MASK(0x1, AVF_ARQLEN1_ARQENABLE_SHIFT)
+#define AVF_ARQLEN1_ARQENABLE_MASK  AVF_MASK(0x1U, AVF_ARQLEN1_ARQENABLE_SHIFT)
 #define AVF_ARQT1            0x00007000 /* Reset: EMPR */
 #define AVF_ARQT1_ARQT_SHIFT 0
 #define AVF_ARQT1_ARQT_MASK  AVF_MASK(0x3FF, AVF_ARQT1_ARQT_SHIFT)
@@ -99,7 +99,7 @@ POSSIBILITY OF SUCH DAMAGE.
 #define AVF_ATQLEN1_ATQCRIT_SHIFT   30
 #define AVF_ATQLEN1_ATQCRIT_MASK    AVF_MASK(0x1, AVF_ATQLEN1_ATQCRIT_SHIFT)
 #define AVF_ATQLEN1_ATQENABLE_SHIFT 31
-#define AVF_ATQLEN1_ATQENABLE_MASK  AVF_MASK(0x1, AVF_ATQLEN1_ATQENABLE_SHIFT)
+#define AVF_ATQLEN1_ATQENABLE_MASK  AVF_MASK(0x1U, AVF_ATQLEN1_ATQENABLE_SHIFT)
 #define AVF_ATQT1            0x00008400 /* Reset: EMPR */
 #define AVF_ATQT1_ATQT_SHIFT 0
 #define AVF_ATQT1_ATQT_MASK  AVF_MASK(0x3FF, AVF_ATQT1_ATQT_SHIFT)