crypto/ccp: support basic PMD ops
authorRavi Kumar <ravi1.kumar@amd.com>
Mon, 19 Mar 2018 12:23:37 +0000 (08:23 -0400)
committerPablo de Lara <pablo.de.lara.guarch@intel.com>
Mon, 23 Apr 2018 17:20:08 +0000 (18:20 +0100)
Added device specific basic crypto ops callback functions.

Signed-off-by: Ravi Kumar <ravi1.kumar@amd.com>
drivers/crypto/ccp/ccp_dev.c
drivers/crypto/ccp/ccp_dev.h
drivers/crypto/ccp/ccp_pmd_ops.c
drivers/crypto/ccp/ccp_pmd_private.h

index 724b5bd..34e44b3 100644 (file)
 struct ccp_list ccp_list = TAILQ_HEAD_INITIALIZER(ccp_list);
 static int ccp_dev_id;
 
+int
+ccp_dev_start(struct rte_cryptodev *dev)
+{
+       struct ccp_private *priv = dev->data->dev_private;
+
+       priv->last_dev = TAILQ_FIRST(&ccp_list);
+       return 0;
+}
+
 static const struct rte_memzone *
 ccp_queue_dma_zone_reserve(const char *queue_name,
                           uint32_t queue_size,
index f594e91..c360fe0 100644 (file)
 #define LSB_ITEM_SIZE                   32
 #define SLSB_MAP_SIZE                   (MAX_LSB_CNT * LSB_SIZE)
 
+/* General CCP Defines */
+
+#define CCP_SB_BYTES                    32
+
 /* bitmap */
 enum {
        BITS_PER_WORD = sizeof(unsigned long) * CHAR_BIT
@@ -273,6 +277,11 @@ high32_value(unsigned long addr)
        return ((uint64_t)addr >> 32) & 0x00000ffff;
 }
 
+/*
+ * Start CCP device
+ */
+int ccp_dev_start(struct rte_cryptodev *dev);
+
 /**
  * Detect ccp platform and initialize all ccp devices
  *
index 099eb21..99b8ca5 100644 (file)
@@ -2,18 +2,69 @@
  *   Copyright(c) 2018 Advanced Micro Devices, Inc. All rights reserved.
  */
 
+#include <string.h>
+
+#include <rte_common.h>
 #include <rte_cryptodev_pmd.h>
+#include <rte_malloc.h>
+
+#include "ccp_pmd_private.h"
+#include "ccp_dev.h"
+
+static const struct rte_cryptodev_capabilities ccp_pmd_capabilities[] = {
+       RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
+};
+
+static int
+ccp_pmd_config(struct rte_cryptodev *dev __rte_unused,
+              struct rte_cryptodev_config *config __rte_unused)
+{
+       return 0;
+}
+
+static int
+ccp_pmd_start(struct rte_cryptodev *dev)
+{
+       return ccp_dev_start(dev);
+}
+
+static void
+ccp_pmd_stop(struct rte_cryptodev *dev __rte_unused)
+{
+
+}
+
+static int
+ccp_pmd_close(struct rte_cryptodev *dev __rte_unused)
+{
+       return 0;
+}
+
+static void
+ccp_pmd_info_get(struct rte_cryptodev *dev,
+                struct rte_cryptodev_info *dev_info)
+{
+       struct ccp_private *internals = dev->data->dev_private;
+
+       if (dev_info != NULL) {
+               dev_info->driver_id = dev->driver_id;
+               dev_info->feature_flags = dev->feature_flags;
+               dev_info->capabilities = ccp_pmd_capabilities;
+               dev_info->max_nb_queue_pairs = internals->max_nb_qpairs;
+               dev_info->sym.max_nb_sessions = internals->max_nb_sessions;
+       }
+}
 
 struct rte_cryptodev_ops ccp_ops = {
-               .dev_configure          = NULL,
-               .dev_start              = NULL,
-               .dev_stop               = NULL,
-               .dev_close              = NULL,
+               .dev_configure          = ccp_pmd_config,
+               .dev_start              = ccp_pmd_start,
+               .dev_stop               = ccp_pmd_stop,
+               .dev_close              = ccp_pmd_close,
 
                .stats_get              = NULL,
                .stats_reset            = NULL,
 
-               .dev_infos_get          = NULL,
+               .dev_infos_get          = ccp_pmd_info_get,
 
                .queue_pair_setup       = NULL,
                .queue_pair_release     = NULL,
index 0da9b92..47c4fb2 100644 (file)
 #define CCP_NB_MAX_DESCRIPTORS 1024
 #define CCP_MAX_BURST 64
 
+#include "ccp_dev.h"
+
 /* private data structure for each CCP crypto device */
 struct ccp_private {
        unsigned int max_nb_qpairs;     /**< Max number of queue pairs */
        unsigned int max_nb_sessions;   /**< Max number of sessions */
        uint8_t crypto_num_dev;         /**< Number of working crypto devices */
+       struct ccp_device *last_dev;    /**< Last working crypto device */
 };
 
+/* CCP batch info */
+struct ccp_batch_info {
+       struct rte_crypto_op *op[CCP_MAX_BURST];
+       /**< optable populated at enque time from app*/
+       int op_idx;
+       struct ccp_queue *cmd_q;
+       uint16_t opcnt;
+       /**< no. of crypto ops in batch*/
+       int desccnt;
+       /**< no. of ccp queue descriptors*/
+       uint32_t head_offset;
+       /**< ccp queue head tail offsets time of enqueue*/
+       uint32_t tail_offset;
+       uint8_t lsb_buf[CCP_SB_BYTES * CCP_MAX_BURST];
+       phys_addr_t lsb_buf_phys;
+       /**< LSB intermediate buf for passthru */
+       int lsb_buf_idx;
+} __rte_cache_aligned;
+
+/**< CCP crypto queue pair */
+struct ccp_qp {
+       uint16_t id;
+       /**< Queue Pair Identifier */
+       char name[RTE_CRYPTODEV_NAME_MAX_LEN];
+       /**< Unique Queue Pair Name */
+       struct rte_ring *processed_pkts;
+       /**< Ring for placing process packets */
+       struct rte_mempool *sess_mp;
+       /**< Session Mempool */
+       struct rte_mempool *batch_mp;
+       /**< Session Mempool for batch info */
+       struct rte_cryptodev_stats qp_stats;
+       /**< Queue pair statistics */
+       struct ccp_batch_info *b_info;
+       /**< Store ops pulled out of queue */
+       struct rte_cryptodev *dev;
+       /**< rte crypto device to which this qp belongs */
+} __rte_cache_aligned;
+
+
 /**< device specific operations function pointer structure */
 extern struct rte_cryptodev_ops *ccp_pmd_ops;