compress/octeontx: introduce octeontx zip PMD
authorSunila Sahu <sunila.sahu@caviumnetworks.com>
Wed, 25 Jul 2018 17:04:51 +0000 (22:34 +0530)
committerPablo de Lara <pablo.de.lara.guarch@intel.com>
Wed, 25 Jul 2018 11:36:26 +0000 (13:36 +0200)
Octentx zipvf PMD provides hardware acceleration for
deflate and lzs compression and decompression operations
using Octeontx zip co-processor, which provide 8
virtualized zip devices.

This patch add basic initialization routine to register zip VFs
to compressdev library.

Signed-off-by: Ashish Gupta <ashish.gupta@caviumnetworks.com>
Signed-off-by: Shally Verma <shally.verma@caviumnetworks.com>
Signed-off-by: Sunila Sahu <sunila.sahu@caviumnetworks.com>
12 files changed:
MAINTAINERS
config/common_base
drivers/compress/Makefile
drivers/compress/meson.build
drivers/compress/octeontx/Makefile [new file with mode: 0644]
drivers/compress/octeontx/include/zip_regs.h [new file with mode: 0644]
drivers/compress/octeontx/meson.build [new file with mode: 0644]
drivers/compress/octeontx/otx_zip.c [new file with mode: 0644]
drivers/compress/octeontx/otx_zip.h [new file with mode: 0644]
drivers/compress/octeontx/otx_zip_pmd.c [new file with mode: 0644]
drivers/compress/octeontx/rte_pmd_octeontx_compress_version.map [new file with mode: 0644]
mk/rte.app.mk

index 881c638..c99ce4d 100644 (file)
@@ -861,6 +861,10 @@ Compression Drivers
 M: Pablo de Lara <pablo.de.lara.guarch@intel.com>
 T: git://dpdk.org/next/dpdk-next-crypto
 
+Cavium OCTEONTX zipvf
+M: Ashish Gupta <ashish.gupta@cavium.com>
+F: drivers/compress/octeontx/
+
 Intel QuickAssist
 M: Fiona Trahe <fiona.trahe@intel.com>
 F: drivers/compress/qat/
index 662da4d..4bcbaf9 100644 (file)
@@ -577,6 +577,11 @@ CONFIG_RTE_COMPRESS_MAX_DEVS=64
 #
 CONFIG_RTE_COMPRESSDEV_TEST=n
 
+#
+# Compile PMD for Octeontx ZIPVF compression device
+#
+CONFIG_RTE_LIBRTE_PMD_OCTEONTX_ZIPVF=y
+
 #
 # Compile PMD for ISA-L compression device
 #
index 1f159a5..286ea6e 100644 (file)
@@ -4,6 +4,7 @@
 include $(RTE_SDK)/mk/rte.vars.mk
 
 DIRS-$(CONFIG_RTE_LIBRTE_PMD_ISAL) += isal
+DIRS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_ZIPVF) += octeontx
 DIRS-$(CONFIG_RTE_LIBRTE_PMD_ZLIB) += zlib
 
 include $(RTE_SDK)/mk/rte.subdir.mk
index d2ca8fc..817ef3b 100644 (file)
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: BSD-3-Clause
 # Copyright(c) 2018 Intel Corporation
 
-drivers = ['isal', 'qat', 'zlib']
+drivers = ['isal', 'octeontx', 'qat', 'zlib']
 
 std_deps = ['compressdev'] # compressdev pulls in all other needed deps
 config_flag_fmt = 'RTE_LIBRTE_@0@_PMD'
diff --git a/drivers/compress/octeontx/Makefile b/drivers/compress/octeontx/Makefile
new file mode 100644 (file)
index 0000000..f34424c
--- /dev/null
@@ -0,0 +1,30 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2018 Cavium, Inc
+
+include $(RTE_SDK)/mk/rte.vars.mk
+
+# library name
+LIB = librte_pmd_octeontx_zip.a
+
+# library version
+LIBABIVER := 1
+
+# build flags
+CFLAGS += $(WERROR_FLAGS)
+CFLAGS += -O3
+CFLAGS += -DALLOW_EXPERIMENTAL_API
+CFLAGS += -I$(RTE_SDK)/drivers/compress/octeontx/include
+
+# external library include paths
+LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring
+LDLIBS += -lrte_compressdev
+LDLIBS += -lrte_pci -lrte_bus_pci
+
+# library source files
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_ZIPVF) += otx_zip_pmd.c
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_ZIPVF) += otx_zip.c
+
+# versioning export map
+EXPORT_MAP := rte_pmd_octeontx_compress_version.map
+
+include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/compress/octeontx/include/zip_regs.h b/drivers/compress/octeontx/include/zip_regs.h
new file mode 100644 (file)
index 0000000..1e74db4
--- /dev/null
@@ -0,0 +1,711 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018 Cavium, Inc
+ */
+
+#ifndef _RTE_OCTEONTX_ZIP_REGS_H_
+#define _RTE_OCTEONTX_ZIP_REGS_H_
+
+
+/**
+ * Enumeration zip_cc
+ *
+ * ZIP compression coding Enumeration
+ * Enumerates ZIP_INST_S[CC].
+ */
+enum {
+       ZIP_CC_DEFAULT = 0,
+       ZIP_CC_DYN_HUFF,
+       ZIP_CC_FIXED_HUFF,
+       ZIP_CC_LZS
+} zip_cc;
+
+/**
+ * Register (NCB) zip_vq#_ena
+ *
+ * ZIP VF Queue Enable Register
+ * If a queue is disabled, ZIP CTL stops fetching instructions from the queue.
+ */
+typedef union {
+       uint64_t u;
+       struct zip_vqx_ena_s {
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 0 - Big Endian */
+               uint64_t reserved_1_63         : 63;
+               uint64_t ena                   : 1;
+#else /* Word 0 - Little Endian */
+               uint64_t ena                   : 1;
+               uint64_t reserved_1_63         : 63;
+#endif /* Word 0 - End */
+       } s;
+       /* struct zip_vqx_ena_s cn; */
+} zip_vqx_ena_t;
+
+/**
+ * Register (NCB) zip_vq#_sbuf_addr
+ *
+ * ZIP VF Queue Starting Buffer Address Registers
+ * These registers set the buffer parameters for the instruction queues.
+ * When quiescent (i.e.
+ * outstanding doorbell count is 0), it is safe to rewrite this register
+ * to effectively reset the
+ * command buffer state machine.
+ * These registers must be programmed after software programs the
+ * corresponding ZIP_QUE()_SBUF_CTL.
+ */
+typedef union {
+       uint64_t u;
+       struct zip_vqx_sbuf_addr_s {
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 0 - Big Endian */
+               uint64_t reserved_49_63        : 15;
+               uint64_t ptr                   : 42;
+               uint64_t off                   : 7;
+#else /* Word 0 - Little Endian */
+               uint64_t off                   : 7;
+               uint64_t ptr                   : 42;
+               uint64_t reserved_49_63        : 15;
+#endif /* Word 0 - End */
+       } s;
+       /* struct zip_vqx_sbuf_addr_s cn; */
+} zip_vqx_sbuf_addr_t;
+
+/**
+ * Register (NCB) zip_que#_doorbell
+ *
+ * ZIP Queue Doorbell Registers
+ * Doorbells for the ZIP instruction queues.
+ */
+typedef union {
+       uint64_t u;
+       struct zip_quex_doorbell_s {
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 0 - Big Endian */
+               uint64_t reserved_20_63        : 44;
+               uint64_t dbell_cnt             : 20;
+#else /* Word 0 - Little Endian */
+               uint64_t dbell_cnt             : 20;
+               uint64_t reserved_20_63        : 44;
+#endif /* Word 0 - End */
+       } s;
+       /* struct zip_quex_doorbell_s cn; */
+} zip_quex_doorbell_t;
+
+/**
+ * Structure zip_nptr_s
+ *
+ * ZIP Instruction Next-Chunk-Buffer Pointer (NPTR) Structure
+ * This structure is used to chain all the ZIP instruction buffers
+ * together. ZIP instruction buffers are managed
+ * (allocated and released) by software.
+ */
+union zip_nptr_s {
+       uint64_t u;
+       struct zip_nptr_s_s {
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 0 - Big Endian */
+               uint64_t addr                  : 64;
+#else /* Word 0 - Little Endian */
+               uint64_t addr                  : 64;
+#endif /* Word 0 - End */
+       } s;
+       /* struct zip_nptr_s_s cn83xx; */
+};
+
+/**
+ * generic ptr address
+ */
+union zip_zptr_addr_s {
+       /** This field can be used to set/clear all bits, or do bitwise
+        * operations over the entire structure.
+        */
+       uint64_t u;
+       /** generic ptr address */
+       struct {
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 0 - Big Endian */
+               uint64_t addr : 64;
+#else /* Word 0 - Little Endian */
+               uint64_t addr : 64;
+#endif /* Word 0 - End */
+       } s;
+};
+
+/**
+ * generic ptr ctl
+ */
+union zip_zptr_ctl_s {
+       /** This field can be used to set/clear all bits, or do bitwise
+        * operations over the entire structure.
+        */
+       uint64_t u;
+       /** generic ptr ctl */
+       struct {
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 1 - Big Endian */
+               uint64_t reserved_112_127      : 16;
+               uint64_t length                : 16;
+               uint64_t reserved_67_95        : 29;
+               uint64_t fw                    : 1;
+               uint64_t nc                    : 1;
+               uint64_t data_be               : 1;
+#else /* Word 1 - Little Endian */
+               uint64_t data_be               : 1;
+               uint64_t nc                    : 1;
+               uint64_t fw                    : 1;
+               uint64_t reserved_67_95        : 29;
+               uint64_t length                : 16;
+               uint64_t reserved_112_127      : 16;
+#endif /* Word 1 - End */
+       } s;
+
+};
+
+/**
+ * Structure zip_inst_s
+ *
+ * ZIP Instruction Structure
+ * Each ZIP instruction has 16 words (they are called IWORD0 to IWORD15
+ * within the structure).
+ */
+union zip_inst_s {
+       /** This field can be used to set/clear all bits, or do bitwise
+        * operations over the entire structure.
+        */
+       uint64_t u[16];
+       /** ZIP Instruction Structure */
+       struct zip_inst_s_s {
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 0 - Big Endian */
+               /** Done interrupt */
+               uint64_t doneint               : 1;
+               /** reserved */
+               uint64_t reserved_56_62        : 7;
+               /**  Total output length */
+               uint64_t totaloutputlength     : 24;
+               /** reserved */
+               uint64_t reserved_27_31        : 5;
+               /** EXNUM */
+               uint64_t exn                   : 3;
+               /**  HASH IV */
+               uint64_t iv                    : 1;
+               /** EXBITS */
+               uint64_t exbits                : 7;
+               /** Hash more-in-file */
+               uint64_t hmif                  : 1;
+               /** Hash Algorithm and enable */
+               uint64_t halg                  : 3;
+               /** Sync flush*/
+               uint64_t sf                    : 1;
+               /** Compression speed/storage */
+               uint64_t ss                    : 2;
+               /** Compression coding */
+               uint64_t cc                    : 2;
+               /** End of input data */
+               uint64_t ef                    : 1;
+               /** Beginning of file */
+               uint64_t bf                    : 1;
+               // uint64_t reserved_3_4          : 2;
+               /** Comp/decomp operation */
+               uint64_t op                    : 2;
+               /** Data sactter */
+               uint64_t ds                    : 1;
+               /** Data gather */
+               uint64_t dg                    : 1;
+               /** History gather */
+               uint64_t hg                    : 1;
+#else /* Word 0 - Little Endian */
+               uint64_t hg                    : 1;
+               uint64_t dg                    : 1;
+               uint64_t ds                    : 1;
+               //uint64_t reserved_3_4          : 2;
+               uint64_t op                    : 2;
+               uint64_t bf                    : 1;
+               uint64_t ef                    : 1;
+               uint64_t cc                    : 2;
+               uint64_t ss                    : 2;
+               uint64_t sf                    : 1;
+               uint64_t halg                  : 3;
+               uint64_t hmif                  : 1;
+               uint64_t exbits                : 7;
+               uint64_t iv                    : 1;
+               uint64_t exn                   : 3;
+               uint64_t reserved_27_31        : 5;
+               uint64_t totaloutputlength     : 24;
+               uint64_t reserved_56_62        : 7;
+               uint64_t doneint               : 1;
+
+#endif /* Word 0 - End */
+
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 1 - Big Endian */
+               /** History length */
+               uint64_t historylength         : 16;
+               /** reserved */
+               uint64_t reserved_96_111       : 16;
+               /** adler/crc32 checksum*/
+               uint64_t adlercrc32            : 32;
+#else /* Word 1 - Little Endian */
+               uint64_t adlercrc32            : 32;
+               uint64_t reserved_96_111       : 16;
+               uint64_t historylength         : 16;
+#endif /* Word 1 - End */
+
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 2 - Big Endian */
+               /** Decompression Context Pointer Address */
+               union zip_zptr_addr_s  ctx_ptr_addr;
+#else /* Word 2 - Little Endian */
+               union zip_zptr_addr_s  ctx_ptr_addr;
+#endif /* Word 2 - End */
+
+#if defined(__BIG_ENDIAN_BITFIELD)
+               /** Decompression Context Pointer Control */
+               union zip_zptr_ctl_s   ctx_ptr_ctl;
+#else /* Word 3 - Little Endian */
+               union zip_zptr_ctl_s   ctx_ptr_ctl;
+#endif /* Word 3 - End */
+
+#if defined(__BIG_ENDIAN_BITFIELD)
+               /** Decompression history pointer address */
+               union zip_zptr_addr_s  his_ptr_addr;
+#else /* Word 4 - Little Endian */
+               union zip_zptr_addr_s  his_ptr_addr;
+#endif /* Word 4 - End */
+
+#if defined(__BIG_ENDIAN_BITFIELD)
+               /** Decompression history pointer control */
+               union zip_zptr_ctl_s   his_ptr_ctl;
+#else /* Word 5 - Little Endian */
+               union zip_zptr_ctl_s   his_ptr_ctl;
+#endif /* Word 5 - End */
+
+#if defined(__BIG_ENDIAN_BITFIELD)
+               /** Input and compression history pointer address */
+               union zip_zptr_addr_s  inp_ptr_addr;
+#else /* Word 6 - Little Endian */
+               union zip_zptr_addr_s  inp_ptr_addr;
+#endif /* Word 6 - End */
+
+#if defined(__BIG_ENDIAN_BITFIELD)
+               /** Input and compression history pointer control */
+               union zip_zptr_ctl_s   inp_ptr_ctl;
+#else /* Word 7 - Little Endian */
+               union zip_zptr_ctl_s   inp_ptr_ctl;
+#endif /* Word 7 - End */
+
+#if defined(__BIG_ENDIAN_BITFIELD)
+               /** Output pointer address */
+               union zip_zptr_addr_s  out_ptr_addr;
+#else /* Word 8 - Little Endian */
+               union zip_zptr_addr_s  out_ptr_addr;
+#endif /* Word 8 - End */
+
+#if defined(__BIG_ENDIAN_BITFIELD)
+               /** Output pointer control */
+               union zip_zptr_ctl_s   out_ptr_ctl;
+#else /* Word 9 - Little Endian */
+               union zip_zptr_ctl_s   out_ptr_ctl;
+#endif /* Word 9 - End */
+
+#if defined(__BIG_ENDIAN_BITFIELD)
+               /** Result pointer address */
+               union zip_zptr_addr_s  res_ptr_addr;
+#else /* Word 10 - Little Endian */
+               union zip_zptr_addr_s  res_ptr_addr;
+#endif /* Word 10 - End */
+
+#if defined(__BIG_ENDIAN_BITFIELD)
+               /** Result pointer control */
+               union zip_zptr_ctl_s   res_ptr_ctl;
+#else /* Word 11 - Little Endian */
+               union zip_zptr_ctl_s   res_ptr_ctl;
+#endif /* Word 11 - End */
+
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 12 - Big Endian */
+               /** reserved */
+               uint64_t reserved_812_831      : 20;
+               /** SSO guest group */
+               uint64_t ggrp                  : 10;
+               /** SSO tag type */
+               uint64_t tt                    : 2;
+               /** SSO tag */
+               uint64_t tag                   : 32;
+#else /* Word 12 - Little Endian */
+               uint64_t tag                   : 32;
+               uint64_t tt                    : 2;
+               uint64_t ggrp                  : 10;
+               uint64_t reserved_812_831      : 20;
+#endif /* Word 12 - End */
+
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 13 - Big Endian */
+               /** Work queue entry pointer */
+               uint64_t wq_ptr                : 64;
+#else /* Word 13 - Little Endian */
+               uint64_t wq_ptr                : 64;
+#endif /* Word 13 - End */
+
+#if defined(__BIG_ENDIAN_BITFIELD)
+               /** reserved */
+               uint64_t reserved_896_959      : 64;
+#else /* Word 14 - Little Endian */
+               uint64_t reserved_896_959      : 64;
+#endif /* Word 14 - End */
+#if defined(__BIG_ENDIAN_BITFIELD)
+               /** Hash structure pointer */
+               uint64_t hash_ptr              : 64;
+#else /* Word 15 - Little Endian */
+               uint64_t hash_ptr              : 64;
+#endif /* Word 15 - End */
+       } /** ZIP 88xx Instruction Structure */zip88xx;
+
+       /** ZIP Instruction Structure */
+       struct zip_inst_s_cn83xx {
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 0 - Big Endian */
+               /** Done interrupt */
+               uint64_t doneint               : 1;
+               /** reserved */
+               uint64_t reserved_56_62        : 7;
+               /**  Total output length */
+               uint64_t totaloutputlength     : 24;
+               /** reserved */
+               uint64_t reserved_27_31        : 5;
+               /** EXNUM */
+               uint64_t exn                   : 3;
+               /**  HASH IV */
+               uint64_t iv                    : 1;
+               /** EXBITS */
+               uint64_t exbits                : 7;
+               /** Hash more-in-file */
+               uint64_t hmif                  : 1;
+               /** Hash Algorithm and enable */
+               uint64_t halg                  : 3;
+               /** Sync flush*/
+               uint64_t sf                    : 1;
+               /** Compression speed/storage */
+               uint64_t ss                    : 2;
+               /** Compression coding */
+               uint64_t cc                    : 2;
+               /** End of input data */
+               uint64_t ef                    : 1;
+               /** Beginning of file */
+               uint64_t bf                    : 1;
+               /** Comp/decomp operation */
+               uint64_t op                    : 2;
+               /** Data sactter */
+               uint64_t ds                    : 1;
+               /** Data gather */
+               uint64_t dg                    : 1;
+               /** History gather */
+               uint64_t hg                    : 1;
+#else /* Word 0 - Little Endian */
+               uint64_t hg                    : 1;
+               uint64_t dg                    : 1;
+               uint64_t ds                    : 1;
+               uint64_t op                    : 2;
+               uint64_t bf                    : 1;
+               uint64_t ef                    : 1;
+               uint64_t cc                    : 2;
+               uint64_t ss                    : 2;
+               uint64_t sf                    : 1;
+               uint64_t halg                  : 3;
+               uint64_t hmif                  : 1;
+               uint64_t exbits                : 7;
+               uint64_t iv                    : 1;
+               uint64_t exn                   : 3;
+               uint64_t reserved_27_31        : 5;
+               uint64_t totaloutputlength     : 24;
+               uint64_t reserved_56_62        : 7;
+               uint64_t doneint               : 1;
+#endif /* Word 0 - End */
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 1 - Big Endian */
+               /** History length */
+               uint64_t historylength         : 16;
+               /** reserved */
+               uint64_t reserved_96_111       : 16;
+               /** adler/crc32 checksum*/
+               uint64_t adlercrc32            : 32;
+#else /* Word 1 - Little Endian */
+               uint64_t adlercrc32            : 32;
+               uint64_t reserved_96_111       : 16;
+               uint64_t historylength         : 16;
+#endif /* Word 1 - End */
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 2 - Big Endian */
+               /** Decompression Context Pointer Address */
+               union zip_zptr_addr_s  ctx_ptr_addr;
+#else /* Word 2 - Little Endian */
+               union zip_zptr_addr_s  ctx_ptr_addr;
+#endif /* Word 2 - End */
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 3 - Big Endian */
+               /** Decompression Context Pointer Control */
+               union zip_zptr_ctl_s   ctx_ptr_ctl;
+#else /* Word 3 - Little Endian */
+               union zip_zptr_ctl_s   ctx_ptr_ctl;
+#endif /* Word 3 - End */
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 4 - Big Endian */
+               /** Decompression history pointer address */
+               union zip_zptr_addr_s  his_ptr_addr;
+#else /* Word 4 - Little Endian */
+               union zip_zptr_addr_s  his_ptr_addr;
+#endif /* Word 4 - End */
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 5 - Big Endian */
+               /** Decompression history pointer control */
+               union zip_zptr_ctl_s   his_ptr_ctl;
+#else /* Word 5 - Little Endian */
+               union zip_zptr_ctl_s   his_ptr_ctl;
+#endif /* Word 5 - End */
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 6 - Big Endian */
+               /** Input and compression history pointer address */
+               union zip_zptr_addr_s  inp_ptr_addr;
+#else /* Word 6 - Little Endian */
+               union zip_zptr_addr_s  inp_ptr_addr;
+#endif /* Word 6 - End */
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 7 - Big Endian */
+               /** Input and compression history pointer control */
+               union zip_zptr_ctl_s   inp_ptr_ctl;
+#else /* Word 7 - Little Endian */
+               union zip_zptr_ctl_s   inp_ptr_ctl;
+#endif /* Word 7 - End */
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 8 - Big Endian */
+               /** Output pointer address */
+               union zip_zptr_addr_s  out_ptr_addr;
+#else /* Word 8 - Little Endian */
+               union zip_zptr_addr_s  out_ptr_addr;
+#endif /* Word 8 - End */
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 9 - Big Endian */
+               /** Output pointer control */
+               union zip_zptr_ctl_s   out_ptr_ctl;
+#else /* Word 9 - Little Endian */
+               union zip_zptr_ctl_s   out_ptr_ctl;
+#endif /* Word 9 - End */
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 10 - Big Endian */
+               /** Result pointer address */
+               union zip_zptr_addr_s  res_ptr_addr;
+#else /* Word 10 - Little Endian */
+               union zip_zptr_addr_s  res_ptr_addr;
+#endif /* Word 10 - End */
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 11 - Big Endian */
+               /** Result pointer control */
+               union zip_zptr_ctl_s   res_ptr_ctl;
+#else /* Word 11 - Little Endian */
+               union zip_zptr_ctl_s   res_ptr_ctl;
+#endif /* Word 11 - End */
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 12 - Big Endian */
+               /** reserved */
+               uint64_t reserved_812_831      : 20;
+               /** SSO guest group */
+               uint64_t ggrp                  : 10;
+               /** SSO tag type */
+               uint64_t tt                    : 2;
+               /** SSO tag */
+               uint64_t tag                   : 32;
+#else /* Word 12 - Little Endian */
+               uint64_t tag                   : 32;
+               uint64_t tt                    : 2;
+               uint64_t ggrp                  : 10;
+               uint64_t reserved_812_831      : 20;
+#endif /* Word 12 - End */
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 13 - Big Endian */
+               /** Work queue entry pointer */
+               uint64_t wq_ptr                : 64;
+#else /* Word 13 - Little Endian */
+               uint64_t wq_ptr                : 64;
+#endif /* Word 13 - End */
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 14 - Big Endian */
+               /** reserved */
+               uint64_t reserved_896_959      : 64;
+#else /* Word 14 - Little Endian */
+               uint64_t reserved_896_959      : 64;
+#endif /* Word 14 - End */
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 15 - Big Endian */
+               /** Hash structure pointer */
+               uint64_t hash_ptr              : 64;
+#else /* Word 15 - Little Endian */
+               uint64_t hash_ptr              : 64;
+#endif /* Word 15 - End */
+       } /** ZIP 83xx Instruction Structure */s;
+};
+
+/**
+ * Structure zip_zres_s
+ *
+ * ZIP Result Structure
+ * The ZIP coprocessor writes the result structure after it completes the
+ * invocation. The result structure is exactly 24 bytes, and each invocation
+ * of the ZIP coprocessor produces exactly one result structure.
+ */
+union zip_zres_s {
+       /** This field can be used to set/clear all bits, or do bitwise
+        * operations over the entire structure.
+        */
+       uint64_t u[8];
+       /** ZIP Result Structure */
+       struct zip_zres_s_s {
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 0 - Big Endian */
+               /** crc32 checksum of uncompressed stream */
+               uint64_t crc32                 : 32;
+               /** adler32 checksum of uncompressed stream*/
+               uint64_t adler32               : 32;
+#else /* Word 0 - Little Endian */
+               uint64_t adler32               : 32;
+               uint64_t crc32                 : 32;
+#endif /* Word 0 - End */
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 1 - Big Endian */
+               /** Total numer of Bytes produced in output stream */
+               uint64_t totalbyteswritten     : 32;
+               /** Total number of bytes processed from the input stream */
+               uint64_t totalbytesread        : 32;
+#else /* Word 1 - Little Endian */
+               uint64_t totalbytesread        : 32;
+               uint64_t totalbyteswritten     : 32;
+#endif /* Word 1 - End */
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 2 - Big Endian */
+               /** Total number of compressed input bits
+                * consumed to decompress all blocks in the file
+                */
+               uint64_t totalbitsprocessed    : 32;
+               /** Done interrupt*/
+               uint64_t doneint               : 1;
+               /** reserved */
+               uint64_t reserved_155_158      : 4;
+               /** EXNUM */
+               uint64_t exn                   : 3;
+               /** reserved */
+               uint64_t reserved_151          : 1;
+               /** EXBITS */
+               uint64_t exbits                : 7;
+               /** reserved */
+               uint64_t reserved_137_143      : 7;
+               /** End of file */
+               uint64_t ef                    : 1;
+               /** Completion/error code */
+               uint64_t compcode              : 8;
+#else /* Word 2 - Little Endian */
+               uint64_t compcode              : 8;
+               uint64_t ef                    : 1;
+               uint64_t reserved_137_143      : 7;
+               uint64_t exbits                : 7;
+               uint64_t reserved_151          : 1;
+               uint64_t exn                   : 3;
+               uint64_t reserved_155_158      : 4;
+               uint64_t doneint               : 1;
+               uint64_t totalbitsprocessed    : 32;
+#endif /* Word 2 - End */
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 3 - Big Endian */
+               /** reserved */
+               uint64_t reserved_253_255      : 3;
+               /** Hash length in bytes */
+               uint64_t hshlen                : 61;
+#else /* Word 3 - Little Endian */
+               uint64_t hshlen                : 61;
+               uint64_t reserved_253_255      : 3;
+#endif /* Word 3 - End */
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 4 - Big Endian */
+               /** Double-word 0 of computed hash */
+               uint64_t hash0                 : 64;
+#else /* Word 4 - Little Endian */
+               uint64_t hash0                 : 64;
+#endif /* Word 4 - End */
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 5 - Big Endian */
+               /** Double-word 1 of computed hash */
+               uint64_t hash1                 : 64;
+#else /* Word 5 - Little Endian */
+               uint64_t hash1                 : 64;
+#endif /* Word 5 - End */
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 6 - Big Endian */
+               /** Double-word 2 of computed hash */
+               uint64_t hash2                 : 64;
+#else /* Word 6 - Little Endian */
+               uint64_t hash2                 : 64;
+#endif /* Word 6 - End */
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 7 - Big Endian */
+               /** Double-word 3 of computed hash */
+               uint64_t hash3                 : 64;
+#else /* Word 7 - Little Endian */
+               uint64_t hash3                 : 64;
+#endif /* Word 7 - End */
+       } /** ZIP Result Structure */s;
+
+       /* struct zip_zres_s_s cn83xx; */
+};
+
+/**
+ * Structure zip_zptr_s
+ *
+ * ZIP Generic Pointer Structure
+ * This structure is the generic format of pointers in ZIP_INST_S.
+ */
+union zip_zptr_s {
+       /** This field can be used to set/clear all bits, or do bitwise
+        * operations over the entire structure.
+        */
+       uint64_t u[2];
+       /** ZIP Generic Pointer Structure */
+       struct zip_zptr_s_s {
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 0 - Big Endian */
+               /** Pointer to Data or scatter-gather list */
+               uint64_t addr                  : 64;
+#else /* Word 0 - Little Endian */
+               uint64_t addr                  : 64;
+#endif /* Word 0 - End */
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 1 - Big Endian */
+               /** reserved */
+               uint64_t reserved_112_127      : 16;
+               /** Length of Data or scatter-gather list*/
+               uint64_t length                : 16;
+               /** reserved */
+               uint64_t reserved_67_95        : 29;
+               /** Full-block write */
+               uint64_t fw                    : 1;
+               /** No cache allocation */
+               uint64_t nc                    : 1;
+               /** reserved */
+               uint64_t data_be               : 1;
+#else /* Word 1 - Little Endian */
+               uint64_t data_be               : 1;
+               uint64_t nc                    : 1;
+               uint64_t fw                    : 1;
+               uint64_t reserved_67_95        : 29;
+               uint64_t length                : 16;
+               uint64_t reserved_112_127      : 16;
+#endif /* Word 1 - End */
+       } /** ZIP Generic Pointer Structure */s;
+};
+
+/**
+ * Enumeration zip_comp_e
+ *
+ * ZIP Completion Enumeration
+ * Enumerates the values of ZIP_ZRES_S[COMPCODE].
+ */
+#define ZIP_COMP_E_NOTDONE       (0)
+#define ZIP_COMP_E_SUCCESS       (1)
+#define ZIP_COMP_E_DTRUNC        (2)
+#define ZIP_COMP_E_DSTOP         (3)
+#define ZIP_COMP_E_ITRUNC        (4)
+#define ZIP_COMP_E_RBLOCK        (5)
+#define ZIP_COMP_E_NLEN          (6)
+#define ZIP_COMP_E_BADCODE       (7)
+#define ZIP_COMP_E_BADCODE2      (8)
+#define ZIP_COMP_E_ZERO_LEN      (9)
+#define ZIP_COMP_E_PARITY        (0xa)
+#define ZIP_COMP_E_FATAL         (0xb)
+#define ZIP_COMP_E_TIMEOUT       (0xc)
+#define ZIP_COMP_E_INSTR_ERR     (0xd)
+#define ZIP_COMP_E_HCTX_ERR      (0xe)
+#define ZIP_COMP_E_STOP          (3)
+
+/**
+ * Enumeration zip_op_e
+ *
+ * ZIP Operation Enumeration
+ * Enumerates ZIP_INST_S[OP].
+ * Internal:
+ */
+#define ZIP_OP_E_DECOMP   (0)
+#define ZIP_OP_E_NOCOMP   (1)
+#define ZIP_OP_E_COMP     (2)
+
+/**
+ * Enumeration zip compression levels
+ *
+ * ZIP Compression Level Enumeration
+ * Enumerates ZIP_INST_S[SS].
+ * Internal:
+ */
+#define ZIP_COMP_E_LEVEL_MAX  (0)
+#define ZIP_COMP_E_LEVEL_MED  (1)
+#define ZIP_COMP_E_LEVEL_LOW  (2)
+#define ZIP_COMP_E_LEVEL_MIN  (3)
+
+#endif /* _RTE_ZIP_REGS_H_ */
diff --git a/drivers/compress/octeontx/meson.build b/drivers/compress/octeontx/meson.build
new file mode 100644 (file)
index 0000000..7cd202d
--- /dev/null
@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2018 Cavium, Inc
+
+name = 'octeontx_compress'
+sources = files('otx_zip.c', 'otx_zip_pmd.c')
+allow_experimental_apis = true
+includes += include_directories('include')
+deps += ['mempool_octeontx', 'bus_pci']
+ext_deps += dep
diff --git a/drivers/compress/octeontx/otx_zip.c b/drivers/compress/octeontx/otx_zip.c
new file mode 100644 (file)
index 0000000..7a1dd58
--- /dev/null
@@ -0,0 +1,62 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018 Cavium, Inc
+ */
+
+#include "otx_zip.h"
+
+uint64_t
+zip_reg_read64(uint8_t *hw_addr, uint64_t offset)
+{
+       uint8_t *base = hw_addr;
+       return *(volatile uint64_t *)(base + offset);
+}
+
+void
+zip_reg_write64(uint8_t *hw_addr, uint64_t offset, uint64_t val)
+{
+       uint8_t *base = hw_addr;
+       *(uint64_t *)(base + offset) = val;
+}
+
+int
+zipvf_create(struct rte_compressdev *compressdev)
+{
+       struct   rte_pci_device *pdev = RTE_DEV_TO_PCI(compressdev->device);
+       struct   zip_vf *zipvf = NULL;
+       char     *dev_name = compressdev->data->name;
+       void     *vbar0;
+       uint64_t reg;
+
+       if (pdev->mem_resource[0].phys_addr == 0ULL)
+               return -EIO;
+
+       vbar0 = pdev->mem_resource[0].addr;
+       if (!vbar0) {
+               ZIP_PMD_ERR("Failed to map BAR0 of %s", dev_name);
+               return -ENODEV;
+       }
+
+       zipvf = (struct zip_vf *)(compressdev->data->dev_private);
+
+       if (!zipvf)
+               return -ENOMEM;
+
+       zipvf->vbar0 = vbar0;
+       reg = zip_reg_read64(zipvf->vbar0, ZIP_VF_PF_MBOXX(0));
+       /* Storing domain in local to ZIP VF */
+       zipvf->dom_sdom = reg;
+       zipvf->pdev = pdev;
+       zipvf->max_nb_queue_pairs = ZIP_MAX_VF_QUEUE;
+       return 0;
+}
+
+int
+zipvf_destroy(struct rte_compressdev *compressdev)
+{
+       struct zip_vf *vf = (struct zip_vf *)(compressdev->data->dev_private);
+
+       /* Rewriting the domain_id in ZIP_VF_MBOX for app rerun */
+       zip_reg_write64(vf->vbar0, ZIP_VF_PF_MBOXX(0), vf->dom_sdom);
+
+       return 0;
+}
diff --git a/drivers/compress/octeontx/otx_zip.h b/drivers/compress/octeontx/otx_zip.h
new file mode 100644 (file)
index 0000000..8a58f31
--- /dev/null
@@ -0,0 +1,113 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018 Cavium, Inc
+ */
+
+#ifndef _RTE_OCTEONTX_ZIP_VF_H_
+#define _RTE_OCTEONTX_ZIP_VF_H_
+
+#include <unistd.h>
+
+#include <rte_bus_pci.h>
+#include <rte_comp.h>
+#include <rte_compressdev.h>
+#include <rte_compressdev_pmd.h>
+#include <rte_malloc.h>
+#include <rte_memory.h>
+#include <rte_spinlock.h>
+
+#include <zip_regs.h>
+
+int octtx_zip_logtype_driver;
+
+/* ZIP VF Control/Status registers (CSRs): */
+/* VF_BAR0: */
+#define ZIP_VQ_ENA              (0x10)
+#define ZIP_VQ_SBUF_ADDR        (0x20)
+#define ZIP_VF_PF_MBOXX(x)      (0x400 | (x)<<3)
+#define ZIP_VQ_DOORBELL         (0x1000)
+
+/**< Vendor ID */
+#define PCI_VENDOR_ID_CAVIUM   0x177D
+/**< PCI device id of ZIP VF */
+#define PCI_DEVICE_ID_OCTEONTX_ZIPVF   0xA037
+
+/* maxmum number of zip vf devices */
+#define ZIP_MAX_VFS 8
+
+/* max size of one chunk */
+#define ZIP_MAX_CHUNK_SIZE     8192
+
+/* each instruction is fixed 128 bytes */
+#define ZIP_CMD_SIZE           128
+
+#define ZIP_CMD_SIZE_WORDS     (ZIP_CMD_SIZE >> 3) /* 16 64_bit words */
+
+/* size of next chunk buffer pointer */
+#define ZIP_MAX_NCBP_SIZE      8
+
+/* size of instruction queue in units of instruction size */
+#define ZIP_MAX_NUM_CMDS       ((ZIP_MAX_CHUNK_SIZE - ZIP_MAX_NCBP_SIZE) / \
+                               ZIP_CMD_SIZE) /* 63 */
+
+/* size of instruct queue in bytes */
+#define ZIP_MAX_CMDQ_SIZE      ((ZIP_MAX_NUM_CMDS * ZIP_CMD_SIZE) + \
+                               ZIP_MAX_NCBP_SIZE)/* ~8072ull */
+
+#define ZIP_BUF_SIZE   256
+
+#define ZIP_SGPTR_ALIGN        16
+#define ZIP_CMDQ_ALIGN 128
+#define MAX_SG_LEN     ((ZIP_BUF_SIZE - ZIP_SGPTR_ALIGN) / sizeof(void *))
+
+/**< ZIP PMD specified queue pairs */
+#define ZIP_MAX_VF_QUEUE       1
+
+#define ZIP_ALIGN_ROUNDUP(x, _align) \
+       ((_align) * (((x) + (_align) - 1) / (_align)))
+
+/**< ZIP PMD device name */
+#define COMPRESSDEV_NAME_ZIP_PMD       compress_octeonx
+
+#define ZIP_PMD_LOG(level, fmt, args...) \
+       rte_log(RTE_LOG_ ## level, \
+       octtx_zip_logtype_driver, "%s(): "fmt "\n", \
+       __func__, ##args)
+
+#define ZIP_PMD_INFO(fmt, args...) \
+       ZIP_PMD_LOG(INFO, fmt, ## args)
+#define ZIP_PMD_ERR(fmt, args...) \
+       ZIP_PMD_LOG(ERR, fmt, ## args)
+#define ZIP_PMD_WARN(fmt, args...) \
+       ZIP_PMD_LOG(WARNING, fmt, ## args)
+
+/**
+ * ZIP VF device structure.
+ */
+struct zip_vf {
+       int vfid;
+       /* vf index */
+       struct rte_pci_device *pdev;
+       /* pci device */
+       void *vbar0;
+       /* CSR base address for underlying BAR0 VF.*/
+       uint64_t dom_sdom;
+       /* Storing mbox domain and subdomain id for app rerun*/
+       uint32_t  max_nb_queue_pairs;
+       /* pointer to device qps */
+       struct rte_mempool *zip_mp;
+       /* pointer to pools */
+} __rte_cache_aligned;
+
+int
+zipvf_create(struct rte_compressdev *compressdev);
+
+int
+zipvf_destroy(struct rte_compressdev *compressdev);
+
+uint64_t
+zip_reg_read64(uint8_t *hw_addr, uint64_t offset);
+
+void
+zip_reg_write64(uint8_t *hw_addr, uint64_t offset, uint64_t val);
+
+#endif /* _RTE_ZIP_VF_H_ */
diff --git a/drivers/compress/octeontx/otx_zip_pmd.c b/drivers/compress/octeontx/otx_zip_pmd.c
new file mode 100644 (file)
index 0000000..4d92c9d
--- /dev/null
@@ -0,0 +1,118 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018 Cavium, Inc
+ */
+
+#include <string.h>
+
+#include <rte_byteorder.h>
+#include <rte_common.h>
+#include <rte_cpuflags.h>
+#include <rte_malloc.h>
+
+#include "otx_zip.h"
+
+struct rte_compressdev_ops octtx_zip_pmd_ops = {
+
+};
+
+static int
+zip_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
+       struct rte_pci_device *pci_dev)
+{
+       int ret = 0;
+       char compressdev_name[RTE_COMPRESSDEV_NAME_MAX_LEN];
+       struct rte_compressdev *compressdev;
+       struct rte_compressdev_pmd_init_params init_params = {
+               "",
+               rte_socket_id(),
+       };
+
+       ZIP_PMD_INFO("vendor_id=0x%x device_id=0x%x",
+                       (unsigned int)pci_dev->id.vendor_id,
+                       (unsigned int)pci_dev->id.device_id);
+
+       rte_pci_device_name(&pci_dev->addr, compressdev_name,
+                           sizeof(compressdev_name));
+
+       compressdev = rte_compressdev_pmd_create(compressdev_name,
+               &pci_dev->device, sizeof(struct zip_vf), &init_params);
+       if (compressdev == NULL) {
+               ZIP_PMD_ERR("driver %s: create failed", init_params.name);
+               return -ENODEV;
+       }
+
+       /*
+        * create only if proc_type is primary.
+        */
+       if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
+               /*  create vf dev with given pmd dev id */
+               ret = zipvf_create(compressdev);
+               if (ret < 0) {
+                       ZIP_PMD_ERR("Device creation failed");
+                       rte_compressdev_pmd_destroy(compressdev);
+                       return ret;
+               }
+       }
+
+       compressdev->dev_ops = &octtx_zip_pmd_ops;
+       /* register rx/tx burst functions for data path */
+       compressdev->feature_flags = RTE_COMPDEV_FF_HW_ACCELERATED;
+       return ret;
+}
+
+static int
+zip_pci_remove(struct rte_pci_device *pci_dev)
+{
+       struct rte_compressdev *compressdev;
+       char compressdev_name[RTE_COMPRESSDEV_NAME_MAX_LEN];
+
+       if (pci_dev == NULL) {
+               ZIP_PMD_ERR(" Invalid PCI Device\n");
+               return -EINVAL;
+       }
+       rte_pci_device_name(&pci_dev->addr, compressdev_name,
+                       sizeof(compressdev_name));
+
+       compressdev = rte_compressdev_pmd_get_named_dev(compressdev_name);
+       if (compressdev == NULL)
+               return -ENODEV;
+
+       if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
+               if (zipvf_destroy(compressdev) < 0)
+                       return -ENODEV;
+       }
+       return rte_compressdev_pmd_destroy(compressdev);
+}
+
+static struct rte_pci_id pci_id_octtx_zipvf_table[] = {
+       {
+               RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
+                       PCI_DEVICE_ID_OCTEONTX_ZIPVF),
+       },
+       {
+               .device_id = 0
+       },
+};
+
+/**
+ * Structure that represents a PCI driver
+ */
+static struct rte_pci_driver octtx_zip_pmd = {
+       .id_table    = pci_id_octtx_zipvf_table,
+       .drv_flags   = RTE_PCI_DRV_NEED_MAPPING,
+       .probe       = zip_pci_probe,
+       .remove      = zip_pci_remove,
+};
+
+RTE_PMD_REGISTER_PCI(COMPRESSDEV_NAME_ZIP_PMD, octtx_zip_pmd);
+RTE_PMD_REGISTER_PCI_TABLE(COMPRESSDEV_NAME_ZIP_PMD, pci_id_octtx_zipvf_table);
+
+RTE_INIT(octtx_zip_init_log);
+
+static void
+octtx_zip_init_log(void)
+{
+       octtx_zip_logtype_driver = rte_log_register("pmd.compress.octeontx");
+       if (octtx_zip_logtype_driver >= 0)
+               rte_log_set_level(octtx_zip_logtype_driver, RTE_LOG_INFO);
+}
diff --git a/drivers/compress/octeontx/rte_pmd_octeontx_compress_version.map b/drivers/compress/octeontx/rte_pmd_octeontx_compress_version.map
new file mode 100644 (file)
index 0000000..ad6e191
--- /dev/null
@@ -0,0 +1,3 @@
+DPDK_18.08 {
+       local: *;
+};
index 5b7c684..ea448ef 100644 (file)
@@ -224,6 +224,7 @@ endif # CONFIG_RTE_LIBRTE_CRYPTODEV
 ifeq ($(CONFIG_RTE_LIBRTE_COMPRESSDEV),y)
 _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_ISAL) += -lrte_pmd_isal_comp
 _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_ISAL) += -lisal
+_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_ZIPVF) += -lrte_pmd_octeontx_zip
 # Link QAT driver if it has not been linked yet
 ifeq ($(CONFIG_RTE_LIBRTE_PMD_QAT_SYM),n)
 _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_QAT)  += -lrte_pmd_qat