eal/arm64: define coherent I/O memory barriers
authorYongseok Koh <yskoh@mellanox.com>
Thu, 25 Jan 2018 21:02:47 +0000 (13:02 -0800)
committerThomas Monjalon <thomas@monjalon.net>
Sun, 28 Jan 2018 07:30:30 +0000 (08:30 +0100)
Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Acked-by: Thomas Speier <tspeier@qti.qualcomm.com>
Acked-by: Jianbo Liu <jianbo.liu@arm.com>
lib/librte_eal/common/include/arch/arm/rte_atomic_64.h

index b6bbd0b..ee0d0d1 100644 (file)
@@ -36,6 +36,10 @@ extern "C" {
 
 #define rte_io_rmb() rte_rmb()
 
+#define rte_cio_wmb() dmb(oshst)
+
+#define rte_cio_rmb() dmb(oshld)
+
 #ifdef __cplusplus
 }
 #endif