net/mlx5: optimize Rx hash fields conversion
authorDekel Peled <dekelp@mellanox.com>
Wed, 15 Jan 2020 21:19:39 +0000 (23:19 +0200)
committerFerruh Yigit <ferruh.yigit@intel.com>
Mon, 20 Jan 2020 17:02:17 +0000 (18:02 +0100)
Previous fix added translation of Rx hash fields to PRM format.

This patch optimizes the fix, to perform value translation only
if value is not zero.
In case value is zero, there is no need to translate it.

Fixes: c3e33304a7f6 ("net/mlx5: fix setting of Rx hash fields")
Cc: stable@dpdk.org
Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
drivers/net/mlx5/mlx5_rxq.c

index c87ce15..4092cb7 100644 (file)
@@ -2465,7 +2465,6 @@ mlx5_hrxq_new(struct rte_eth_dev *dev,
                }
        } else { /* ind_tbl->type == MLX5_IND_TBL_TYPE_DEVX */
                struct mlx5_devx_tir_attr tir_attr;
-               struct mlx5_rx_hash_field_select *rx_hash_field_select;
                uint32_t i;
                uint32_t lro = 1;
 
@@ -2479,23 +2478,27 @@ mlx5_hrxq_new(struct rte_eth_dev *dev,
                memset(&tir_attr, 0, sizeof(tir_attr));
                tir_attr.disp_type = MLX5_TIRC_DISP_TYPE_INDIRECT;
                tir_attr.rx_hash_fn = MLX5_RX_HASH_FN_TOEPLITZ;
-#ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
                tir_attr.tunneled_offload_en = !!tunnel;
-               /* Translate hash_fields bitmap to PRM format. */
-               rx_hash_field_select = hash_fields & IBV_RX_HASH_INNER ?
-                                      &tir_attr.rx_hash_field_selector_inner :
-                                      &tir_attr.rx_hash_field_selector_outer;
+               /* If needed, translate hash_fields bitmap to PRM format. */
+               if (hash_fields) {
+#ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
+                       struct mlx5_rx_hash_field_select *rx_hash_field_select =
+                                       hash_fields & IBV_RX_HASH_INNER ?
+                                       &tir_attr.rx_hash_field_selector_inner :
+                                       &tir_attr.rx_hash_field_selector_outer;
 #else
-               rx_hash_field_select = &tir_attr.rx_hash_field_selector_outer;
+                       struct mlx5_rx_hash_field_select *rx_hash_field_select =
+                                       &tir_attr.rx_hash_field_selector_outer;
 #endif
-               /* 1 bit: 0: IPv4, 1: IPv6. */
-               rx_hash_field_select->l3_prot_type =
-                       !!(hash_fields & MLX5_IPV6_IBV_RX_HASH);
-               /* 1 bit: 0: TCP, 1: UDP. */
-               rx_hash_field_select->l4_prot_type =
-                       !!(hash_fields & MLX5_UDP_IBV_RX_HASH);
-               /* Bitmask which sets which fields to use in RX Hash. */
-               rx_hash_field_select->selected_fields =
+
+                       /* 1 bit: 0: IPv4, 1: IPv6. */
+                       rx_hash_field_select->l3_prot_type =
+                               !!(hash_fields & MLX5_IPV6_IBV_RX_HASH);
+                       /* 1 bit: 0: TCP, 1: UDP. */
+                       rx_hash_field_select->l4_prot_type =
+                               !!(hash_fields & MLX5_UDP_IBV_RX_HASH);
+                       /* Bitmask which sets which fields to use in RX Hash. */
+                       rx_hash_field_select->selected_fields =
                        ((!!(hash_fields & MLX5_L3_SRC_IBV_RX_HASH)) <<
                         MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP) |
                        (!!(hash_fields & MLX5_L3_DST_IBV_RX_HASH)) <<
@@ -2504,6 +2507,7 @@ mlx5_hrxq_new(struct rte_eth_dev *dev,
                         MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT |
                        (!!(hash_fields & MLX5_L4_DST_IBV_RX_HASH)) <<
                         MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT;
+               }
                if (rxq_ctrl->obj->type == MLX5_RXQ_OBJ_TYPE_DEVX_HAIRPIN)
                        tir_attr.transport_domain = priv->sh->td->id;
                else