net/i40e: fix ethertype filter for new FW
authorBeilei Xing <beilei.xing@intel.com>
Tue, 18 Jul 2017 03:07:07 +0000 (11:07 +0800)
committerFerruh Yigit <ferruh.yigit@intel.com>
Wed, 19 Jul 2017 08:09:13 +0000 (11:09 +0300)
Previously SW workaround for GL_SWR_PRI_JOIN_MAP is added for X710
performance. As new FW version 6.0 supports ADQ,
value for GL_SWR_PRI_JOIN_MAP should be changed, otherwise
ehtertype filter will be impacted.

Fixes: 973273c7a4b7 ("i40e: workaround for X710 performance")
Cc: stable@dpdk.org
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
drivers/net/i40e/i40e_ethdev.c

index 0f69810..306988a 100644 (file)
@@ -9223,8 +9223,9 @@ i40e_pctype_to_flowtype(enum i40e_filter_pctype pctype)
  */
 
 /* For both X710 and XL710 */
-#define I40E_GL_SWR_PRI_JOIN_MAP_0_VALUE 0x10000200
-#define I40E_GL_SWR_PRI_JOIN_MAP_0       0x26CE00
+#define I40E_GL_SWR_PRI_JOIN_MAP_0_VALUE_1     0x10000200
+#define I40E_GL_SWR_PRI_JOIN_MAP_0_VALUE_2     0x20000200
+#define I40E_GL_SWR_PRI_JOIN_MAP_0             0x26CE00
 
 #define I40E_GL_SWR_PRI_JOIN_MAP_2_VALUE 0x011f0200
 #define I40E_GL_SWR_PRI_JOIN_MAP_2       0x26CE08
@@ -9279,8 +9280,12 @@ i40e_configure_registers(struct i40e_hw *hw)
                                reg_table[i].val =
                                        I40E_X722_GL_SWR_PRI_JOIN_MAP_0_VALUE;
                        else /* For X710/XL710/XXV710 */
-                               reg_table[i].val =
-                                       I40E_GL_SWR_PRI_JOIN_MAP_0_VALUE;
+                               if (hw->aq.fw_maj_ver < 6)
+                                       reg_table[i].val =
+                                            I40E_GL_SWR_PRI_JOIN_MAP_0_VALUE_1;
+                               else
+                                       reg_table[i].val =
+                                            I40E_GL_SWR_PRI_JOIN_MAP_0_VALUE_2;
                }
 
                if (reg_table[i].addr == I40E_GL_SWR_PRI_JOIN_MAP_2) {