The periodic debug option is used to collect periodic
events like statistics, register access etc and won't
interfere with user-level messages.
Signed-off-by: Harish Patil <harish.patil@qlogic.com>
Signed-off-by: Rasesh Mody <rasesh.mody@qlogic.com>
CONFIG_RTE_LIBRTE_BNX2X_DEBUG_RX=n
CONFIG_RTE_LIBRTE_BNX2X_DEBUG_TX=n
CONFIG_RTE_LIBRTE_BNX2X_MF_SUPPORT=n
CONFIG_RTE_LIBRTE_BNX2X_DEBUG_RX=n
CONFIG_RTE_LIBRTE_BNX2X_DEBUG_TX=n
CONFIG_RTE_LIBRTE_BNX2X_MF_SUPPORT=n
+CONFIG_RTE_LIBRTE_BNX2X_DEBUG_PERIODIC=n
#
# Compile burst-oriented Chelsio Terminator 10GbE/40GbE (CXGBE) PMD
#
# Compile burst-oriented Chelsio Terminator 10GbE/40GbE (CXGBE) PMD
CONFIG_RTE_LIBRTE_BNX2X_DEBUG_RX=n
CONFIG_RTE_LIBRTE_BNX2X_DEBUG_TX=n
CONFIG_RTE_LIBRTE_BNX2X_MF_SUPPORT=n
CONFIG_RTE_LIBRTE_BNX2X_DEBUG_RX=n
CONFIG_RTE_LIBRTE_BNX2X_DEBUG_TX=n
CONFIG_RTE_LIBRTE_BNX2X_MF_SUPPORT=n
+CONFIG_RTE_LIBRTE_BNX2X_DEBUG_PERIODIC=n
#
# Compile burst-oriented Chelsio Terminator 10GbE/40GbE (CXGBE) PMD
#
# Compile burst-oriented Chelsio Terminator 10GbE/40GbE (CXGBE) PMD
#
LIB = librte_pmd_bnx2x.a
#
LIB = librte_pmd_bnx2x.a
CFLAGS += $(WERROR_FLAGS)
CFLAGS += -DZLIB_CONST
LDLIBS += -lz
CFLAGS += $(WERROR_FLAGS)
CFLAGS += -DZLIB_CONST
LDLIBS += -lz
SRCS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += ecore_sp.c
SRCS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += elink.c
SRCS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += bnx2x_vfpf.c
SRCS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += ecore_sp.c
SRCS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += elink.c
SRCS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += bnx2x_vfpf.c
-SRCS-$(CONFIG_RTE_LIBRTE_BNX2X_DEBUG) += debug.c
+SRCS-$(CONFIG_RTE_LIBRTE_BNX2X_DEBUG_PERIODIC) += debug.c
# this lib depends upon:
DEPDIRS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += lib/librte_eal lib/librte_ether lib/librte_hash
# this lib depends upon:
DEPDIRS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += lib/librte_eal lib/librte_ether lib/librte_hash
/* handle eq element */
switch (opcode) {
case EVENT_RING_OPCODE_STAT_QUERY:
/* handle eq element */
switch (opcode) {
case EVENT_RING_OPCODE_STAT_QUERY:
- PMD_DRV_LOG(DEBUG, "got statistics completion event %d",
+ PMD_DEBUG_PERIODIC_LOG(DEBUG, "got statistics completion event %d",
sc->stats_comp++);
/* nothing to do with stats comp */
goto next_spqe;
sc->stats_comp++);
/* nothing to do with stats comp */
goto next_spqe;
/* SP events: STAT_QUERY and others */
if (status & BNX2X_DEF_SB_IDX) {
/* handle EQ completions */
/* SP events: STAT_QUERY and others */
if (status & BNX2X_DEF_SB_IDX) {
/* handle EQ completions */
- PMD_DRV_LOG(DEBUG, "---> EQ INTR <---");
+ PMD_DEBUG_PERIODIC_LOG(DEBUG, "---> EQ INTR <---");
bnx2x_eq_int(sc);
bnx2x_ack_sb(sc, sc->igu_dsb_id, USTORM_ID,
le16toh(sc->def_idx), IGU_INT_NOP, 1);
bnx2x_eq_int(sc);
bnx2x_ack_sb(sc, sc->igu_dsb_id, USTORM_ID,
le16toh(sc->def_idx), IGU_INT_NOP, 1);
- PMD_DRV_LOG(DEBUG, "Interrupt status 0x%04x", status);
+ PMD_DEBUG_PERIODIC_LOG(DEBUG, "Interrupt status 0x%04x", status);
//bnx2x_dump_status_block(sc);
FOR_EACH_ETH_QUEUE(sc, i) {
//bnx2x_dump_status_block(sc);
FOR_EACH_ETH_QUEUE(sc, i) {
#define BAR1 2
#define BAR2 4
#define BAR1 2
#define BAR2 4
-#ifdef RTE_LIBRTE_BNX2X_DEBUG
+#ifdef RTE_LIBRTE_BNX2X_DEBUG_PERIODIC
uint8_t bnx2x_reg_read8(struct bnx2x_softc *sc, size_t offset);
uint16_t bnx2x_reg_read16(struct bnx2x_softc *sc, size_t offset);
uint32_t bnx2x_reg_read32(struct bnx2x_softc *sc, size_t offset);
uint8_t bnx2x_reg_read8(struct bnx2x_softc *sc, size_t offset);
uint16_t bnx2x_reg_read16(struct bnx2x_softc *sc, size_t offset);
uint32_t bnx2x_reg_read32(struct bnx2x_softc *sc, size_t offset);
struct bnx2x_softc *sc = dev->data->dev_private;
uint32_t link_status;
struct bnx2x_softc *sc = dev->data->dev_private;
uint32_t link_status;
- PMD_DRV_LOG(INFO, "Interrupt handled");
+ PMD_DEBUG_PERIODIC_LOG(INFO, "Interrupt handled");
if (bnx2x_intr_legacy(sc, 0))
DELAY_MS(250);
if (bnx2x_intr_legacy(sc, 0))
DELAY_MS(250);
#define PMD_DRV_LOG(level, fmt, args...) \
PMD_DRV_LOG_RAW(level, fmt "\n", ## args)
#define PMD_DRV_LOG(level, fmt, args...) \
PMD_DRV_LOG_RAW(level, fmt "\n", ## args)
+#ifdef RTE_LIBRTE_BNX2X_DEBUG_PERIODIC
+#define PMD_DEBUG_PERIODIC_LOG(level, fmt, args...) \
+ RTE_LOG(level, PMD, "%s(): " fmt "\n", __func__, ## args)
+#else
+#define PMD_DEBUG_PERIODIC_LOG(level, fmt, args...) do { } while(0)
+#endif
+
+
#endif /* _PMD_LOGS_H_ */
#endif /* _PMD_LOGS_H_ */
sc->fw_stats_req->hdr.drv_stats_counter =
htole16(sc->stats_counter++);
sc->fw_stats_req->hdr.drv_stats_counter =
htole16(sc->stats_counter++);
+ PMD_DEBUG_PERIODIC_LOG(DEBUG,
"sending statistics ramrod %d",
le16toh(sc->fw_stats_req->hdr.drv_stats_counter));
"sending statistics ramrod %d",
le16toh(sc->fw_stats_req->hdr.drv_stats_counter));
void
bnx2x_reg_write8(struct bnx2x_softc *sc, size_t offset, uint8_t val)
{
void
bnx2x_reg_write8(struct bnx2x_softc *sc, size_t offset, uint8_t val)
{
- PMD_DRV_LOG(DEBUG, "offset=0x%08lx val=0x%02x", offset, val);
- *((volatile uint8_t*)((uint64_t)sc->bar[BAR0].base_addr + offset)) = val;
+ PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%02x", (unsigned long)offset, val);
+ *((volatile uint8_t*)((uintptr_t)sc->bar[BAR0].base_addr + offset)) = val;
}
void
bnx2x_reg_write16(struct bnx2x_softc *sc, size_t offset, uint16_t val)
{
if ((offset % 2) != 0) {
}
void
bnx2x_reg_write16(struct bnx2x_softc *sc, size_t offset, uint16_t val)
{
if ((offset % 2) != 0) {
- PMD_DRV_LOG(DEBUG, "Unaligned 16-bit write to 0x%08lx", offset);
+ PMD_DRV_LOG(NOTICE, "Unaligned 16-bit write to 0x%08lx",
+ (unsigned long)offset);
- PMD_DRV_LOG(DEBUG, "offset=0x%08lx val=0x%04x", offset, val);
- *((volatile uint16_t*)((uint64_t)sc->bar[BAR0].base_addr + offset)) = val;
+ PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%04x", (unsigned long)offset, val);
+ *((volatile uint16_t*)((uintptr_t)sc->bar[BAR0].base_addr + offset)) = val;
}
void
bnx2x_reg_write32(struct bnx2x_softc *sc, size_t offset, uint32_t val)
{
if ((offset % 4) != 0) {
}
void
bnx2x_reg_write32(struct bnx2x_softc *sc, size_t offset, uint32_t val)
{
if ((offset % 4) != 0) {
- PMD_DRV_LOG(DEBUG, "Unaligned 32-bit write to 0x%08lx", offset);
+ PMD_DRV_LOG(NOTICE, "Unaligned 32-bit write to 0x%08lx",
+ (unsigned long)offset);
- PMD_DRV_LOG(DEBUG, "offset=0x%08lx val=0x%08x", offset, val);
- *((volatile uint32_t*)((uint64_t)sc->bar[BAR0].base_addr + offset)) = val;
+ PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%08x", (unsigned long)offset, val);
+ *((volatile uint32_t*)((uintptr_t)sc->bar[BAR0].base_addr + offset)) = val;
- val = (uint8_t)(*((volatile uint8_t*)((uint64_t)sc->bar[BAR0].base_addr + offset)));
- PMD_DRV_LOG(DEBUG, "offset=0x%08lx val=0x%02x", offset, val);
+ val = (uint8_t)(*((volatile uint8_t*)((uintptr_t)sc->bar[BAR0].base_addr + offset)));
+ PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%02x", (unsigned long)offset, val);
uint16_t val;
if ((offset % 2) != 0) {
uint16_t val;
if ((offset % 2) != 0) {
- PMD_DRV_LOG(DEBUG, "Unaligned 16-bit read from 0x%08lx", offset);
+ PMD_DRV_LOG(NOTICE, "Unaligned 16-bit read from 0x%08lx",
+ (unsigned long)offset);
- val = (uint16_t)(*((volatile uint16_t*)((uint64_t)sc->bar[BAR0].base_addr + offset)));
- PMD_DRV_LOG(DEBUG, "offset=0x%08lx val=0x%08x", offset, val);
+ val = (uint16_t)(*((volatile uint16_t*)((uintptr_t)sc->bar[BAR0].base_addr + offset)));
+ PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%08x", (unsigned long)offset, val);
uint32_t val;
if ((offset % 4) != 0) {
uint32_t val;
if ((offset % 4) != 0) {
- PMD_DRV_LOG(DEBUG, "Unaligned 32-bit read from 0x%08lx", offset);
+ PMD_DRV_LOG(NOTICE, "Unaligned 32-bit read from 0x%08lx",
+ (unsigned long)offset);
- val = (uint32_t)(*((volatile uint32_t*)((uint64_t)sc->bar[BAR0].base_addr + offset)));
- PMD_DRV_LOG(DEBUG, "offset=0x%08lx val=0x%08x", offset, val);
+ val = (uint32_t)(*((volatile uint32_t*)((uintptr_t)sc->bar[BAR0].base_addr + offset)));
+ PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%08x", (unsigned long)offset, val);