drivers/octeontx2: fix recursive interrupts
authorHarman Kalra <hkalra@marvell.com>
Thu, 25 Jul 2019 10:26:54 +0000 (10:26 +0000)
committerThomas Monjalon <thomas@monjalon.net>
Mon, 29 Jul 2019 20:18:01 +0000 (22:18 +0200)
In case of QINT interrupt occurrence, SW fails to clear the QINT
line resulting in recursive interrupts because currently interrupt
handler gets the cause of the interrupt by reading
NIX_LF_RQ[SQ/CQ/AURA/POOL]_OP_INT but does not write 1 to clear
RQ[SQ/CQ/ERR]_INT field in respective NIX_LF_RQ[SQ/CQ/AURA/POOL]_OP_INT
registers.

Fixes: dc47ba15f645 ("net/octeontx2: handle queue specific error interrupts")
Fixes: 50b95c3ea7af ("mempool/octeontx2: add NPA IRQ handler")

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
drivers/mempool/octeontx2/otx2_mempool_irq.c
drivers/net/octeontx2/otx2_ethdev_irq.c

index ce41044..5fa22b9 100644 (file)
@@ -123,7 +123,7 @@ npa_lf_q_irq_get_and_clear(struct otx2_npa_lf *lf, uint32_t q,
 
        qint = reg & 0xff;
        wdata &= mask;
-       otx2_write64(wdata, lf->base + off);
+       otx2_write64(wdata | qint, lf->base + off);
 
        return qint;
 }
index 9006e5c..2256e40 100644 (file)
@@ -138,7 +138,7 @@ nix_lf_q_irq_get_and_clear(struct otx2_eth_dev *dev, uint16_t q,
 
        qint = reg & 0xff;
        wdata &= mask;
-       otx2_write64(wdata, dev->base + off);
+       otx2_write64(wdata | qint, dev->base + off);
 
        return qint;
 }