examples/l3fwd: add event port and queue setup
authorSunil Kumar Kori <skori@marvell.com>
Tue, 28 Jan 2020 05:34:59 +0000 (11:04 +0530)
committerJerin Jacob <jerinj@marvell.com>
Tue, 28 Jan 2020 09:05:04 +0000 (10:05 +0100)
Add event device queue and port setup based on event eth Tx adapter
capabilities.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
examples/l3fwd/l3fwd_event.c
examples/l3fwd/l3fwd_event.h
examples/l3fwd/l3fwd_event_generic.c
examples/l3fwd/l3fwd_event_internal_port.c

index f9491ec..b58f9b7 100644 (file)
@@ -188,10 +188,30 @@ l3fwd_event_capability_setup(void)
                l3fwd_event_set_internal_port_ops(&evt_rsrc->ops);
 }
 
+int
+l3fwd_get_free_event_port(struct l3fwd_event_resources *evt_rsrc)
+{
+       static int index;
+       int port_id;
+
+       rte_spinlock_lock(&evt_rsrc->evp.lock);
+       if (index >= evt_rsrc->evp.nb_ports) {
+               printf("No free event port is available\n");
+               return -1;
+       }
+
+       port_id = evt_rsrc->evp.event_p_id[index];
+       index++;
+       rte_spinlock_unlock(&evt_rsrc->evp.lock);
+
+       return port_id;
+}
+
 void
 l3fwd_event_resource_setup(struct rte_eth_conf *port_conf)
 {
        struct l3fwd_event_resources *evt_rsrc = l3fwd_get_eventdev_rsrc();
+       uint32_t event_queue_cfg;
 
        if (!evt_rsrc->enabled)
                return;
@@ -206,5 +226,11 @@ l3fwd_event_resource_setup(struct rte_eth_conf *port_conf)
        l3fwd_eth_dev_port_setup(port_conf);
 
        /* Event device configuration */
-       evt_rsrc->ops.event_device_setup();
+       event_queue_cfg = evt_rsrc->ops.event_device_setup();
+
+       /* Event queue configuration */
+       evt_rsrc->ops.event_queue_setup(event_queue_cfg);
+
+       /* Event port configuration */
+       evt_rsrc->ops.event_port_setup();
 }
index 53feea0..4bceca9 100644 (file)
@@ -73,6 +73,7 @@ struct l3fwd_event_resources {
 
 struct l3fwd_event_resources *l3fwd_get_eventdev_rsrc(void);
 void l3fwd_event_resource_setup(struct rte_eth_conf *port_conf);
+int l3fwd_get_free_event_port(struct l3fwd_event_resources *eventdev_rsrc);
 void l3fwd_event_set_generic_ops(struct l3fwd_event_setup_ops *ops);
 void l3fwd_event_set_internal_port_ops(struct l3fwd_event_setup_ops *ops);
 
index ce06fa0..4d0cbec 100644 (file)
@@ -81,8 +81,111 @@ l3fwd_event_device_setup_generic(void)
        return event_queue_cfg;
 }
 
+static void
+l3fwd_event_port_setup_generic(void)
+{
+       struct l3fwd_event_resources *evt_rsrc = l3fwd_get_eventdev_rsrc();
+       uint8_t event_d_id = evt_rsrc->event_d_id;
+       struct rte_event_port_conf event_p_conf = {
+               .dequeue_depth = 32,
+               .enqueue_depth = 32,
+               .new_event_threshold = 4096
+       };
+       struct rte_event_port_conf def_p_conf;
+       uint8_t event_p_id;
+       int32_t ret;
+
+       evt_rsrc->evp.event_p_id = (uint8_t *)malloc(sizeof(uint8_t) *
+                                       evt_rsrc->evp.nb_ports);
+       if (!evt_rsrc->evp.event_p_id)
+               rte_panic("No space is available\n");
+
+       memset(&def_p_conf, 0, sizeof(struct rte_event_port_conf));
+       rte_event_port_default_conf_get(event_d_id, 0, &def_p_conf);
+
+       if (def_p_conf.new_event_threshold < event_p_conf.new_event_threshold)
+               event_p_conf.new_event_threshold =
+                       def_p_conf.new_event_threshold;
+
+       if (def_p_conf.dequeue_depth < event_p_conf.dequeue_depth)
+               event_p_conf.dequeue_depth = def_p_conf.dequeue_depth;
+
+       if (def_p_conf.enqueue_depth < event_p_conf.enqueue_depth)
+               event_p_conf.enqueue_depth = def_p_conf.enqueue_depth;
+
+       event_p_conf.disable_implicit_release =
+               evt_rsrc->disable_implicit_release;
+       evt_rsrc->deq_depth = def_p_conf.dequeue_depth;
+
+       for (event_p_id = 0; event_p_id < evt_rsrc->evp.nb_ports;
+                                                               event_p_id++) {
+               ret = rte_event_port_setup(event_d_id, event_p_id,
+                                          &event_p_conf);
+               if (ret < 0)
+                       rte_panic("Error in configuring event port %d\n",
+                                 event_p_id);
+
+               ret = rte_event_port_link(event_d_id, event_p_id,
+                                         evt_rsrc->evq.event_q_id,
+                                         NULL,
+                                         evt_rsrc->evq.nb_queues - 1);
+               if (ret != (evt_rsrc->evq.nb_queues - 1))
+                       rte_panic("Error in linking event port %d to queues\n",
+                                 event_p_id);
+               evt_rsrc->evp.event_p_id[event_p_id] = event_p_id;
+       }
+       /* init spinlock */
+       rte_spinlock_init(&evt_rsrc->evp.lock);
+
+       evt_rsrc->def_p_conf = event_p_conf;
+}
+
+static void
+l3fwd_event_queue_setup_generic(uint32_t event_queue_cfg)
+{
+       struct l3fwd_event_resources *evt_rsrc = l3fwd_get_eventdev_rsrc();
+       uint8_t event_d_id = evt_rsrc->event_d_id;
+       struct rte_event_queue_conf event_q_conf = {
+               .nb_atomic_flows = 1024,
+               .nb_atomic_order_sequences = 1024,
+               .event_queue_cfg = event_queue_cfg,
+               .priority = RTE_EVENT_DEV_PRIORITY_NORMAL
+       };
+       struct rte_event_queue_conf def_q_conf;
+       uint8_t event_q_id;
+       int32_t ret;
+
+       event_q_conf.schedule_type = evt_rsrc->sched_type;
+       evt_rsrc->evq.event_q_id = (uint8_t *)malloc(sizeof(uint8_t) *
+                                       evt_rsrc->evq.nb_queues);
+       if (!evt_rsrc->evq.event_q_id)
+               rte_panic("Memory allocation failure\n");
+
+       rte_event_queue_default_conf_get(event_d_id, 0, &def_q_conf);
+       if (def_q_conf.nb_atomic_flows < event_q_conf.nb_atomic_flows)
+               event_q_conf.nb_atomic_flows = def_q_conf.nb_atomic_flows;
+
+       for (event_q_id = 0; event_q_id < (evt_rsrc->evq.nb_queues - 1);
+                                                               event_q_id++) {
+               ret = rte_event_queue_setup(event_d_id, event_q_id,
+                                           &event_q_conf);
+               if (ret < 0)
+                       rte_panic("Error in configuring event queue\n");
+               evt_rsrc->evq.event_q_id[event_q_id] = event_q_id;
+       }
+
+       event_q_conf.event_queue_cfg |= RTE_EVENT_QUEUE_CFG_SINGLE_LINK;
+       event_q_conf.priority = RTE_EVENT_DEV_PRIORITY_HIGHEST,
+       ret = rte_event_queue_setup(event_d_id, event_q_id, &event_q_conf);
+       if (ret < 0)
+               rte_panic("Error in configuring event queue for Tx adapter\n");
+       evt_rsrc->evq.event_q_id[event_q_id] = event_q_id;
+}
+
 void
 l3fwd_event_set_generic_ops(struct l3fwd_event_setup_ops *ops)
 {
        ops->event_device_setup = l3fwd_event_device_setup_generic;
+       ops->event_queue_setup = l3fwd_event_queue_setup_generic;
+       ops->event_port_setup = l3fwd_event_port_setup_generic;
 }
index 242bd0f..476dd8a 100644 (file)
@@ -80,9 +80,107 @@ l3fwd_event_device_setup_internal_port(void)
        return event_queue_cfg;
 }
 
+static void
+l3fwd_event_port_setup_internal_port(void)
+{
+       struct l3fwd_event_resources *evt_rsrc = l3fwd_get_eventdev_rsrc();
+       uint8_t event_d_id = evt_rsrc->event_d_id;
+       struct rte_event_port_conf event_p_conf = {
+               .dequeue_depth = 32,
+               .enqueue_depth = 32,
+               .new_event_threshold = 4096
+       };
+       struct rte_event_port_conf def_p_conf;
+       uint8_t event_p_id;
+       int32_t ret;
+
+       evt_rsrc->evp.event_p_id = (uint8_t *)malloc(sizeof(uint8_t) *
+                                       evt_rsrc->evp.nb_ports);
+       if (!evt_rsrc->evp.event_p_id)
+               rte_panic("Failed to allocate memory for Event Ports\n");
+
+       rte_event_port_default_conf_get(event_d_id, 0, &def_p_conf);
+       if (def_p_conf.new_event_threshold < event_p_conf.new_event_threshold)
+               event_p_conf.new_event_threshold =
+                                               def_p_conf.new_event_threshold;
+
+       if (def_p_conf.dequeue_depth < event_p_conf.dequeue_depth)
+               event_p_conf.dequeue_depth = def_p_conf.dequeue_depth;
+
+       if (def_p_conf.enqueue_depth < event_p_conf.enqueue_depth)
+               event_p_conf.enqueue_depth = def_p_conf.enqueue_depth;
+
+       event_p_conf.disable_implicit_release =
+               evt_rsrc->disable_implicit_release;
+
+       for (event_p_id = 0; event_p_id < evt_rsrc->evp.nb_ports;
+                                                               event_p_id++) {
+               ret = rte_event_port_setup(event_d_id, event_p_id,
+                                          &event_p_conf);
+               if (ret < 0)
+                       rte_panic("Error in configuring event port %d\n",
+                                 event_p_id);
+
+               ret = rte_event_port_link(event_d_id, event_p_id, NULL,
+                                         NULL, 0);
+               if (ret < 0)
+                       rte_panic("Error in linking event port %d to queue\n",
+                                 event_p_id);
+               evt_rsrc->evp.event_p_id[event_p_id] = event_p_id;
+
+               /* init spinlock */
+               rte_spinlock_init(&evt_rsrc->evp.lock);
+       }
+
+       evt_rsrc->def_p_conf = event_p_conf;
+}
+
+static void
+l3fwd_event_queue_setup_internal_port(uint32_t event_queue_cfg)
+{
+       struct l3fwd_event_resources *evt_rsrc = l3fwd_get_eventdev_rsrc();
+       uint8_t event_d_id = evt_rsrc->event_d_id;
+       struct rte_event_queue_conf event_q_conf = {
+               .nb_atomic_flows = 1024,
+               .nb_atomic_order_sequences = 1024,
+               .event_queue_cfg = event_queue_cfg,
+               .priority = RTE_EVENT_DEV_PRIORITY_NORMAL
+       };
+       struct rte_event_queue_conf def_q_conf;
+       uint8_t event_q_id = 0;
+       int32_t ret;
+
+       rte_event_queue_default_conf_get(event_d_id, event_q_id, &def_q_conf);
+
+       if (def_q_conf.nb_atomic_flows < event_q_conf.nb_atomic_flows)
+               event_q_conf.nb_atomic_flows = def_q_conf.nb_atomic_flows;
+
+       if (def_q_conf.nb_atomic_order_sequences <
+                                       event_q_conf.nb_atomic_order_sequences)
+               event_q_conf.nb_atomic_order_sequences =
+                                       def_q_conf.nb_atomic_order_sequences;
+
+       event_q_conf.event_queue_cfg = event_queue_cfg;
+       event_q_conf.schedule_type = evt_rsrc->sched_type;
+       evt_rsrc->evq.event_q_id = (uint8_t *)malloc(sizeof(uint8_t) *
+                                       evt_rsrc->evq.nb_queues);
+       if (!evt_rsrc->evq.event_q_id)
+               rte_panic("Memory allocation failure\n");
+
+       for (event_q_id = 0; event_q_id < evt_rsrc->evq.nb_queues;
+                                                               event_q_id++) {
+               ret = rte_event_queue_setup(event_d_id, event_q_id,
+                                           &event_q_conf);
+               if (ret < 0)
+                       rte_panic("Error in configuring event queue\n");
+               evt_rsrc->evq.event_q_id[event_q_id] = event_q_id;
+       }
+}
 
 void
 l3fwd_event_set_internal_port_ops(struct l3fwd_event_setup_ops *ops)
 {
        ops->event_device_setup = l3fwd_event_device_setup_internal_port;
+       ops->event_queue_setup = l3fwd_event_queue_setup_internal_port;
+       ops->event_port_setup = l3fwd_event_port_setup_internal_port;
 }