net/mlx5: fix threshold for mbuf replenishment in MPRQ
authorAlexander Kozyrev <akozyrev@nvidia.com>
Tue, 13 Jul 2021 15:21:12 +0000 (18:21 +0300)
committerRaslan Darawsheh <rasland@nvidia.com>
Thu, 15 Jul 2021 14:22:27 +0000 (16:22 +0200)
The replenishment scheme for the vectorized MPRQ Rx burst aims
to improve the cache locality by allocating new mbufs only when
there are almost no mbufs left: one burst gap between allocated
and consumed indexes.

This gap is not big enough to accommodate a corner case when we
have a very aggressive CQE compression with multiple regular CQEs
at the beginning and 64 zipped CQEs at the end.

Need to keep in mind this case and extend the replenishment
threshold by MLX5_VPMD_RX_MAX_BURST (64) to avoid mbuf overflow.

Fixes: 5fc2e5c27d6 ("net/mlx5: fix mbuf overflow in vectorized MPRQ")
Cc: stable@dpdk.org
Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
drivers/net/mlx5/mlx5_rxtx_vec.c

index e64ef70..e1b6d54 100644 (file)
@@ -157,7 +157,8 @@ mlx5_rx_mprq_replenish_bulk_mbuf(struct mlx5_rxq_data *rxq)
        unsigned int i;
 
        if (n >= rxq->rq_repl_thresh &&
-           rxq->elts_ci - rxq->rq_pi <= rxq->rq_repl_thresh) {
+           rxq->elts_ci - rxq->rq_pi <=
+           rxq->rq_repl_thresh + MLX5_VPMD_RX_MAX_BURST) {
                MLX5_ASSERT(n >= MLX5_VPMD_RXQ_RPLNSH_THRESH(elts_n));
                MLX5_ASSERT(MLX5_VPMD_RXQ_RPLNSH_THRESH(elts_n) >
                             MLX5_VPMD_DESCS_PER_LOOP);