vdpa/mlx5: fix UAR allocation
authorViacheslav Ovsiienko <viacheslavo@nvidia.com>
Tue, 10 Nov 2020 16:04:18 +0000 (16:04 +0000)
committerThomas Monjalon <thomas@monjalon.net>
Sat, 14 Nov 2020 09:56:30 +0000 (10:56 +0100)
This patch provides the UAR allocation workaround for the
hosts where UAR allocation with Write-Combining memory
mapping type fails.

Fixes: 8395927cdfaf ("vdpa/mlx5: prepare HW queues")
Cc: stable@dpdk.org
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
drivers/vdpa/mlx5/mlx5_vdpa_event.c

index 010543c..3aeaeb8 100644 (file)
@@ -77,7 +77,12 @@ mlx5_vdpa_event_qp_global_prepare(struct mlx5_vdpa_priv *priv)
                DRV_LOG(ERR, "Failed to change event channel FD.");
                goto error;
        }
-       priv->uar = mlx5_glue->devx_alloc_uar(priv->ctx, 0);
+       /*
+        * This PMD always claims the write memory barrier on UAR
+        * registers writings, it is safe to allocate UAR with any
+        * memory mapping type.
+        */
+       priv->uar = mlx5_devx_alloc_uar(priv->ctx, -1);
        if (!priv->uar) {
                rte_errno = errno;
                DRV_LOG(ERR, "Failed to allocate UAR.");