common/mlx5: fix regex register layout
authorYuval Avnery <yuvalav@mellanox.com>
Tue, 28 Jul 2020 17:50:44 +0000 (17:50 +0000)
committerFerruh Yigit <ferruh.yigit@intel.com>
Wed, 29 Jul 2020 22:41:24 +0000 (00:41 +0200)
Reserved field should be 0x60 instead of 0x40.
Will fail FW check otherwise.

Fixes: 9428310ae1f1 ("regex/mlx5: add engine status check")

Signed-off-by: Yuval Avnery <yuvalav@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
drivers/common/mlx5/mlx5_prm.h

index 0fa42bb..e0ebe12 100644 (file)
@@ -2784,7 +2784,7 @@ struct mlx5_ifc_set_regexp_register_in_bits {
        u8 engine_id[0x8];
        u8 register_address[0x20];
        u8 register_data[0x20];
-       u8 reserved[0x40];
+       u8 reserved[0x60];
 };
 
 struct mlx5_ifc_set_regexp_register_out_bits {