net/atlantic: add hardware registers access routines
authorIgor Russkikh <igor.russkikh@aquantia.com>
Fri, 12 Oct 2018 11:09:08 +0000 (11:09 +0000)
committerFerruh Yigit <ferruh.yigit@intel.com>
Thu, 18 Oct 2018 08:24:39 +0000 (10:24 +0200)
Add implementation for hardware registers access routines.

Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
Signed-off-by: Pavel Belous <pavel.belous@aquantia.com>
drivers/net/atlantic/Makefile
drivers/net/atlantic/atl_hw_regs.c [new file with mode: 0644]
drivers/net/atlantic/atl_hw_regs.h [new file with mode: 0644]
drivers/net/atlantic/atl_types.h
drivers/net/atlantic/meson.build

index e42ce5b..8613ced 100644 (file)
@@ -23,5 +23,6 @@ LDLIBS += -lrte_bus_pci
 # all source are stored in SRCS-y
 #
 SRCS-$(CONFIG_RTE_LIBRTE_ATLANTIC_PMD) += atl_ethdev.c
+SRCS-$(CONFIG_RTE_LIBRTE_ATLANTIC_PMD) += atl_hw_regs.c
 
 include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/net/atlantic/atl_hw_regs.c b/drivers/net/atlantic/atl_hw_regs.c
new file mode 100644 (file)
index 0000000..bd42c83
--- /dev/null
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
+/* Copyright (C) 2014-2017 aQuantia Corporation. */
+
+/* File aq_hw_utils.c: Definitions of helper functions used across
+ * hardware layer.
+ */
+
+#include "atl_hw_regs.h"
+
+#include <rte_io.h>
+#include <rte_byteorder.h>
+
+void aq_hw_write_reg_bit(struct aq_hw_s *aq_hw, u32 addr, u32 msk,
+                        u32 shift, u32 val)
+{
+       if (msk ^ ~0) {
+               u32 reg_old, reg_new;
+
+               reg_old = aq_hw_read_reg(aq_hw, addr);
+               reg_new = (reg_old & (~msk)) | (val << shift);
+
+               if (reg_old != reg_new)
+                       aq_hw_write_reg(aq_hw, addr, reg_new);
+       } else {
+               aq_hw_write_reg(aq_hw, addr, val);
+       }
+}
+
+u32 aq_hw_read_reg_bit(struct aq_hw_s *aq_hw, u32 addr, u32 msk, u32 shift)
+{
+       return ((aq_hw_read_reg(aq_hw, addr) & msk) >> shift);
+}
+
+u32 aq_hw_read_reg(struct aq_hw_s *hw, u32 reg)
+{
+       return rte_le_to_cpu_32(rte_read32((u8 *)hw->mmio + reg));
+}
+
+void aq_hw_write_reg(struct aq_hw_s *hw, u32 reg, u32 value)
+{
+       rte_write32((rte_cpu_to_le_32(value)), (u8 *)hw->mmio + reg);
+}
+
+int aq_hw_err_from_flags(struct aq_hw_s *hw)
+{
+       int err = 0;
+
+       if (aq_hw_read_reg(hw, 0x10U) == ~0U)
+               return -ENXIO;
+
+       return err;
+}
diff --git a/drivers/net/atlantic/atl_hw_regs.h b/drivers/net/atlantic/atl_hw_regs.h
new file mode 100644 (file)
index 0000000..a2d6ca8
--- /dev/null
@@ -0,0 +1,53 @@
+/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0) */
+/* Copyright (C) 2014-2017 aQuantia Corporation. */
+
+/* File aq_hw_utils.h: Declaration of helper functions used across hardware
+ * layer.
+ */
+
+#ifndef AQ_HW_UTILS_H
+#define AQ_HW_UTILS_H
+
+#include <rte_common.h>
+#include <rte_io.h>
+#include <rte_byteorder.h>
+#include <rte_random.h>
+#include <rte_cycles.h>
+#include "atl_common.h"
+#include "atl_types.h"
+
+
+#ifndef HIDWORD
+#define LODWORD(_qw)    ((u32)(_qw))
+#define HIDWORD(_qw)    ((u32)(((_qw) >> 32) & 0xffffffff))
+#endif
+
+#define AQ_HW_SLEEP(_US_) rte_delay_ms(_US_)
+
+#define mdelay rte_delay_ms
+#define udelay rte_delay_us
+#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
+#define BIT(x) (1UL << (x))
+
+#define AQ_HW_WAIT_FOR(_B_, _US_, _N_) \
+do { \
+       unsigned int AQ_HW_WAIT_FOR_i; \
+       for (AQ_HW_WAIT_FOR_i = _N_; (!(_B_)) && (AQ_HW_WAIT_FOR_i);\
+       --AQ_HW_WAIT_FOR_i) {\
+               udelay(_US_); \
+       } \
+       if (!AQ_HW_WAIT_FOR_i) {\
+               err = -ETIMEDOUT; \
+       } \
+} while (0)
+
+#define ATL_WRITE_FLUSH(aq_hw) { (void)aq_hw_read_reg(aq_hw, 0x10); }
+
+void aq_hw_write_reg_bit(struct aq_hw_s *aq_hw, u32 addr, u32 msk,
+                        u32 shift, u32 val);
+u32 aq_hw_read_reg_bit(struct aq_hw_s *aq_hw, u32 addr, u32 msk, u32 shift);
+u32 aq_hw_read_reg(struct aq_hw_s *hw, u32 reg);
+void aq_hw_write_reg(struct aq_hw_s *hw, u32 reg, u32 value);
+int aq_hw_err_from_flags(struct aq_hw_s *hw);
+
+#endif /* AQ_HW_UTILS_H */
index d8c2560..725b0c4 100644 (file)
@@ -22,4 +22,8 @@ typedef uint64_t      u64;
 #define min(a, b)      RTE_MIN(a, b)
 #define max(a, b)      RTE_MAX(a, b)
 
+struct aq_hw_s {
+       void *mmio;
+};
+
 #endif
index c5a2546..cd6a0f6 100644 (file)
@@ -3,4 +3,5 @@
 
 sources = files(
        'atl_ethdev.c',
+       'atl_hw_regs.c',
 )