net/igb: fix Tx descriptor status api

The Tx descriptor status api was not behaving as expected. This API is
used to inspect the content of the descriptors in the Tx ring to
determine the length of the Tx queue.

Since the software advances the tail pointer and the hardware advances
the head pointer, the Tx queue is located before txq->tx_tail in the
ring. Therefore, a call to rte_eth_tx_descriptor_status(..., offset=20)
should inspect the 20th descriptor before the tail, not after.

Fixes: 7d499cb15e8a ("net/igb: implement descriptor status API")
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Signed-off-by: Didier Pallard <didier.pallard@6wind.com>

diff --git a/drivers/net/e1000/igb_rxtx.c b/drivers/net/e1000/igb_rxtx.c
index 5f729f2..22ca364 100644 (file)
--- a/drivers/net/e1000/igb_rxtx.c
+++ b/drivers/net/e1000/igb_rxtx.c
@@ -1826,14 +1826,15 @@ eth_igb_tx_descriptor_status(void *tx_queue, uint16_t offset)
 {
        struct igb_tx_queue *txq = tx_queue;
        volatile uint32_t *status;
-       uint32_t desc;
+       int32_t desc;
 
        if (unlikely(offset >= txq->nb_tx_desc))
                return -EINVAL;
 
-       desc = txq->tx_tail + offset;
-       if (desc >= txq->nb_tx_desc)
-               desc -= txq->nb_tx_desc;
+       desc = txq->tx_tail - offset - 1;
+       if (desc < 0)
+               desc += txq->nb_tx_desc;
+       desc = txq->sw_ring[desc].last_id;
 
        status = &txq->tx_ring[desc].wb.status;
        if (*status & rte_cpu_to_le_32(E1000_TXD_STAT_DD))