net/qede/base: add OneView APIs
authorRasesh Mody <rasesh.mody@cavium.com>
Sat, 8 Sep 2018 20:30:51 +0000 (13:30 -0700)
committerFerruh Yigit <ferruh.yigit@intel.com>
Thu, 27 Sep 2018 23:41:01 +0000 (01:41 +0200)
Add support for the following OneView APIs:
 - ecore_mcp_ov_update_mtu() - Send MTU value to the management FW.
 - ecore_mcp_ov_update_mac() - Send MAC address to the management FW.
 - ecore_mcp_ov_update_eswitch() - Send eswitch_mode to management FW
   after the firmware load.

Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
drivers/net/qede/base/ecore_dev.c
drivers/net/qede/base/ecore_mcp.c
drivers/net/qede/base/ecore_mcp_api.h
drivers/net/qede/base/mcp_public.h

index 31f1f3e..be68a12 100644 (file)
@@ -2599,17 +2599,23 @@ enum _ecore_status_t ecore_hw_init(struct ecore_dev *p_dev,
                if (rc != ECORE_SUCCESS)
                        DP_INFO(p_hwfn, "Failed to update firmware version\n");
 
-               if (!b_default_mtu)
+               if (!b_default_mtu) {
                        rc = ecore_mcp_ov_update_mtu(p_hwfn, p_hwfn->p_main_ptt,
                                                      p_hwfn->hw_info.mtu);
-               if (rc != ECORE_SUCCESS)
-                       DP_INFO(p_hwfn, "Failed to update default mtu\n");
+                       if (rc != ECORE_SUCCESS)
+                               DP_INFO(p_hwfn, "Failed to update default mtu\n");
+               }
 
                rc = ecore_mcp_ov_update_driver_state(p_hwfn,
                                                      p_hwfn->p_main_ptt,
                                                ECORE_OV_DRIVER_STATE_DISABLED);
                if (rc != ECORE_SUCCESS)
                        DP_INFO(p_hwfn, "Failed to update driver state\n");
+
+               rc = ecore_mcp_ov_update_eswitch(p_hwfn, p_hwfn->p_main_ptt,
+                                                ECORE_OV_ESWITCH_NONE);
+               if (rc != ECORE_SUCCESS)
+                       DP_INFO(p_hwfn, "Failed to update eswitch mode\n");
        }
 
        return rc;
index 49963c6..1b6fc0a 100644 (file)
@@ -2869,10 +2869,72 @@ ecore_mcp_ov_get_fc_npiv(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
 }
 
 enum _ecore_status_t
-ecore_mcp_ov_update_mtu(struct ecore_hwfn *p_hwfn,
-                       struct ecore_ptt *p_ptt, u16 mtu)
+ecore_mcp_ov_update_mtu(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
+                       u16 mtu)
 {
-       return 0;
+       u32 resp = 0, param = 0, drv_mb_param = 0;
+       enum _ecore_status_t rc;
+
+       SET_MFW_FIELD(drv_mb_param, DRV_MB_PARAM_OV_MTU_SIZE, (u32)mtu);
+       rc = ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_OV_UPDATE_MTU,
+                          drv_mb_param, &resp, &param);
+       if (rc != ECORE_SUCCESS)
+               DP_ERR(p_hwfn, "Failed to send mtu value, rc = %d\n", rc);
+
+       return rc;
+}
+
+enum _ecore_status_t
+ecore_mcp_ov_update_mac(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
+                       u8 *mac)
+{
+       struct ecore_mcp_mb_params mb_params;
+       union drv_union_data union_data;
+       enum _ecore_status_t rc;
+
+       OSAL_MEM_ZERO(&mb_params, sizeof(mb_params));
+       mb_params.cmd = DRV_MSG_CODE_SET_VMAC;
+       SET_MFW_FIELD(mb_params.param, DRV_MSG_CODE_VMAC_TYPE,
+                     DRV_MSG_CODE_VMAC_TYPE_MAC);
+       mb_params.param |= MCP_PF_ID(p_hwfn);
+       OSAL_MEMCPY(&union_data.raw_data, mac, ETH_ALEN);
+       mb_params.p_data_src = &union_data;
+       rc = ecore_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params);
+       if (rc != ECORE_SUCCESS)
+               DP_ERR(p_hwfn, "Failed to send mac address, rc = %d\n", rc);
+
+       return rc;
+}
+
+enum _ecore_status_t
+ecore_mcp_ov_update_eswitch(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
+                           enum ecore_ov_eswitch eswitch)
+{
+       enum _ecore_status_t rc;
+       u32 resp = 0, param = 0;
+       u32 drv_mb_param;
+
+       switch (eswitch) {
+       case ECORE_OV_ESWITCH_NONE:
+               drv_mb_param = DRV_MB_PARAM_ESWITCH_MODE_NONE;
+               break;
+       case ECORE_OV_ESWITCH_VEB:
+               drv_mb_param = DRV_MB_PARAM_ESWITCH_MODE_VEB;
+               break;
+       case ECORE_OV_ESWITCH_VEPA:
+               drv_mb_param = DRV_MB_PARAM_ESWITCH_MODE_VEPA;
+               break;
+       default:
+               DP_ERR(p_hwfn, "Invalid eswitch mode %d\n", eswitch);
+               return ECORE_INVAL;
+       }
+
+       rc = ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_OV_UPDATE_ESWITCH_MODE,
+                          drv_mb_param, &resp, &param);
+       if (rc != ECORE_SUCCESS)
+               DP_ERR(p_hwfn, "Failed to send eswitch mode, rc = %d\n", rc);
+
+       return rc;
 }
 
 enum _ecore_status_t ecore_mcp_set_led(struct ecore_hwfn *p_hwfn,
index 8f4efd1..0103293 100644 (file)
@@ -185,6 +185,12 @@ enum ecore_ov_driver_state {
        ECORE_OV_DRIVER_STATE_ACTIVE
 };
 
+enum ecore_ov_eswitch {
+       ECORE_OV_ESWITCH_NONE,
+       ECORE_OV_ESWITCH_VEB,
+       ECORE_OV_ESWITCH_VEPA
+};
+
 #define ECORE_MAX_NPIV_ENTRIES 128
 #define ECORE_WWN_SIZE 8
 struct ecore_fc_npiv_tbl {
@@ -813,6 +819,32 @@ ecore_mcp_ov_get_fc_npiv(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
 enum _ecore_status_t ecore_mcp_ov_update_mtu(struct ecore_hwfn *p_hwfn,
                                             struct ecore_ptt *p_ptt, u16 mtu);
 
+/**
+ * @brief Send MAC address to MFW
+ *
+ *  @param p_hwfn
+ *  @param p_ptt
+ *  @param mac - MAC address
+ *
+ * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful.
+ */
+enum _ecore_status_t
+ecore_mcp_ov_update_mac(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
+                       u8 *mac);
+
+/**
+ * @brief Send eswitch mode to MFW
+ *
+ *  @param p_hwfn
+ *  @param p_ptt
+ *  @param eswitch - eswitch mode
+ *
+ * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful.
+ */
+enum _ecore_status_t
+ecore_mcp_ov_update_eswitch(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
+                           enum ecore_ov_eswitch eswitch);
+
 /**
  * @brief Set LED status
  *
index 79d9aae..5575d9d 100644 (file)
@@ -1258,7 +1258,15 @@ struct public_drv_mb {
  */
 #define DRV_MSG_GET_RESOURCE_ALLOC_MSG         0x34000000
 #define DRV_MSG_SET_RESOURCE_VALUE_MSG         0x35000000
+#define DRV_MSG_CODE_OV_UPDATE_WOL             0x38000000
+#define DRV_MSG_CODE_OV_UPDATE_ESWITCH_MODE    0x39000000
 #define DRV_MSG_CODE_S_TAG_UPDATE_ACK          0x3b000000
+#define DRV_MSG_CODE_OEM_UPDATE_FCOE_CVID      0x3c000000
+#define DRV_MSG_CODE_OEM_UPDATE_FCOE_FABRIC_NAME       0x3d000000
+#define DRV_MSG_CODE_OEM_UPDATE_BOOT_CFG       0x3e000000
+#define DRV_MSG_CODE_OEM_RESET_TO_DEFAULT      0x3f000000
+#define DRV_MSG_CODE_OV_GET_CURR_CFG           0x40000000
+#define DRV_MSG_CODE_GET_OEM_UPDATES           0x41000000
 
 /*deprecated don't use*/
 #define DRV_MSG_CODE_INITIATE_FLR_DEPRECATED    0x02000000
@@ -1583,6 +1591,13 @@ struct public_drv_mb {
 #define DRV_MB_PARAM_OV_MTU_SIZE_OFFSET                0
 #define DRV_MB_PARAM_OV_MTU_SIZE_MASK          0xFFFFFFFF
 
+#define DRV_MB_PARAM_ESWITCH_MODE_MASK  (DRV_MB_PARAM_ESWITCH_MODE_NONE | \
+                                        DRV_MB_PARAM_ESWITCH_MODE_VEB |   \
+                                        DRV_MB_PARAM_ESWITCH_MODE_VEPA)
+#define DRV_MB_PARAM_ESWITCH_MODE_NONE  0x0
+#define DRV_MB_PARAM_ESWITCH_MODE_VEB   0x1
+#define DRV_MB_PARAM_ESWITCH_MODE_VEPA  0x2
+
 #define DRV_MB_PARAM_SET_LED_MODE_OPER         0x0
 #define DRV_MB_PARAM_SET_LED_MODE_ON           0x1
 #define DRV_MB_PARAM_SET_LED_MODE_OFF          0x2