net/bnxt: support 58818 chip family
authorKalesh AP <kalesh-anakkur.purayil@broadcom.com>
Sun, 20 Dec 2020 05:24:25 +0000 (21:24 -0800)
committerFerruh Yigit <ferruh.yigit@intel.com>
Wed, 13 Jan 2021 18:24:30 +0000 (19:24 +0100)
The new chip (Stingray 2) is part of the P5 chip family with a number
of changes:

1. Implement the epoch doorbell bit for 58818 chip. With the new
   doorbell infrastructure and the unbounded index logic, now set the
   epoch doorbell bit to support proper doorbell operation on the new
   chip.  Toggle epoch bit of all rings when it's wrapped to support
   doorbell overflow checking.
2. Get the legacy doorbell size from firmware. Legacy doorbell support
   has been removed in Stingray 2. So, the fast path doorbell pages
   start from the base of the BAR. Drivers need to use
   legacy_l2_db_space_size_kb field in the hwrm_func_qcfg_output
   response to get the legacy doorbell page offset from the BAR.
3. Set VALID doorbell bit on 58818 chip family. This class of chip has a
   valid doorbell bit added and it needs to be set.
4. Use "chip_num" returned by firmware. The "chip_num" field in the
   HWRM_VER_GET output returns the chip number. Use this value to
   identify chip category for 58818 chip family.
5. Added device ids for Stingray2 PF/VF devices.

Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
doc/guides/rel_notes/release_21_02.rst
drivers/net/bnxt/bnxt.h
drivers/net/bnxt/bnxt_cpr.h
drivers/net/bnxt/bnxt_ethdev.c
drivers/net/bnxt/bnxt_hwrm.c
drivers/net/bnxt/bnxt_ring.c

index 706cbf8..b1bb2d8 100644 (file)
@@ -55,6 +55,12 @@ New Features
      Also, make sure to start the actual text at the margin.
      =======================================================
 
+* **Updated Broadcom bnxt driver.**
+
+  Updated the Broadcom bnxt driver with fixes and improvements, including:
+
+  * Added support for Stingray2 device.
+
 
 Removed Items
 -------------
index 8374e9f..0d3998f 100644 (file)
 #define BROADCOM_DEV_ID_58804          0xd804
 #define BROADCOM_DEV_ID_58808          0x16f0
 #define BROADCOM_DEV_ID_58802_VF       0xd800
+#define BROADCOM_DEV_ID_58812          0xd812
+#define BROADCOM_DEV_ID_58814          0xd814
+#define BROADCOM_DEV_ID_58818          0xd818
+#define BROADCOM_DEV_ID_58818_VF       0xd82e
 
 #define BROADCOM_DEV_957508_N2100      0x5208
 #define IS_BNXT_DEV_957508_N2100(bp)   \
@@ -367,14 +371,20 @@ struct bnxt_coal {
 };
 
 /* 64-bit doorbell */
+#define DBR_EPOCH_MASK                         0x01000000UL
+#define DBR_EPOCH_SFT                          24
 #define DBR_XID_SFT                            32
 #define DBR_PATH_L2                            (0x1ULL << 56)
+#define DBR_VALID                              (0x1ULL << 58)
 #define DBR_TYPE_SQ                            (0x0ULL << 60)
 #define DBR_TYPE_SRQ                           (0x2ULL << 60)
 #define DBR_TYPE_CQ                            (0x4ULL << 60)
 #define DBR_TYPE_NQ                            (0xaULL << 60)
 #define DBR_TYPE_NQ_ARM                                (0xbULL << 60)
 
+#define DB_PF_OFFSET                   0x10000
+#define DB_VF_OFFSET                   0x4000
+
 #define BNXT_RSS_TBL_SIZE_P5           512U
 #define BNXT_RSS_ENTRIES_PER_CTX_P5    64
 #define BNXT_MAX_RSS_CTXTS_P5 \
@@ -601,6 +611,7 @@ struct bnxt {
        struct rte_eth_dev              *eth_dev;
        struct rte_pci_device           *pdev;
        void                            *doorbell_base;
+       int                             legacy_db_size;
 
        uint32_t                flags;
 #define BNXT_FLAG_REGISTERED           BIT(0)
@@ -649,6 +660,10 @@ struct bnxt {
 #define BNXT_TRUFLOW_EN(bp)    ((bp)->flags & BNXT_FLAG_TRUFLOW_EN)
 #define BNXT_GFID_ENABLED(bp)  ((bp)->flags & BNXT_FLAG_GFID_ENABLE)
 
+       uint16_t                chip_num;
+#define CHIP_NUM_58818         0xd818
+#define BNXT_CHIP_SR2(bp)      ((bp)->chip_num == CHIP_NUM_58818)
+
        uint32_t                fw_cap;
 #define BNXT_FW_CAP_HOT_RESET          BIT(0)
 #define BNXT_FW_CAP_IF_CHANGE          BIT(1)
index a763f60..30635fc 100644 (file)
@@ -81,9 +81,14 @@ struct bnxt_db_info {
        };
        bool                    db_64;
        uint32_t                db_ring_mask;
+       uint32_t                db_epoch_mask;
+       uint32_t                db_epoch_shift;
 };
 
-#define DB_RING_IDX(db, idx)   ((idx) & (db)->db_ring_mask)
+#define DB_EPOCH(db, idx)      (((idx) & (db)->db_epoch_mask) <<       \
+                                ((db)->db_epoch_shift))
+#define DB_RING_IDX(db, idx)   (((idx) & (db)->db_ring_mask) |         \
+                                DB_EPOCH(db, idx))
 
 struct bnxt_ring;
 struct bnxt_cp_ring_info {
index 0788d26..02ab87b 100644 (file)
@@ -80,6 +80,10 @@ static const struct rte_pci_id bnxt_pci_id_map[] = {
        { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57508_MF2) },
        { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57504_MF2) },
        { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57502_MF2) },
+       { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_58812) },
+       { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_58814) },
+       { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_58818) },
+       { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_58818_VF) },
        { .vendor_id = 0, /* sentinel */ },
 };
 
@@ -3979,6 +3983,7 @@ static bool bnxt_vf_pciid(uint16_t device_id)
        case BROADCOM_DEV_ID_58802_VF:
        case BROADCOM_DEV_ID_57500_VF1:
        case BROADCOM_DEV_ID_57500_VF2:
+       case BROADCOM_DEV_ID_58818_VF:
                /* FALLTHROUGH */
                return true;
        default:
@@ -4001,6 +4006,10 @@ static bool bnxt_p5_device(uint16_t device_id)
        case BROADCOM_DEV_ID_57502_MF2:
        case BROADCOM_DEV_ID_57500_VF1:
        case BROADCOM_DEV_ID_57500_VF2:
+       case BROADCOM_DEV_ID_58812:
+       case BROADCOM_DEV_ID_58814:
+       case BROADCOM_DEV_ID_58818:
+       case BROADCOM_DEV_ID_58818_VF:
                /* FALLTHROUGH */
                return true;
        default:
index 73647fb..36c229d 100644 (file)
@@ -1129,6 +1129,9 @@ int bnxt_hwrm_ver_get(struct bnxt *bp, uint32_t timeout)
                PMD_DRV_LOG(ERR, "Unsupported request length\n");
                rc = -EINVAL;
        }
+
+       bp->chip_num = rte_le_to_cpu_16(resp->chip_num);
+
        bp->max_req_len = rte_le_to_cpu_16(resp->max_req_win_len);
        bp->hwrm_max_ext_req_len = rte_le_to_cpu_16(resp->max_ext_req_len);
        if (bp->hwrm_max_ext_req_len < HWRM_MAX_REQ_LEN)
@@ -3207,6 +3210,9 @@ int bnxt_hwrm_func_qcfg(struct bnxt *bp, uint16_t *mtu)
                break;
        }
 
+       bp->legacy_db_size =
+               rte_le_to_cpu_16(resp->legacy_l2_db_size_kb) * 1024;
+
        HWRM_UNLOCK();
 
        return rc;
index adddf9b..75b541b 100644 (file)
@@ -346,10 +346,7 @@ static void bnxt_set_db(struct bnxt *bp,
                        uint32_t ring_mask)
 {
        if (BNXT_CHIP_P5(bp)) {
-               if (BNXT_PF(bp))
-                       db->doorbell = (char *)bp->doorbell_base + 0x10000;
-               else
-                       db->doorbell = (char *)bp->doorbell_base + 0x4000;
+               int db_offset = DB_PF_OFFSET;
                switch (ring_type) {
                case HWRM_RING_ALLOC_INPUT_RING_TYPE_TX:
                        db->db_key64 = DBR_PATH_L2 | DBR_TYPE_SQ;
@@ -365,6 +362,14 @@ static void bnxt_set_db(struct bnxt *bp,
                        db->db_key64 = DBR_PATH_L2;
                        break;
                }
+               if (BNXT_CHIP_SR2(bp)) {
+                       db->db_key64 |= DBR_VALID;
+                       db_offset = bp->legacy_db_size;
+               } else if (BNXT_VF(bp)) {
+                       db_offset = DB_VF_OFFSET;
+               }
+
+               db->doorbell = (char *)bp->doorbell_base + db_offset;
                db->db_key64 |= (uint64_t)fid << DBR_XID_SFT;
                db->db_64 = true;
        } else {
@@ -383,6 +388,12 @@ static void bnxt_set_db(struct bnxt *bp,
                db->db_64 = false;
        }
        db->db_ring_mask = ring_mask;
+
+       if (BNXT_CHIP_SR2(bp)) {
+               db->db_epoch_mask = db->db_ring_mask + 1;
+               db->db_epoch_shift = DBR_EPOCH_SFT -
+                                       rte_log2_u32(db->db_epoch_mask);
+       }
 }
 
 static int bnxt_alloc_cmpl_ring(struct bnxt *bp, int queue_index,