test/mbuf: check pinned external buffer

This patch adds unit test for the mbufs allocated from
the special pool with pinned external data buffers.

The pinned buffer mbufs are tested in the same way as
regular ones with taking into account some specifics
of cloning/attaching.

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>

mbuf: fix pinned memory function style

Minor style issue is fixed.

Fixes: 6c8e50c2e549 ("mbuf: create pool with external memory buffers")

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>

mbuf: display more fields in dump

The rte_pktmbuf_dump should display offset, refcount, and vlan
info since these are often useful during debugging.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>

mem: fix munmap in error unwind

The loop to unwind existing mmaps was only unmapping the
first segment and the error paths after mmap() were not
doing munmap of the current segment.

Fixes: 66cc45e293ed ("mem: replace memseg with memseg lists")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>

config: add Broadcom Stingray for meson cross-compilation

Broadcom Stingray is armv8 CPU having cortex-a72. The implementor ID is
0x41 (arm) and the primary part number is 0xd08 (cortex-a72).

Signed-off-by: Qingmin Liu <qingmin.liu@broadcom.com>

config: update Marvell ARMADA

disable more NXP modules that conflict with MUSDK

Signed-off-by: Liron Himi <lironh@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>

ring: fix namespace prefix of inline functions

When adding custom element size feature, some internal inline functions
were added in a public header without rte_ prefix.
It is fixed by adding __rte_ring_.

Fixes: cc4b218790f6 ("ring: support configurable element size")

Reported-by: David Marchand <david.marchand@redhat.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>

app/pdump: fix build with clang

Clang checks indentation and found incorrect indentation in pdump.

app/pdump/main.c:598:3: error: misleading indentation;
statement is not part of the previous 'if'
[-Werror,-Wmisleading-indentation]

Fixes: caa7028276b8 ("app/pdump: add tool for packet capturing")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>

bpf: fix headers install with meson

Previously, when librte_bpf is built with meson+ninja, its
headers such as bpf_def is not installed to the system.
This commit fixes this problem.

Fixes: 94972f35a02e ("bpf: add BPF loading and execution framework")
Cc: stable@dpdk.org
Signed-off-by: Junxiao Shi <git@mail1.yoursunny.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>

build: allow using wildcards to disable drivers

Rather than having to explicitly list each and every driver to disable in a
build, we can use a small python script and the python glob library to
expand out the wildcards. This means that we can configure meson using e.g.

    meson -Ddisable_drivers=crypto/*,event/* build

to do a build omitting all the crypto and event drivers. Explicitly
specified drivers e.g. net/i40e, work as before, and can be mixed with
wildcarded drivers as required.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Robin Jarry <robin.jarry@6wind.com>
Acked-by: Luca Boccassi <bluca@debian.org>

build: remove some icc warnings

While icc builds without the "werror" setting build successfully, there are
a lot of warnings. To make the output cleaner, and to allow building with
warnings enabled, we can add a list of warning ids to ignore.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>

net/octeontx2: check compiler flag before use

Rather than assuming all compilers support the -flax-vector-extensions
flag, we should test this before using it, thereby potentially avoiding
warnings.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>

mk: ignore missing field initializers warning

Three warnings are commonly disabled in DPDK with make and meson:
* address-of-packed-member
always disabled
* missing-field-initializers
disabled with meson
disabled with make + clang or make + gcc < 4.7
disabled with make + gcc <= 5 for test files and event drivers
* packed-not-aligned
disabled with meson

This change is removing exceptions for missing-field-initializers.
As it is always disabled, some redundant configs are cleaned up.

Now the situation is:
* address-of-packed-member
always disabled
* missing-field-initializers
always disabled
* packed-not-aligned
disabled with meson

It could alternatively be decided to disable missing-field-initializers
only for old gcc (< 6).

The warning packed-not-aligned is not modified in this change.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>

common/cpt: remove self assignment

This fixes coverity issue of self assignment.

Coverity issue: 353635
Fixes: 99faef832563 ("crypto/octeontx: support ECPM")

Signed-off-by: Sunila Sahu <ssahu@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>

common/cpt: fix component for empty IOV buffer

fill_sg_comp_from_iov() prepares gather components for i/p IOV
buffers and extra buf. This API is failing to create a gather component
for extra_buf when IOV buf len is zero. Though there is enough space
to accommodate extra_buf, because of pre-decrementing of extra_buf
length from aggregate size, this issue is seen.

Fixes: b74652f3a91f ("common/cpt: add microcode interface for encryption")
Cc: stable@dpdk.org
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>

common/cpt: check cipher and auth keys are set

Returning error when cipher and auth key are not getting set

Fixes: 6cc54096520d ("crypto/octeontx: add supported sessions")
Cc: stable@dpdk.org
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>

common/cpt: support variable key size for HMAC

HMAC algorithms supports key lengths from 1 to 1024 bytes.

Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Sucharitha Sarananaga <ssarananaga@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>

crypto/octeontx2: extend AES-GCM capabilities

OCTEON TX2 crypto PMD supports digest lengths from 4 to 16 bytes
with new firmware.

Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>

common/cpt: remove redundant bitswaps

The structures can be written for direct h/w usage to avoid multiple
bitswaps.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>

examples/ipsec-secgw: test CPU crypto

Enable cpu-crypto mode testing by adding dedicated environmental
variable CRYPTO_PRIM_TYPE. Setting it to 'type cpu-crypto' allows
to run test scenario with cpu crypto acceleration.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Marcin Smoczynski <marcinx.smoczynski@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>

examples/ipsec-secgw: support CPU crypto

Add support for CPU accelerated crypto. 'cpu-crypto' SA type has
been introduced in configuration allowing to use abovementioned
acceleration.

Legacy mode is not currently supported.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Marcin Smoczynski <marcinx.smoczynski@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

ipsec: support CPU crypto mode

Update library to handle CPU cypto security mode which utilizes
cryptodev's synchronous, CPU accelerated crypto operations.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Marcin Smoczynski <marcinx.smoczynski@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

security: add CPU crypto action type

Introduce CPU crypto action type allowing to differentiate between
regular async 'none security' and synchronous, CPU crypto accelerated
sessions.

This mode is similar to ACTION_TYPE_NONE but crypto processing is
performed synchronously on a CPU.

Signed-off-by: Marcin Smoczynski <marcinx.smoczynski@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

crypto/aesni_gcm: support CPU crypto

Add support for CPU crypto mode by introducing required handler.
Authenticated encryption and decryption are supported with tag
generation/verification.

CPU crypto support include both AES-GCM and GMAC algorithms.

Signed-off-by: Marcin Smoczynski <marcinx.smoczynski@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Tested-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>

cryptodev: introduce CPU crypto API

Add new API allowing to process crypto operations in a synchronous
manner. Operations are performed on a set of SG arrays.

Cryptodevs which allows CPU crypto operation mode have to
use RTE_CRYPTODEV_FF_SYM_CPU_CRYPTO capability.

Add a helper method to easily convert mbufs to a SGL form.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Marcin Smoczynski <marcinx.smoczynski@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

examples/fips_validation: support AES XTS

AES XTS support is added to fips application. Parse test-vectors
from input files, populate AES XTS tests and prepare AES XTS
operations for fips validation.

Signed-off-by: Abed Kamaluddin <akamaluddin@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Sucharitha Sarananaga <ssarananaga@marvell.com>

examples/fips_validation: fix cipher length for AES-GCM

Cipher length need to be updated in case of AES-GCM decryption.

Fixes: 4aaad2995e13 ("examples/fips_validation: support GCM parsing")
Cc: stable@dpdk.org
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Sucharitha Sarananaga <ssarananaga@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>

net/octeontx2: sync inline tag type

Tag type configuration for the inline processed packets is set during
ethdev configuration, it might conflict with tag type configuration
done during Rx adapter configuration which would be setup later.

This conflict is fixed as part of flow rule creation by updating
tag type config of inline same as Rx adapter configured tag type.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

net/octeontx2: add inline IPsec Tx

Adding pre-processing required for inline IPsec outbound packets.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

net/octeontx2: add security in Tx

Added new flag for SECURITY in compiler optimized Tx fastpath
framework. With this, compiler autogenerates functions which
have security enabled.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>

net/octeontx2: add security in Rx

Added new flag for SECURITY in Rx compiler optimized fastpath
framework. With this, compiler autogenerates functions which
have security enabled.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

net/octeontx2: add inline IPsec Rx

Adding post-processing required for inline IPsec inbound packets.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

net/octeontx2: add lookup mem changes to hold SA indices

lookup_mem provides fast accessing of data path fields.
Storing sa indices in lookup_mem which are required in
inline rx data path.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

net/octeontx2: add datapath ops in security context

Adding data path ops in eth security ctx.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

net/octeontx2: add security session operations

Adding security session operations in eth security ctx.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

crypto/octeontx2: enable CPT to share QP with ethdev

Adding the infrastructure to save one opaque pointer in idev and
implement the consumer-producer in the PMDs which uses it accordingly.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

net/octeontx2: add security capabilities

Adding security capabilities supported by the eth PMD.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

net/octeontx2: add security in configure

Adding security in eth device configure.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

net/octeontx2: create security context

Adding security ctx to the eth device.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

crypto/octeontx2: configure for inline IPsec

For enabling outbound inline IPsec, a CPT queue needs to be tied
to a NIX PF_FUNC. Distribute CPT queues fairly among all available
otx2 eth ports.

For inbound, one CPT LF will be assigned and initialized by kernel.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

common/octeontx2: add security capability routine

This routine returns true if given rte_eth_dev is security offload
capable and belongs to octeontx2.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

common/octeontx2: add CPT LF mbox for inline inbound

Adding the new mbox introduced to configure CPT LF to be used for inline
inbound.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

examples/ipsec-secgw: set and use packet type

Set mbuf ptype in prepare_one_packet() after parsing ether_type.
Use mbuf ptype after to recognize packet's address family.

Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

examples/ipsec-secgw: add SAD cache

Introduce SAD cache.
Stores the most recent SA in a per lcore cache.
Cache represents flat array containing SA's indexed by SPI.

Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>

examples/ipsec-secgw: get rid of maximum SP limitation

Get rid of maximum SP limitation.
Keep parsed SP's into the sorted by SPI value array.
Use binary search in the sorted SP array to find appropriate SP
for a given SPI.

Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>

examples/ipsec-secgw: get rid of maximum SA limitation

Get rid of maximum SA limitation.
Keep parsed SA's into the sorted by SPI value array.
Use binary search in the sorted SA array to find appropriate SA
for a given SPI.

Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>

examples/ipsec-secgw: integrate inbound SAD

Integrate ipsec SAD support into secgw app:

1. Use SAD library for inbound SA lookup
2. Changes in struct sa_ctx:
  - sa array allocates dynamically depending on number of configured sa
  - All SA's are kept one by one without using SPI2IDX
3. SP's userdata now contain index of SA in sa_ctx instead of SPI
4. Get rid of SPI2IDX macro

Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>

examples/ipsec-secgw: implement inbound SAD

Add initial support for librte_ipsec SAD library

Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>

ipsec: move SAD name length

Move IPSEC_SAD_NAMESIZE into public header
and rename it to RTE_IPSEC_SAD_NAMESIZE

Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>

crypto/dpaa_sec: reorganize structure members

This patch reorganize the members of a structure
used by driver in its data-path to improve
performance.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

crypto/dpaa_sec: fix IOVA conversions

DPAA sec driver is using virtual to physical address
translation in its data path and driver is using
dpaax_iova_table_update() API in every address translation
which is very costly.
This patch moves dpaax_iova_table_update() calling to rte_dpaa_mem_ptov(),
only if it fails to found translation from DPAAX table.

Fixes: 12e5842945bf ("crypto/dpaa_sec: fix IOVA table")
Cc: stable@dpdk.org
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

crypto/ccp: support V1000/R1000

Add a new CCP PCI device ID for supporting V1000/R1000 processors.

Signed-off-by: Selwin Sebastian <selwin.sebastian@amd.com>
Acked-by: Ravi Kumar <ravi1.kumar@amd.com>

test/compress: add cycle-count mode to perf tool

This commit adds cycle-count mode to the compression perf tool.
The new mode enhances the compression performance tool to allow
cycle-count measurement of both hardware and softwate PMDs.

Signed-off-by: Artur Trybula <arturx.trybula@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>

crypto/armv8: fix clang build

1. Clang requires braces around initialization of subobject.
2. Clang complains implicit conversion of enumeration type.

Trapped issue with Clang version 8.0 and CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO
was set.
Error messages:
rte_armv8_pmd.c:144:2: error: suggest braces around initialization of
 subobject [-Werror,-Wmissing-braces]
        NULL
        ^~~~
        {   }
/usr/lib/llvm-8/lib/clang/8.0.0/include/stddef.h:105:16: note: expanded
 from macro 'NULL'
               ^~~~~~~~~~
rte_armv8_pmd.c:429:21: error: implicit conversion from enumeration
 type 'enum rte_crypto_cipher_operation' to different enumeration type
      'enum armv8_crypto_cipher_operation' [-Werror,-Wenum-conversion]
        cop = sess->cipher.direction;
            ~ ~~~~~~~~~~~~~^~~~~~~~~

Fixes: 169ca3db550c ("crypto/armv8: add PMD optimized for ARMv8 processors")
Cc: stable@dpdk.org
Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

crypto/armv8: enable meson build

Add new meson.build file for crypto/armv8

Suggested-by: Thomas Monjalon <thomas@monjalon.net>
Signed-off-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Tested-by: Ruifeng Wang <ruifeng.wang@arm.com>

crypto/armv8: link to library hosted by Arm

Armv8 crypto PMD linked to armv8_crypto library created by Marvell.
Maintenance of armv8_crypto library will be discontinued.
Change Armv8 PMD to link to AArch64 crypto library hosted by Arm.

Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: Ola Liljedahl <ola.liljedahl@arm.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

test/crypto: refactor unit tests into one combined array

This patch refactors most of unit tests to be contained in one
combined array, and run depending on the PMD capabilities instead of
providing multiple array with tests for individual PMDs.
Only a subset of unit tests was merged into one array - it combines
all tests originally meant to be run on these PMDs:
null, aesni_mb, aesni_gcm, openssl, qat, sw_snow3g, sw_kasumi, sw_zuc.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Tested-by: Akhil Goyal <akhil.goyal@nxp.com>

test/crypto: add capability checks

This patch adds capability checks to many tests meant to be run
in the future on various PMDs. This way the code is prepared for
more thorough refactoring in order to create one big central
unit tests array.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Tested-by: Akhil Goyal <akhil.goyal@nxp.com>

test/crypto: refactor unit tests

This patch gets rid of individual functions that all call
test_blockcipher_all_tests separately for every PMD and instead
provides just one set universal for all PMDs that's basing on the
driver id from the global variable gbl_driver_id.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Tested-by: Akhil Goyal <akhil.goyal@nxp.com>

crypto/snow3g: use IPsec library

Link against Intel IPsec Multi-buffer library, which
added support for SNOW3G-UEA2 and SNOW3G-UIA2 from version v0.53,
moving from libSSO SNOW3G library.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

crypto/kasumi: use IPsec library

Link against Intel IPsec Multi-buffer library, which
added support for KASUMI-F8 and KASUMI-F9 from version v0.53,
moving from libSSO KASUMI library.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

crypto/zuc: use IPsec library

Link against Intel IPsec Multi-buffer library, which
added support for ZUC-EEA3 and ZUC-EIA3 from version v0.53,
moving from libSSO ZUC library.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

vhost: catch overflow causing mmap of size 0

This patch catches an overflow that could happen if an
invalid region size or page alignment is provided by the
guest via the VHOST_USER_SET_MEM_TABLE request.

If the sum of the size to mmap and the alignment overflows
uint64_t, then RTE_ALIGN_CEIL(mmap_size, alignment) macro
will return 0. This value was passed as is as size argument
to mmap().

While kernel handling of mmap() syscall returns an error
if size is 0, it is better to catch it earlier and provide
a meaningful error log.

Fixes: ec09c280b839 ("vhost: fix mmap not aligned with hugepage size")
Cc: stable@dpdk.org
Reported-by: Ilja Van Sprundel <ivansprundel@ioactive.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Reviewed-by: Tiwei Bie <tiwei.bie@intel.com>

vhost: fix packed virtqueue ready condition

Consider a virtqueue ready when, apart from the descriptor area,
both event suppression areas have been mapped.

Fixes: 2d1541e2b6b3 ("vhost: add vring address setup for packed queues")
Cc: stable@dpdk.org
Signed-off-by: Adrian Moreno <amorenoz@redhat.com>
Reviewed-by: Tiwei Bie <tiwei.bie@intel.com>

vhost/crypto: fix fetch size

This patch fixes the incorrect rte_vhost_crypto_fetch_requests
return value.

Coverity issue: 343401
Fixes: 3bb595ecd682 ("vhost/crypto: add request handler")
Cc: stable@dpdk.org
Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

vhost: flush shadow Tx if no more packets

The current implementation of vhost_net in packed vring tries to fill
the shadow vector before send any actual changes to the guest. While
this can be beneficial for the throughput, it conflicts with some
bufferfloats methods like the linux kernel napi, that stops
transmitting packets if there are too much bytes/buffers in the
driver.

To solve it, we flush the shadow packets at the end of
virtio_dev_tx_packed if we have starved the vring, i.e. the next
buffer is not available for the device.

Since this last check can be expensive because of the atomic, we only
check it if we have not obtained the expected "count" packets. If it
happens to obtain "count" packets and there is no more available
packets the caller needs to keep call virtio_dev_tx_packed again.

Fixes: 31d6c6a5b820 ("vhost: optimize packed ring dequeue")
Cc: stable@dpdk.org
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

vhost: do not treat empty socket message as error

According to recvmsg() specification, 0 is a valid
return code when client is disconnecting.
Therefore, it should not be reported as error, unless there
are other dependencies that require message to not be empty.
But there are none, since the next immediate caller of recvmsg()
reports "vhost peer closed" info (not error) when message is empty.

This patch changes return code check for recvmsg() so that
misleading error message is not printed when the code is 0.

Fixes: 8f972312b8f4 ("vhost: support vhost-user")
Cc: stable@dpdk.org
Signed-off-by: Vitaliy Mysak <vitaliy.mysak@intel.com>
Reviewed-by: Tiwei Bie <tiwei.bie@intel.com>

vhost: fix crash on port deletion

The vhost_user_read_cb() and rte_vhost_driver_unregister()
can be called at the same time by 2 threads. Eg thread1
calls vhost_user_read_cb() and removes the vsocket from
conn_list, then thread2 calls rte_vhost_driver_unregister()
and frees the vsocket since it is NOT in the conn_list.
So thread1 will access invalid memory when trying to
reconnect.

The fix is to move the "removing of vsocket from conn_list"
to end of the vhost_user_read_cb(), then avoid the race
condition.

The core trace is:
Program terminated with signal 11, Segmentation fault.

Fixes: af1475918124 ("vhost: introduce API to start a specific driver")
Cc: stable@dpdk.org
Signed-off-by: Zhike Wang <wangzhike@jd.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

net/virtio-user: do not reset virtqueues for split ring

Add missing braces to avoid resetting virtqueues unconditionally
during reconnection.

Fixes: 6ebbf4109f35 ("net/virtio-user: fix packed ring server mode")
Cc: stable@dpdk.org
Signed-off-by: Tiwei Bie <tiwei.bie@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

net/mlx5: fix dirty array of actions

Previous patch changed the format of struct
mlx5_flow_dv_modify_hdr_resource, to use a flexible array for
modification actions.
In __flow_dv_translate() a union was defined with item of this struct,
and an array of maximal possible size.
Array elements are filled in several functions.
In function flow_dv_convert_action_set_reg(), array element is filled
partially, while the other fields of this array element are left
uninitialized.
This may cause failure of flow_dv_modify_hdr_resource_register()
when calling driver function with the 'dirty' array.

This patch updates flow_dv_convert_action_set_reg(), setting the
selected array element fields while clearing the other fields.
Other functions that fill the same array elements are also updated
for clarity and proofing future use.

Fixes: 024e95759c16 ("net/mlx5: fix modify actions support limitation")
Cc: stable@dpdk.org
Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>

net/mlx5: fix memory regions release deadlock

The mpx5 PMD maintains the list of devices for those the memory
operation callback routines must be invoked to keep the device MRs (MR
is the entity backing the hardware DMA transactions) consistent with the
mapped memory.
Each device context in the list is protected with dedicated lock on per
device basis, which might be taken inside the callback routine.

When device is closing the PMD frees all MRs by calling
mlx5_mr_release(), that might call rte_free() under the taken device
lock.  If this rte_free call triggers the entire memory segment freeing
it, in its turn, invokes the callback routine and attempt to take the
lock inside this one causes the deadlock.

The patch proposes the remove the device from the callback list first
and then call mlx5_mr_release() and free the remaining device MRs
explicitly.

Fixes: 0e3d0525b2f2 ("net/mlx5: fix memory event callback list")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>

net/failsafe: fix reported hash key size in device info

Hash key size is missing from reported device info.
This fills the hash key size in device info.

Fixes: 4586be3743d4 ("net/failsafe: fix reported device info")
Cc: stable@dpdk.org
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>

app/testpmd: fix uninitialized members when setting PFC

Only a part of members in the local structure variable named pfc_conf
are initialized in the function named cmd_priority_flow_ctrl_set_parsed
when typing "set pfc_ctrl..." command, and others are random values.
However, those uninitialized members may cause failure.

This patch adds clearing zero operation before calling the API named
rte_eth_dev_priority_flow_ctrl_set API with pfc_conf as the input
parameter.

Fixes: 9b53e542e9e1 ("app/testpmd: add priority flow control")
Cc: stable@dpdk.org
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
Signed-off-by: Xuan Li <lixuan47@hisilicon.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>

app/testpmd: fix initial value when setting PFC

Currently, the initial values of the local structure variable named
rx_tx_onoff_2_lfc_mode and rx_tx_onoff_2_pfc_mode are different in the
similar part of these two following functions:
cmd_link_flow_ctrl_set_parsed
cmd_priority_flow_ctrl_set_parsed
1) The code snippset in cmd_link_flow_ctrl_set_parsed function:
static enum rte_eth_fc_mode rx_tx_onoff_2_lfc_mode[2][2] = {
    {RTE_FC_NONE, RTE_FC_TX_PAUSE}, {RTE_FC_RX_PAUSE, RTE_FC_FULL}
};

if (!cmd || cmd == &cmd_link_flow_control_set_rx)
rx_fc_en = (!strcmp(res->rx_lfc_mode, "on")) ? 1 : 0;
if (!cmd || cmd == &cmd_link_flow_control_set_tx)
tx_fc_en = (!strcmp(res->tx_lfc_mode, "on")) ? 1 : 0;

fc_conf.mode = rx_tx_onoff_2_lfc_mode[rx_fc_en][tx_fc_en];
<...>
ret = rte_eth_dev_flow_ctrl_set(res->port_id, &fc_conf);
<...>
2) The code snippset in cmd_priority_flow_ctrl_set_parsed function:
static enum rte_eth_fc_mode rx_tx_onoff_2_pfc_mode[2][2] = {
    {RTE_FC_NONE, RTE_FC_RX_PAUSE}, {RTE_FC_TX_PAUSE, RTE_FC_FULL}
};

rx_fc_enable = (!strncmp(res->rx_pfc_mode, "on",2)) ? 1 : 0;
tx_fc_enable = (!strncmp(res->tx_pfc_mode, "on",2)) ? 1 : 0;
pfc_conf.fc.mode =
 rx_tx_onoff_2_pfc_mode[rx_fc_enable][tx_fc_enable];
<...>
ret = rte_eth_dev_priority_flow_ctrl_set(res->port_id, &pfc_conf);
<...>
The initial value of rx_tx_onoff_2_pfc_mode is wrong, it should be the
same as rx_tx_onoff_2_lfc_mode.

Fixes: 9b53e542e9e1 ("app/testpmd: add priority flow control")
Cc: stable@dpdk.org
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
Signed-off-by: Xuan Li <lixuan47@hisilicon.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>

app/testpmd: fix copy of dynamic flag name

When working with testpmd and setting the dynflag name, we copy the
name given by the cmd to the dynflag name.

The issue is that the size of the dynflag name is smaller then the
string used by testpmd.

This commit solves this issue by checking that the length of the requested
flag name is not too long.

Coverity issue: 353610
Fixes: b57b66a97ebf ("app/testpmd: support mbuf dynamic flag")

Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Bernard Iremonger <bernard.iremonger@intel.com>

net/memif: add link info

This information is useful or needed for user applications as t-rex.

Signed-off-by: Július Milan <jmilan.dev@gmail.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>

app/testpmd: fix uninitialized members of MPLS

Some of the members of the MPLS struct are not initialized.
This commit init the uninitialized members.

Coverity issue: 325735
Fixes: 3e77031be855 ("app/testpmd: add MPLSoGRE encapsulation")
Cc: stable@dpdk.org
Signed-off-by: Ori Kam <orika@mellanox.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>

vdpa/mlx5: disable RoCE

In order to support virtio queue creation by the FW, RoCE mode
should be disabled in the device.

Do it by netlink which is like the devlink tool commands:
1. devlink dev param set pci/[pci] name enable_roce value false
   cmode driverinit
2. devlink dev reload pci/[pci]
Or by sysfs which is like:
echo 0 >  /sys/bus/pci/devices/[pci]/roce_enable

The IB device is matched again after ROCE disabling.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Maxime Coquelin <maxime.coquelin@redhat.com>

vdpa/mlx5: support close and config operations

Support dev_conf and dev_conf operations.
These operations allow vdpa traffic.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Maxime Coquelin <maxime.coquelin@redhat.com>

vdpa/mlx5: support live migration

Add support for live migration feature by the HW:
Create a single Mkey that maps the memory address space of the
VHOST live migration log file.
Modify VIRTIO_NET_Q object and provide vhost_log_page,
dirty_bitmap_mkey, dirty_bitmap_size, dirty_bitmap_addr
and dirty_bitmap_dump_enable.
Modify VIRTIO_NET_Q object and move state to SUSPEND.
Query VIRTIO_NET_Q and get hw_available_idx and hw_used_idx.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Maxime Coquelin <maxime.coquelin@redhat.com>

vdpa/mlx5: map doorbell

The HW supports only 4 bytes doorbell writing detection.
The virtio device set only 2 bytes when it rings the doorbell.

Map the virtio doorbell detected by the virtio queue kickfd to the HW
VAR space when it expects to get the virtio emulation doorbell.

Use the EAL interrupt mechanism to get notification when a new event
appears in kickfd by the guest and write 4 bytes to the HW doorbell space
in the notification callback.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Maxime Coquelin <maxime.coquelin@redhat.com>

vdpa/mlx5: support queue state operation

Add support for set_vring_state operation.

Using DevX API the virtq state can be changed as described in PRM:
enable - move to ready state.
disable - move to suspend state.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Maxime Coquelin <maxime.coquelin@redhat.com>

vdpa/mlx5: add basic steering configurations

Add a steering object to be managed by a new file mlx5_vdpa_steer.c.

Allow promiscuous flow to scatter the device Rx packets to the virtio
queues using RSS action.

In order to allow correct RSS in L3 and L4, split the flow to 7 flows
as required by the device.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Maxime Coquelin <maxime.coquelin@redhat.com>

vdpa/mlx5: support stateless offloads

Add support for the next features in virtq configuration:
VIRTIO_F_RING_PACKED,
VIRTIO_NET_F_HOST_TSO4,
VIRTIO_NET_F_HOST_TSO6,
VIRTIO_NET_F_CSUM,
VIRTIO_NET_F_GUEST_CSUM,
VIRTIO_F_VERSION_1,

These features support depends in the DevX capabilities reported by the
device.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

vdpa/mlx5: prepare virtio queues

The HW virtq object represents an emulated context for a VIRTIO_NET
virtqueue which was created and managed by a VIRTIO_NET driver as
defined in VIRTIO Specification.

Add support to prepare and release all the basic HW resources needed
the user virtqs emulation according to the rte_vhost configurations.

This patch prepares the basic configurations needed by DevX commands to
create a virtq.

Add new file mlx5_vdpa_virtq.c to manage virtq operations.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>

vdpa/mlx5: prepare HW queues

As an arrangement to the vitrio queues creation, a 2 QPs and CQ may be
created for the virtio queue.

The design is to trigger an event for the guest and for the vdpa driver
when a new CQE is posted by the HW after the packet transition.

This patch add the basic operations to create and destroy the above HW
objects  and to trigger the CQE events when a new CQE is posted.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>

vdpa/mlx5: prepare memory regions

In order to map the guest physical addresses used by the virtio device
guest side to the host physical addresses used by the HW as the host
side, memory regions are created.

By this way, for example, the HW can translate the addresses of the
packets posted by the guest and to take the packets from the correct
place.

The design is to work with single MR which will be configured to the
virtio queues in the HW, hence a lot of direct MRs are grouped to single
indirect MR.

Create functions to prepare and release MRs with all the related
resources that are required for it.

Create a new file mlx5_vdpa_mem.c to manage all the MR related code
in the driver.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Maxime Coquelin <maxime.coquelin@redhat.com>

vdpa/mlx5: support features get operations

Add support for get_features and get_protocol_features operations.

Part of the features are reported by the DevX capabilities.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

vdpa/mlx5: support queues number operation

Support get_queue_num operation to get the maximum number of queues
supported by the device.

This number comes from the DevX capabilities.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

vdpa/mlx5: introduce Mellanox vDPA driver

Add a new driver to support vDPA operations by Mellanox devices.

The first Mellanox devices which support vDPA operations are
ConnectX-6 Dx and Bluefield1 HCA for their PF ports and VF ports.

This driver is depending on rdma-core like the mlx5 PMD, also it is
going to use mlx5 DevX to create HW objects directly by the FW.
Hence, the common/mlx5 library is linked to the mlx5_vdpa driver.

This driver will not be compiled by default due to the above
dependencies.

Register a new log type for this driver.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

net/mlx5: add Rx/Tx burst mode info

Get a burst mode information for Rx/Tx queues in mlx5.
Provide callback functions to show this information in
a "show rxq info" and "show txq info" output.

Signed-off-by: Alexander Kozyrev <akozyrev@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>

net/octeontx: fix user supplied MAC address index

Earlier after a successful mac_addr_add operation, index was returned
by underlying layer which was unused but same as provided by DPDK API.

So API is enhanced to use application provided index location to add
MAC address entry.

Fixes: e4373bf1b3f5 ("net/octeontx: add unicast MAC filter")

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Acked-by: Harman Kalra <hkalra@marvell.com>

net/octeontx: fix memory leak of MAC address table

MAC address table is allocated during octeontx device create and
same is used to maintain list of MAC address associated to port.
This table is not getting freed niether in case of error nor during
graceful shutdown of port.

Patch fixes memory required memory for both the cases as mentioned.

Fixes: f18b146c498d ("net/octeontx: create ethdev ports")
Cc: stable@dpdk.org
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Acked-by: Harman Kalra <hkalra@marvell.com>

net/octeontx2: fix Tx flow control for HIGIG

Tx flow controlled is disabled in the Ax silicon version due to an errata.
This errata is not applicable for HIGIG Tx flow control, therefore
not enabling in HIGIG case.

Fixes: 602009ee2dfb ("net/octeontx2: support HIGIG2")
Cc: stable@dpdk.org
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>

net/i40e: fix multi-queue Rx interrupt for VF

The interrupt vector which bind to queues should not be larger than
the max available vector. It will cause port start failed. This patch
changed the judgement condition of the limited vector id. It can
effectively avoid vector id out of range.

Fixes: 6a6cf5f88b4a ("net/i40e: enable multi-queue Rx interrupt for VF")

Signed-off-by: Lunyuan Cui <lunyuanx.cui@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>

net/ice: fix GTP-U rule conflict

The patch distinguishes fdir rules for GTPU with or without
extend header, so flow to match below patterns can be created
correctly.

1. eth / ipv4 / udp / gtpu teid is 10 / ...
2. eth / ipv4 / udp / gtpu teid is 10 / gtp_psc / ...
3. eth / ipv4 / udp / gtpu / gtp_psc qfi is 10 / ...
4. eth / ipv4 / udp / gtpu teid is 10 / gtp_psc is 10 / ...

Fixes: efc16c621415 ("net/ice: support flow director GTPU tunnel")
Cc: stable@dpdk.org
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>

net/e1000: use macro for PCI log format

Use PCI_PRI_FMT instead of "%04d:%02d:%02d:%d" print format.

Signed-off-by: Yunjian Wang <wangyunjian@huawei.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>

net/mlx5: fix VXLAN-GPE item translation

Currently, when using VXLAN-GPE or VXLAN item in the flow
both are being treated the same with flags 0x8 in VXLAN
header. Which mean the matching of the item VXLAN-GPE
will match any VXLAN packet.

This fixes the translation of VXLAN GPE item into PMD flow
item. Which will by default set the flags to VXLAN-GPE
to be 0xc.

Fixes: 3d69434113d1 ("net/mlx5: add Direct Verbs validation function")
Cc: stable@dpdk.org
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>

doc: add secondary VF details in thunderx guide

thunderx-nic uses secondary VF's to provide more queues to DPDK.
Current instructions explain the concept but don't show an easy way to
find which PCI id is primary and which is secondary VF's.

This patch extending the documentation of secondary VF w.r.t
the enumeration details.

Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>

net/octeontx2: change default RSS hash calculation

Before C0 HW revision, The RSS adder was computed based the following
static formula.

rss_adder<7:0> = flow_tag<7:0> ^ flow_tag<15:8> ^
flow_tag<23:16> ^ flow_tag<31:24>

The above scheme has the following drawbacks:
1) It is not in line with other standard NIC behavior.
2) There can be an SW use case where SW can compute the hash
upfront using Toeplitz function and predict the queue selection
to optimize some packet lookup function. The nonstandard
way of doing XOR makes the consumer to not predict the queue selection.

C0 HW revision onward, The HW can configure the
rss_adder<7:0> as flow_tag<7:0> to align with standard NICs.

This patch adds an option to select legacy RSS adder mode
using tag_as_xor=1 devargs option while keeping the standard NIC
behavior as default.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>