dpdk.git
4 years agonet/mlx5: extend flow metadata support
Viacheslav Ovsiienko [Thu, 7 Nov 2019 17:10:00 +0000 (17:10 +0000)]
net/mlx5: extend flow metadata support

META item is supported on both Rx and Tx. 'transfer' attribute
is also supported. SET_META action is also added.

Due to restriction on reg_c[meta], various bit width might be
available. If devarg parameter dv_xmeta_en=1, the META uses
metadata register reg_c[0], which may be required for internal
kernel or firmware needs. In this case PMD queries kernel about
available fields in reg_c[0] and restricts the register usage
accordingly. If devarg parameter dv_xmeta_en=2, the META feature
uses reg_c[1], there should be no limitations on the data width.

However, extensive MEAT feature is currently disabled until
register copy on loopback is supported by forthcoming patches.

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: extend flow mark support
Viacheslav Ovsiienko [Thu, 7 Nov 2019 17:09:59 +0000 (17:09 +0000)]
net/mlx5: extend flow mark support

Flow MARK item is newly supported along with MARK action. MARK
action and item are supported on both Rx and Tx. It works on the
metadata reg_c[] only if extensive flow metadata register is
supported. Without the support, MARK action behaves same as
before - valid only on Rx and no MARK item is valid.

FLAG action is also modified accordingly. FLAG action is
supported on both Rx and Tx via reg_c[] if extensive flow
metadata register is supported.

However, the new MARK/FLAG item and action are currently
disabled until register copy on loopback is supported by
forthcoming patches.

The actual index of engaged metadata reg_c[] register to
support FLAG/MARK actions depends on dv_xmeta_en devarg value.

For extensive metadata mode 1 the reg_c[1] is used and
transitive MARK data width is 24. For extensive metadata mode 2
the reg_c[0] is used and transitive MARK data width might be
restricted to 0 or 16 bits, depending on kernel usage of reg_c[0].
The actual supported width can be discovered by series of trials
with rte_flow_validate().

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: support flow tag
Viacheslav Ovsiienko [Thu, 7 Nov 2019 17:09:58 +0000 (17:09 +0000)]
net/mlx5: support flow tag

Add support of new rte_flow item and action - TAG and SET_TAG. TAG is
a transient value which can be kept during flow matching.

This is supported through device metadata register reg_c[]. Although
there are 8 registers are available on the current mlx5 device,
some of them can be reserved for firmware or kernel purposes.
The availability should be queried by iterative trial-and-error
mlx5_flow_discover_mreg_c() routine.

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: update metadata register ID query
Viacheslav Ovsiienko [Thu, 7 Nov 2019 17:09:57 +0000 (17:09 +0000)]
net/mlx5: update metadata register ID query

The NIC might support up to 8 extensive metadata registers.
These registers are supposed to be used by multiple features.
There is register id query routine to allow determine which
register is actually used by specified feature.

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: check maximum modify actions number
Viacheslav Ovsiienko [Thu, 7 Nov 2019 17:09:56 +0000 (17:09 +0000)]
net/mlx5: check maximum modify actions number

If the extensive metadata registers are supported,
it can be regarded inclusively that the extensive
metadata support is possible. E.g. metadata register
copy action, supporting 16 modify header actions,
reserving register across different steering domain
(FDB and NIC) and so on.

This patch handles the maximal amount of header modify
actions depending on discovered metadata registers
support.

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: adjust shared register according to mask
Viacheslav Ovsiienko [Thu, 7 Nov 2019 17:09:55 +0000 (17:09 +0000)]
net/mlx5: adjust shared register according to mask

The metadata register reg_c[0] might be used by kernel or
firmware for their internal purposes. The actual used mask
can be queried from the kernel. The remaining bits can be
used by PMD to provide META or MARK feature. The code queries
the mask of reg_c[0] and adjust the resource usage dynamically.

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: add devarg for extensive metadata support
Viacheslav Ovsiienko [Thu, 7 Nov 2019 17:09:54 +0000 (17:09 +0000)]
net/mlx5: add devarg for extensive metadata support

The PMD parameter dv_xmeta_en is added to control extensive
metadata support. A nonzero value enables extensive flow
metadata support if device is capable and driver supports it.
This can enable extensive support of MARK and META item of
rte_flow. The newly introduced SET_TAG and SET_META actions
do not depend on dv_xmeta_en parameter, because there is
no compatibility issue for new entities. The dv_xmeta_en is
disabled by default.

There are some possible configurations, depending on parameter
value:

- 0, this is default value, defines the legacy mode, the MARK
  and META related actions and items operate only within NIC Tx
  and NIC Rx steering domains, no MARK and META information
  crosses the domain boundaries. The MARK item is 24 bits wide,
  the META item is 32 bits wide.

- 1, this engages extensive metadata mode, the MARK and META
  related actions and items operate within all supported steering
  domains, including FDB, MARK and META information may cross
  the domain boundaries. The ``MARK`` item is 24 bits wide, the
  META item width depends on kernel and firmware configurations
  and might be 0, 16 or 32 bits. Within NIC Tx domain META data
  width is 32 bits for compatibility, the actual width of data
  transferred to the FDB domain depends on kernel configuration
  and may be vary. The actual supported width can be retrieved
  in runtime by series of rte_flow_validate() trials.

- 2, this engages extensive metadata mode, the MARK and META
  related actions and items operate within all supported steering
  domains, including FDB, MARK and META information may cross
  the domain boundaries. The META item is 32 bits wide, the MARK
  item width depends on kernel and firmware configurations and
  might be 0, 16 or 24 bits. The actual supported width can be
  retrieved in runtime by series of rte_flow_validate() trials.

If there is no E-Switch configuration the ``dv_xmeta_en`` parameter is
ignored and the device is configured to operate in legacy mode (0).

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: check metadata registers availability
Viacheslav Ovsiienko [Thu, 7 Nov 2019 17:09:53 +0000 (17:09 +0000)]
net/mlx5: check metadata registers availability

The metadata registers reg_c provide support for TAG and
SET_TAG features. Although there are 8 registers are available
on the current mlx5 devices, some of them can be reserved.
The availability should be queried by iterative trial-and-error
implemented by mlx5_flow_discover_mreg_c() routine.

If reg_c is available, it can be regarded inclusively that
the extensive metadata support is possible. E.g. metadata
register copy action, supporting 16 modify header actions
(instead of 8 by default) preserving register across
different domains (FDB and NIC) and so on.

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: rename structure and function
Viacheslav Ovsiienko [Thu, 7 Nov 2019 17:09:52 +0000 (17:09 +0000)]
net/mlx5: rename structure and function

There are some renaming:
- in the DV flow engine overall: flow_d_* -> flow_dv_*
- in flow_dv_translate(): res -> mhdr_res

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: update meta register matcher set
Viacheslav Ovsiienko [Thu, 7 Nov 2019 17:09:51 +0000 (17:09 +0000)]
net/mlx5: update meta register matcher set

Introduce the dedicated matcher register field setup routine.
Update the code to use this unified one.

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: update flow functions
Viacheslav Ovsiienko [Thu, 7 Nov 2019 17:09:50 +0000 (17:09 +0000)]
net/mlx5: update flow functions

Update flow creation/destroy functions for future reuse.
List operations can be skipped inside functions and done
separately out of flow creation.

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: refactor flow structure
Viacheslav Ovsiienko [Thu, 7 Nov 2019 17:09:49 +0000 (17:09 +0000)]
net/mlx5: refactor flow structure

Some rte_flow fields which are local to subflows have been moved to
mlx5_flow structure. RSS attributes are grouped by mlx5_flow_rss structure.
tag_resource is moved to mlx5_flow_dv structure.

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: add metadata register copy
Viacheslav Ovsiienko [Thu, 7 Nov 2019 17:09:48 +0000 (17:09 +0000)]
net/mlx5: add metadata register copy

Add flow metadata register copy action which is supported through modify
header command. As it is an internal action, not exposed to users, item
type (MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG) is negative value. This can be
used when creating PMD internal subflows.

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: update modify header action translator
Viacheslav Ovsiienko [Thu, 7 Nov 2019 17:09:47 +0000 (17:09 +0000)]
net/mlx5: update modify header action translator

When composing device command for modify header action, provided mask
should be taken more accurate into account thus length and offset
in action should be set accordingly at precise bit-wise boundaries.

For the future use, metadata register copy action is also added.

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: convert internal tag endianness
Viacheslav Ovsiienko [Thu, 7 Nov 2019 17:09:46 +0000 (17:09 +0000)]
net/mlx5: convert internal tag endianness

Public API RTE_FLOW_ACTION_TYPE_TAG and RTE_FLOW_ITEM_TYPE_TAG
present data in host-endian format, as all metadata related
entities. The internal mlx5 tag related action and item should
use the same endianness to be conformed.

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: introduce hash list
Bing Zhao [Wed, 6 Nov 2019 13:07:56 +0000 (15:07 +0200)]
net/mlx5: introduce hash list

Introduce simple hash list to the mlx5 utilities. User can define
its own data structure containing the mlx5_hlist_entry and create
the hash list table via the creation interface. Then the entry will
be inserted into the table and linked to the corresponding list
head. User should guarantee there is no collision of the key and
provide a callback function to handle all the remaining entries in
the table when destroying the hash list. User should define a proper
number of the list heads in the table in order to get a better
performance. The LSB of the 'key' is used to calculate the index of
the head in the list heads array.
This implementation is not multi-threads safe right now.

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
4 years agoapp/testpmd: support hairpin
Ori Kam [Tue, 5 Nov 2019 19:05:19 +0000 (19:05 +0000)]
app/testpmd: support hairpin

This commit introduce the hairpin queues to the testpmd.
the hairpin queue is configured using --hairpinq=<n>
the hairpin queue adds n queue objects for both the total number
of TX queues and RX queues.
The connection between the queues are 1 to 1, first Rx hairpin queue
will be connected to the first Tx hairpin queue

Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
4 years agonet/sfc: fix adapter lock usage on rule creation
Ivan Malov [Sun, 3 Nov 2019 10:33:09 +0000 (13:33 +0300)]
net/sfc: fix adapter lock usage on rule creation

The point is that adapter lock has to be held on
list accesses, as well as when talking to the HW.

Fixes: a9825ccf5bb8 ("net/sfc: support flow API filters")
Cc: stable@dpdk.org
Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
4 years agonet/enic: re-enable link status change interrupt
Hyong Youb Kim [Thu, 7 Nov 2019 14:42:24 +0000 (06:42 -0800)]
net/enic: re-enable link status change interrupt

When INTx is used, the interrupt handler needs to explicitly re-enable
interrupt in order to receive another one in future. The LSC interrupt
handler currently does not, and the link state never gets updated when
INTx is used (e.g. uio_pci_generic). Call rte_intr_ack() at the end of
the handler, to re-enable INTx.

Fixes: fefed3d1e62c ("enic: new driver")
Cc: stable@dpdk.org
Signed-off-by: Hyong Youb Kim <hyonkim@cisco.com>
Reviewed-by: John Daley <johndale@cisco.com>
4 years agoethdev: fix expand RSS flows
Xiaoyu Min [Tue, 5 Nov 2019 13:42:43 +0000 (15:42 +0200)]
ethdev: fix expand RSS flows

rte_flow_expand_rss expands rte_flow item list based on the RSS
types. In another word, some additional rules are added if the user
specified items are not complete enough according to the RSS type,
for example:

  ... pattern eth / end actions rss type tcp end ...

User only provides item eth but want to do RSS on tcp traffic.
The pattern is not complete enough to filter TCP traffic only.
This will be a problem for some HWs.
So some PMDs use rte_flow_expand_rss to expand above user provided
flow to:

  ... pattern eth / end actions rss types tcp
  ... pattern eth / ipv4 / tcp / end actions rss types tcp ...
  ... pattern eth / ipv6 / tcp / end actions rss types tcp ...

in order to filter TCP traffic only and do RSS correctly.

However the current expansion cannot handle pattern as below, which
provides ethertype or ip next proto instead of providing an item:

  ... pattern eth type is 0x86DD / end actions rss types tcp ...

rte_flow_expand_rss will expand above flow to:

  ... pattern eth type is 0x86DD / ipv4 / tcp end ...

which has conflicting values: 0x86DD vs. ipv4 and some HWs will refuse
to create flow.

This patch will fix above by checking the last item's spec and to
expand RSS flows correctly.

Currently only support to complete item list based on ether type or ip
next proto.

Fixes: 4ed05fcd441b ("ethdev: add flow API to expand RSS flows")
Cc: stable@dpdk.org
Signed-off-by: Xiaoyu Min <jackmin@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
4 years agonet/sfc: add SPDX tag in meson file
Hemant Agrawal [Fri, 27 Sep 2019 09:04:29 +0000 (14:34 +0530)]
net/sfc: add SPDX tag in meson file

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Andrew Rybchenko <arybchenko@solarflare.com>
4 years agonet/mlx5: add missing packet type for GENEVE
Wisam Jaddo [Wed, 6 Nov 2019 09:38:55 +0000 (09:38 +0000)]
net/mlx5: add missing packet type for GENEVE

HW ptype are missing TUNNEL_GENEVE support

Fixes: e59a5dbcfd07 ("net/mlx5: add flow match on GENEVE item")

Signed-off-by: Wisam Jaddo <wisamm@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
4 years agonet/mlx5: allow pattern start from IP
Xiaoyu Min [Tue, 5 Nov 2019 08:03:09 +0000 (10:03 +0200)]
net/mlx5: allow pattern start from IP

Some applications, i.e. OVS, have rule like:

[1] pattern ipv4 / end actions ...

which intends to match ipv4 only on non-vlan ethernet and MLX5 NIC
supports this.

So PMD should accept this.

Fixes: 906a2efae8da ("net/mlx5: validate flow rule item order")
Cc: stable@dpdk.org
Signed-off-by: Xiaoyu Min <jackmin@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
4 years agonet/mlx5: improve flow item IP validation
Xiaoyu Min [Tue, 5 Nov 2019 07:51:27 +0000 (09:51 +0200)]
net/mlx5: improve flow item IP validation

Currently PMD doesn't check whether the user specified ethernet type is
conflicting with the followed IPv4/IPv6 items, which leads to HW refuse
to create rule, for example:

  ... pattern eth type is 0x86dd / ipv4 / end ...

ethernet type is IPv6 but IPv4 is following, this should be validated
as failure and report corresponding error in detail.

Fixes: 23c1d42c7138 ("net/mlx5: split flow validation to dedicated function")
Cc: stable@dpdk.org
Signed-off-by: Xiaoyu Min <jackmin@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
4 years agonet/mlx5: add ConnectX6-DX device ID
Raslan Darawsheh [Thu, 7 Nov 2019 09:36:09 +0000 (09:36 +0000)]
net/mlx5: add ConnectX6-DX device ID

This adds new device id to the list of Mellanox devices
that runs mlx5 PMD.
- ConnectX-6DX device ID
- ConnectX-6DX SRIOV device ID

Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
4 years agonet/ice: fix flow director tunnel profile existence check
Yahui Cao [Tue, 5 Nov 2019 13:37:21 +0000 (21:37 +0800)]
net/ice: fix flow director tunnel profile existence check

If first rule is issued and then the second rule is issued with the same
input set as first rule's, FDIR driver can't find there is an identical
input set.

Fixes: 109e8e06249e ("net/ice: configure HW flow director rule")

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
4 years agonet/ice/base: add new device IDs
Qi Zhang [Fri, 1 Nov 2019 01:44:06 +0000 (09:44 +0800)]
net/ice/base: add new device IDs

Add device IDs for E810_XXV.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
4 years agonet/octeontx2: support SDP interface
Subrahmanyam Nilla [Wed, 6 Nov 2019 09:27:34 +0000 (14:57 +0530)]
net/octeontx2: support SDP interface

System DPI Packet Interface Unit (SDP) is a co-processor
of OCTEON TX2 which provides PCIe endpoint support for a
remote host to DMA packets into and out of the OCTEON TX2 SoC.
SDP interface comes in to live only when it is connected in
EP mode. It exposes input and output queue pairs to remote host
for instruction input and packet output. It can be used as
a communication channel between remote host and OCTEON TX2.
Host machine needs to use corresponding user/kernel mode
driver to communicate with SDP interface on OCTEON TX2 SoC.

SDP interface support is limited to SDP PF device now.
No SDP VF support.

Signed-off-by: Subrahmanyam Nilla <snilla@marvell.com>
Signed-off-by: Venkateshwarlu Nalla <venkatn@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
4 years agovhost: fix batch enqueue only handle few packets
Marvin Liu [Thu, 7 Nov 2019 14:37:48 +0000 (22:37 +0800)]
vhost: fix batch enqueue only handle few packets

After enqueue function finished, packet index has been increased. Batch
enqueue function should retrieve mbuf structure pointed by that index.

Fixes: 0294211bb6dc ("vhost: optimize packed ring enqueue")

Signed-off-by: Marvin Liu <yong.liu@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
4 years agovhost: fix dirty page logging missing
Marvin Liu [Mon, 4 Nov 2019 11:15:47 +0000 (19:15 +0800)]
vhost: fix dirty page logging missing

Packets data are directly copied when doing batch enqueue, add missed
dirty page logging after memory copy.

Fixes: ef861692c398 ("vhost: add packed ring batch enqueue")

Signed-off-by: Marvin Liu <yong.liu@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
4 years agonet/virtio-user: fix setting filters
Marvin Liu [Wed, 6 Nov 2019 09:02:50 +0000 (17:02 +0800)]
net/virtio-user: fix setting filters

As doc mentioned, Rx/Mac/vlan filters are all supported by best effort.
These control commands should return success.

Fixes: f9b9d1a55775 ("net/virtio-user: add multiple queues in device emulation")
Cc: stable@dpdk.org
Signed-off-by: Marvin Liu <yong.liu@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
4 years agovhost: fix virtqueue not accessible
Marvin Liu [Mon, 4 Nov 2019 10:13:22 +0000 (18:13 +0800)]
vhost: fix virtqueue not accessible

Log feature is disabled in vhost user, so that log address was invalid
when checking. Check whether log address is valid can work around it.
Log address should also be translated in packed ring virtqueue.

Fixes: fbda9f145927 ("vhost: translate incoming log address to GPA")
Cc: stable@dpdk.org
Signed-off-by: Marvin Liu <yong.liu@intel.com>
Reviewed-by: Adrian Moreno <amorenoz@redhat.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
4 years agovhost: fix build dependency on hash lib
Jin Yu [Wed, 30 Oct 2019 09:40:55 +0000 (17:40 +0800)]
vhost: fix build dependency on hash lib

Compile librte_vhost/vhost_crypto.c needs the rte_hash.h
So we need the librte_hash to be compiled before vhost.
Add the DEPDIRs to make sure this.

Bugzilla ID: 356
Fixes: 939066d96563 ("vhost/crypto: add public function implementation")
Cc: stable@dpdk.org
Signed-off-by: Jin Yu <jin.yu@intel.com>
Reviewed-by: Tiwei Bie <tiwei.bie@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
4 years agovhost: do not limit packed ring size
Marvin Liu [Wed, 30 Oct 2019 09:24:21 +0000 (17:24 +0800)]
vhost: do not limit packed ring size

Virtio spec only set rule that packed ring maximum size is up to 2^15
entries. Should not limit packed ring size to power of two.

Fixes: 708e14d8b9ac ("vhost: advertize packed ring layout support")
Cc: stable@dpdk.org
Signed-off-by: Marvin Liu <yong.liu@intel.com>
Reviewed-by: Tiwei Bie <tiwei.bie@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
4 years agonet/virtio: do not limit packed ring size
Marvin Liu [Wed, 30 Oct 2019 09:24:20 +0000 (17:24 +0800)]
net/virtio: do not limit packed ring size

Virtio spec only set rule that packed ring maximum size is up to 2^15
entries. Should not limit packed ring size to power of two.

Fixes: aea29aa5d37b ("net/virtio: enable packed virtqueues by default")
Cc: stable@dpdk.org
Signed-off-by: Marvin Liu <yong.liu@intel.com>
Reviewed-by: Tiwei Bie <tiwei.bie@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
4 years agodoc: remove unsupported feature from hinic
Xiaoyun Wang [Fri, 1 Nov 2019 13:36:46 +0000 (21:36 +0800)]
doc: remove unsupported feature from hinic

This patch removes feature "Free Tx mbuf" on demand from hinic.ini
because pmd driver does not support this feature.

Fixes: 1d09792a270a ("net/hinic: add build and doc files")
Cc: stable@dpdk.org
Signed-off-by: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
4 years agodoc: remove flow director feature from hinic
Xiaoyun Wang [Fri, 1 Nov 2019 13:36:45 +0000 (21:36 +0800)]
doc: remove flow director feature from hinic

This patch removes deprecated feature Flow Director from hinic.ini,
hinic.rst and release_19_11.rst, because the feature has been
removed from the feature list in the following commit:
Commit 030febb6642c ("doc: remove deprecated ethdev features"), and
adds Flow API feature which is for generic filtering to doc files.

Signed-off-by: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
4 years agonet/hinic: optimize mbuf allocation
Xiaoyun Wang [Fri, 1 Nov 2019 13:36:44 +0000 (21:36 +0800)]
net/hinic: optimize mbuf allocation

When port start, driver needs to alloc mbuf resource to fill Rx
queue bd section, replace rte_mbuf_raw_alloc function to
rte_pktmbuf_alloc_bulk with initialized mbuf structure to avoid
some structures being used without initialization.

Signed-off-by: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
4 years agonet/hinic: fix offload info calculating for TSO
Xiaoyun Wang [Fri, 1 Nov 2019 13:36:43 +0000 (21:36 +0800)]
net/hinic: fix offload info calculating for TSO

For VXLAN TSO offload, PMD calculates offload info
err due to the wrong branch, which can cause hardware failed.

Fixes: c3ba1f0f20cd ("net/hinic: support inner L3 checksum offload")

Signed-off-by: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
4 years agonet/hinic/base: fix code style
Xiaoyun Wang [Fri, 1 Nov 2019 13:36:42 +0000 (21:36 +0800)]
net/hinic/base: fix code style

This patch fixs the code style check issue for MACRO_ARG_REUSE.

Fixes: b8582d051af1 ("net/hinic/base: add HW interfaces for SR-IOV")

Signed-off-by: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
4 years agonet: fix IPv4 IHL and VHL define
Flavia Musatescu [Wed, 6 Nov 2019 14:49:41 +0000 (14:49 +0000)]
net: fix IPv4 IHL and VHL define

Fix the RTE_IPV4_VHL_DEF macro that represents the value
for the IPv4 VHL and Minimum IHL header fields according to
rfc791.

Fixes: 2318d8d54565 ("net: define IPv4 IHL and VHL")
Cc: stable@dpdk.org
Reported-by: David Harton <dharton@cisco.com>
Signed-off-by: Flavia Musatescu <flavia.musatescu@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
4 years agoapp/testpmd: fix IP next proto in set raw decap/encap
Xiaoyu Min [Thu, 31 Oct 2019 10:11:02 +0000 (12:11 +0200)]
app/testpmd: fix IP next proto in set raw decap/encap

The IP's next protocol will be specified by user when set IP-in-IP
tunnel header via set raw decap/encap commands.

Currently this field is wrongly set to zero if there is no upper layer.
This leads to the encapsulated IP-in-IP tunnel header is not correct.

This next protocol field should be leave it as-is if there is no upper
layer or value is already set.

Fixes: 30626def03d6 ("app/testpmd: support raw encap/decap actions")
Cc: stable@dpdk.org
Signed-off-by: Xiaoyu Min <jackmin@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
4 years agonet/enic: suppress unwanted error messages
Hyong Youb Kim [Thu, 31 Oct 2019 05:36:23 +0000 (22:36 -0700)]
net/enic: suppress unwanted error messages

Do not log errors when CMD_OVERLAY_OFFLOAD_CTRL and
CMD_GET_SUPP_FEATURE_VER fail, as they are only used to probe if a
feature is provisioned. They are expected to fail if the feature is
not provisioned.

Do not log an error when disabling Geneve offload fails. It is
expected to fail if this feature is provisioned but not enabled.

Fixes: c02a96fc4aec ("net/enic: enable GENEVE with options offload")

Signed-off-by: Hyong Youb Kim <hyonkim@cisco.com>
Reviewed-by: John Daley <johndale@cisco.com>
4 years agonet/enic: fix speed capabilities for new VF
Hyong Youb Kim [Thu, 31 Oct 2019 05:36:22 +0000 (22:36 -0700)]
net/enic: fix speed capabilities for new VF

VFs all have subsystem ID 0. VIC models with the latest VF are at
least 40G, so report that as a more reasonable speed than 10G.

Fixes: 57bb45b37bdf ("net/enic: add PCI id for new virtual function")

Signed-off-by: Hyong Youb Kim <hyonkim@cisco.com>
Reviewed-by: John Daley <johndale@cisco.com>
4 years agonet/enic: fix whitespaces in log macros
Hyong Youb Kim [Thu, 31 Oct 2019 05:36:21 +0000 (22:36 -0700)]
net/enic: fix whitespaces in log macros

Add a space between the function name and message.

Fixes: bbd8ecc05434 ("net/enic: remove PMD log type references")
Cc: stable@dpdk.org
Signed-off-by: Hyong Youb Kim <hyonkim@cisco.com>
Reviewed-by: John Daley <johndale@cisco.com>
4 years agoapp/testpmd: support checking descriptor status
Kiran Kumar K [Tue, 29 Oct 2019 11:34:09 +0000 (17:04 +0530)]
app/testpmd: support checking descriptor status

Adding support to check TX and RX descriptor status.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
4 years agoethdev: move egress metadata to dynamic field
Viacheslav Ovsiienko [Tue, 5 Nov 2019 14:19:31 +0000 (14:19 +0000)]
ethdev: move egress metadata to dynamic field

The dynamic mbuf fields were introduced by [1]. The egress metadata is
good candidate to be moved from statically allocated field tx_metadata to
dynamic one. Because mbufs are used in half-duplex fashion only, it is
safe to share this dynamic field with ingress metadata.

The shared dynamic field contains either egress (if application going to
transmit mbuf with tx_burst) or ingress (if mbuf is received with rx_burst)
metadata and can be accessed by RTE_FLOW_DYNF_METADATA() macro or with
rte_flow_dynf_metadata_set() and rte_flow_dynf_metadata_get() helper
routines. PKT_TX_DYNF_METADATA/PKT_RX_DYNF_METADATA flag will be set
along with the data.

The mbuf dynamic field must be registered by calling
rte_flow_dynf_metadata_register() prior accessing the data.

The availability of dynamic mbuf metadata field can be checked with
rte_flow_dynf_metadata_avail() routine.

DEV_TX_OFFLOAD_MATCH_METADATA offload and configuration flag is removed.
The metadata support in PMDs is engaged on dynamic field registration.

Metadata feature is getting complex. We might have some set of actions
and items that might be supported by PMDs in multiple combinations,
the supported values and masks are the subjects to query by perfroming
trials (with rte_flow_validate).

[1] http://patches.dpdk.org/patch/62040/

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Ori Kam <orika@mellanox.com>
4 years agoethdev: extend flow metadata
Viacheslav Ovsiienko [Tue, 5 Nov 2019 14:19:30 +0000 (14:19 +0000)]
ethdev: extend flow metadata

Currently, metadata can be set on egress path via mbuf tx_metadata field
with PKT_TX_METADATA flag and RTE_FLOW_ITEM_TYPE_META matches metadata.

This patch extends the metadata feature usability.

1) RTE_FLOW_ACTION_TYPE_SET_META

When supporting multiple tables, Tx metadata can also be set by a rule and
matched by another rule. This new action allows metadata to be set as a
result of flow match.

2) Metadata on ingress

There's also need to support metadata on ingress. Metadata can be set by
SET_META action and matched by META item like Tx. The final value set by
the action will be delivered to application via metadata dynamic field of
mbuf which can be accessed by RTE_FLOW_DYNF_METADATA() macro or with
rte_flow_dynf_metadata_set() and rte_flow_dynf_metadata_get() helper
routines. PKT_RX_DYNF_METADATA flag will be set along with the data.

The mbuf dynamic field must be registered by calling
rte_flow_dynf_metadata_register() prior to use SET_META action.

The availability of dynamic mbuf metadata field can be checked
with rte_flow_dynf_metadata_avail() routine.

If application is going to engage the metadata feature it registers
the metadata  dynamic fields, then PMD checks the metadata field
availability and handles the appropriate fields in datapath.

For loopback/hairpin packet, metadata set on Rx/Tx may or may not be
propagated to the other path depending on hardware capability.

MARK and METADATA look similar and might operate in similar way,
but not interacting.

Initially, there were proposed two metadata related actions:

- RTE_FLOW_ACTION_TYPE_FLAG
- RTE_FLOW_ACTION_TYPE_MARK

These actions set the special flag in the packet metadata, MARK action
stores some specified value in the metadata storage, and, on the packet
receiving PMD puts the flag and value to the mbuf and applications can
see the packet was threated inside flow engine according to the appropriate
RTE flow(s). MARK and FLAG are like some kind of gateway to transfer some
per-packet information from the flow engine to the application via
receiving datapath. Also, there is the item of type RTE_FLOW_ITEM_TYPE_MARK
provided. It allows us to extend the flow match pattern with the capability
to match the metadata values set by MARK/FLAG actions on other flows.

From the datapath point of view, the MARK and FLAG are related to the
receiving side only. It would useful to have the same gateway on the
transmitting side and there was the feature of type RTE_FLOW_ITEM_TYPE_META
was proposed. The application can fill the field in mbuf and this value
will be transferred to some field in the packet metadata inside the flow
engine. It did not matter whether these metadata fields are shared because
of MARK and META items belonged to different domains (receiving and
transmitting) and could be vendor-specific.

So far, so good, DPDK proposes some entities to control metadata inside
the flow engine and gateways to exchange these values on a per-packet basis
via datapaths.

As we can see, the MARK and META means are not symmetric, there is absent
action which would allow us to set META value on the transmitting path.
So, the action of type:

- RTE_FLOW_ACTION_TYPE_SET_META was proposed.

The next, applications raise the new requirements for packet metadata.
The flow ngines are getting more complex, internal switches are introduced,
multiple ports might be supported within the same flow engine namespace.
From the DPDK points of view, it means the packets might be sent on one
eth_dev port and received on the other one, and the packet path inside
the flow engine entirely belongs to the same hardware device. The simplest
example is SR-IOV with PF, VFs and the representors. And there is a
brilliant opportunity to provide some out-of-band channel to transfer
some extra data from one port to another one, besides the packet data
itself. And applications would like to use this opportunity.

It is supposed for application to use trials (with rte_flow_validate)
to detect which metadata features (FLAG, MARK, META) actually supported
by PMD and underlying hardware. It might depend on PMD configuration,
system software, hardware settings, etc., and should be detected
in run time.

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Ori Kam <orika@mellanox.com>
4 years agoethdev: enhance burst mode information API
Haiyue Wang [Wed, 6 Nov 2019 01:30:05 +0000 (09:30 +0800)]
ethdev: enhance burst mode information API

Change the type of burst mode information from bit field to free string
data, so that each PMD can describe the Rx/Tx busrt functions flexibly.

Fixes: eb5902504a13 ("ethdev: add API for getting burst mode information")
Fixes: 6b6609f68ccd ("net/i40e: support Rx/Tx burst mode info")
Fixes: e9a10e6c2102 ("net/ice: support Rx/Tx burst mode info")
Fixes: 7fe108edcf53 ("app/testpmd: show Rx/Tx burst mode description")

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Ray Kinsella <ray.kinsella@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
4 years agodoc: replace license text with SPDX tag for nfp
Hemant Agrawal [Fri, 27 Sep 2019 09:04:33 +0000 (14:34 +0530)]
doc: replace license text with SPDX tag for nfp

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Alejandro Lucero <alejandro.lucero@netronome.com>
4 years agonet/octeontx2: fix 32-bit build
Pavan Nikhilesh [Wed, 30 Oct 2019 18:31:42 +0000 (00:01 +0530)]
net/octeontx2: fix 32-bit build

x86_x32 compilation failing due to incorrect format specifiers in logs.

Fixes: a78b9246723b ("net/octeontx2: add remaining PTP operations")
Cc: stable@dpdk.org
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
4 years agonet/bnxt: fix Rx queue start/stop for Thor based NICs
Lance Richardson [Mon, 4 Nov 2019 20:27:47 +0000 (15:27 -0500)]
net/bnxt: fix Rx queue start/stop for Thor based NICs

Controller-specific handling is required for Thor-based NICs when
stopping or starting a receive queue, otherwise packet reception
may not be reliably resumed when a stopped receive queue is
restarted:
  - The VNIC default receive ring needs to be recomputed when a
    receive queue is stopped or started.
  - When stopping the last (or only) receive queue for a given
    VNIC, ensure that no packets can reach the default receive
    ring by temporarily setting the VNIC MRU to zero.

Fixes: f8168ca0e690 ("net/bnxt: support thor controller")
Cc: stable@dpdk.org
Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
4 years agonet/bnxt: release HWRM lock before returning
Lance Richardson [Mon, 4 Nov 2019 20:27:46 +0000 (15:27 -0500)]
net/bnxt: release HWRM lock before returning

The function bnxt_vnic_rss_configure_thor() returns early when
all receive queues are stopped without releasing the hwrm
spinlock, which causes subsequent HWRM operations to hang. Fix
by ensuring that the lock is released before returning from
this function.

Fixes: 38412304b50a ("net/bnxt: enable RSS for thor-based controllers")
Cc: stable@dpdk.org
Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
4 years agonet/bnxt: keep consistent Rx queue start/stop state
Lance Richardson [Mon, 4 Nov 2019 20:27:45 +0000 (15:27 -0500)]
net/bnxt: keep consistent Rx queue start/stop state

Receive queue state needs to reflect "started" state when rebuilding
the RSS table for Thor-based NICs. Move state update so that receive
queues being started are included in the RSS table.

Fixes: 38412304b50a ("net/bnxt: enable RSS for thor-based controllers")
Cc: stable@dpdk.org
Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
4 years agonet/bnxt: fix RSS table update for start/stop Rx queue
Lance Richardson [Mon, 4 Nov 2019 20:27:44 +0000 (15:27 -0500)]
net/bnxt: fix RSS table update for start/stop Rx queue

A previous commit made updating of the RSS table when a receive
queue is stopped/started conditional on vnic->rx_queue_cnt being
nonzero. This count is only nonzero for dynamically created VNICs,
so the RSS table was not being updated in the normal path.
Fix by restoring the original logic.

Also ensure that vnic->rx_queue_cnt is initialized to zero when
reinitializing the VNIC array.

Fixes: 36024b2e7fe5 ("net/bnxt: allow dynamic creation of VNIC")

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
4 years agonet/bnxt: fix COS queue mapping
Ajit Khaparde [Mon, 4 Nov 2019 10:02:40 +0000 (15:32 +0530)]
net/bnxt: fix COS queue mapping

While issuing hwrm_queue_qportcfg command, we are setting the
drv_qmap_cap bit which is causing the firmware to return incorrect COS
queue mapping.
This bit is not required when COS classification is enabled.

Fixes: 698aa7e95325 ("net/bnxt: add code to determine the Tx COS queue")
Cc: stable@dpdk.org
Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
4 years agonet/bnxt: fix initialization
Kalesh AP [Mon, 4 Nov 2019 10:02:39 +0000 (15:32 +0530)]
net/bnxt: fix initialization

During initialization sequence in bnxt_alloc_mem()
if bnxt_alloc_async_cp_ring() fails, driver invokes bnxt_free_mem()
which in turn call bnxt_free_vnic_mem() which causes the error logs
"bnxt_free_vnic_mem(): VNIC is not freed yet!". This is because
vnic memory is allocated but not initialized yet.

Fix this by moving bnxt_init_vnics() from bnxt_init_nic() to
bnxt_alloc_vnic_mem(). Also get rid of bnxt_init_nic() as the
initialization is done in respective functions now.

Fixes: 1bf01f5135f8 ("net/bnxt: prevent device access when device is in reset")

Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Santoshkumar Karanappa Rastapur <santosh.rastapur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
4 years agonet/bnxt: fix VNIC allocation on port toggle
Santoshkumar Karanappa Rastapur [Mon, 4 Nov 2019 10:02:38 +0000 (15:32 +0530)]
net/bnxt: fix VNIC allocation on port toggle

bnxt_init_chip called on port start keeps incrementing rx_cosq_cnt.
Hence more vnics are allocated with less number of rings on each port
stop/start operation. Eventually vnic allocation fails due to incorrect
ring group as no ring gets allocated to the vnic.

Fixes: 84d49664b5b2 ("net/bnxt: support CoS classification")

Signed-off-by: Santoshkumar Karanappa Rastapur <santosh.rastapur@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
4 years agonet/bnxt: fix redundant MAC address check
Venkat Duvvuru [Mon, 4 Nov 2019 10:02:37 +0000 (15:32 +0530)]
net/bnxt: fix redundant MAC address check

filter->mac_index is used to check, if a same mac is
already programmed. Hence, filter->dflt member is not
needed which is also used for mac addr redundancy check.

This patch fixes it by moving mac_index based redundant
check from bnxt_mac_addr_add_op to bnxt_add_mac_filter

Fixes: 6118503d8071 ("net/bnxt: fix VLAN filtering")
Cc: stable@dpdk.org
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
4 years agonet/bnxt: fix L4 checksum indication in non-vector Rx
Kalesh AP [Mon, 4 Nov 2019 10:02:36 +0000 (15:32 +0530)]
net/bnxt: fix L4 checksum indication in non-vector Rx

Update "mbuf->ol_flags" correctly for inner and ourter ip checksum
errors in case of tunnel and non-tunnel packets.

Fixes: 65ee636872eb ("net/bnxt: fix Rx checksum flags")
Cc: stable@dpdk.org
Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
4 years agonet/bnxt: fix debug log level
Stephen Hemminger [Mon, 28 Oct 2019 16:53:39 +0000 (09:53 -0700)]
net/bnxt: fix debug log level

Creating a flow is a normal event; should not be logged at error level.

Fixes: 5c1171c97216 ("net/bnxt: refactor filter/flow")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
4 years agonet/mlx5: check port ID and VLAN actions ordering
Xiaoyu Min [Mon, 4 Nov 2019 12:43:39 +0000 (14:43 +0200)]
net/mlx5: check port ID and VLAN actions ordering

Rdma-core needs the dst_vport (port_id) action be after push/pop VLAN
and modify hdr actions otherwise it will reject to create rule.

This pach validates the port_id is after push/pop VLAN and set VLAN
VID/PCP otherwise PMD spits out errors.

Fixes: 5f163d520cff ("net/mlx5: support modify VLAN ID on existing VLAN header")

Signed-off-by: Xiaoyu Min <jackmin@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: fix set VLAN ID/PCP in new header
Xiaoyu Min [Fri, 1 Nov 2019 01:32:32 +0000 (03:32 +0200)]
net/mlx5: fix set VLAN ID/PCP in new header

Currently if user want to set VLAN id/pcp on an about to be pushed VLAN
header, the of_set_vlan_vid/of_set_vlan_pcp must be present _before_
action of_push_vlan:

[1] ... actions of_set_vlan_vid vlan_vid 2 / of_push_vlan ...

This is misleading because people think rule [1] intends to set VLAN id
on the existing VLAN header and then push one new VLAN header on top of
it.

A more natual way to set VLAN id/pcp on an to be pushed VLAN header
should be:

[2] ... actions of_push_vlan / of_set_vlan_vid vlan_vid 2 / ...

Fixes: a5f2da0b816b ("net/mlx5: support modify VLAN ID on new VLAN header")
Fixes: 68fad3635042 ("net/mlx5: support modifying VLAN priority on VLAN header")

Signed-off-by: Xiaoyu Min <jackmin@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
4 years agonet/mlx5: remove redundant new line in logs
Dekel Peled [Wed, 30 Oct 2019 08:42:08 +0000 (10:42 +0200)]
net/mlx5: remove redundant new line in logs

DRV_LOG macro is used to print log messages, one per line.
In several locations this macro is used with redundant '\n' character
at the end of the log message, causing blank lines between log lines.

This patch removes the '\n' character where it is redundant.

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
4 years agonet/ice: fix setting max frame size
Jiaqi Min [Mon, 4 Nov 2019 15:33:32 +0000 (15:33 +0000)]
net/ice: fix setting max frame size

Max frame size is not set to HW, so packets above the MTU
do not get dropped by HW. The patch fixed the issue.

Fixes: 50370662b727 ("net/ice: support device and queue ops")
Cc: stable@dpdk.org
Signed-off-by: Jiaqi Min <jiaqix.min@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
4 years agonet/ixgbe: fix link status
Xiao Zhang [Tue, 29 Oct 2019 05:33:23 +0000 (13:33 +0800)]
net/ixgbe: fix link status

The link status for 82599eb got from link status register was not
correct, check the enable/disable flag of tx laser when getting the link
status, set the link status down if tx laser disabled since the tx laser
flag could be set correctly when up/down the link status.

Fixes: dc66e5fd01b9 ("net/ixgbe: improve link state check on VF")
Cc: stable@dpdk.org
Signed-off-by: Xiao Zhang <xiao.zhang@intel.com>
Reviewed-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
4 years agonet/ixgbe: fix port close in FreeBSD
Chenxu Di [Fri, 1 Nov 2019 02:26:44 +0000 (02:26 +0000)]
net/ixgbe: fix port close in FreeBSD

FreeBSD OS doesn't support igb_uio interrupt, so it will fail when
unregister the interrupt callback in port close. We can fix the issue by
passing -ENOENT when check the return value of unregister interrupt
callback function.

Fixes: f2f4990eff94 ("net/ixgbe: release port upon close")

Signed-off-by: Chenxu Di <chenxux.di@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
4 years agonet/i40e: handle QinQ strip
Tao Zhu [Wed, 30 Oct 2019 18:21:31 +0000 (02:21 +0800)]
net/i40e: handle QinQ strip

Qinq strip is not supported by i40e. When user tries to turn on
QinQ strip, the driver gives unsupported return value and log.

Signed-off-by: Tao Zhu <taox.zhu@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
4 years agonet/ice/base: fix symmetric hash configure
Qi Zhang [Thu, 31 Oct 2019 03:55:21 +0000 (11:55 +0800)]
net/ice/base: fix symmetric hash configure

When a new hash profile is created, we need to reset all related
GLQF_HSYMM registers, otherwise unexpected hash behaviour may happen
on packet that hits that profile.

The patch fixes the issue that we only do reset when symmetric hash
is required, but actually for non symmetric hash we also need this,
since GLQF_HSYMM might be polluted by previous configuration.

Fixes: ddae0440353f ("net/ice/base: enable symmetric hash for RSS")

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Tested-by: Simei Su <simei.su@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
4 years agonet/ixgbe: fix MACsec setting
Guinan Sun [Thu, 31 Oct 2019 11:31:52 +0000 (11:31 +0000)]
net/ixgbe: fix MACsec setting

MACsec setting is not valid when port is stopped.
In order to make it valid, the patch changes the setting
to where port is started.

Fixes: 597f9fafe13b ("app/testpmd: convert to new Tx offloads API")
Cc: stable@dpdk.org
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
4 years agonet/ice: remove GTPU tunnel support for inner L4
Yahui Cao [Thu, 31 Oct 2019 13:05:38 +0000 (21:05 +0800)]
net/ice: remove GTPU tunnel support for inner L4

The current code doesn't support L4 matching, it only supports L3
matching so remove the code for inner L4.

Fixes: efc16c621415 ("net/ice: support flow director GTPU tunnel")

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
4 years agonet/ixgbe: remove unused macro in NEON path
Ruifeng Wang [Thu, 24 Oct 2019 02:58:03 +0000 (10:58 +0800)]
net/ixgbe: remove unused macro in NEON path

Fixes: ed838a5fe957 ("net/ixgbe: use intrinsics to count packet in NEON Rx")
Cc: stable@dpdk.org
Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
4 years agonet/ixgbe: support packet type with NEON
Ruifeng Wang [Thu, 24 Oct 2019 02:58:02 +0000 (10:58 +0800)]
net/ixgbe: support packet type with NEON

Ptype parse is missing in aarch64 vector PMD. It makes packet type info
provided by NIC get lost, thus requires extra CPU cycles to do this.
Add the parse process to utilize NIC hardware capability.

In test with l3fwd (removed port conf DEV_RX_OFFLOAD_CHECKSUM),
observed over 3% performance gain.

Fixes: b20971b6cca0 ("net/ixgbe: implement vector driver for ARM")
Cc: stable@dpdk.org
Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
4 years agodoc: remove flow director feature from hns3
Wei Hu (Xavier) [Fri, 11 Oct 2019 02:29:53 +0000 (10:29 +0800)]
doc: remove flow director feature from hns3

This patch removes deprecated feature 'Flow Director' from hns3.ini
and hns3_vf.ini because the feature has been removed from the
feature list in the following commit:
Commit 030febb6642c ("doc: remove deprecated ethdev features")

Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
Signed-off-by: Chunsong Feng <fengchunsong@huawei.com>
4 years agoethdev: add flow tag
Viacheslav Ovsiienko [Sun, 27 Oct 2019 18:42:28 +0000 (18:42 +0000)]
ethdev: add flow tag

A tag is a transient data which can be used during flow match. This can be
used to store match result from a previous table so that the same pattern
need not be matched again on the next table. Even if outer header is
decapsulated on the previous match, the match result can be kept.

Some device expose internal registers of its flow processing pipeline and
those registers are quite useful for stateful connection tracking as it
keeps status of flow matching. Multiple tags are supported by specifying
index.

Example testpmd commands are:

  flow create 0 ingress pattern ... / end
    actions set_tag index 2 value 0xaa00bb mask 0xffff00ff /
            set_tag index 3 value 0x123456 mask 0xffffff /
            vxlan_decap / jump group 1 / end

  flow create 0 ingress pattern ... / end
    actions set_tag index 2 value 0xcc00 mask 0xff00 /
            set_tag index 3 value 0x123456 mask 0xffffff /
            vxlan_decap / jump group 1 / end

  flow create 0 ingress group 1
    pattern tag index is 2 value spec 0xaa00bb value mask 0xffff00ff /
            eth ... / end
    actions ... jump group 2 / end

  flow create 0 ingress group 1
    pattern tag index is 2 value spec 0xcc00 value mask 0xff00 /
            tag index is 3 value spec 0x123456 value mask 0xffffff /
            eth ... / end
    actions ... / end

  flow create 0 ingress group 2
    pattern tag index is 3 value spec 0x123456 value mask 0xffffff /
            eth ... / end
    actions ... / end

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
4 years agoethdev: remove deprecated port count function
Thomas Monjalon [Mon, 28 Oct 2019 10:49:34 +0000 (11:49 +0100)]
ethdev: remove deprecated port count function

The function rte_eth_dev_count() was marked as deprecated in DPDK 18.05
in commit d9a42a69febf ("ethdev: deprecate port count function").
It was planned to be removed after 19.11 LTS release,
but given we must not break ABI between 19.11 and 20.11,
it is removed now.

Note the ABI version is not dumped in this commit
because other changes already did.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Neil Horman <nhorman@tuxdriver.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
4 years agomk: fix dpaax library dependency
Gagandeep Singh [Thu, 31 Oct 2019 07:14:10 +0000 (12:44 +0530)]
mk: fix dpaax library dependency

This patch fixes dpaax library dependency for
NXP's PMDs.

Fixes: e56463ec47f0 ("net/enetc: enable dpaax library")
Fixes: 67fc3ff97c39 ("net/pfe: introduce basic functions")
Fixes: 9e727d4a3fd4 ("crypto/caam_jr: integrate DPAAX table")

Suggested-by: Thierry Herbelot <thierry.herbelot@6wind.com>
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Thierry Herbelot <thierry.herbelot@6wind.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
4 years agonet/mlx5: split hairpin flows
Ori Kam [Wed, 30 Oct 2019 23:53:23 +0000 (23:53 +0000)]
net/mlx5: split hairpin flows

Since the encap action is not supported in RX, we need to split the
hairpin flow into RX and TX.

Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
4 years agonet/mlx5: add default flows for hairpin
Ori Kam [Wed, 30 Oct 2019 23:53:22 +0000 (23:53 +0000)]
net/mlx5: add default flows for hairpin

When using hairpin all traffic from TX hairpin queues should jump
to dedecated table where matching can be done using regesters.

Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
4 years agonet/mlx5: add ID generation
Ori Kam [Wed, 30 Oct 2019 23:53:21 +0000 (23:53 +0000)]
net/mlx5: add ID generation

When splitting flows for example in hairpin / metering, there is a need
to combine the flows. This is done using ID.
This commit introduce a simple way to generate such IDs.

The reason why bitmap was not used is due to fact that the release and
allocation are O(n) while in the chosen approch the allocation and
release are O(1)

Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
4 years agonet/mlx5: add internal tag item and action
Ori Kam [Wed, 30 Oct 2019 23:53:20 +0000 (23:53 +0000)]
net/mlx5: add internal tag item and action

This commit introduce the setting and matching on registers.
This item and and action will be used with number of different
features like hairpin, metering, metadata.

Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
4 years agonet/mlx5: support RSS on hairpin
Ori Kam [Wed, 30 Oct 2019 23:53:19 +0000 (23:53 +0000)]
net/mlx5: support RSS on hairpin

Add support for rss on hairpin queues.

Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
4 years agonet/mlx5: add hairpin binding function
Ori Kam [Wed, 30 Oct 2019 23:53:18 +0000 (23:53 +0000)]
net/mlx5: add hairpin binding function

When starting the port, in addition to creating the queues
we need to bind the hairpin queues.

Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
4 years agonet/mlx5: get hairpin capabilities
Ori Kam [Wed, 30 Oct 2019 23:53:16 +0000 (23:53 +0000)]
net/mlx5: get hairpin capabilities

This commits adds the hairpin get capabilities function.

Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
4 years agonet/mlx5: support Tx hairpin queues
Ori Kam [Wed, 30 Oct 2019 23:53:15 +0000 (23:53 +0000)]
net/mlx5: support Tx hairpin queues

This commit adds the support for creating Tx hairpin queues.
Hairpin queue is a queue that is created using DevX and only used
by the HW.

Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
4 years agonet/mlx5: prepare Tx queues to have different types
Ori Kam [Wed, 30 Oct 2019 23:53:14 +0000 (23:53 +0000)]
net/mlx5: prepare Tx queues to have different types

Currently all Tx queues are created using Verbs.
This commit modify the naming so it will not include verbs,
since in next commit a new type will be introduce (hairpin)

Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
4 years agonet/mlx5: support Rx hairpin queues
Ori Kam [Wed, 30 Oct 2019 23:53:13 +0000 (23:53 +0000)]
net/mlx5: support Rx hairpin queues

This commit adds the support for creating Rx hairpin queues.
Hairpin queue is a queue that is created using DevX and only used
by the HW. This results in that all the data part of the RQ is not being
used.

Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
4 years agonet/mlx5: query hairpin capabilities
Ori Kam [Wed, 30 Oct 2019 23:53:12 +0000 (23:53 +0000)]
net/mlx5: query hairpin capabilities

This commit query and store the hairpin capabilities from the device.

Those capabilities will be used when creating the hairpin queue.

Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
4 years agoethdev: add hairpin queue
Ori Kam [Wed, 30 Oct 2019 23:53:11 +0000 (23:53 +0000)]
ethdev: add hairpin queue

This commit introduce hairpin queue type.

The hairpin queue in build from Rx queue binded to Tx queue.
It is used to offload traffic coming from the wire and redirect it back
to the wire.

There are 3 new functions:
- rte_eth_dev_hairpin_capability_get
- rte_eth_rx_hairpin_queue_setup
- rte_eth_tx_hairpin_queue_setup

In order to use the queue, there is a need to create rte_flow
with queue / RSS action that targets one or more of the Rx queues.

Signed-off-by: Ori Kam <orika@mellanox.com>
Reviewed-by: Andrew Rybchenko <arybchenko@solarflare.com>
4 years agoethdev: move queue state defines to private file
Ori Kam [Wed, 30 Oct 2019 23:53:10 +0000 (23:53 +0000)]
ethdev: move queue state defines to private file

The queue state defines are internal to the DPDK.
This commit moves them to a private header file.

Signed-off-by: Ori Kam <orika@mellanox.com>
Reviewed-by: Andrew Rybchenko <arybchenko@solarflare.com>
4 years agonet/octeontx2: support HIGIG2
Kiran Kumar K [Wed, 23 Oct 2019 15:25:49 +0000 (20:55 +0530)]
net/octeontx2: support HIGIG2

Adding support to parse higig2 header in RTE flow for octeontx2.
And added devargs to configure port for higig2.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
4 years agonet/octeontx2: support enabling switch type
Kiran Kumar K [Wed, 23 Oct 2019 15:25:48 +0000 (20:55 +0530)]
net/octeontx2: support enabling switch type

Adding support to configure specific switch types like high2 and dsa
on a port. When this switch type is configured, it is expected that
all the traffic on that port should be of specific type only.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
4 years agonet/octeontx2: skip flow control on LBK ports
Vamsi Attunuru [Wed, 30 Oct 2019 05:54:10 +0000 (11:24 +0530)]
net/octeontx2: skip flow control on LBK ports

LBK interface does not support any flow control related
HW configurations.

Skip flow control set requests on LBK bound ethports.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
4 years agonet/octeontx2: fix VF index in VF action
Vamsi Attunuru [Tue, 29 Oct 2019 17:50:59 +0000 (23:20 +0530)]
net/octeontx2: fix VF index in VF action

VF index needs to be checked against maxvf count
before incrementing it for preparing pf_func.

Fixes: 520270d5184a ("net/octeontx2: support PF and VF action")
Cc: stable@dpdk.org
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
4 years agonet/qede: fix setting VLAN strip mode
Shahed Shaikh [Sun, 20 Oct 2019 05:20:51 +0000 (22:20 -0700)]
net/qede: fix setting VLAN strip mode

Commit 9a6d30ae6d46 ("net/qede: refactoring vport handling code")
deleted the code as part of refactoring which sets vlan strip mode.
Revert it back and fix vlan strip feature.

Fixes: 9a6d30ae6d46 ("net/qede: refactoring vport handling code")
Cc: stable@dpdk.org
Signed-off-by: Shahed Shaikh <shshaikh@marvell.com>
Reviewed-by: Rasesh Mody <rmody@marvell.com>
4 years agonet/qede: fix setting MTU
Shahed Shaikh [Sun, 20 Oct 2019 05:20:50 +0000 (22:20 -0700)]
net/qede: fix setting MTU

New MTU value is not propagated to vport in HW when MTU update request
is sent while ports are stopped.

This patch fixes the logic error for above mentioned condition.

Fixes: d121a6b5f781 ("net/qede: fix VF MTU update")
Cc: stable@dpdk.org
Signed-off-by: Shahed Shaikh <shshaikh@marvell.com>
Reviewed-by: Rasesh Mody <rmody@marvell.com>
4 years agonet/qede/base: update FW to 8.40.33.0
Rasesh Mody [Sun, 20 Oct 2019 05:20:49 +0000 (22:20 -0700)]
net/qede/base: update FW to 8.40.33.0

In our testing we have identified a critical FW bug. Performance
is degraded significantly for certain packet sizes with 8.40.25.0 FW.

This patch updates the FW to version 8.40.33.0. The updated FW has a
fix to performance issue.

The patch also adds initialization for FW overlay RAM as part of
hardware initialization which is required by the new FW.

Fixes: 3b307c55f2ac ("net/qede/base: update FW to 8.40.25.0")
Cc: stable@dpdk.org
Signed-off-by: Rasesh Mody <rmody@marvell.com>
4 years agonet/ena: fix indication of bad L4 Rx checksums
Igor Chauskin [Mon, 28 Oct 2019 10:23:33 +0000 (11:23 +0100)]
net/ena: fix indication of bad L4 Rx checksums

Add checking of l4_csum_checked and frag flags before checking the
l4_csum_error flag.

In case of IP fragment/unchecked L4 csum - add PKT_RX_L4_CKSUM_UNKNOWN
flag to the indicated mbuf.

Fixes: 1173fca25af9 ("ena: add polling-mode driver")
Cc: stable@dpdk.org
Signed-off-by: Igor Chauskin <igorch@amazon.com>
Reviewed-by: Maciej Bielski <mba@semihalf.com>
Reviewed-by: Michal Krawczyk <mk@semihalf.com>
4 years agonet/ice: fix flow director
Ying A Wang [Tue, 29 Oct 2019 18:13:41 +0000 (02:13 +0800)]
net/ice: fix flow director

Flow director rule can't be created when the flow table is nearly full.
The patch fixed this issue to enable created flows reaching the maximum
number.

Fixes: 1a2fc1799f09 ("net/ice: reject duplicated flow for flow director")

Signed-off-by: Ying A Wang <ying.a.wang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
4 years agonet/ice: correct key length and queues check for RSS
Simei Su [Wed, 30 Oct 2019 02:52:25 +0000 (10:52 +0800)]
net/ice: correct key length and queues check for RSS

This patch corrects key_len and queues check. The key_len and queues
are not supported to configure for RSS in rte_flow.

Fixes: 5ad3db8d4bdd ("net/ice: enable advanced RSS")

Signed-off-by: Simei Su <simei.su@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>